Denis Nyzovets / FT810_DISCO-F429ZI

Library for FT810 EVE chip

Fork of FT810 by Curtis Mattull

inc/FT_Gpu_Hal.h@11:435747a1f2ae, 2017-09-16 (annotated)

Committer:
mozillain
Date:
Sat Sep 16 23:40:11 2017 +0000
Revision:
11:435747a1f2ae
Parent:
10:4c10e6aeb239 
test2

Who changed what in which revision?

UserRevisionLine numberNew contents of line
cpm219 0:2d0ef4830603 1 #ifndef FT_GPU_HAL_H
cpm219 0:2d0ef4830603 2 #define FT_GPU_HAL_H
cpm219 0:2d0ef4830603 3
cpm219 0:2d0ef4830603 4 #include "mbed.h"
cpm219 0:2d0ef4830603 5 #include "FT_DataTypes.h"
cpm219 0:2d0ef4830603 6
cpm219 0:2d0ef4830603 7 typedef enum {
cpm219 0:2d0ef4830603 8 FT_GPU_I2C_MODE = 0,
cpm219 0:2d0ef4830603 9 FT_GPU_SPI_MODE,
cpm219 0:2d0ef4830603 10
cpm219 0:2d0ef4830603 11 FT_GPU_MODE_COUNT,
cpm219 0:2d0ef4830603 12 FT_GPU_MODE_UNKNOWN = FT_GPU_MODE_COUNT
cpm219 0:2d0ef4830603 13 } FT_GPU_HAL_MODE_E;
cpm219 0:2d0ef4830603 14
cpm219 0:2d0ef4830603 15 typedef enum {
cpm219 0:2d0ef4830603 16 OPENED,
cpm219 0:2d0ef4830603 17 READING,
cpm219 0:2d0ef4830603 18 WRITING,
cpm219 0:2d0ef4830603 19 CLOSED,
cpm219 0:2d0ef4830603 20 STATUS_COUNT,
cpm219 0:2d0ef4830603 21 STATUS_ERROR = STATUS_COUNT
cpm219 0:2d0ef4830603 22 } FT_GPU_HAL_STATUS_E;
cpm219 0:2d0ef4830603 23
cpm219 0:2d0ef4830603 24 typedef struct {
cpm219 0:2d0ef4830603 25 ft_uint8_t reserved;
cpm219 0:2d0ef4830603 26 } Ft_Gpu_App_Context_t;
cpm219 0:2d0ef4830603 27
cpm219 0:2d0ef4830603 28 typedef struct {
cpm219 0:2d0ef4830603 29 /* Total number channels for libmpsse */
cpm219 0:2d0ef4830603 30 ft_uint32_t TotalChannelNum;
cpm219 0:2d0ef4830603 31 } Ft_Gpu_HalInit_t;
cpm219 0:2d0ef4830603 32
cpm219 0:2d0ef4830603 33 typedef enum {
cpm219 0:2d0ef4830603 34 FT_GPU_READ = 0,
cpm219 0:2d0ef4830603 35 FT_GPU_WRITE,
cpm219 0:2d0ef4830603 36 } FT_GPU_TRANSFERDIR_T;
cpm219 0:2d0ef4830603 37
cpm219 0:2d0ef4830603 38
cpm219 0:2d0ef4830603 39 typedef struct {
cpm219 0:2d0ef4830603 40 ft_uint32_t length; //IN and OUT
cpm219 0:2d0ef4830603 41 ft_uint32_t address;
cpm219 0:2d0ef4830603 42 ft_uint8_t *buffer;
cpm219 0:2d0ef4830603 43 } Ft_Gpu_App_Transfer_t;
cpm219 0:2d0ef4830603 44
cpm219 0:2d0ef4830603 45 class FT800
cpm219 0:2d0ef4830603 46 {
cpm219 0:2d0ef4830603 47 public:
cpm219 0:2d0ef4830603 48 FT800(PinName mosi,
cpm219 0:2d0ef4830603 49 PinName miso,
cpm219 0:2d0ef4830603 50 PinName sck,
cpm219 0:2d0ef4830603 51 PinName ss,
cpm219 0:2d0ef4830603 52 PinName intr,
cpm219 0:2d0ef4830603 53 PinName pd);
cpm219 0:2d0ef4830603 54
cpm219 0:2d0ef4830603 55 private:
cpm219 0:2d0ef4830603 56 SPI _spi;
cpm219 0:2d0ef4830603 57 DigitalOut _ss;
cpm219 0:2d0ef4830603 58 DigitalOut _pd;
cpm219 0:2d0ef4830603 59 InterruptIn _f800_isr;
cpm219 0:2d0ef4830603 60 public:
cpm219 0:2d0ef4830603 61 /* Global used for buffer optimization */
cpm219 0:2d0ef4830603 62 //Ft_Gpu_Hal_Context_t host,*phost;
cpm219 0:2d0ef4830603 63 Ft_Gpu_App_Context_t app_header;
cpm219 0:2d0ef4830603 64 ft_uint16_t cmd_fifo_wp; //coprocessor fifo write pointer
cpm219 0:2d0ef4830603 65 ft_uint16_t dl_buff_wp; //display command memory write pointer
cpm219 0:2d0ef4830603 66 FT_GPU_HAL_STATUS_E status; //OUT
cpm219 0:2d0ef4830603 67 ft_void_t* hal_handle; //IN/OUT
cpm219 0:2d0ef4830603 68 ft_uint32_t CmdBuffer_Index;
cpm219 0:2d0ef4830603 69 ft_uint32_t DlBuffer_Index;
cpm219 0:2d0ef4830603 70 ft_int16_t DispWidth;
cpm219 0:2d0ef4830603 71 ft_int16_t DispHeight;
cpm219 0:2d0ef4830603 72 ft_int16_t DispHCycle;
cpm219 0:2d0ef4830603 73 ft_int16_t DispHOffset;
cpm219 0:2d0ef4830603 74 ft_int16_t DispHSync0;
cpm219 0:2d0ef4830603 75 ft_int16_t DispHSync1;
cpm219 0:2d0ef4830603 76 ft_int16_t DispVCycle;
cpm219 0:2d0ef4830603 77 ft_int16_t DispVOffset;
cpm219 0:2d0ef4830603 78 ft_int16_t DispVSync0;
cpm219 0:2d0ef4830603 79 ft_int16_t DispVSync1;
cpm219 0:2d0ef4830603 80 ft_uint8_t DispPCLK;
cpm219 0:2d0ef4830603 81 ft_char8_t DispSwizzle;
mozillain 10:4c10e6aeb239 82 ft_char8_t DispPCLKPol;
mozillain 10:4c10e6aeb239 83 ft_char8_t DispCSpread; //
mozillain 10:4c10e6aeb239 84 ft_char8_t DispDither; //
cpm219 0:2d0ef4830603 85
cpm219 0:2d0ef4830603 86
cpm219 0:2d0ef4830603 87 ft_void_t BootupConfig(void);
cpm219 0:2d0ef4830603 88 ft_bool_t Bootup(void);
cpm219 0:2d0ef4830603 89
cpm219 0:2d0ef4830603 90
cpm219 0:2d0ef4830603 91 /*The basic APIs Level 1*/
cpm219 0:2d0ef4830603 92 ft_bool_t Init( );
cpm219 0:2d0ef4830603 93 ft_bool_t Open( );
cpm219 0:2d0ef4830603 94
cpm219 0:2d0ef4830603 95 /*The APIs for reading/writing transfer continuously only with small buffer system*/
cpm219 0:2d0ef4830603 96 ft_void_t StartTransfer(FT_GPU_TRANSFERDIR_T rw,ft_uint32_t addr);
cpm219 0:2d0ef4830603 97 ft_uint8_t Transfer8(ft_uint8_t value);
cpm219 0:2d0ef4830603 98 ft_uint16_t Transfer16(ft_uint16_t value);
cpm219 0:2d0ef4830603 99 ft_uint32_t Transfer32(ft_uint32_t value);
cpm219 0:2d0ef4830603 100 ft_void_t EndTransfer( );
cpm219 0:2d0ef4830603 101
cpm219 0:2d0ef4830603 102 /*Read & Write APIs for both burst and single transfer,depending on buffer size*/
cpm219 0:2d0ef4830603 103 ft_void_t Read(Ft_Gpu_App_Transfer_t *transfer);
cpm219 0:2d0ef4830603 104 ft_void_t Write(Ft_Gpu_App_Transfer_t *transfer);
cpm219 0:2d0ef4830603 105
cpm219 0:2d0ef4830603 106 ft_void_t Close();
cpm219 0:2d0ef4830603 107 ft_void_t DeInit();
cpm219 0:2d0ef4830603 108
cpm219 0:2d0ef4830603 109 /*Helper function APIs Read*/
cpm219 0:2d0ef4830603 110 ft_uint8_t Rd8(ft_uint32_t addr);
cpm219 0:2d0ef4830603 111 ft_uint16_t Rd16(ft_uint32_t addr);
cpm219 0:2d0ef4830603 112 ft_uint32_t Rd32(ft_uint32_t addr);
cpm219 0:2d0ef4830603 113
cpm219 0:2d0ef4830603 114 /*Helper function APIs Write*/
cpm219 0:2d0ef4830603 115 ft_void_t Wr8(ft_uint32_t addr, ft_uint8_t v);
cpm219 0:2d0ef4830603 116 ft_void_t Wr16(ft_uint32_t addr, ft_uint16_t v);
cpm219 0:2d0ef4830603 117 ft_void_t Wr32(ft_uint32_t addr, ft_uint32_t v);
cpm219 0:2d0ef4830603 118
cpm219 0:2d0ef4830603 119 /*******************************************************************************/
cpm219 0:2d0ef4830603 120 /*******************************************************************************/
cpm219 0:2d0ef4830603 121 /*APIs for coprocessor Fifo read/write and space management*/
cpm219 0:2d0ef4830603 122 ft_void_t Updatecmdfifo(ft_uint16_t count);
cpm219 0:2d0ef4830603 123 ft_void_t WrCmd32(ft_uint32_t cmd);
cpm219 0:2d0ef4830603 124 ft_void_t WrCmdBuf(ft_uint8_t *buffer,ft_uint16_t count);
cpm219 0:2d0ef4830603 125 ft_void_t WaitCmdfifo_empty();
cpm219 0:2d0ef4830603 126 ft_void_t ResetCmdFifo();
cpm219 0:2d0ef4830603 127 ft_void_t CheckCmdBuffer(ft_uint16_t count);
cpm219 0:2d0ef4830603 128 ft_void_t ResetDLBuffer();
cpm219 0:2d0ef4830603 129
cpm219 0:2d0ef4830603 130 ft_void_t StartCmdTransfer(FT_GPU_TRANSFERDIR_T rw, ft_uint16_t count);
cpm219 0:2d0ef4830603 131 ft_void_t Powercycle(ft_bool_t up);
cpm219 0:2d0ef4830603 132
cpm219 0:2d0ef4830603 133
cpm219 0:2d0ef4830603 134 /*******************************************************************************/
cpm219 0:2d0ef4830603 135 /*******************************************************************************/
cpm219 0:2d0ef4830603 136 /*APIs for Host Commands*/
cpm219 0:2d0ef4830603 137 typedef enum {
cpm219 0:2d0ef4830603 138 FT_GPU_INTERNAL_OSC = 0x48, //default
cpm219 0:2d0ef4830603 139 FT_GPU_EXTERNAL_OSC = 0x44,
cpm219 0:2d0ef4830603 140 } FT_GPU_PLL_SOURCE_T;
cpm219 0:2d0ef4830603 141 typedef enum {
cpm219 0:2d0ef4830603 142 FT_GPU_PLL_48M = 0x62, //default
cpm219 0:2d0ef4830603 143 FT_GPU_PLL_36M = 0x61,
cpm219 0:2d0ef4830603 144 FT_GPU_PLL_24M = 0x64,
cpm219 0:2d0ef4830603 145 } FT_GPU_PLL_FREQ_T;
cpm219 0:2d0ef4830603 146
cpm219 0:2d0ef4830603 147 typedef enum {
cpm219 0:2d0ef4830603 148 FT_GPU_ACTIVE_M = 0x00,
cpm219 0:2d0ef4830603 149 FT_GPU_STANDBY_M = 0x41,//default
cpm219 0:2d0ef4830603 150 FT_GPU_SLEEP_M = 0x42,
cpm219 0:2d0ef4830603 151 FT_GPU_POWERDOWN_M = 0x50,
cpm219 0:2d0ef4830603 152 } FT_GPU_POWER_MODE_T;
mozillain 11:435747a1f2ae 153
mozillain 11:435747a1f2ae 154 #ifdef FT_81X_ENABLE
mozillain 11:435747a1f2ae 155 typedef enum {
mozillain 11:435747a1f2ae 156 FT_GPU_SYSCLK_DEFAULT = 0x00, //default 60mhz
mozillain 11:435747a1f2ae 157 FT_GPU_SYSCLK_72M = 0x06,
mozillain 11:435747a1f2ae 158 FT_GPU_SYSCLK_60M = 0x05,
mozillain 11:435747a1f2ae 159 FT_GPU_SYSCLK_48M = 0x04,
mozillain 11:435747a1f2ae 160 FT_GPU_SYSCLK_36M = 0x03,
mozillain 11:435747a1f2ae 161 FT_GPU_SYSCLK_24M = 0x02,
mozillain 11:435747a1f2ae 162 }FT_GPU_81X_PLL_FREQ_T;
mozillain 11:435747a1f2ae 163
mozillain 11:435747a1f2ae 164 typedef enum{
mozillain 11:435747a1f2ae 165 FT_GPU_MAIN_ROM = 0x80, //main graphicas ROM used
mozillain 11:435747a1f2ae 166 FT_GPU_RCOSATAN_ROM = 0x40, //line slope table used for
mozillain 11:435747a1f2ae 167 FT_GPU_SAMPLE_ROM = 0x20, //JA samples
mozillain 11:435747a1f2ae 168 FT_GPU_JABOOT_ROM = 0x10, //JA microcode
mozillain 11:435747a1f2ae 169 FT_GPU_J1BOOT_ROM = 0x08, //J1 microcode
mozillain 11:435747a1f2ae 170 FT_GPU_ADC = 0x01, //
mozillain 11:435747a1f2ae 171 FT_GPU_POWER_ON_ROM_AND_ADC = 0x00, //specify this element to power on all ROMs and ADCs
mozillain 11:435747a1f2ae 172 }FT_GPU_81X_ROM_AND_ADC_T;
mozillain 11:435747a1f2ae 173
mozillain 11:435747a1f2ae 174 typedef enum{
mozillain 11:435747a1f2ae 175 FT_GPU_5MA = 0x00, //default current
mozillain 11:435747a1f2ae 176 FT_GPU_10MA = 0x01,
mozillain 11:435747a1f2ae 177 FT_GPU_15MA = 0x02,
mozillain 11:435747a1f2ae 178 FT_GPU_20MA = 0x03,
mozillain 11:435747a1f2ae 179 }FT_GPU_81X_GPIO_DRIVE_STRENGTH_T;
mozillain 11:435747a1f2ae 180
mozillain 11:435747a1f2ae 181 typedef enum{
mozillain 11:435747a1f2ae 182 FT_GPU_GPIO0 = 0x00,
mozillain 11:435747a1f2ae 183 FT_GPU_GPIO1 = 0x04,
mozillain 11:435747a1f2ae 184 FT_GPU_GPIO2 = 0x08,
mozillain 11:435747a1f2ae 185 FT_GPU_GPIO3 = 0x0C,
mozillain 11:435747a1f2ae 186 FT_GPU_GPIO4 = 0x10,
mozillain 11:435747a1f2ae 187 FT_GPU_DISP = 0x20,
mozillain 11:435747a1f2ae 188 FT_GPU_DE = 0x24,
mozillain 11:435747a1f2ae 189 FT_GPU_VSYNC_HSYNC = 0x28,
mozillain 11:435747a1f2ae 190 FT_GPU_PCLK = 0x2C,
mozillain 11:435747a1f2ae 191 FT_GPU_BACKLIGHT = 0x30,
mozillain 11:435747a1f2ae 192 FT_GPU_R_G_B = 0x34,
mozillain 11:435747a1f2ae 193 FT_GPU_AUDIO_L = 0x38,
mozillain 11:435747a1f2ae 194 FT_GPU_INT_N = 0x3C,
mozillain 11:435747a1f2ae 195 FT_GPU_TOUCHWAKE = 0x40,
mozillain 11:435747a1f2ae 196 FT_GPU_SCL = 0x44,
mozillain 11:435747a1f2ae 197 FT_GPU_SDA = 0x48,
mozillain 11:435747a1f2ae 198 FT_GPU_SPI_MISO_MOSI_IO2_IO3 = 0x4C,
mozillain 11:435747a1f2ae 199 }FT_GPU_81X_GPIO_GROUP_T;
mozillain 11:435747a1f2ae 200
mozillain 11:435747a1f2ae 201 #define FT_GPU_81X_RESET_ACTIVE 0x000268
mozillain 11:435747a1f2ae 202
mozillain 11:435747a1f2ae 203 #define FT_GPU_81X_RESET_REMOVAL 0x002068
mozillain 11:435747a1f2ae 204 #endif
cpm219 0:2d0ef4830603 205
cpm219 0:2d0ef4830603 206 #define FT_GPU_CORE_RESET (0x68)
mozillain 11:435747a1f2ae 207
mozillain 11:435747a1f2ae 208 /* Enums for number of SPI dummy bytes and number of channels */
mozillain 11:435747a1f2ae 209 typedef enum {
mozillain 11:435747a1f2ae 210 FT_GPU_SPI_SINGLE_CHANNEL = 0,
mozillain 11:435747a1f2ae 211 FT_GPU_SPI_DUAL_CHANNEL = 1,
mozillain 11:435747a1f2ae 212 FT_GPU_SPI_QUAD_CHANNEL = 2,
mozillain 11:435747a1f2ae 213 }FT_GPU_SPI_NUMCHANNELS_T;
mozillain 11:435747a1f2ae 214 typedef enum {
mozillain 11:435747a1f2ae 215 FT_GPU_SPI_ONEDUMMY = 1,
mozillain 11:435747a1f2ae 216 FT_GPU_SPI_TWODUMMY = 2,
mozillain 11:435747a1f2ae 217 }FT_GPU_SPI_NUMDUMMYBYTES;
mozillain 11:435747a1f2ae 218
mozillain 11:435747a1f2ae 219 #define FT_SPI_ONE_DUMMY_BYTE (0x00)
mozillain 11:435747a1f2ae 220 #define FT_SPI_TWO_DUMMY_BYTE (0x04)
mozillain 11:435747a1f2ae 221 #define FT_SPI_SINGLE_CHANNEL (0x00)
mozillain 11:435747a1f2ae 222 #define FT_SPI_DUAL_CHANNEL (0x01)
mozillain 11:435747a1f2ae 223 #define FT_SPI_QUAD_CHANNEL (0x02)
mozillain 11:435747a1f2ae 224
mozillain 11:435747a1f2ae 225 /*
mozillain 11:435747a1f2ae 226 #ifdef FT_81X_ENABLE
mozillain 11:435747a1f2ae 227 ft_void_t Ft_Gpu_81X_SelectSysCLK(Ft_Gpu_Hal_Context_t *host, FT_GPU_81X_PLL_FREQ_T freq);
mozillain 11:435747a1f2ae 228 ft_void_t Ft_GPU_81X_PowerOffComponents(Ft_Gpu_Hal_Context_t *host, ft_uint8_t val);
mozillain 11:435747a1f2ae 229 ft_void_t Ft_GPU_81X_PadDriveStrength(Ft_Gpu_Hal_Context_t *host, FT_GPU_81X_GPIO_DRIVE_STRENGTH_T strength, FT_GPU_81X_GPIO_GROUP_T group);
mozillain 11:435747a1f2ae 230 ft_void_t Ft_Gpu_81X_ResetActive(Ft_Gpu_Hal_Context_t *host);
mozillain 11:435747a1f2ae 231 ft_void_t Ft_Gpu_81X_ResetRemoval(Ft_Gpu_Hal_Context_t *host);
mozillain 11:435747a1f2ae 232 #endif
mozillain 11:435747a1f2ae 233 */
cpm219 0:2d0ef4830603 234
cpm219 0:2d0ef4830603 235 ft_int32_t hal_strlen(const ft_char8_t *s);
cpm219 0:2d0ef4830603 236 ft_void_t Sleep(ft_uint16_t ms);
cpm219 0:2d0ef4830603 237 ft_void_t ClockSelect(FT_GPU_PLL_SOURCE_T pllsource);
cpm219 0:2d0ef4830603 238 ft_void_t PLL_FreqSelect(FT_GPU_PLL_FREQ_T freq);
cpm219 0:2d0ef4830603 239 ft_void_t PowerModeSwitch(FT_GPU_POWER_MODE_T pwrmode);
cpm219 0:2d0ef4830603 240 ft_void_t CoreReset();
cpm219 0:2d0ef4830603 241 //ft_void_t Ft_Gpu_Hal_StartTransfer( ,FT_GPU_TRANSFERDIR_T rw,ft_uint32_t addr);
cpm219 0:2d0ef4830603 242 ft_void_t WrMem(ft_uint32_t addr, const ft_uint8_t *buffer, ft_uint32_t length);
cpm219 0:2d0ef4830603 243 ft_void_t WrMemFromFlash(ft_uint32_t addr,const ft_prog_uchar8_t *buffer, ft_uint32_t length);
cpm219 0:2d0ef4830603 244 ft_void_t WrCmdBufFromFlash(FT_PROGMEM ft_prog_uchar8_t *buffer,ft_uint16_t count);
cpm219 0:2d0ef4830603 245 ft_void_t RdMem(ft_uint32_t addr, ft_uint8_t *buffer, ft_uint32_t length);
cpm219 0:2d0ef4830603 246 ft_void_t WaitLogo_Finish();
cpm219 0:2d0ef4830603 247 ft_uint8_t TransferString(const ft_char8_t *string);
cpm219 0:2d0ef4830603 248 ft_void_t HostCommand(ft_uint8_t cmd);
cpm219 0:2d0ef4830603 249 ft_int32_t Dec2Ascii(ft_char8_t *pSrc,ft_int32_t value);
cpm219 0:2d0ef4830603 250
cpm219 0:2d0ef4830603 251 ft_void_t Text(ft_int16_t x, ft_int16_t y, ft_int16_t font, ft_uint16_t options, const ft_char8_t* s);
cpm219 0:2d0ef4830603 252 ft_void_t Number(ft_int16_t x, ft_int16_t y, ft_int16_t font, ft_uint16_t options, ft_int32_t n);
cpm219 0:2d0ef4830603 253 ft_void_t LoadIdentity();
cpm219 0:2d0ef4830603 254 ft_void_t Toggle(ft_int16_t x, ft_int16_t y, ft_int16_t w, ft_int16_t font, ft_uint16_t options, ft_uint16_t state, const ft_char8_t* s);
cpm219 0:2d0ef4830603 255 ft_void_t Gauge(ft_int16_t x, ft_int16_t y, ft_int16_t r, ft_uint16_t options, ft_uint16_t major, ft_uint16_t minor, ft_uint16_t val, ft_uint16_t range);
cpm219 0:2d0ef4830603 256 ft_void_t RegRead(ft_uint32_t ptr, ft_uint32_t result);
cpm219 0:2d0ef4830603 257 ft_void_t GetProps(ft_uint32_t ptr, ft_uint32_t w, ft_uint32_t h);
cpm219 0:2d0ef4830603 258 ft_void_t Memcpy(ft_uint32_t dest, ft_uint32_t src, ft_uint32_t num);
cpm219 0:2d0ef4830603 259 ft_void_t Spinner(ft_int16_t x, ft_int16_t y, ft_uint16_t style, ft_uint16_t scale);
cpm219 0:2d0ef4830603 260 ft_void_t BgColor(ft_uint32_t c);
cpm219 0:2d0ef4830603 261 ft_void_t Swap();
cpm219 0:2d0ef4830603 262 ft_void_t Inflate(ft_uint32_t ptr);
cpm219 0:2d0ef4830603 263 ft_void_t Translate(ft_int32_t tx, ft_int32_t ty);
cpm219 0:2d0ef4830603 264 ft_void_t Stop();
cpm219 0:2d0ef4830603 265 ft_void_t Slider(ft_int16_t x, ft_int16_t y, ft_int16_t w, ft_int16_t h, ft_uint16_t options, ft_uint16_t val, ft_uint16_t range);
cpm219 0:2d0ef4830603 266 ft_void_t Interrupt(ft_uint32_t ms);
cpm219 0:2d0ef4830603 267 ft_void_t FgColor(ft_uint32_t c);
cpm219 0:2d0ef4830603 268 ft_void_t Rotate(ft_int32_t a);
cpm219 0:2d0ef4830603 269 ft_void_t Button(ft_int16_t x, ft_int16_t y, ft_int16_t w, ft_int16_t h, ft_int16_t font, ft_uint16_t options, const ft_char8_t* s);
cpm219 0:2d0ef4830603 270 ft_void_t MemWrite(ft_uint32_t ptr, ft_uint32_t num);
cpm219 0:2d0ef4830603 271 ft_void_t Scrollbar(ft_int16_t x, ft_int16_t y, ft_int16_t w, ft_int16_t h, ft_uint16_t options, ft_uint16_t val, ft_uint16_t size, ft_uint16_t range);
cpm219 0:2d0ef4830603 272 ft_void_t GetMatrix(ft_int32_t a, ft_int32_t b, ft_int32_t c, ft_int32_t d, ft_int32_t e, ft_int32_t f);
cpm219 0:2d0ef4830603 273 ft_void_t Sketch(ft_int16_t x, ft_int16_t y, ft_uint16_t w, ft_uint16_t h, ft_uint32_t ptr, ft_uint16_t format);
cpm219 0:2d0ef4830603 274 ft_void_t MemSet(ft_uint32_t ptr, ft_uint32_t value, ft_uint32_t num);
cpm219 0:2d0ef4830603 275 ft_void_t Calibrate(ft_uint32_t result);
cpm219 0:2d0ef4830603 276 ft_void_t SetFont(ft_uint32_t font, ft_uint32_t ptr);
cpm219 7:3b4d59de6398 277 ft_void_t RomFont( ft_uint32_t font, ft_uint32_t rom_slot);
cpm219 0:2d0ef4830603 278 ft_void_t Bitmap_Transform(ft_int32_t x0, ft_int32_t y0, ft_int32_t x1, ft_int32_t y1, ft_int32_t x2, ft_int32_t y2, ft_int32_t tx0, ft_int32_t ty0, ft_int32_t tx1, ft_int32_t ty1, ft_int32_t tx2, ft_int32_t ty2, ft_uint16_t result);
cpm219 0:2d0ef4830603 279 ft_void_t GradColor(ft_uint32_t c);
cpm219 0:2d0ef4830603 280 ft_void_t Append(ft_uint32_t ptr, ft_uint32_t num);
cpm219 0:2d0ef4830603 281 ft_void_t MemZero(ft_uint32_t ptr, ft_uint32_t num);
cpm219 0:2d0ef4830603 282 ft_void_t Scale(ft_int32_t sx, ft_int32_t sy);
cpm219 0:2d0ef4830603 283 ft_void_t Clock(ft_int16_t x, ft_int16_t y, ft_int16_t r, ft_uint16_t options, ft_uint16_t h, ft_uint16_t m, ft_uint16_t s, ft_uint16_t ms);
cpm219 0:2d0ef4830603 284 ft_void_t Gradient(ft_int16_t x0, ft_int16_t y0, ft_uint32_t rgb0, ft_int16_t x1, ft_int16_t y1, ft_uint32_t rgb1);
cpm219 0:2d0ef4830603 285 ft_void_t SetMatrix();
cpm219 0:2d0ef4830603 286 ft_void_t Track(ft_int16_t x, ft_int16_t y, ft_int16_t w, ft_int16_t h, ft_int16_t tag);
cpm219 0:2d0ef4830603 287 ft_void_t GetPtr(ft_uint32_t result);
cpm219 0:2d0ef4830603 288 ft_void_t Progress(ft_int16_t x, ft_int16_t y, ft_int16_t w, ft_int16_t h, ft_uint16_t options, ft_uint16_t val, ft_uint16_t range);
cpm219 0:2d0ef4830603 289 ft_void_t ColdStart();
cpm219 0:2d0ef4830603 290 ft_void_t Keys(ft_int16_t x, ft_int16_t y, ft_int16_t w, ft_int16_t h, ft_int16_t font, ft_uint16_t options, const ft_char8_t* s);
cpm219 0:2d0ef4830603 291 ft_void_t Dial(ft_int16_t x, ft_int16_t y, ft_int16_t r, ft_uint16_t options, ft_uint16_t val);
cpm219 0:2d0ef4830603 292 ft_void_t LoadImage(ft_uint32_t ptr, ft_uint32_t options);
cpm219 0:2d0ef4830603 293 ft_void_t DLstart();
cpm219 0:2d0ef4830603 294 ft_void_t Snapshot(ft_uint32_t ptr);
cpm219 0:2d0ef4830603 295 ft_void_t ScreenSaver();
cpm219 0:2d0ef4830603 296 ft_void_t Memcrc(ft_uint32_t ptr, ft_uint32_t num, ft_uint32_t result);
cpm219 0:2d0ef4830603 297
cpm219 0:2d0ef4830603 298 ft_void_t Logo();
cpm219 0:2d0ef4830603 299
cpm219 0:2d0ef4830603 300 ft_void_t SendCmd( ft_uint32_t cmd);
cpm219 0:2d0ef4830603 301 ft_void_t SendStr( const ft_char8_t *s);
cpm219 0:2d0ef4830603 302 ft_void_t StartFunc( ft_uint16_t count);
cpm219 0:2d0ef4830603 303 ft_void_t EndFunc( ft_uint16_t count);
cpm219 0:2d0ef4830603 304 ft_void_t TouchTransform( ft_int32_t x0, ft_int32_t y0, ft_int32_t x1, ft_int32_t y1, ft_int32_t x2, ft_int32_t y2, ft_int32_t tx0, ft_int32_t ty0, ft_int32_t tx1, ft_int32_t ty1, ft_int32_t tx2, ft_int32_t ty2, ft_uint16_t result);
cpm219 0:2d0ef4830603 305 ft_void_t BitmapTransform( ft_int32_t x0, ft_int32_t y0, ft_int32_t x1, ft_int32_t y1, ft_int32_t x2, ft_int32_t y2, ft_int32_t tx0, ft_int32_t ty0, ft_int32_t tx1, ft_int32_t ty1, ft_int32_t tx2, ft_int32_t ty2, ft_uint16_t result);
cpm219 0:2d0ef4830603 306 ft_void_t MemCrc( ft_uint32_t ptr, ft_uint32_t num, ft_uint32_t result);
cpm219 0:2d0ef4830603 307
cpm219 0:2d0ef4830603 308 ft_uint16_t fifo_Freespace( );
cpm219 0:2d0ef4830603 309
cpm219 0:2d0ef4830603 310 ft_void_t DL(ft_uint32_t cmd);
cpm219 0:2d0ef4830603 311 ft_void_t WrDlCmd_Buffer(ft_uint32_t cmd);
cpm219 0:2d0ef4830603 312 ft_void_t Flush_DL_Buffer();
cpm219 0:2d0ef4830603 313 ft_void_t Flush_Co_Buffer();
cpm219 0:2d0ef4830603 314 ft_void_t fadeout();
cpm219 0:2d0ef4830603 315 ft_void_t fadein();
cpm219 0:2d0ef4830603 316 ft_void_t DLSwap(ft_uint8_t DL_Swap_Type);
cpm219 0:2d0ef4830603 317
cpm219 0:2d0ef4830603 318 ft_void_t Sound_ON();
cpm219 0:2d0ef4830603 319 ft_void_t Sound_OFF();
cpm219 0:2d0ef4830603 320
cpm219 0:2d0ef4830603 321 int Load_jpg(char* filename, ft_int16_t* x_size, ft_int16_t* y_size,ft_uint32_t address);
cpm219 0:2d0ef4830603 322
cpm219 0:2d0ef4830603 323 //Curt added Load_raw 7/22/16
cpm219 0:2d0ef4830603 324 int Load_raw(char* filename);
cpm219 0:2d0ef4830603 325
cpm219 0:2d0ef4830603 326 ft_void_t Calibrate();
cpm219 0:2d0ef4830603 327 ft_void_t read_calibrate(ft_uint8_t data[24]);
cpm219 0:2d0ef4830603 328 ft_void_t write_calibrate(ft_uint8_t data[24]);
cpm219 0:2d0ef4830603 329
cpm219 0:2d0ef4830603 330 ft_uint32_t color_rgb(ft_uint8_t red,ft_uint8_t green, ft_uint8_t blue);
cpm219 0:2d0ef4830603 331 ft_uint32_t clear_color_rgb(ft_uint8_t red,ft_uint8_t green, ft_uint8_t blue);
cpm219 0:2d0ef4830603 332
cpm219 0:2d0ef4830603 333 }; // end of class
cpm219 0:2d0ef4830603 334
cpm219 0:2d0ef4830603 335 #endif /*FT_GPU_HAL_H*/