mbed library sources
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targets/cmsis/TARGET_STM/TARGET_STM32F0/stm32f0xx_hal_cec.c@392:2b59412bb664, 2014-11-07 (annotated)
- Committer:
- mbed_official
- Date:
- Fri Nov 07 08:15:08 2014 +0000
- Revision:
- 392:2b59412bb664
- Parent:
- targets/cmsis/TARGET_STM/TARGET_NUCLEO_F091RC/stm32f0xx_hal_cec.c@340:28d1f895c6fe
- Child:
- 441:d2c15dda23c1
Synchronized with git revision eec0be05cd92349bee83c65f9e1302b25b5badf4
Full URL: https://github.com/mbedmicro/mbed/commit/eec0be05cd92349bee83c65f9e1302b25b5badf4/
Targets: STM32F0 - Factorisation of NUCLEO_F030R8/F072RB/F091RC cmsis folders
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
mbed_official | 340:28d1f895c6fe | 1 | /** |
mbed_official | 340:28d1f895c6fe | 2 | ****************************************************************************** |
mbed_official | 340:28d1f895c6fe | 3 | * @file stm32f0xx_hal_cec.c |
mbed_official | 340:28d1f895c6fe | 4 | * @author MCD Application Team |
mbed_official | 340:28d1f895c6fe | 5 | * @version V1.1.0 |
mbed_official | 340:28d1f895c6fe | 6 | * @date 03-Oct-2014 |
mbed_official | 340:28d1f895c6fe | 7 | * @brief CEC HAL module driver. |
mbed_official | 340:28d1f895c6fe | 8 | * This file provides firmware functions to manage the following |
mbed_official | 340:28d1f895c6fe | 9 | * functionalities of the High Definition Multimedia Interface |
mbed_official | 340:28d1f895c6fe | 10 | * Consumer Electronics Control Peripheral (CEC). |
mbed_official | 340:28d1f895c6fe | 11 | * + Initialization and de-initialization function |
mbed_official | 340:28d1f895c6fe | 12 | * + IO operation function |
mbed_official | 340:28d1f895c6fe | 13 | * + Peripheral Control function |
mbed_official | 340:28d1f895c6fe | 14 | * |
mbed_official | 340:28d1f895c6fe | 15 | @verbatim |
mbed_official | 340:28d1f895c6fe | 16 | =============================================================================== |
mbed_official | 340:28d1f895c6fe | 17 | ##### How to use this driver ##### |
mbed_official | 340:28d1f895c6fe | 18 | =============================================================================== |
mbed_official | 340:28d1f895c6fe | 19 | [..] |
mbed_official | 340:28d1f895c6fe | 20 | The CEC HAL driver can be used as follows: |
mbed_official | 340:28d1f895c6fe | 21 | |
mbed_official | 340:28d1f895c6fe | 22 | (#) Declare a CEC_HandleTypeDef handle structure. |
mbed_official | 340:28d1f895c6fe | 23 | (#) Initialize the CEC low level resources by implementing the HAL_CEC_MspInit ()API: |
mbed_official | 340:28d1f895c6fe | 24 | (++) Enable the CEC interface clock. |
mbed_official | 340:28d1f895c6fe | 25 | (++) CEC pins configuration: |
mbed_official | 340:28d1f895c6fe | 26 | (+++) Enable the clock for the CEC GPIOs. |
mbed_official | 340:28d1f895c6fe | 27 | (+++) Configure these CEC pins as alternate function pull-up. |
mbed_official | 340:28d1f895c6fe | 28 | (++) NVIC configuration if you need to use interrupt process (HAL_CEC_Transmit_IT() |
mbed_official | 340:28d1f895c6fe | 29 | and HAL_CEC_Receive_IT() APIs): |
mbed_official | 340:28d1f895c6fe | 30 | (+++) Configure the CEC interrupt priority. |
mbed_official | 340:28d1f895c6fe | 31 | (+++) Enable the NVIC CEC IRQ handle. |
mbed_official | 340:28d1f895c6fe | 32 | |
mbed_official | 340:28d1f895c6fe | 33 | (#) Program the Signal Free Time (SFT) and SFT option, Tolerance, reception stop in |
mbed_official | 340:28d1f895c6fe | 34 | in case of Bit Rising Error, Error-Bit generation conditions, device logical |
mbed_official | 340:28d1f895c6fe | 35 | address and Listen mode in the hcec Init structure. |
mbed_official | 340:28d1f895c6fe | 36 | |
mbed_official | 340:28d1f895c6fe | 37 | (#) Initialize the CEC registers by calling the HAL_CEC_Init() API. |
mbed_official | 340:28d1f895c6fe | 38 | (++) This API configures also the low level Hardware GPIO, CLOCK, CORTEX...etc) |
mbed_official | 340:28d1f895c6fe | 39 | by calling the customed HAL_CEC_MspInit() API. |
mbed_official | 340:28d1f895c6fe | 40 | |
mbed_official | 340:28d1f895c6fe | 41 | -@@- The specific CEC interrupts (Transmission complete interrupt, |
mbed_official | 340:28d1f895c6fe | 42 | RXNE interrupt and Error Interrupts) will be managed using the macros |
mbed_official | 340:28d1f895c6fe | 43 | __HAL_CEC_ENABLE_IT() and __HAL_CEC_DISABLE_IT() inside the transmit |
mbed_official | 340:28d1f895c6fe | 44 | and receive process. |
mbed_official | 340:28d1f895c6fe | 45 | |
mbed_official | 340:28d1f895c6fe | 46 | @endverbatim |
mbed_official | 340:28d1f895c6fe | 47 | ****************************************************************************** |
mbed_official | 340:28d1f895c6fe | 48 | * @attention |
mbed_official | 340:28d1f895c6fe | 49 | * |
mbed_official | 340:28d1f895c6fe | 50 | * <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2> |
mbed_official | 340:28d1f895c6fe | 51 | * |
mbed_official | 340:28d1f895c6fe | 52 | * Redistribution and use in source and binary forms, with or without modification, |
mbed_official | 340:28d1f895c6fe | 53 | * are permitted provided that the following conditions are met: |
mbed_official | 340:28d1f895c6fe | 54 | * 1. Redistributions of source code must retain the above copyright notice, |
mbed_official | 340:28d1f895c6fe | 55 | * this list of conditions and the following disclaimer. |
mbed_official | 340:28d1f895c6fe | 56 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
mbed_official | 340:28d1f895c6fe | 57 | * this list of conditions and the following disclaimer in the documentation |
mbed_official | 340:28d1f895c6fe | 58 | * and/or other materials provided with the distribution. |
mbed_official | 340:28d1f895c6fe | 59 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
mbed_official | 340:28d1f895c6fe | 60 | * may be used to endorse or promote products derived from this software |
mbed_official | 340:28d1f895c6fe | 61 | * without specific prior written permission. |
mbed_official | 340:28d1f895c6fe | 62 | * |
mbed_official | 340:28d1f895c6fe | 63 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
mbed_official | 340:28d1f895c6fe | 64 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
mbed_official | 340:28d1f895c6fe | 65 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
mbed_official | 340:28d1f895c6fe | 66 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
mbed_official | 340:28d1f895c6fe | 67 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
mbed_official | 340:28d1f895c6fe | 68 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
mbed_official | 340:28d1f895c6fe | 69 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
mbed_official | 340:28d1f895c6fe | 70 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
mbed_official | 340:28d1f895c6fe | 71 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
mbed_official | 340:28d1f895c6fe | 72 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
mbed_official | 340:28d1f895c6fe | 73 | * |
mbed_official | 340:28d1f895c6fe | 74 | ****************************************************************************** |
mbed_official | 340:28d1f895c6fe | 75 | */ |
mbed_official | 340:28d1f895c6fe | 76 | |
mbed_official | 340:28d1f895c6fe | 77 | /* Includes ------------------------------------------------------------------*/ |
mbed_official | 340:28d1f895c6fe | 78 | #include "stm32f0xx_hal.h" |
mbed_official | 340:28d1f895c6fe | 79 | |
mbed_official | 340:28d1f895c6fe | 80 | /** @addtogroup STM32F0xx_HAL_Driver |
mbed_official | 340:28d1f895c6fe | 81 | * @{ |
mbed_official | 340:28d1f895c6fe | 82 | */ |
mbed_official | 340:28d1f895c6fe | 83 | |
mbed_official | 340:28d1f895c6fe | 84 | /** @defgroup CEC CEC HAL Module Driver |
mbed_official | 340:28d1f895c6fe | 85 | * @brief HAL CEC module driver |
mbed_official | 340:28d1f895c6fe | 86 | * @{ |
mbed_official | 340:28d1f895c6fe | 87 | */ |
mbed_official | 340:28d1f895c6fe | 88 | #ifdef HAL_CEC_MODULE_ENABLED |
mbed_official | 340:28d1f895c6fe | 89 | |
mbed_official | 340:28d1f895c6fe | 90 | #if defined(STM32F042x6) || defined(STM32F048xx) ||\ |
mbed_official | 340:28d1f895c6fe | 91 | defined(STM32F051x8) || defined(STM32F058xx) ||\ |
mbed_official | 340:28d1f895c6fe | 92 | defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx) ||\ |
mbed_official | 340:28d1f895c6fe | 93 | defined(STM32F091xC) || defined (STM32F098xx) |
mbed_official | 340:28d1f895c6fe | 94 | |
mbed_official | 340:28d1f895c6fe | 95 | /* Private typedef -----------------------------------------------------------*/ |
mbed_official | 340:28d1f895c6fe | 96 | /* Private define ------------------------------------------------------------*/ |
mbed_official | 340:28d1f895c6fe | 97 | /** @defgroup CEC_Private_Constants CEC Private Constants |
mbed_official | 340:28d1f895c6fe | 98 | * @{ |
mbed_official | 340:28d1f895c6fe | 99 | */ |
mbed_official | 340:28d1f895c6fe | 100 | #define CEC_CFGR_FIELDS (CEC_CFGR_SFT | CEC_CFGR_RXTOL | CEC_CFGR_BRESTP \ |
mbed_official | 340:28d1f895c6fe | 101 | | CEC_CFGR_BREGEN | CEC_CFGR_LBPEGEN | CEC_CFGR_SFTOPT \ |
mbed_official | 340:28d1f895c6fe | 102 | | CEC_CFGR_BRDNOGEN | CEC_CFGR_OAR | CEC_CFGR_LSTN) |
mbed_official | 340:28d1f895c6fe | 103 | /** |
mbed_official | 340:28d1f895c6fe | 104 | * @} |
mbed_official | 340:28d1f895c6fe | 105 | */ |
mbed_official | 340:28d1f895c6fe | 106 | /* Private macro -------------------------------------------------------------*/ |
mbed_official | 340:28d1f895c6fe | 107 | /* Private variables ---------------------------------------------------------*/ |
mbed_official | 340:28d1f895c6fe | 108 | /* Private function prototypes -----------------------------------------------*/ |
mbed_official | 340:28d1f895c6fe | 109 | /** @defgroup CEC_Private_Functions CEC Private Functions |
mbed_official | 340:28d1f895c6fe | 110 | * @{ |
mbed_official | 340:28d1f895c6fe | 111 | */ |
mbed_official | 340:28d1f895c6fe | 112 | static HAL_StatusTypeDef CEC_Transmit_IT(CEC_HandleTypeDef *hcec); |
mbed_official | 340:28d1f895c6fe | 113 | static HAL_StatusTypeDef CEC_Receive_IT(CEC_HandleTypeDef *hcec); |
mbed_official | 340:28d1f895c6fe | 114 | /** |
mbed_official | 340:28d1f895c6fe | 115 | * @} |
mbed_official | 340:28d1f895c6fe | 116 | */ |
mbed_official | 340:28d1f895c6fe | 117 | /* Exported functions ---------------------------------------------------------*/ |
mbed_official | 340:28d1f895c6fe | 118 | |
mbed_official | 340:28d1f895c6fe | 119 | /** @defgroup CEC_Exported_Functions CEC Exported Functions |
mbed_official | 340:28d1f895c6fe | 120 | * @{ |
mbed_official | 340:28d1f895c6fe | 121 | */ |
mbed_official | 340:28d1f895c6fe | 122 | |
mbed_official | 340:28d1f895c6fe | 123 | /** @defgroup CEC_Exported_Functions_Group1 Initialization/de-initialization function |
mbed_official | 340:28d1f895c6fe | 124 | * @brief Initialization and Configuration functions |
mbed_official | 340:28d1f895c6fe | 125 | * |
mbed_official | 340:28d1f895c6fe | 126 | @verbatim |
mbed_official | 340:28d1f895c6fe | 127 | =============================================================================== |
mbed_official | 340:28d1f895c6fe | 128 | ##### Initialization and Configuration functions ##### |
mbed_official | 340:28d1f895c6fe | 129 | =============================================================================== |
mbed_official | 340:28d1f895c6fe | 130 | [..] |
mbed_official | 340:28d1f895c6fe | 131 | This subsection provides a set of functions allowing to initialize the CEC |
mbed_official | 340:28d1f895c6fe | 132 | (+) The following parameters need to be configured: |
mbed_official | 340:28d1f895c6fe | 133 | (++) SignalFreeTime |
mbed_official | 340:28d1f895c6fe | 134 | (++) Tolerance |
mbed_official | 340:28d1f895c6fe | 135 | (++) BRERxStop (RX stopped or not upon Bit Rising Error) |
mbed_official | 340:28d1f895c6fe | 136 | (++) BREErrorBitGen (Error-Bit generation in case of Bit Rising Error) |
mbed_official | 340:28d1f895c6fe | 137 | (++) LBPEErrorBitGen (Error-Bit generation in case of Long Bit Period Error) |
mbed_official | 340:28d1f895c6fe | 138 | (++) BroadcastMsgNoErrorBitGen (Error-bit generation in case of broadcast message error) |
mbed_official | 340:28d1f895c6fe | 139 | (++) SignalFreeTimeOption (SFT Timer start definition) |
mbed_official | 340:28d1f895c6fe | 140 | (++) OwnAddress (CEC device address) |
mbed_official | 340:28d1f895c6fe | 141 | (++) ListenMode |
mbed_official | 340:28d1f895c6fe | 142 | |
mbed_official | 340:28d1f895c6fe | 143 | @endverbatim |
mbed_official | 340:28d1f895c6fe | 144 | * @{ |
mbed_official | 340:28d1f895c6fe | 145 | */ |
mbed_official | 340:28d1f895c6fe | 146 | |
mbed_official | 340:28d1f895c6fe | 147 | /** |
mbed_official | 340:28d1f895c6fe | 148 | * @brief Initializes the CEC mode according to the specified |
mbed_official | 340:28d1f895c6fe | 149 | * parameters in the CEC_InitTypeDef and creates the associated handle . |
mbed_official | 340:28d1f895c6fe | 150 | * @param hcec: CEC handle |
mbed_official | 340:28d1f895c6fe | 151 | * @retval HAL status |
mbed_official | 340:28d1f895c6fe | 152 | */ |
mbed_official | 340:28d1f895c6fe | 153 | HAL_StatusTypeDef HAL_CEC_Init(CEC_HandleTypeDef *hcec) |
mbed_official | 340:28d1f895c6fe | 154 | { |
mbed_official | 340:28d1f895c6fe | 155 | uint32_t tmpreg = 0x0; |
mbed_official | 340:28d1f895c6fe | 156 | |
mbed_official | 340:28d1f895c6fe | 157 | /* Check the CEC handle allocation */ |
mbed_official | 340:28d1f895c6fe | 158 | if(hcec == HAL_NULL) |
mbed_official | 340:28d1f895c6fe | 159 | { |
mbed_official | 340:28d1f895c6fe | 160 | return HAL_ERROR; |
mbed_official | 340:28d1f895c6fe | 161 | } |
mbed_official | 340:28d1f895c6fe | 162 | |
mbed_official | 340:28d1f895c6fe | 163 | /* Check the parameters */ |
mbed_official | 340:28d1f895c6fe | 164 | assert_param(IS_CEC_SIGNALFREETIME(hcec->Init.SignalFreeTime)); |
mbed_official | 340:28d1f895c6fe | 165 | assert_param(IS_CEC_TOLERANCE(hcec->Init.Tolerance)); |
mbed_official | 340:28d1f895c6fe | 166 | assert_param(IS_CEC_BRERXSTOP(hcec->Init.BRERxStop)); |
mbed_official | 340:28d1f895c6fe | 167 | assert_param(IS_CEC_BREERRORBITGEN(hcec->Init.BREErrorBitGen)); |
mbed_official | 340:28d1f895c6fe | 168 | assert_param(IS_CEC_LBPEERRORBITGEN(hcec->Init.LBPEErrorBitGen)); |
mbed_official | 340:28d1f895c6fe | 169 | assert_param(IS_CEC_BROADCASTERROR_NO_ERRORBIT_GENERATION(hcec->Init.BroadcastMsgNoErrorBitGen)); |
mbed_official | 340:28d1f895c6fe | 170 | assert_param(IS_CEC_SFTOP(hcec->Init.SignalFreeTimeOption)); |
mbed_official | 340:28d1f895c6fe | 171 | assert_param(IS_CEC_OAR_ADDRESS(hcec->Init.OwnAddress)); |
mbed_official | 340:28d1f895c6fe | 172 | assert_param(IS_CEC_LISTENING_MODE(hcec->Init.ListenMode)); |
mbed_official | 340:28d1f895c6fe | 173 | assert_param(IS_CEC_ADDRESS(hcec->Init.InitiatorAddress)); |
mbed_official | 340:28d1f895c6fe | 174 | |
mbed_official | 340:28d1f895c6fe | 175 | |
mbed_official | 340:28d1f895c6fe | 176 | if(hcec->State == HAL_CEC_STATE_RESET) |
mbed_official | 340:28d1f895c6fe | 177 | { |
mbed_official | 340:28d1f895c6fe | 178 | /* Init the low level hardware : GPIO, CLOCK */ |
mbed_official | 340:28d1f895c6fe | 179 | HAL_CEC_MspInit(hcec); |
mbed_official | 340:28d1f895c6fe | 180 | } |
mbed_official | 340:28d1f895c6fe | 181 | |
mbed_official | 340:28d1f895c6fe | 182 | hcec->State = HAL_CEC_STATE_BUSY; |
mbed_official | 340:28d1f895c6fe | 183 | |
mbed_official | 340:28d1f895c6fe | 184 | /* Disable the Peripheral */ |
mbed_official | 340:28d1f895c6fe | 185 | __HAL_CEC_DISABLE(hcec); |
mbed_official | 340:28d1f895c6fe | 186 | |
mbed_official | 340:28d1f895c6fe | 187 | tmpreg = hcec->Init.SignalFreeTime; |
mbed_official | 340:28d1f895c6fe | 188 | tmpreg |= hcec->Init.Tolerance; |
mbed_official | 340:28d1f895c6fe | 189 | tmpreg |= hcec->Init.BRERxStop; |
mbed_official | 340:28d1f895c6fe | 190 | tmpreg |= hcec->Init.BREErrorBitGen; |
mbed_official | 340:28d1f895c6fe | 191 | tmpreg |= hcec->Init.LBPEErrorBitGen; |
mbed_official | 340:28d1f895c6fe | 192 | tmpreg |= hcec->Init.BroadcastMsgNoErrorBitGen; |
mbed_official | 340:28d1f895c6fe | 193 | tmpreg |= hcec->Init.SignalFreeTimeOption; |
mbed_official | 340:28d1f895c6fe | 194 | tmpreg |= (hcec->Init.OwnAddress << CEC_CFGR_OAR_LSB_POS); |
mbed_official | 340:28d1f895c6fe | 195 | tmpreg |= hcec->Init.ListenMode; |
mbed_official | 340:28d1f895c6fe | 196 | |
mbed_official | 340:28d1f895c6fe | 197 | /* Write to CEC Control Register */ |
mbed_official | 340:28d1f895c6fe | 198 | MODIFY_REG(hcec->Instance->CFGR, CEC_CFGR_FIELDS, tmpreg); |
mbed_official | 340:28d1f895c6fe | 199 | |
mbed_official | 340:28d1f895c6fe | 200 | /* Enable the Peripheral */ |
mbed_official | 340:28d1f895c6fe | 201 | __HAL_CEC_ENABLE(hcec); |
mbed_official | 340:28d1f895c6fe | 202 | |
mbed_official | 340:28d1f895c6fe | 203 | hcec->State = HAL_CEC_STATE_READY; |
mbed_official | 340:28d1f895c6fe | 204 | |
mbed_official | 340:28d1f895c6fe | 205 | return HAL_OK; |
mbed_official | 340:28d1f895c6fe | 206 | } |
mbed_official | 340:28d1f895c6fe | 207 | |
mbed_official | 340:28d1f895c6fe | 208 | |
mbed_official | 340:28d1f895c6fe | 209 | |
mbed_official | 340:28d1f895c6fe | 210 | /** |
mbed_official | 340:28d1f895c6fe | 211 | * @brief DeInitializes the CEC peripheral |
mbed_official | 340:28d1f895c6fe | 212 | * @param hcec: CEC handle |
mbed_official | 340:28d1f895c6fe | 213 | * @retval HAL status |
mbed_official | 340:28d1f895c6fe | 214 | */ |
mbed_official | 340:28d1f895c6fe | 215 | HAL_StatusTypeDef HAL_CEC_DeInit(CEC_HandleTypeDef *hcec) |
mbed_official | 340:28d1f895c6fe | 216 | { |
mbed_official | 340:28d1f895c6fe | 217 | /* Check the CEC handle allocation */ |
mbed_official | 340:28d1f895c6fe | 218 | if(hcec == HAL_NULL) |
mbed_official | 340:28d1f895c6fe | 219 | { |
mbed_official | 340:28d1f895c6fe | 220 | return HAL_ERROR; |
mbed_official | 340:28d1f895c6fe | 221 | } |
mbed_official | 340:28d1f895c6fe | 222 | |
mbed_official | 340:28d1f895c6fe | 223 | /* Check the parameters */ |
mbed_official | 340:28d1f895c6fe | 224 | assert_param(IS_CEC_ALL_INSTANCE(hcec->Instance)); |
mbed_official | 340:28d1f895c6fe | 225 | |
mbed_official | 340:28d1f895c6fe | 226 | hcec->State = HAL_CEC_STATE_BUSY; |
mbed_official | 340:28d1f895c6fe | 227 | |
mbed_official | 340:28d1f895c6fe | 228 | /* DeInit the low level hardware */ |
mbed_official | 340:28d1f895c6fe | 229 | HAL_CEC_MspDeInit(hcec); |
mbed_official | 340:28d1f895c6fe | 230 | /* Disable the Peripheral */ |
mbed_official | 340:28d1f895c6fe | 231 | __HAL_CEC_DISABLE(hcec); |
mbed_official | 340:28d1f895c6fe | 232 | |
mbed_official | 340:28d1f895c6fe | 233 | hcec->ErrorCode = HAL_CEC_ERROR_NONE; |
mbed_official | 340:28d1f895c6fe | 234 | hcec->State = HAL_CEC_STATE_RESET; |
mbed_official | 340:28d1f895c6fe | 235 | |
mbed_official | 340:28d1f895c6fe | 236 | /* Process Unlock */ |
mbed_official | 340:28d1f895c6fe | 237 | __HAL_UNLOCK(hcec); |
mbed_official | 340:28d1f895c6fe | 238 | |
mbed_official | 340:28d1f895c6fe | 239 | return HAL_OK; |
mbed_official | 340:28d1f895c6fe | 240 | } |
mbed_official | 340:28d1f895c6fe | 241 | |
mbed_official | 340:28d1f895c6fe | 242 | /** |
mbed_official | 340:28d1f895c6fe | 243 | * @brief CEC MSP Init |
mbed_official | 340:28d1f895c6fe | 244 | * @param hcec: CEC handle |
mbed_official | 340:28d1f895c6fe | 245 | * @retval None |
mbed_official | 340:28d1f895c6fe | 246 | */ |
mbed_official | 340:28d1f895c6fe | 247 | __weak void HAL_CEC_MspInit(CEC_HandleTypeDef *hcec) |
mbed_official | 340:28d1f895c6fe | 248 | { |
mbed_official | 340:28d1f895c6fe | 249 | /* NOTE : This function should not be modified, when the callback is needed, |
mbed_official | 340:28d1f895c6fe | 250 | the HAL_CEC_MspInit can be implemented in the user file |
mbed_official | 340:28d1f895c6fe | 251 | */ |
mbed_official | 340:28d1f895c6fe | 252 | } |
mbed_official | 340:28d1f895c6fe | 253 | |
mbed_official | 340:28d1f895c6fe | 254 | /** |
mbed_official | 340:28d1f895c6fe | 255 | * @brief CEC MSP DeInit |
mbed_official | 340:28d1f895c6fe | 256 | * @param hcec: CEC handle |
mbed_official | 340:28d1f895c6fe | 257 | * @retval None |
mbed_official | 340:28d1f895c6fe | 258 | */ |
mbed_official | 340:28d1f895c6fe | 259 | __weak void HAL_CEC_MspDeInit(CEC_HandleTypeDef *hcec) |
mbed_official | 340:28d1f895c6fe | 260 | { |
mbed_official | 340:28d1f895c6fe | 261 | /* NOTE : This function should not be modified, when the callback is needed, |
mbed_official | 340:28d1f895c6fe | 262 | the HAL_CEC_MspDeInit can be implemented in the user file |
mbed_official | 340:28d1f895c6fe | 263 | */ |
mbed_official | 340:28d1f895c6fe | 264 | } |
mbed_official | 340:28d1f895c6fe | 265 | |
mbed_official | 340:28d1f895c6fe | 266 | /** |
mbed_official | 340:28d1f895c6fe | 267 | * @} |
mbed_official | 340:28d1f895c6fe | 268 | */ |
mbed_official | 340:28d1f895c6fe | 269 | |
mbed_official | 340:28d1f895c6fe | 270 | /** @defgroup CEC_Exported_Functions_Group2 IO operation function |
mbed_official | 340:28d1f895c6fe | 271 | * @brief CEC Transmit/Receive functions |
mbed_official | 340:28d1f895c6fe | 272 | * |
mbed_official | 340:28d1f895c6fe | 273 | @verbatim |
mbed_official | 340:28d1f895c6fe | 274 | =============================================================================== |
mbed_official | 340:28d1f895c6fe | 275 | ##### IO operation function ##### |
mbed_official | 340:28d1f895c6fe | 276 | =============================================================================== |
mbed_official | 340:28d1f895c6fe | 277 | This subsection provides a set of functions allowing to manage the CEC data transfers. |
mbed_official | 340:28d1f895c6fe | 278 | |
mbed_official | 340:28d1f895c6fe | 279 | (#) The CEC handle must contain the initiator (TX side) and the destination (RX side) |
mbed_official | 340:28d1f895c6fe | 280 | logical addresses (4-bit long addresses, 0xF for broadcast messages destination) |
mbed_official | 340:28d1f895c6fe | 281 | |
mbed_official | 340:28d1f895c6fe | 282 | (#) There are two mode of transfer: |
mbed_official | 340:28d1f895c6fe | 283 | (+) Blocking mode: The communication is performed in polling mode. |
mbed_official | 340:28d1f895c6fe | 284 | The HAL status of all data processing is returned by the same function |
mbed_official | 340:28d1f895c6fe | 285 | after finishing transfer. |
mbed_official | 340:28d1f895c6fe | 286 | (+) Non Blocking mode: The communication is performed using Interrupts. |
mbed_official | 340:28d1f895c6fe | 287 | These API's return the HAL status. |
mbed_official | 340:28d1f895c6fe | 288 | The end of the data processing will be indicated through the |
mbed_official | 340:28d1f895c6fe | 289 | dedicated CEC IRQ when using Interrupt mode. |
mbed_official | 340:28d1f895c6fe | 290 | The HAL_CEC_TxCpltCallback(), HAL_CEC_RxCpltCallback() user callbacks |
mbed_official | 340:28d1f895c6fe | 291 | will be executed respectivelly at the end of the transmit or Receive process |
mbed_official | 340:28d1f895c6fe | 292 | The HAL_CEC_ErrorCallback()user callback will be executed when a communication |
mbed_official | 340:28d1f895c6fe | 293 | error is detected |
mbed_official | 340:28d1f895c6fe | 294 | |
mbed_official | 340:28d1f895c6fe | 295 | (#) Blocking mode API s are : |
mbed_official | 340:28d1f895c6fe | 296 | (+) HAL_CEC_Transmit() |
mbed_official | 340:28d1f895c6fe | 297 | (+) HAL_CEC_Receive() |
mbed_official | 340:28d1f895c6fe | 298 | |
mbed_official | 340:28d1f895c6fe | 299 | (#) Non-Blocking mode API s with Interrupt are : |
mbed_official | 340:28d1f895c6fe | 300 | (+) HAL_CEC_Transmit_IT() |
mbed_official | 340:28d1f895c6fe | 301 | (+) HAL_CEC_Receive_IT() |
mbed_official | 340:28d1f895c6fe | 302 | (+) HAL_CEC_IRQHandler() |
mbed_official | 340:28d1f895c6fe | 303 | |
mbed_official | 340:28d1f895c6fe | 304 | (#) A set of Transfer Complete Callbacks are provided in No_Blocking mode: |
mbed_official | 340:28d1f895c6fe | 305 | (+) HAL_CEC_TxCpltCallback() |
mbed_official | 340:28d1f895c6fe | 306 | (+) HAL_CEC_RxCpltCallback() |
mbed_official | 340:28d1f895c6fe | 307 | (+) HAL_CEC_ErrorCallback() |
mbed_official | 340:28d1f895c6fe | 308 | |
mbed_official | 340:28d1f895c6fe | 309 | @endverbatim |
mbed_official | 340:28d1f895c6fe | 310 | * @{ |
mbed_official | 340:28d1f895c6fe | 311 | */ |
mbed_official | 340:28d1f895c6fe | 312 | |
mbed_official | 340:28d1f895c6fe | 313 | /** |
mbed_official | 340:28d1f895c6fe | 314 | * @brief Send data in blocking mode |
mbed_official | 340:28d1f895c6fe | 315 | * @param hcec: CEC handle |
mbed_official | 340:28d1f895c6fe | 316 | * @param DestinationAddress: destination logical address |
mbed_official | 340:28d1f895c6fe | 317 | * @param pData: pointer to input byte data buffer |
mbed_official | 340:28d1f895c6fe | 318 | * @param Size: amount of data to be sent in bytes (without counting the header). |
mbed_official | 340:28d1f895c6fe | 319 | * 0 means only the header is sent (ping operation). |
mbed_official | 340:28d1f895c6fe | 320 | * Maximum TX size is 15 bytes (1 opcode and up to 14 operands). |
mbed_official | 340:28d1f895c6fe | 321 | * @param Timeout: Timeout duration. |
mbed_official | 340:28d1f895c6fe | 322 | * @retval HAL status |
mbed_official | 340:28d1f895c6fe | 323 | */ |
mbed_official | 340:28d1f895c6fe | 324 | HAL_StatusTypeDef HAL_CEC_Transmit(CEC_HandleTypeDef *hcec, uint8_t DestinationAddress, uint8_t *pData, uint32_t Size, uint32_t Timeout) |
mbed_official | 340:28d1f895c6fe | 325 | { |
mbed_official | 340:28d1f895c6fe | 326 | uint8_t temp = 0; |
mbed_official | 340:28d1f895c6fe | 327 | uint32_t tempisr = 0; |
mbed_official | 340:28d1f895c6fe | 328 | uint32_t tickstart = 0; |
mbed_official | 340:28d1f895c6fe | 329 | |
mbed_official | 340:28d1f895c6fe | 330 | if((hcec->State == HAL_CEC_STATE_READY) && (__HAL_CEC_GET_TRANSMISSION_START_FLAG(hcec) == RESET)) |
mbed_official | 340:28d1f895c6fe | 331 | { |
mbed_official | 340:28d1f895c6fe | 332 | hcec->ErrorCode = HAL_CEC_ERROR_NONE; |
mbed_official | 340:28d1f895c6fe | 333 | if((pData == HAL_NULL ) && (Size > 0)) |
mbed_official | 340:28d1f895c6fe | 334 | { |
mbed_official | 340:28d1f895c6fe | 335 | hcec->State = HAL_CEC_STATE_ERROR; |
mbed_official | 340:28d1f895c6fe | 336 | return HAL_ERROR; |
mbed_official | 340:28d1f895c6fe | 337 | } |
mbed_official | 340:28d1f895c6fe | 338 | |
mbed_official | 340:28d1f895c6fe | 339 | assert_param(IS_CEC_ADDRESS(DestinationAddress)); |
mbed_official | 340:28d1f895c6fe | 340 | assert_param(IS_CEC_MSGSIZE(Size)); |
mbed_official | 340:28d1f895c6fe | 341 | |
mbed_official | 340:28d1f895c6fe | 342 | /* Process Locked */ |
mbed_official | 340:28d1f895c6fe | 343 | __HAL_LOCK(hcec); |
mbed_official | 340:28d1f895c6fe | 344 | |
mbed_official | 340:28d1f895c6fe | 345 | hcec->State = HAL_CEC_STATE_BUSY_TX; |
mbed_official | 340:28d1f895c6fe | 346 | |
mbed_official | 340:28d1f895c6fe | 347 | hcec->TxXferCount = Size; |
mbed_official | 340:28d1f895c6fe | 348 | |
mbed_official | 340:28d1f895c6fe | 349 | /* case no data to be sent, sender is only pinging the system */ |
mbed_official | 340:28d1f895c6fe | 350 | if (Size == 0) |
mbed_official | 340:28d1f895c6fe | 351 | { |
mbed_official | 340:28d1f895c6fe | 352 | /* Set TX End of Message (TXEOM) bit, must be set before writing data to TXDR */ |
mbed_official | 340:28d1f895c6fe | 353 | __HAL_CEC_LAST_BYTE_TX_SET(hcec); |
mbed_official | 340:28d1f895c6fe | 354 | } |
mbed_official | 340:28d1f895c6fe | 355 | |
mbed_official | 340:28d1f895c6fe | 356 | /* send header block */ |
mbed_official | 340:28d1f895c6fe | 357 | temp = ((uint32_t)hcec->Init.InitiatorAddress << CEC_INITIATOR_LSB_POS) | DestinationAddress; |
mbed_official | 340:28d1f895c6fe | 358 | hcec->Instance->TXDR = temp; |
mbed_official | 340:28d1f895c6fe | 359 | /* Set TX Start of Message (TXSOM) bit */ |
mbed_official | 340:28d1f895c6fe | 360 | __HAL_CEC_FIRST_BYTE_TX_SET(hcec); |
mbed_official | 340:28d1f895c6fe | 361 | |
mbed_official | 340:28d1f895c6fe | 362 | while (hcec->TxXferCount > 0) |
mbed_official | 340:28d1f895c6fe | 363 | { |
mbed_official | 340:28d1f895c6fe | 364 | hcec->TxXferCount--; |
mbed_official | 340:28d1f895c6fe | 365 | |
mbed_official | 340:28d1f895c6fe | 366 | tickstart = HAL_GetTick(); |
mbed_official | 340:28d1f895c6fe | 367 | while(HAL_IS_BIT_CLR(hcec->Instance->ISR, CEC_ISR_TXBR)) |
mbed_official | 340:28d1f895c6fe | 368 | { |
mbed_official | 340:28d1f895c6fe | 369 | if(Timeout != HAL_MAX_DELAY) |
mbed_official | 340:28d1f895c6fe | 370 | { |
mbed_official | 340:28d1f895c6fe | 371 | if((Timeout == 0) || ((HAL_GetTick() - tickstart) > Timeout)) |
mbed_official | 340:28d1f895c6fe | 372 | { |
mbed_official | 340:28d1f895c6fe | 373 | hcec->State = HAL_CEC_STATE_TIMEOUT; |
mbed_official | 340:28d1f895c6fe | 374 | /* Process Unlocked */ |
mbed_official | 340:28d1f895c6fe | 375 | __HAL_UNLOCK(hcec); |
mbed_official | 340:28d1f895c6fe | 376 | return HAL_TIMEOUT; |
mbed_official | 340:28d1f895c6fe | 377 | } |
mbed_official | 340:28d1f895c6fe | 378 | } |
mbed_official | 340:28d1f895c6fe | 379 | |
mbed_official | 340:28d1f895c6fe | 380 | /* check whether error occured while waiting for TXBR to be set: |
mbed_official | 340:28d1f895c6fe | 381 | * has Tx underrun occurred ? |
mbed_official | 340:28d1f895c6fe | 382 | * has Tx error occurred ? |
mbed_official | 340:28d1f895c6fe | 383 | * has Tx Missing Acknowledge error occurred ? |
mbed_official | 340:28d1f895c6fe | 384 | * has Arbitration Loss error occurred ? */ |
mbed_official | 340:28d1f895c6fe | 385 | tempisr = hcec->Instance->ISR; |
mbed_official | 340:28d1f895c6fe | 386 | if ((tempisr & (CEC_ISR_TXUDR|CEC_ISR_TXERR|CEC_ISR_TXACKE|CEC_ISR_ARBLST)) != 0) |
mbed_official | 340:28d1f895c6fe | 387 | { |
mbed_official | 340:28d1f895c6fe | 388 | /* copy ISR for error handling purposes */ |
mbed_official | 340:28d1f895c6fe | 389 | hcec->ErrorCode = tempisr; |
mbed_official | 340:28d1f895c6fe | 390 | /* clear all error flags by default */ |
mbed_official | 340:28d1f895c6fe | 391 | __HAL_CEC_CLEAR_FLAG(hcec, (CEC_ISR_TXUDR|CEC_ISR_TXERR|CEC_ISR_TXACKE|CEC_ISR_ARBLST)); |
mbed_official | 340:28d1f895c6fe | 392 | hcec->State = HAL_CEC_STATE_ERROR; |
mbed_official | 340:28d1f895c6fe | 393 | __HAL_UNLOCK(hcec); |
mbed_official | 340:28d1f895c6fe | 394 | return HAL_ERROR; |
mbed_official | 340:28d1f895c6fe | 395 | } |
mbed_official | 340:28d1f895c6fe | 396 | } |
mbed_official | 340:28d1f895c6fe | 397 | /* TXBR to clear BEFORE writing TXDR register */ |
mbed_official | 340:28d1f895c6fe | 398 | __HAL_CEC_CLEAR_FLAG(hcec,CEC_ISR_TXBR); |
mbed_official | 340:28d1f895c6fe | 399 | if (hcec->TxXferCount == 0) |
mbed_official | 340:28d1f895c6fe | 400 | { |
mbed_official | 340:28d1f895c6fe | 401 | /* if last byte transmission, set TX End of Message (TXEOM) bit */ |
mbed_official | 340:28d1f895c6fe | 402 | __HAL_CEC_LAST_BYTE_TX_SET(hcec); |
mbed_official | 340:28d1f895c6fe | 403 | } |
mbed_official | 340:28d1f895c6fe | 404 | hcec->Instance->TXDR = *pData++; |
mbed_official | 340:28d1f895c6fe | 405 | |
mbed_official | 340:28d1f895c6fe | 406 | /* error check after TX byte write up */ |
mbed_official | 340:28d1f895c6fe | 407 | tempisr = hcec->Instance->ISR; |
mbed_official | 340:28d1f895c6fe | 408 | if ((tempisr & (CEC_ISR_TXUDR|CEC_ISR_TXERR|CEC_ISR_TXACKE|CEC_ISR_ARBLST)) != 0) |
mbed_official | 340:28d1f895c6fe | 409 | { |
mbed_official | 340:28d1f895c6fe | 410 | /* copy ISR for error handling purposes */ |
mbed_official | 340:28d1f895c6fe | 411 | hcec->ErrorCode = tempisr; |
mbed_official | 340:28d1f895c6fe | 412 | /* clear all error flags by default */ |
mbed_official | 340:28d1f895c6fe | 413 | __HAL_CEC_CLEAR_FLAG(hcec, (CEC_ISR_TXUDR|CEC_ISR_TXERR|CEC_ISR_TXACKE|CEC_ISR_ARBLST)); |
mbed_official | 340:28d1f895c6fe | 414 | hcec->State = HAL_CEC_STATE_ERROR; |
mbed_official | 340:28d1f895c6fe | 415 | __HAL_UNLOCK(hcec); |
mbed_official | 340:28d1f895c6fe | 416 | return HAL_ERROR; |
mbed_official | 340:28d1f895c6fe | 417 | } |
mbed_official | 340:28d1f895c6fe | 418 | } /* end while (while (hcec->TxXferCount > 0)) */ |
mbed_official | 340:28d1f895c6fe | 419 | |
mbed_official | 340:28d1f895c6fe | 420 | |
mbed_official | 340:28d1f895c6fe | 421 | /* if no error up to this point, check that transmission is |
mbed_official | 340:28d1f895c6fe | 422 | * complete, that is wait until TXEOM is reset */ |
mbed_official | 340:28d1f895c6fe | 423 | tickstart = HAL_GetTick(); |
mbed_official | 340:28d1f895c6fe | 424 | |
mbed_official | 340:28d1f895c6fe | 425 | while (HAL_IS_BIT_SET(hcec->Instance->CR, CEC_CR_TXEOM)) |
mbed_official | 340:28d1f895c6fe | 426 | { |
mbed_official | 340:28d1f895c6fe | 427 | if(Timeout != HAL_MAX_DELAY) |
mbed_official | 340:28d1f895c6fe | 428 | { |
mbed_official | 340:28d1f895c6fe | 429 | if((Timeout == 0) || ((HAL_GetTick() - tickstart) > Timeout)) |
mbed_official | 340:28d1f895c6fe | 430 | { |
mbed_official | 340:28d1f895c6fe | 431 | hcec->State = HAL_CEC_STATE_ERROR; |
mbed_official | 340:28d1f895c6fe | 432 | __HAL_UNLOCK(hcec); |
mbed_official | 340:28d1f895c6fe | 433 | return HAL_TIMEOUT; |
mbed_official | 340:28d1f895c6fe | 434 | } |
mbed_official | 340:28d1f895c6fe | 435 | } |
mbed_official | 340:28d1f895c6fe | 436 | } |
mbed_official | 340:28d1f895c6fe | 437 | |
mbed_official | 340:28d1f895c6fe | 438 | /* Final error check once all bytes have been transmitted */ |
mbed_official | 340:28d1f895c6fe | 439 | tempisr = hcec->Instance->ISR; |
mbed_official | 340:28d1f895c6fe | 440 | if ((tempisr & (CEC_ISR_TXUDR|CEC_ISR_TXERR|CEC_ISR_TXACKE)) != 0) |
mbed_official | 340:28d1f895c6fe | 441 | { |
mbed_official | 340:28d1f895c6fe | 442 | /* copy ISR for error handling purposes */ |
mbed_official | 340:28d1f895c6fe | 443 | hcec->ErrorCode = tempisr; |
mbed_official | 340:28d1f895c6fe | 444 | /* clear all error flags by default */ |
mbed_official | 340:28d1f895c6fe | 445 | __HAL_CEC_CLEAR_FLAG(hcec, (CEC_ISR_TXUDR|CEC_ISR_TXERR|CEC_ISR_TXACKE)); |
mbed_official | 340:28d1f895c6fe | 446 | hcec->State = HAL_CEC_STATE_ERROR; |
mbed_official | 340:28d1f895c6fe | 447 | __HAL_UNLOCK(hcec); |
mbed_official | 340:28d1f895c6fe | 448 | return HAL_ERROR; |
mbed_official | 340:28d1f895c6fe | 449 | } |
mbed_official | 340:28d1f895c6fe | 450 | |
mbed_official | 340:28d1f895c6fe | 451 | hcec->State = HAL_CEC_STATE_READY; |
mbed_official | 340:28d1f895c6fe | 452 | __HAL_UNLOCK(hcec); |
mbed_official | 340:28d1f895c6fe | 453 | |
mbed_official | 340:28d1f895c6fe | 454 | return HAL_OK; |
mbed_official | 340:28d1f895c6fe | 455 | } |
mbed_official | 340:28d1f895c6fe | 456 | else |
mbed_official | 340:28d1f895c6fe | 457 | { |
mbed_official | 340:28d1f895c6fe | 458 | return HAL_BUSY; |
mbed_official | 340:28d1f895c6fe | 459 | } |
mbed_official | 340:28d1f895c6fe | 460 | } |
mbed_official | 340:28d1f895c6fe | 461 | |
mbed_official | 340:28d1f895c6fe | 462 | /** |
mbed_official | 340:28d1f895c6fe | 463 | * @brief Receive data in blocking mode. Must be invoked when RXBR has been set. |
mbed_official | 340:28d1f895c6fe | 464 | * @param hcec: CEC handle |
mbed_official | 340:28d1f895c6fe | 465 | * @param pData: pointer to received data buffer. |
mbed_official | 340:28d1f895c6fe | 466 | * @param Timeout: Timeout duration. |
mbed_official | 340:28d1f895c6fe | 467 | * Note that the received data size is not known beforehand, the latter is known |
mbed_official | 340:28d1f895c6fe | 468 | * when the reception is complete and is stored in hcec->RxXferSize. |
mbed_official | 340:28d1f895c6fe | 469 | * hcec->RxXferSize is the sum of opcodes + operands (0 to 14 operands max). |
mbed_official | 340:28d1f895c6fe | 470 | * If only a header is received, hcec->RxXferSize = 0 |
mbed_official | 340:28d1f895c6fe | 471 | * @retval HAL status |
mbed_official | 340:28d1f895c6fe | 472 | */ |
mbed_official | 340:28d1f895c6fe | 473 | HAL_StatusTypeDef HAL_CEC_Receive(CEC_HandleTypeDef *hcec, uint8_t *pData, uint32_t Timeout) |
mbed_official | 340:28d1f895c6fe | 474 | { |
mbed_official | 340:28d1f895c6fe | 475 | uint32_t temp; |
mbed_official | 340:28d1f895c6fe | 476 | uint32_t tickstart = 0; |
mbed_official | 340:28d1f895c6fe | 477 | |
mbed_official | 340:28d1f895c6fe | 478 | if (hcec->State == HAL_CEC_STATE_READY) |
mbed_official | 340:28d1f895c6fe | 479 | { |
mbed_official | 340:28d1f895c6fe | 480 | hcec->ErrorCode = HAL_CEC_ERROR_NONE; |
mbed_official | 340:28d1f895c6fe | 481 | if (pData == HAL_NULL ) |
mbed_official | 340:28d1f895c6fe | 482 | { |
mbed_official | 340:28d1f895c6fe | 483 | hcec->State = HAL_CEC_STATE_ERROR; |
mbed_official | 340:28d1f895c6fe | 484 | return HAL_ERROR; |
mbed_official | 340:28d1f895c6fe | 485 | } |
mbed_official | 340:28d1f895c6fe | 486 | |
mbed_official | 340:28d1f895c6fe | 487 | hcec->RxXferSize = 0; |
mbed_official | 340:28d1f895c6fe | 488 | /* Process Locked */ |
mbed_official | 340:28d1f895c6fe | 489 | __HAL_LOCK(hcec); |
mbed_official | 340:28d1f895c6fe | 490 | |
mbed_official | 340:28d1f895c6fe | 491 | |
mbed_official | 340:28d1f895c6fe | 492 | /* Rx loop until CEC_ISR_RXEND is set */ |
mbed_official | 340:28d1f895c6fe | 493 | while (HAL_IS_BIT_CLR(hcec->Instance->ISR, CEC_ISR_RXEND)) |
mbed_official | 340:28d1f895c6fe | 494 | { |
mbed_official | 340:28d1f895c6fe | 495 | tickstart = HAL_GetTick(); |
mbed_official | 340:28d1f895c6fe | 496 | /* Wait for next byte to be received */ |
mbed_official | 340:28d1f895c6fe | 497 | while (HAL_IS_BIT_CLR(hcec->Instance->ISR, CEC_ISR_RXBR)) |
mbed_official | 340:28d1f895c6fe | 498 | { |
mbed_official | 340:28d1f895c6fe | 499 | if(Timeout != HAL_MAX_DELAY) |
mbed_official | 340:28d1f895c6fe | 500 | { |
mbed_official | 340:28d1f895c6fe | 501 | if((Timeout == 0) || ((HAL_GetTick() - tickstart) > Timeout)) |
mbed_official | 340:28d1f895c6fe | 502 | { |
mbed_official | 340:28d1f895c6fe | 503 | hcec->State = HAL_CEC_STATE_TIMEOUT; |
mbed_official | 340:28d1f895c6fe | 504 | __HAL_UNLOCK(hcec); |
mbed_official | 340:28d1f895c6fe | 505 | return HAL_TIMEOUT; |
mbed_official | 340:28d1f895c6fe | 506 | } |
mbed_official | 340:28d1f895c6fe | 507 | } |
mbed_official | 340:28d1f895c6fe | 508 | /* any error so far ? |
mbed_official | 340:28d1f895c6fe | 509 | * has Rx Missing Acknowledge occurred ? |
mbed_official | 340:28d1f895c6fe | 510 | * has Rx Long Bit Period error occurred ? |
mbed_official | 340:28d1f895c6fe | 511 | * has Rx Short Bit Period error occurred ? |
mbed_official | 340:28d1f895c6fe | 512 | * has Rx Bit Rising error occurred ? |
mbed_official | 340:28d1f895c6fe | 513 | * has Rx Overrun error occurred ? */ |
mbed_official | 340:28d1f895c6fe | 514 | temp = (uint32_t) (hcec->Instance->ISR); |
mbed_official | 340:28d1f895c6fe | 515 | if ((temp & (CEC_ISR_RXACKE|CEC_ISR_LBPE|CEC_ISR_SBPE|CEC_ISR_BRE|CEC_ISR_RXOVR)) != 0) |
mbed_official | 340:28d1f895c6fe | 516 | { |
mbed_official | 340:28d1f895c6fe | 517 | /* copy ISR for error handling purposes */ |
mbed_official | 340:28d1f895c6fe | 518 | hcec->ErrorCode = temp; |
mbed_official | 340:28d1f895c6fe | 519 | /* clear all error flags by default */ |
mbed_official | 340:28d1f895c6fe | 520 | __HAL_CEC_CLEAR_FLAG(hcec, (CEC_ISR_RXACKE|CEC_ISR_LBPE|CEC_ISR_SBPE|CEC_ISR_BRE|CEC_ISR_RXOVR)); |
mbed_official | 340:28d1f895c6fe | 521 | hcec->State = HAL_CEC_STATE_ERROR; |
mbed_official | 340:28d1f895c6fe | 522 | __HAL_UNLOCK(hcec); |
mbed_official | 340:28d1f895c6fe | 523 | return HAL_ERROR; |
mbed_official | 340:28d1f895c6fe | 524 | } |
mbed_official | 340:28d1f895c6fe | 525 | } /* while (HAL_IS_BIT_CLR(hcec->Instance->ISR, CEC_ISR_RXBR)) */ |
mbed_official | 340:28d1f895c6fe | 526 | |
mbed_official | 340:28d1f895c6fe | 527 | |
mbed_official | 340:28d1f895c6fe | 528 | /* read received data */ |
mbed_official | 340:28d1f895c6fe | 529 | *pData++ = hcec->Instance->RXDR; |
mbed_official | 340:28d1f895c6fe | 530 | temp = (uint32_t) (hcec->Instance->ISR); |
mbed_official | 340:28d1f895c6fe | 531 | /* end of message ? */ |
mbed_official | 340:28d1f895c6fe | 532 | if ((temp & CEC_ISR_RXEND) != 0) |
mbed_official | 340:28d1f895c6fe | 533 | { |
mbed_official | 340:28d1f895c6fe | 534 | assert_param(IS_CEC_MSGSIZE(hcec->RxXferSize)); |
mbed_official | 340:28d1f895c6fe | 535 | __HAL_CEC_CLEAR_FLAG(hcec,CEC_ISR_RXEND); |
mbed_official | 340:28d1f895c6fe | 536 | hcec->State = HAL_CEC_STATE_READY; |
mbed_official | 340:28d1f895c6fe | 537 | __HAL_UNLOCK(hcec); |
mbed_official | 340:28d1f895c6fe | 538 | return HAL_OK; |
mbed_official | 340:28d1f895c6fe | 539 | } |
mbed_official | 340:28d1f895c6fe | 540 | |
mbed_official | 340:28d1f895c6fe | 541 | /* clear Rx-Byte Received flag */ |
mbed_official | 340:28d1f895c6fe | 542 | __HAL_CEC_CLEAR_FLAG(hcec,CEC_ISR_RXBR); |
mbed_official | 340:28d1f895c6fe | 543 | /* increment payload byte counter */ |
mbed_official | 340:28d1f895c6fe | 544 | hcec->RxXferSize++; |
mbed_official | 340:28d1f895c6fe | 545 | } /* while (HAL_IS_BIT_CLR(hcec->Instance->ISR, CEC_ISR_RXEND)) */ |
mbed_official | 340:28d1f895c6fe | 546 | |
mbed_official | 340:28d1f895c6fe | 547 | /* if the instructions below are executed, it means RXEND was set when RXBR was |
mbed_official | 340:28d1f895c6fe | 548 | * set for the first time: |
mbed_official | 340:28d1f895c6fe | 549 | * the code within the "while (HAL_IS_BIT_CLR(hcec->Instance->ISR, CEC_ISR_RXEND))" |
mbed_official | 340:28d1f895c6fe | 550 | * loop has not been executed and this means a single byte has been sent */ |
mbed_official | 340:28d1f895c6fe | 551 | *pData++ = hcec->Instance->RXDR; |
mbed_official | 340:28d1f895c6fe | 552 | /* only one header is received: RxXferSize is set to 0 (no operand, no opcode) */ |
mbed_official | 340:28d1f895c6fe | 553 | hcec->RxXferSize = 0; |
mbed_official | 340:28d1f895c6fe | 554 | __HAL_CEC_CLEAR_FLAG(hcec,CEC_ISR_RXEND); |
mbed_official | 340:28d1f895c6fe | 555 | |
mbed_official | 340:28d1f895c6fe | 556 | hcec->State = HAL_CEC_STATE_READY; |
mbed_official | 340:28d1f895c6fe | 557 | __HAL_UNLOCK(hcec); |
mbed_official | 340:28d1f895c6fe | 558 | return HAL_OK; |
mbed_official | 340:28d1f895c6fe | 559 | } |
mbed_official | 340:28d1f895c6fe | 560 | else |
mbed_official | 340:28d1f895c6fe | 561 | { |
mbed_official | 340:28d1f895c6fe | 562 | return HAL_BUSY; |
mbed_official | 340:28d1f895c6fe | 563 | } |
mbed_official | 340:28d1f895c6fe | 564 | } |
mbed_official | 340:28d1f895c6fe | 565 | |
mbed_official | 340:28d1f895c6fe | 566 | |
mbed_official | 340:28d1f895c6fe | 567 | /** |
mbed_official | 340:28d1f895c6fe | 568 | * @brief Send data in interrupt mode |
mbed_official | 340:28d1f895c6fe | 569 | * @param hcec: CEC handle |
mbed_official | 340:28d1f895c6fe | 570 | * @param DestinationAddress: destination logical address |
mbed_official | 340:28d1f895c6fe | 571 | * @param pData: pointer to input byte data buffer |
mbed_official | 340:28d1f895c6fe | 572 | * @param Size: amount of data to be sent in bytes (without counting the header). |
mbed_official | 340:28d1f895c6fe | 573 | * 0 means only the header is sent (ping operation). |
mbed_official | 340:28d1f895c6fe | 574 | * Maximum TX size is 15 bytes (1 opcode and up to 14 operands). |
mbed_official | 340:28d1f895c6fe | 575 | * @retval HAL status |
mbed_official | 340:28d1f895c6fe | 576 | */ |
mbed_official | 340:28d1f895c6fe | 577 | HAL_StatusTypeDef HAL_CEC_Transmit_IT(CEC_HandleTypeDef *hcec, uint8_t DestinationAddress, uint8_t *pData, uint32_t Size) |
mbed_official | 340:28d1f895c6fe | 578 | { |
mbed_official | 340:28d1f895c6fe | 579 | uint8_t temp = 0; |
mbed_official | 340:28d1f895c6fe | 580 | /* if the IP isn't already busy and if there is no previous transmission |
mbed_official | 340:28d1f895c6fe | 581 | already pending due to arbitration lost */ |
mbed_official | 340:28d1f895c6fe | 582 | if (((hcec->State == HAL_CEC_STATE_READY) || (hcec->State == HAL_CEC_STATE_STANDBY_RX)) |
mbed_official | 340:28d1f895c6fe | 583 | && (__HAL_CEC_GET_TRANSMISSION_START_FLAG(hcec) == RESET)) |
mbed_official | 340:28d1f895c6fe | 584 | { |
mbed_official | 340:28d1f895c6fe | 585 | if((pData == HAL_NULL ) && (Size > 0)) |
mbed_official | 340:28d1f895c6fe | 586 | { |
mbed_official | 340:28d1f895c6fe | 587 | hcec->State = HAL_CEC_STATE_ERROR; |
mbed_official | 340:28d1f895c6fe | 588 | return HAL_ERROR; |
mbed_official | 340:28d1f895c6fe | 589 | } |
mbed_official | 340:28d1f895c6fe | 590 | |
mbed_official | 340:28d1f895c6fe | 591 | assert_param(IS_CEC_ADDRESS(DestinationAddress)); |
mbed_official | 340:28d1f895c6fe | 592 | assert_param(IS_CEC_MSGSIZE(Size)); |
mbed_official | 340:28d1f895c6fe | 593 | |
mbed_official | 340:28d1f895c6fe | 594 | /* Process Locked */ |
mbed_official | 340:28d1f895c6fe | 595 | __HAL_LOCK(hcec); |
mbed_official | 340:28d1f895c6fe | 596 | hcec->pTxBuffPtr = pData; |
mbed_official | 340:28d1f895c6fe | 597 | hcec->State = HAL_CEC_STATE_BUSY_TX; |
mbed_official | 340:28d1f895c6fe | 598 | hcec->ErrorCode = HAL_CEC_ERROR_NONE; |
mbed_official | 340:28d1f895c6fe | 599 | |
mbed_official | 340:28d1f895c6fe | 600 | /* Disable Peripheral to write CEC_IER register */ |
mbed_official | 340:28d1f895c6fe | 601 | __HAL_CEC_DISABLE(hcec); |
mbed_official | 340:28d1f895c6fe | 602 | |
mbed_official | 340:28d1f895c6fe | 603 | /* Enable the following two CEC Transmission interrupts as |
mbed_official | 340:28d1f895c6fe | 604 | * well as the following CEC Transmission Errors interrupts: |
mbed_official | 340:28d1f895c6fe | 605 | * Tx Byte Request IT |
mbed_official | 340:28d1f895c6fe | 606 | * End of Transmission IT |
mbed_official | 340:28d1f895c6fe | 607 | * Tx Missing Acknowledge IT |
mbed_official | 340:28d1f895c6fe | 608 | * Tx-Error IT |
mbed_official | 340:28d1f895c6fe | 609 | * Tx-Buffer Underrun IT |
mbed_official | 340:28d1f895c6fe | 610 | * Tx arbitration lost */ |
mbed_official | 340:28d1f895c6fe | 611 | __HAL_CEC_ENABLE_IT(hcec, CEC_IER_TXBRIE|CEC_IER_TXENDIE|CEC_IER_TX_ALL_ERR); |
mbed_official | 340:28d1f895c6fe | 612 | |
mbed_official | 340:28d1f895c6fe | 613 | /* Enable the Peripheral */ |
mbed_official | 340:28d1f895c6fe | 614 | __HAL_CEC_ENABLE(hcec); |
mbed_official | 340:28d1f895c6fe | 615 | |
mbed_official | 340:28d1f895c6fe | 616 | /* initialize the number of bytes to send, |
mbed_official | 340:28d1f895c6fe | 617 | * 0 means only one header is sent (ping operation) */ |
mbed_official | 340:28d1f895c6fe | 618 | hcec->TxXferCount = Size; |
mbed_official | 340:28d1f895c6fe | 619 | |
mbed_official | 340:28d1f895c6fe | 620 | /* Process Unlocked */ |
mbed_official | 340:28d1f895c6fe | 621 | __HAL_UNLOCK(hcec); |
mbed_official | 340:28d1f895c6fe | 622 | |
mbed_official | 340:28d1f895c6fe | 623 | /* in case of no payload (Size = 0), sender is only pinging the system; |
mbed_official | 340:28d1f895c6fe | 624 | * Set TX End of Message (TXEOM) bit, must be set before writing data to TXDR */ |
mbed_official | 340:28d1f895c6fe | 625 | if (Size == 0) |
mbed_official | 340:28d1f895c6fe | 626 | { |
mbed_official | 340:28d1f895c6fe | 627 | __HAL_CEC_LAST_BYTE_TX_SET(hcec); |
mbed_official | 340:28d1f895c6fe | 628 | } |
mbed_official | 340:28d1f895c6fe | 629 | |
mbed_official | 340:28d1f895c6fe | 630 | /* send header block */ |
mbed_official | 340:28d1f895c6fe | 631 | temp = ((uint32_t)hcec->Init.InitiatorAddress << CEC_INITIATOR_LSB_POS) | DestinationAddress; |
mbed_official | 340:28d1f895c6fe | 632 | hcec->Instance->TXDR = temp; |
mbed_official | 340:28d1f895c6fe | 633 | /* Set TX Start of Message (TXSOM) bit */ |
mbed_official | 340:28d1f895c6fe | 634 | __HAL_CEC_FIRST_BYTE_TX_SET(hcec); |
mbed_official | 340:28d1f895c6fe | 635 | |
mbed_official | 340:28d1f895c6fe | 636 | return HAL_OK; |
mbed_official | 340:28d1f895c6fe | 637 | } |
mbed_official | 340:28d1f895c6fe | 638 | /* if the IP is already busy or if there is a previous transmission |
mbed_official | 340:28d1f895c6fe | 639 | already pending due to arbitration loss */ |
mbed_official | 340:28d1f895c6fe | 640 | else if ((hcec->State == HAL_CEC_STATE_BUSY_TX) |
mbed_official | 340:28d1f895c6fe | 641 | || (__HAL_CEC_GET_TRANSMISSION_START_FLAG(hcec) != RESET)) |
mbed_official | 340:28d1f895c6fe | 642 | { |
mbed_official | 340:28d1f895c6fe | 643 | __HAL_LOCK(hcec); |
mbed_official | 340:28d1f895c6fe | 644 | /* set state to BUSY TX, in case it wasn't set already (case |
mbed_official | 340:28d1f895c6fe | 645 | * of transmission new attempt after arbitration loss) */ |
mbed_official | 340:28d1f895c6fe | 646 | if (hcec->State != HAL_CEC_STATE_BUSY_TX) |
mbed_official | 340:28d1f895c6fe | 647 | { |
mbed_official | 340:28d1f895c6fe | 648 | hcec->State = HAL_CEC_STATE_BUSY_TX; |
mbed_official | 340:28d1f895c6fe | 649 | } |
mbed_official | 340:28d1f895c6fe | 650 | |
mbed_official | 340:28d1f895c6fe | 651 | /* if all data have been sent */ |
mbed_official | 340:28d1f895c6fe | 652 | if(hcec->TxXferCount == 0) |
mbed_official | 340:28d1f895c6fe | 653 | { |
mbed_official | 340:28d1f895c6fe | 654 | /* Disable Peripheral to write CEC_IER register */ |
mbed_official | 340:28d1f895c6fe | 655 | __HAL_CEC_DISABLE(hcec); |
mbed_official | 340:28d1f895c6fe | 656 | |
mbed_official | 340:28d1f895c6fe | 657 | /* Disable the CEC Transmission Interrupts */ |
mbed_official | 340:28d1f895c6fe | 658 | __HAL_CEC_DISABLE_IT(hcec, CEC_IER_TXBRIE|CEC_IER_TXENDIE); |
mbed_official | 340:28d1f895c6fe | 659 | /* Disable the CEC Transmission Error Interrupts */ |
mbed_official | 340:28d1f895c6fe | 660 | __HAL_CEC_DISABLE_IT(hcec, CEC_IER_TX_ALL_ERR); |
mbed_official | 340:28d1f895c6fe | 661 | |
mbed_official | 340:28d1f895c6fe | 662 | /* Enable the Peripheral */ |
mbed_official | 340:28d1f895c6fe | 663 | __HAL_CEC_ENABLE(hcec); |
mbed_official | 340:28d1f895c6fe | 664 | |
mbed_official | 340:28d1f895c6fe | 665 | __HAL_CEC_CLEAR_FLAG(hcec,CEC_ISR_TXBR|CEC_ISR_TXEND); |
mbed_official | 340:28d1f895c6fe | 666 | |
mbed_official | 340:28d1f895c6fe | 667 | hcec->State = HAL_CEC_STATE_READY; |
mbed_official | 340:28d1f895c6fe | 668 | /* Call the Process Unlocked before calling the Tx call back API to give the possibility to |
mbed_official | 340:28d1f895c6fe | 669 | start again the Transmission under the Tx call back API */ |
mbed_official | 340:28d1f895c6fe | 670 | __HAL_UNLOCK(hcec); |
mbed_official | 340:28d1f895c6fe | 671 | |
mbed_official | 340:28d1f895c6fe | 672 | HAL_CEC_TxCpltCallback(hcec); |
mbed_official | 340:28d1f895c6fe | 673 | |
mbed_official | 340:28d1f895c6fe | 674 | return HAL_OK; |
mbed_official | 340:28d1f895c6fe | 675 | } |
mbed_official | 340:28d1f895c6fe | 676 | else |
mbed_official | 340:28d1f895c6fe | 677 | { |
mbed_official | 340:28d1f895c6fe | 678 | if (hcec->TxXferCount == 1) |
mbed_official | 340:28d1f895c6fe | 679 | { |
mbed_official | 340:28d1f895c6fe | 680 | /* if this is the last byte transmission, set TX End of Message (TXEOM) bit */ |
mbed_official | 340:28d1f895c6fe | 681 | __HAL_CEC_LAST_BYTE_TX_SET(hcec); |
mbed_official | 340:28d1f895c6fe | 682 | } |
mbed_official | 340:28d1f895c6fe | 683 | /* clear Tx-Byte request flag */ |
mbed_official | 340:28d1f895c6fe | 684 | __HAL_CEC_CLEAR_FLAG(hcec,CEC_ISR_TXBR); |
mbed_official | 340:28d1f895c6fe | 685 | hcec->Instance->TXDR = *hcec->pTxBuffPtr++; |
mbed_official | 340:28d1f895c6fe | 686 | hcec->TxXferCount--; |
mbed_official | 340:28d1f895c6fe | 687 | |
mbed_official | 340:28d1f895c6fe | 688 | /* Process Unlocked */ |
mbed_official | 340:28d1f895c6fe | 689 | __HAL_UNLOCK(hcec); |
mbed_official | 340:28d1f895c6fe | 690 | |
mbed_official | 340:28d1f895c6fe | 691 | return HAL_OK; |
mbed_official | 340:28d1f895c6fe | 692 | } |
mbed_official | 340:28d1f895c6fe | 693 | } |
mbed_official | 340:28d1f895c6fe | 694 | else |
mbed_official | 340:28d1f895c6fe | 695 | { |
mbed_official | 340:28d1f895c6fe | 696 | return HAL_BUSY; |
mbed_official | 340:28d1f895c6fe | 697 | } |
mbed_official | 340:28d1f895c6fe | 698 | } |
mbed_official | 340:28d1f895c6fe | 699 | |
mbed_official | 340:28d1f895c6fe | 700 | |
mbed_official | 340:28d1f895c6fe | 701 | /** |
mbed_official | 340:28d1f895c6fe | 702 | * @brief Receive data in interrupt mode. |
mbed_official | 340:28d1f895c6fe | 703 | * @param hcec: CEC handle |
mbed_official | 340:28d1f895c6fe | 704 | * @param pData: pointer to received data buffer. |
mbed_official | 340:28d1f895c6fe | 705 | * Note that the received data size is not known beforehand, the latter is known |
mbed_official | 340:28d1f895c6fe | 706 | * when the reception is complete and is stored in hcec->RxXferSize. |
mbed_official | 340:28d1f895c6fe | 707 | * hcec->RxXferSize is the sum of opcodes + operands (0 to 14 operands max). |
mbed_official | 340:28d1f895c6fe | 708 | * If only a header is received, hcec->RxXferSize = 0 |
mbed_official | 340:28d1f895c6fe | 709 | * @retval HAL status |
mbed_official | 340:28d1f895c6fe | 710 | */ |
mbed_official | 340:28d1f895c6fe | 711 | HAL_StatusTypeDef HAL_CEC_Receive_IT(CEC_HandleTypeDef *hcec, uint8_t *pData) |
mbed_official | 340:28d1f895c6fe | 712 | { |
mbed_official | 340:28d1f895c6fe | 713 | if(hcec->State == HAL_CEC_STATE_READY) |
mbed_official | 340:28d1f895c6fe | 714 | { |
mbed_official | 340:28d1f895c6fe | 715 | if(pData == HAL_NULL ) |
mbed_official | 340:28d1f895c6fe | 716 | { |
mbed_official | 340:28d1f895c6fe | 717 | hcec->State = HAL_CEC_STATE_ERROR; |
mbed_official | 340:28d1f895c6fe | 718 | return HAL_ERROR; |
mbed_official | 340:28d1f895c6fe | 719 | } |
mbed_official | 340:28d1f895c6fe | 720 | |
mbed_official | 340:28d1f895c6fe | 721 | /* Process Locked */ |
mbed_official | 340:28d1f895c6fe | 722 | __HAL_LOCK(hcec); |
mbed_official | 340:28d1f895c6fe | 723 | hcec->RxXferSize = 0; |
mbed_official | 340:28d1f895c6fe | 724 | hcec->pRxBuffPtr = pData; |
mbed_official | 340:28d1f895c6fe | 725 | hcec->ErrorCode = HAL_CEC_ERROR_NONE; |
mbed_official | 340:28d1f895c6fe | 726 | /* the IP is moving to a ready to receive state */ |
mbed_official | 340:28d1f895c6fe | 727 | hcec->State = HAL_CEC_STATE_STANDBY_RX; |
mbed_official | 340:28d1f895c6fe | 728 | |
mbed_official | 340:28d1f895c6fe | 729 | /* Disable Peripheral to write CEC_IER register */ |
mbed_official | 340:28d1f895c6fe | 730 | __HAL_CEC_DISABLE(hcec); |
mbed_official | 340:28d1f895c6fe | 731 | |
mbed_official | 340:28d1f895c6fe | 732 | /* Enable the following CEC Reception Error Interrupts: |
mbed_official | 340:28d1f895c6fe | 733 | * Rx overrun |
mbed_official | 340:28d1f895c6fe | 734 | * Rx bit rising error |
mbed_official | 340:28d1f895c6fe | 735 | * Rx short bit period error |
mbed_official | 340:28d1f895c6fe | 736 | * Rx long bit period error |
mbed_official | 340:28d1f895c6fe | 737 | * Rx missing acknowledge */ |
mbed_official | 340:28d1f895c6fe | 738 | __HAL_CEC_ENABLE_IT(hcec, CEC_IER_RX_ALL_ERR); |
mbed_official | 340:28d1f895c6fe | 739 | |
mbed_official | 340:28d1f895c6fe | 740 | /* Process Unlocked */ |
mbed_official | 340:28d1f895c6fe | 741 | __HAL_UNLOCK(hcec); |
mbed_official | 340:28d1f895c6fe | 742 | |
mbed_official | 340:28d1f895c6fe | 743 | /* Enable the following two CEC Reception interrupts: |
mbed_official | 340:28d1f895c6fe | 744 | * Rx Byte Received IT |
mbed_official | 340:28d1f895c6fe | 745 | * End of Reception IT */ |
mbed_official | 340:28d1f895c6fe | 746 | __HAL_CEC_ENABLE_IT(hcec, CEC_IER_RXBRIE|CEC_IER_RXENDIE); |
mbed_official | 340:28d1f895c6fe | 747 | |
mbed_official | 340:28d1f895c6fe | 748 | __HAL_CEC_ENABLE(hcec); |
mbed_official | 340:28d1f895c6fe | 749 | |
mbed_official | 340:28d1f895c6fe | 750 | return HAL_OK; |
mbed_official | 340:28d1f895c6fe | 751 | } |
mbed_official | 340:28d1f895c6fe | 752 | else |
mbed_official | 340:28d1f895c6fe | 753 | { |
mbed_official | 340:28d1f895c6fe | 754 | return HAL_BUSY; |
mbed_official | 340:28d1f895c6fe | 755 | } |
mbed_official | 340:28d1f895c6fe | 756 | } |
mbed_official | 340:28d1f895c6fe | 757 | |
mbed_official | 340:28d1f895c6fe | 758 | |
mbed_official | 340:28d1f895c6fe | 759 | |
mbed_official | 340:28d1f895c6fe | 760 | /** |
mbed_official | 340:28d1f895c6fe | 761 | * @brief This function handles CEC interrupt requests. |
mbed_official | 340:28d1f895c6fe | 762 | * @param hcec: CEC handle |
mbed_official | 340:28d1f895c6fe | 763 | * @retval None |
mbed_official | 340:28d1f895c6fe | 764 | */ |
mbed_official | 340:28d1f895c6fe | 765 | void HAL_CEC_IRQHandler(CEC_HandleTypeDef *hcec) |
mbed_official | 340:28d1f895c6fe | 766 | { |
mbed_official | 340:28d1f895c6fe | 767 | /* save interrupts register for further error or interrupts handling purposes */ |
mbed_official | 340:28d1f895c6fe | 768 | hcec->ErrorCode = hcec->Instance->ISR; |
mbed_official | 340:28d1f895c6fe | 769 | /* CEC TX missing acknowledge error interrupt occurred -------------------------------------*/ |
mbed_official | 340:28d1f895c6fe | 770 | if((__HAL_CEC_GET_IT(hcec, CEC_ISR_TXACKE) != RESET) && (__HAL_CEC_GET_IT_SOURCE(hcec, CEC_IER_TXACKEIE) != RESET)) |
mbed_official | 340:28d1f895c6fe | 771 | { |
mbed_official | 340:28d1f895c6fe | 772 | __HAL_CEC_CLEAR_FLAG(hcec, CEC_ISR_TXACKE); |
mbed_official | 340:28d1f895c6fe | 773 | hcec->State = HAL_CEC_STATE_ERROR; |
mbed_official | 340:28d1f895c6fe | 774 | } |
mbed_official | 340:28d1f895c6fe | 775 | |
mbed_official | 340:28d1f895c6fe | 776 | /* CEC transmit error interrupt occured --------------------------------------*/ |
mbed_official | 340:28d1f895c6fe | 777 | if((__HAL_CEC_GET_IT(hcec, CEC_ISR_TXERR) != RESET) && (__HAL_CEC_GET_IT_SOURCE(hcec, CEC_IER_TXERRIE) != RESET)) |
mbed_official | 340:28d1f895c6fe | 778 | { |
mbed_official | 340:28d1f895c6fe | 779 | __HAL_CEC_CLEAR_FLAG(hcec, CEC_ISR_TXERR); |
mbed_official | 340:28d1f895c6fe | 780 | hcec->State = HAL_CEC_STATE_ERROR; |
mbed_official | 340:28d1f895c6fe | 781 | } |
mbed_official | 340:28d1f895c6fe | 782 | |
mbed_official | 340:28d1f895c6fe | 783 | /* CEC TX underrun error interrupt occured --------------------------------------*/ |
mbed_official | 340:28d1f895c6fe | 784 | if((__HAL_CEC_GET_IT(hcec, CEC_ISR_TXUDR) != RESET) && (__HAL_CEC_GET_IT_SOURCE(hcec, CEC_IER_TXUDRIE) != RESET)) |
mbed_official | 340:28d1f895c6fe | 785 | { |
mbed_official | 340:28d1f895c6fe | 786 | __HAL_CEC_CLEAR_FLAG(hcec, CEC_ISR_TXUDR); |
mbed_official | 340:28d1f895c6fe | 787 | hcec->State = HAL_CEC_STATE_ERROR; |
mbed_official | 340:28d1f895c6fe | 788 | } |
mbed_official | 340:28d1f895c6fe | 789 | |
mbed_official | 340:28d1f895c6fe | 790 | /* CEC TX arbitration error interrupt occured --------------------------------------*/ |
mbed_official | 340:28d1f895c6fe | 791 | if((__HAL_CEC_GET_IT(hcec, CEC_ISR_ARBLST) != RESET) && (__HAL_CEC_GET_IT_SOURCE(hcec, CEC_IER_ARBLSTIE) != RESET)) |
mbed_official | 340:28d1f895c6fe | 792 | { |
mbed_official | 340:28d1f895c6fe | 793 | __HAL_CEC_CLEAR_FLAG(hcec, CEC_ISR_ARBLST); |
mbed_official | 340:28d1f895c6fe | 794 | hcec->State = HAL_CEC_STATE_ERROR; |
mbed_official | 340:28d1f895c6fe | 795 | } |
mbed_official | 340:28d1f895c6fe | 796 | |
mbed_official | 340:28d1f895c6fe | 797 | /* CEC RX overrun error interrupt occured --------------------------------------*/ |
mbed_official | 340:28d1f895c6fe | 798 | if((__HAL_CEC_GET_IT(hcec, CEC_ISR_RXOVR) != RESET) && (__HAL_CEC_GET_IT_SOURCE(hcec, CEC_IER_RXOVRIE) != RESET)) |
mbed_official | 340:28d1f895c6fe | 799 | { |
mbed_official | 340:28d1f895c6fe | 800 | __HAL_CEC_CLEAR_FLAG(hcec, CEC_ISR_RXOVR); |
mbed_official | 340:28d1f895c6fe | 801 | hcec->State = HAL_CEC_STATE_ERROR; |
mbed_official | 340:28d1f895c6fe | 802 | } |
mbed_official | 340:28d1f895c6fe | 803 | |
mbed_official | 340:28d1f895c6fe | 804 | /* CEC RX bit rising error interrupt occured --------------------------------------*/ |
mbed_official | 340:28d1f895c6fe | 805 | if((__HAL_CEC_GET_IT(hcec, CEC_ISR_BRE) != RESET) && (__HAL_CEC_GET_IT_SOURCE(hcec, CEC_IER_BREIE) != RESET)) |
mbed_official | 340:28d1f895c6fe | 806 | { |
mbed_official | 340:28d1f895c6fe | 807 | __HAL_CEC_CLEAR_FLAG(hcec, CEC_ISR_BRE); |
mbed_official | 340:28d1f895c6fe | 808 | hcec->State = HAL_CEC_STATE_ERROR; |
mbed_official | 340:28d1f895c6fe | 809 | } |
mbed_official | 340:28d1f895c6fe | 810 | |
mbed_official | 340:28d1f895c6fe | 811 | /* CEC RX short bit period error interrupt occured --------------------------------------*/ |
mbed_official | 340:28d1f895c6fe | 812 | if((__HAL_CEC_GET_IT(hcec, CEC_ISR_SBPE) != RESET) && (__HAL_CEC_GET_IT_SOURCE(hcec, CEC_IER_SBPEIE) != RESET)) |
mbed_official | 340:28d1f895c6fe | 813 | { |
mbed_official | 340:28d1f895c6fe | 814 | __HAL_CEC_CLEAR_FLAG(hcec, CEC_ISR_SBPE); |
mbed_official | 340:28d1f895c6fe | 815 | hcec->State = HAL_CEC_STATE_ERROR; |
mbed_official | 340:28d1f895c6fe | 816 | } |
mbed_official | 340:28d1f895c6fe | 817 | |
mbed_official | 340:28d1f895c6fe | 818 | /* CEC RX long bit period error interrupt occured --------------------------------------*/ |
mbed_official | 340:28d1f895c6fe | 819 | if((__HAL_CEC_GET_IT(hcec, CEC_ISR_LBPE) != RESET) && (__HAL_CEC_GET_IT_SOURCE(hcec, CEC_IER_LBPEIE) != RESET)) |
mbed_official | 340:28d1f895c6fe | 820 | { |
mbed_official | 340:28d1f895c6fe | 821 | __HAL_CEC_CLEAR_FLAG(hcec, CEC_ISR_LBPE); |
mbed_official | 340:28d1f895c6fe | 822 | hcec->State = HAL_CEC_STATE_ERROR; |
mbed_official | 340:28d1f895c6fe | 823 | } |
mbed_official | 340:28d1f895c6fe | 824 | |
mbed_official | 340:28d1f895c6fe | 825 | /* CEC RX missing acknowledge error interrupt occured --------------------------------------*/ |
mbed_official | 340:28d1f895c6fe | 826 | if((__HAL_CEC_GET_IT(hcec, CEC_ISR_RXACKE) != RESET) && (__HAL_CEC_GET_IT_SOURCE(hcec, CEC_IER_RXACKEIE) != RESET)) |
mbed_official | 340:28d1f895c6fe | 827 | { |
mbed_official | 340:28d1f895c6fe | 828 | __HAL_CEC_CLEAR_FLAG(hcec, CEC_ISR_RXACKE); |
mbed_official | 340:28d1f895c6fe | 829 | hcec->State = HAL_CEC_STATE_ERROR; |
mbed_official | 340:28d1f895c6fe | 830 | } |
mbed_official | 340:28d1f895c6fe | 831 | |
mbed_official | 340:28d1f895c6fe | 832 | if ((hcec->ErrorCode & CEC_ISR_ALL_ERROR) != 0) |
mbed_official | 340:28d1f895c6fe | 833 | { |
mbed_official | 340:28d1f895c6fe | 834 | HAL_CEC_ErrorCallback(hcec); |
mbed_official | 340:28d1f895c6fe | 835 | } |
mbed_official | 340:28d1f895c6fe | 836 | |
mbed_official | 340:28d1f895c6fe | 837 | /* CEC RX byte received interrupt ---------------------------------------------------*/ |
mbed_official | 340:28d1f895c6fe | 838 | if((__HAL_CEC_GET_IT(hcec, CEC_ISR_RXBR) != RESET) && (__HAL_CEC_GET_IT_SOURCE(hcec, CEC_IER_RXBRIE) != RESET)) |
mbed_official | 340:28d1f895c6fe | 839 | { |
mbed_official | 340:28d1f895c6fe | 840 | /* RXBR IT is cleared during HAL_CEC_Transmit_IT processing */ |
mbed_official | 340:28d1f895c6fe | 841 | CEC_Receive_IT(hcec); |
mbed_official | 340:28d1f895c6fe | 842 | } |
mbed_official | 340:28d1f895c6fe | 843 | |
mbed_official | 340:28d1f895c6fe | 844 | /* CEC RX end received interrupt ---------------------------------------------------*/ |
mbed_official | 340:28d1f895c6fe | 845 | if((__HAL_CEC_GET_IT(hcec, CEC_ISR_RXEND) != RESET) && (__HAL_CEC_GET_IT_SOURCE(hcec, CEC_IER_RXENDIE) != RESET)) |
mbed_official | 340:28d1f895c6fe | 846 | { |
mbed_official | 340:28d1f895c6fe | 847 | /* RXBR IT is cleared during HAL_CEC_Transmit_IT processing */ |
mbed_official | 340:28d1f895c6fe | 848 | CEC_Receive_IT(hcec); |
mbed_official | 340:28d1f895c6fe | 849 | } |
mbed_official | 340:28d1f895c6fe | 850 | |
mbed_official | 340:28d1f895c6fe | 851 | |
mbed_official | 340:28d1f895c6fe | 852 | /* CEC TX byte request interrupt ------------------------------------------------*/ |
mbed_official | 340:28d1f895c6fe | 853 | if((__HAL_CEC_GET_IT(hcec, CEC_ISR_TXBR) != RESET) &&(__HAL_CEC_GET_IT_SOURCE(hcec, CEC_IER_TXBRIE) != RESET)) |
mbed_official | 340:28d1f895c6fe | 854 | { |
mbed_official | 340:28d1f895c6fe | 855 | /* TXBR IT is cleared during HAL_CEC_Transmit_IT processing */ |
mbed_official | 340:28d1f895c6fe | 856 | CEC_Transmit_IT(hcec); |
mbed_official | 340:28d1f895c6fe | 857 | } |
mbed_official | 340:28d1f895c6fe | 858 | |
mbed_official | 340:28d1f895c6fe | 859 | /* CEC TX end interrupt ------------------------------------------------*/ |
mbed_official | 340:28d1f895c6fe | 860 | if((__HAL_CEC_GET_IT(hcec, CEC_ISR_TXEND) != RESET) &&(__HAL_CEC_GET_IT_SOURCE(hcec, CEC_IER_TXENDIE) != RESET)) |
mbed_official | 340:28d1f895c6fe | 861 | { |
mbed_official | 340:28d1f895c6fe | 862 | /* TXEND IT is cleared during HAL_CEC_Transmit_IT processing */ |
mbed_official | 340:28d1f895c6fe | 863 | CEC_Transmit_IT(hcec); |
mbed_official | 340:28d1f895c6fe | 864 | } |
mbed_official | 340:28d1f895c6fe | 865 | |
mbed_official | 340:28d1f895c6fe | 866 | } |
mbed_official | 340:28d1f895c6fe | 867 | |
mbed_official | 340:28d1f895c6fe | 868 | |
mbed_official | 340:28d1f895c6fe | 869 | /** |
mbed_official | 340:28d1f895c6fe | 870 | * @brief Tx Transfer completed callback |
mbed_official | 340:28d1f895c6fe | 871 | * @param hcec: CEC handle |
mbed_official | 340:28d1f895c6fe | 872 | * @retval None |
mbed_official | 340:28d1f895c6fe | 873 | */ |
mbed_official | 340:28d1f895c6fe | 874 | __weak void HAL_CEC_TxCpltCallback(CEC_HandleTypeDef *hcec) |
mbed_official | 340:28d1f895c6fe | 875 | { |
mbed_official | 340:28d1f895c6fe | 876 | /* NOTE : This function should not be modified, when the callback is needed, |
mbed_official | 340:28d1f895c6fe | 877 | the HAL_CEC_TxCpltCallback can be implemented in the user file |
mbed_official | 340:28d1f895c6fe | 878 | */ |
mbed_official | 340:28d1f895c6fe | 879 | } |
mbed_official | 340:28d1f895c6fe | 880 | |
mbed_official | 340:28d1f895c6fe | 881 | /** |
mbed_official | 340:28d1f895c6fe | 882 | * @brief Rx Transfer completed callback |
mbed_official | 340:28d1f895c6fe | 883 | * @param hcec: CEC handle |
mbed_official | 340:28d1f895c6fe | 884 | * @retval None |
mbed_official | 340:28d1f895c6fe | 885 | */ |
mbed_official | 340:28d1f895c6fe | 886 | __weak void HAL_CEC_RxCpltCallback(CEC_HandleTypeDef *hcec) |
mbed_official | 340:28d1f895c6fe | 887 | { |
mbed_official | 340:28d1f895c6fe | 888 | /* NOTE : This function should not be modified, when the callback is needed, |
mbed_official | 340:28d1f895c6fe | 889 | the HAL_CEC_TxCpltCallback can be implemented in the user file |
mbed_official | 340:28d1f895c6fe | 890 | */ |
mbed_official | 340:28d1f895c6fe | 891 | } |
mbed_official | 340:28d1f895c6fe | 892 | |
mbed_official | 340:28d1f895c6fe | 893 | /** |
mbed_official | 340:28d1f895c6fe | 894 | * @brief CEC error callbacks |
mbed_official | 340:28d1f895c6fe | 895 | * @param hcec: CEC handle |
mbed_official | 340:28d1f895c6fe | 896 | * @retval None |
mbed_official | 340:28d1f895c6fe | 897 | */ |
mbed_official | 340:28d1f895c6fe | 898 | __weak void HAL_CEC_ErrorCallback(CEC_HandleTypeDef *hcec) |
mbed_official | 340:28d1f895c6fe | 899 | { |
mbed_official | 340:28d1f895c6fe | 900 | /* NOTE : This function should not be modified, when the callback is needed, |
mbed_official | 340:28d1f895c6fe | 901 | the HAL_CEC_ErrorCallback can be implemented in the user file |
mbed_official | 340:28d1f895c6fe | 902 | */ |
mbed_official | 340:28d1f895c6fe | 903 | } |
mbed_official | 340:28d1f895c6fe | 904 | |
mbed_official | 340:28d1f895c6fe | 905 | /** |
mbed_official | 340:28d1f895c6fe | 906 | * @} |
mbed_official | 340:28d1f895c6fe | 907 | */ |
mbed_official | 340:28d1f895c6fe | 908 | |
mbed_official | 340:28d1f895c6fe | 909 | /** @defgroup CEC_Exported_Functions_Group3 Peripheral Control function |
mbed_official | 340:28d1f895c6fe | 910 | * @brief CEC control functions |
mbed_official | 340:28d1f895c6fe | 911 | * |
mbed_official | 340:28d1f895c6fe | 912 | @verbatim |
mbed_official | 340:28d1f895c6fe | 913 | =============================================================================== |
mbed_official | 340:28d1f895c6fe | 914 | ##### Peripheral Control function ##### |
mbed_official | 340:28d1f895c6fe | 915 | =============================================================================== |
mbed_official | 340:28d1f895c6fe | 916 | [..] |
mbed_official | 340:28d1f895c6fe | 917 | This subsection provides a set of functions allowing to control the CEC. |
mbed_official | 340:28d1f895c6fe | 918 | (+) HAL_CEC_GetState() API can be helpful to check in run-time the state of the CEC peripheral. |
mbed_official | 340:28d1f895c6fe | 919 | @endverbatim |
mbed_official | 340:28d1f895c6fe | 920 | * @{ |
mbed_official | 340:28d1f895c6fe | 921 | */ |
mbed_official | 340:28d1f895c6fe | 922 | |
mbed_official | 340:28d1f895c6fe | 923 | /** |
mbed_official | 340:28d1f895c6fe | 924 | * @brief return the CEC state |
mbed_official | 340:28d1f895c6fe | 925 | * @param hcec: CEC handle |
mbed_official | 340:28d1f895c6fe | 926 | * @retval HAL state |
mbed_official | 340:28d1f895c6fe | 927 | */ |
mbed_official | 340:28d1f895c6fe | 928 | HAL_CEC_StateTypeDef HAL_CEC_GetState(CEC_HandleTypeDef *hcec) |
mbed_official | 340:28d1f895c6fe | 929 | { |
mbed_official | 340:28d1f895c6fe | 930 | return hcec->State; |
mbed_official | 340:28d1f895c6fe | 931 | } |
mbed_official | 340:28d1f895c6fe | 932 | |
mbed_official | 340:28d1f895c6fe | 933 | /** |
mbed_official | 340:28d1f895c6fe | 934 | * @brief Return the CEC error code |
mbed_official | 340:28d1f895c6fe | 935 | * @param hcec : pointer to a CEC_HandleTypeDef structure that contains |
mbed_official | 340:28d1f895c6fe | 936 | * the configuration information for the specified CEC. |
mbed_official | 340:28d1f895c6fe | 937 | * @retval CEC Error Code |
mbed_official | 340:28d1f895c6fe | 938 | */ |
mbed_official | 340:28d1f895c6fe | 939 | uint32_t HAL_CEC_GetError(CEC_HandleTypeDef *hcec) |
mbed_official | 340:28d1f895c6fe | 940 | { |
mbed_official | 340:28d1f895c6fe | 941 | return hcec->ErrorCode; |
mbed_official | 340:28d1f895c6fe | 942 | } |
mbed_official | 340:28d1f895c6fe | 943 | |
mbed_official | 340:28d1f895c6fe | 944 | /** |
mbed_official | 340:28d1f895c6fe | 945 | * @} |
mbed_official | 340:28d1f895c6fe | 946 | */ |
mbed_official | 340:28d1f895c6fe | 947 | |
mbed_official | 340:28d1f895c6fe | 948 | /** |
mbed_official | 340:28d1f895c6fe | 949 | * @} |
mbed_official | 340:28d1f895c6fe | 950 | */ |
mbed_official | 340:28d1f895c6fe | 951 | |
mbed_official | 340:28d1f895c6fe | 952 | /** @defgroup CEC_Private_Functions CEC Private Functions |
mbed_official | 340:28d1f895c6fe | 953 | * @{ |
mbed_official | 340:28d1f895c6fe | 954 | */ |
mbed_official | 340:28d1f895c6fe | 955 | |
mbed_official | 340:28d1f895c6fe | 956 | /** |
mbed_official | 340:28d1f895c6fe | 957 | * @brief Send data in interrupt mode |
mbed_official | 340:28d1f895c6fe | 958 | * @param hcec: CEC handle. |
mbed_official | 340:28d1f895c6fe | 959 | * Function called under interruption only, once |
mbed_official | 340:28d1f895c6fe | 960 | * interruptions have been enabled by HAL_CEC_Transmit_IT() |
mbed_official | 340:28d1f895c6fe | 961 | * @retval HAL status |
mbed_official | 340:28d1f895c6fe | 962 | */ |
mbed_official | 340:28d1f895c6fe | 963 | static HAL_StatusTypeDef CEC_Transmit_IT(CEC_HandleTypeDef *hcec) |
mbed_official | 340:28d1f895c6fe | 964 | { |
mbed_official | 340:28d1f895c6fe | 965 | /* if the IP is already busy or if there is a previous transmission |
mbed_official | 340:28d1f895c6fe | 966 | already pending due to arbitration loss */ |
mbed_official | 340:28d1f895c6fe | 967 | if ((hcec->State == HAL_CEC_STATE_BUSY_TX) |
mbed_official | 340:28d1f895c6fe | 968 | || (__HAL_CEC_GET_TRANSMISSION_START_FLAG(hcec) != RESET)) |
mbed_official | 340:28d1f895c6fe | 969 | { |
mbed_official | 340:28d1f895c6fe | 970 | |
mbed_official | 340:28d1f895c6fe | 971 | /* set state to BUSY TX, in case it wasn't set already (case |
mbed_official | 340:28d1f895c6fe | 972 | * of transmission new attempt after arbitration loss) */ |
mbed_official | 340:28d1f895c6fe | 973 | if (hcec->State != HAL_CEC_STATE_BUSY_TX) |
mbed_official | 340:28d1f895c6fe | 974 | { |
mbed_official | 340:28d1f895c6fe | 975 | hcec->State = HAL_CEC_STATE_BUSY_TX; |
mbed_official | 340:28d1f895c6fe | 976 | } |
mbed_official | 340:28d1f895c6fe | 977 | |
mbed_official | 340:28d1f895c6fe | 978 | /* if all data have been sent */ |
mbed_official | 340:28d1f895c6fe | 979 | if(hcec->TxXferCount == 0) |
mbed_official | 340:28d1f895c6fe | 980 | { |
mbed_official | 340:28d1f895c6fe | 981 | /* Disable Peripheral to write CEC_IER register */ |
mbed_official | 340:28d1f895c6fe | 982 | __HAL_CEC_DISABLE(hcec); |
mbed_official | 340:28d1f895c6fe | 983 | |
mbed_official | 340:28d1f895c6fe | 984 | /* Disable the CEC Transmission Interrupts */ |
mbed_official | 340:28d1f895c6fe | 985 | __HAL_CEC_DISABLE_IT(hcec, CEC_IER_TXBRIE|CEC_IER_TXENDIE); |
mbed_official | 340:28d1f895c6fe | 986 | /* Disable the CEC Transmission Error Interrupts */ |
mbed_official | 340:28d1f895c6fe | 987 | __HAL_CEC_DISABLE_IT(hcec, CEC_IER_TX_ALL_ERR); |
mbed_official | 340:28d1f895c6fe | 988 | |
mbed_official | 340:28d1f895c6fe | 989 | /* Enable the Peripheral */ |
mbed_official | 340:28d1f895c6fe | 990 | __HAL_CEC_ENABLE(hcec); |
mbed_official | 340:28d1f895c6fe | 991 | |
mbed_official | 340:28d1f895c6fe | 992 | __HAL_CEC_CLEAR_FLAG(hcec,CEC_ISR_TXBR|CEC_ISR_TXEND); |
mbed_official | 340:28d1f895c6fe | 993 | |
mbed_official | 340:28d1f895c6fe | 994 | hcec->State = HAL_CEC_STATE_READY; |
mbed_official | 340:28d1f895c6fe | 995 | |
mbed_official | 340:28d1f895c6fe | 996 | HAL_CEC_TxCpltCallback(hcec); |
mbed_official | 340:28d1f895c6fe | 997 | |
mbed_official | 340:28d1f895c6fe | 998 | return HAL_OK; |
mbed_official | 340:28d1f895c6fe | 999 | } |
mbed_official | 340:28d1f895c6fe | 1000 | else |
mbed_official | 340:28d1f895c6fe | 1001 | { |
mbed_official | 340:28d1f895c6fe | 1002 | if (hcec->TxXferCount == 1) |
mbed_official | 340:28d1f895c6fe | 1003 | { |
mbed_official | 340:28d1f895c6fe | 1004 | /* if this is the last byte transmission, set TX End of Message (TXEOM) bit */ |
mbed_official | 340:28d1f895c6fe | 1005 | __HAL_CEC_LAST_BYTE_TX_SET(hcec); |
mbed_official | 340:28d1f895c6fe | 1006 | } |
mbed_official | 340:28d1f895c6fe | 1007 | /* clear Tx-Byte request flag */ |
mbed_official | 340:28d1f895c6fe | 1008 | __HAL_CEC_CLEAR_FLAG(hcec,CEC_ISR_TXBR); |
mbed_official | 340:28d1f895c6fe | 1009 | hcec->Instance->TXDR = *hcec->pTxBuffPtr++; |
mbed_official | 340:28d1f895c6fe | 1010 | hcec->TxXferCount--; |
mbed_official | 340:28d1f895c6fe | 1011 | |
mbed_official | 340:28d1f895c6fe | 1012 | return HAL_OK; |
mbed_official | 340:28d1f895c6fe | 1013 | } |
mbed_official | 340:28d1f895c6fe | 1014 | } |
mbed_official | 340:28d1f895c6fe | 1015 | else |
mbed_official | 340:28d1f895c6fe | 1016 | { |
mbed_official | 340:28d1f895c6fe | 1017 | return HAL_BUSY; |
mbed_official | 340:28d1f895c6fe | 1018 | } |
mbed_official | 340:28d1f895c6fe | 1019 | } |
mbed_official | 340:28d1f895c6fe | 1020 | |
mbed_official | 340:28d1f895c6fe | 1021 | |
mbed_official | 340:28d1f895c6fe | 1022 | /** |
mbed_official | 340:28d1f895c6fe | 1023 | * @brief Receive data in interrupt mode. |
mbed_official | 340:28d1f895c6fe | 1024 | * @param hcec: CEC handle. |
mbed_official | 340:28d1f895c6fe | 1025 | * Function called under interruption only, once |
mbed_official | 340:28d1f895c6fe | 1026 | * interruptions have been enabled by HAL_CEC_Receive_IT() |
mbed_official | 340:28d1f895c6fe | 1027 | * @retval HAL status |
mbed_official | 340:28d1f895c6fe | 1028 | */ |
mbed_official | 340:28d1f895c6fe | 1029 | static HAL_StatusTypeDef CEC_Receive_IT(CEC_HandleTypeDef *hcec) |
mbed_official | 340:28d1f895c6fe | 1030 | { |
mbed_official | 340:28d1f895c6fe | 1031 | uint32_t tempisr; |
mbed_official | 340:28d1f895c6fe | 1032 | |
mbed_official | 340:28d1f895c6fe | 1033 | /* Three different conditions are tested to carry out the RX IT processing: |
mbed_official | 340:28d1f895c6fe | 1034 | * - the IP is in reception stand-by (the IP state is HAL_CEC_STATE_STANDBY_RX) and |
mbed_official | 340:28d1f895c6fe | 1035 | * the reception of the first byte is starting |
mbed_official | 340:28d1f895c6fe | 1036 | * - a message reception is already on-going (the IP state is HAL_CEC_STATE_BUSY_RX) |
mbed_official | 340:28d1f895c6fe | 1037 | * and a new byte is being received |
mbed_official | 340:28d1f895c6fe | 1038 | * - a transmission has just been started (the IP state is HAL_CEC_STATE_BUSY_TX) |
mbed_official | 340:28d1f895c6fe | 1039 | * but has been interrupted by a new message reception or discarded due to |
mbed_official | 340:28d1f895c6fe | 1040 | * arbitration loss: the reception of the first or higher priority message |
mbed_official | 340:28d1f895c6fe | 1041 | * (the arbitration winner) is starting */ |
mbed_official | 340:28d1f895c6fe | 1042 | if ((hcec->State == HAL_CEC_STATE_STANDBY_RX) |
mbed_official | 340:28d1f895c6fe | 1043 | || (hcec->State == HAL_CEC_STATE_BUSY_RX) |
mbed_official | 340:28d1f895c6fe | 1044 | || (hcec->State == HAL_CEC_STATE_BUSY_TX)) |
mbed_official | 340:28d1f895c6fe | 1045 | { |
mbed_official | 340:28d1f895c6fe | 1046 | /* reception is starting */ |
mbed_official | 340:28d1f895c6fe | 1047 | hcec->State = HAL_CEC_STATE_BUSY_RX; |
mbed_official | 340:28d1f895c6fe | 1048 | tempisr = (uint32_t) (hcec->Instance->ISR); |
mbed_official | 340:28d1f895c6fe | 1049 | if ((tempisr & CEC_ISR_RXBR) != 0) |
mbed_official | 340:28d1f895c6fe | 1050 | { |
mbed_official | 340:28d1f895c6fe | 1051 | /* read received byte */ |
mbed_official | 340:28d1f895c6fe | 1052 | *hcec->pRxBuffPtr++ = hcec->Instance->RXDR; |
mbed_official | 340:28d1f895c6fe | 1053 | /* if last byte has been received */ |
mbed_official | 340:28d1f895c6fe | 1054 | if ((tempisr & CEC_ISR_RXEND) != 0) |
mbed_official | 340:28d1f895c6fe | 1055 | { |
mbed_official | 340:28d1f895c6fe | 1056 | /* clear IT */ |
mbed_official | 340:28d1f895c6fe | 1057 | __HAL_CEC_CLEAR_FLAG(hcec,CEC_ISR_RXBR|CEC_ISR_RXEND); |
mbed_official | 340:28d1f895c6fe | 1058 | /* RX interrupts are not disabled at this point. |
mbed_official | 340:28d1f895c6fe | 1059 | * Indeed, to disable the IT, the IP must be disabled first |
mbed_official | 340:28d1f895c6fe | 1060 | * which resets the TXSOM flag. In case of arbitration loss, |
mbed_official | 340:28d1f895c6fe | 1061 | * this leads to a transmission abort. |
mbed_official | 340:28d1f895c6fe | 1062 | * Therefore, RX interruptions disabling if so required, |
mbed_official | 340:28d1f895c6fe | 1063 | * is done in HAL_CEC_RxCpltCallback */ |
mbed_official | 340:28d1f895c6fe | 1064 | |
mbed_official | 340:28d1f895c6fe | 1065 | /* IP state is moved to READY. |
mbed_official | 340:28d1f895c6fe | 1066 | * If the IP must remain in standby mode to listen |
mbed_official | 340:28d1f895c6fe | 1067 | * any new message, it is up to HAL_CEC_RxCpltCallback |
mbed_official | 340:28d1f895c6fe | 1068 | * to move it again to HAL_CEC_STATE_STANDBY_RX */ |
mbed_official | 340:28d1f895c6fe | 1069 | hcec->State = HAL_CEC_STATE_READY; |
mbed_official | 340:28d1f895c6fe | 1070 | |
mbed_official | 340:28d1f895c6fe | 1071 | HAL_CEC_RxCpltCallback(hcec); |
mbed_official | 340:28d1f895c6fe | 1072 | |
mbed_official | 340:28d1f895c6fe | 1073 | return HAL_OK; |
mbed_official | 340:28d1f895c6fe | 1074 | } |
mbed_official | 340:28d1f895c6fe | 1075 | __HAL_CEC_CLEAR_FLAG(hcec, CEC_ISR_RXBR); |
mbed_official | 340:28d1f895c6fe | 1076 | |
mbed_official | 340:28d1f895c6fe | 1077 | hcec->RxXferSize++; |
mbed_official | 340:28d1f895c6fe | 1078 | |
mbed_official | 340:28d1f895c6fe | 1079 | return HAL_OK; |
mbed_official | 340:28d1f895c6fe | 1080 | } |
mbed_official | 340:28d1f895c6fe | 1081 | else |
mbed_official | 340:28d1f895c6fe | 1082 | { |
mbed_official | 340:28d1f895c6fe | 1083 | return HAL_BUSY; |
mbed_official | 340:28d1f895c6fe | 1084 | } |
mbed_official | 340:28d1f895c6fe | 1085 | } |
mbed_official | 340:28d1f895c6fe | 1086 | else |
mbed_official | 340:28d1f895c6fe | 1087 | { |
mbed_official | 340:28d1f895c6fe | 1088 | return HAL_BUSY; |
mbed_official | 340:28d1f895c6fe | 1089 | } |
mbed_official | 340:28d1f895c6fe | 1090 | } |
mbed_official | 340:28d1f895c6fe | 1091 | |
mbed_official | 340:28d1f895c6fe | 1092 | /** |
mbed_official | 340:28d1f895c6fe | 1093 | * @} |
mbed_official | 340:28d1f895c6fe | 1094 | */ |
mbed_official | 340:28d1f895c6fe | 1095 | |
mbed_official | 340:28d1f895c6fe | 1096 | #endif /* defined(STM32F042x6) || defined(STM32F048xx) || defined(STM32F051x8) || defined(STM32F058xx) || */ |
mbed_official | 340:28d1f895c6fe | 1097 | /* defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx) || */ |
mbed_official | 340:28d1f895c6fe | 1098 | /* defined(STM32F091xC) || defined (STM32F098xx) */ |
mbed_official | 340:28d1f895c6fe | 1099 | |
mbed_official | 340:28d1f895c6fe | 1100 | #endif /* HAL_CEC_MODULE_ENABLED */ |
mbed_official | 340:28d1f895c6fe | 1101 | /** |
mbed_official | 340:28d1f895c6fe | 1102 | * @} |
mbed_official | 340:28d1f895c6fe | 1103 | */ |
mbed_official | 340:28d1f895c6fe | 1104 | |
mbed_official | 340:28d1f895c6fe | 1105 | /** |
mbed_official | 340:28d1f895c6fe | 1106 | * @} |
mbed_official | 340:28d1f895c6fe | 1107 | */ |
mbed_official | 340:28d1f895c6fe | 1108 | |
mbed_official | 340:28d1f895c6fe | 1109 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |