gabriel della-monica
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targets/cmsis/TARGET_STM/TARGET_STM32F0/stm32f0xx_hal_cec.c@441:d2c15dda23c1, 2015-01-06 (annotated)
- Committer:
- mbed_official
- Date:
- Tue Jan 06 16:15:36 2015 +0000
- Revision:
- 441:d2c15dda23c1
- Parent:
- 392:2b59412bb664
Synchronized with git revision 245a60b29caabb42eabdd19658eeac7c3f68313b
Full URL: https://github.com/mbedmicro/mbed/commit/245a60b29caabb42eabdd19658eeac7c3f68313b/
NUCLEO_F072RB/F091RC - adding target to rtos lib and exporter for coide and gcc_arm
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| mbed_official | 340:28d1f895c6fe | 1 | /** |
| mbed_official | 340:28d1f895c6fe | 2 | ****************************************************************************** |
| mbed_official | 340:28d1f895c6fe | 3 | * @file stm32f0xx_hal_cec.c |
| mbed_official | 340:28d1f895c6fe | 4 | * @author MCD Application Team |
| mbed_official | 441:d2c15dda23c1 | 5 | * @version V1.2.0 |
| mbed_official | 441:d2c15dda23c1 | 6 | * @date 11-December-2014 |
| mbed_official | 340:28d1f895c6fe | 7 | * @brief CEC HAL module driver. |
| mbed_official | 340:28d1f895c6fe | 8 | * This file provides firmware functions to manage the following |
| mbed_official | 340:28d1f895c6fe | 9 | * functionalities of the High Definition Multimedia Interface |
| mbed_official | 340:28d1f895c6fe | 10 | * Consumer Electronics Control Peripheral (CEC). |
| mbed_official | 340:28d1f895c6fe | 11 | * + Initialization and de-initialization function |
| mbed_official | 340:28d1f895c6fe | 12 | * + IO operation function |
| mbed_official | 340:28d1f895c6fe | 13 | * + Peripheral Control function |
| mbed_official | 340:28d1f895c6fe | 14 | * |
| mbed_official | 340:28d1f895c6fe | 15 | @verbatim |
| mbed_official | 340:28d1f895c6fe | 16 | =============================================================================== |
| mbed_official | 340:28d1f895c6fe | 17 | ##### How to use this driver ##### |
| mbed_official | 340:28d1f895c6fe | 18 | =============================================================================== |
| mbed_official | 340:28d1f895c6fe | 19 | [..] |
| mbed_official | 340:28d1f895c6fe | 20 | The CEC HAL driver can be used as follows: |
| mbed_official | 340:28d1f895c6fe | 21 | |
| mbed_official | 340:28d1f895c6fe | 22 | (#) Declare a CEC_HandleTypeDef handle structure. |
| mbed_official | 340:28d1f895c6fe | 23 | (#) Initialize the CEC low level resources by implementing the HAL_CEC_MspInit ()API: |
| mbed_official | 340:28d1f895c6fe | 24 | (++) Enable the CEC interface clock. |
| mbed_official | 340:28d1f895c6fe | 25 | (++) CEC pins configuration: |
| mbed_official | 340:28d1f895c6fe | 26 | (+++) Enable the clock for the CEC GPIOs. |
| mbed_official | 340:28d1f895c6fe | 27 | (+++) Configure these CEC pins as alternate function pull-up. |
| mbed_official | 340:28d1f895c6fe | 28 | (++) NVIC configuration if you need to use interrupt process (HAL_CEC_Transmit_IT() |
| mbed_official | 340:28d1f895c6fe | 29 | and HAL_CEC_Receive_IT() APIs): |
| mbed_official | 340:28d1f895c6fe | 30 | (+++) Configure the CEC interrupt priority. |
| mbed_official | 340:28d1f895c6fe | 31 | (+++) Enable the NVIC CEC IRQ handle. |
| mbed_official | 340:28d1f895c6fe | 32 | |
| mbed_official | 340:28d1f895c6fe | 33 | (#) Program the Signal Free Time (SFT) and SFT option, Tolerance, reception stop in |
| mbed_official | 340:28d1f895c6fe | 34 | in case of Bit Rising Error, Error-Bit generation conditions, device logical |
| mbed_official | 340:28d1f895c6fe | 35 | address and Listen mode in the hcec Init structure. |
| mbed_official | 340:28d1f895c6fe | 36 | |
| mbed_official | 340:28d1f895c6fe | 37 | (#) Initialize the CEC registers by calling the HAL_CEC_Init() API. |
| mbed_official | 340:28d1f895c6fe | 38 | (++) This API configures also the low level Hardware GPIO, CLOCK, CORTEX...etc) |
| mbed_official | 340:28d1f895c6fe | 39 | by calling the customed HAL_CEC_MspInit() API. |
| mbed_official | 340:28d1f895c6fe | 40 | |
| mbed_official | 340:28d1f895c6fe | 41 | -@@- The specific CEC interrupts (Transmission complete interrupt, |
| mbed_official | 340:28d1f895c6fe | 42 | RXNE interrupt and Error Interrupts) will be managed using the macros |
| mbed_official | 340:28d1f895c6fe | 43 | __HAL_CEC_ENABLE_IT() and __HAL_CEC_DISABLE_IT() inside the transmit |
| mbed_official | 340:28d1f895c6fe | 44 | and receive process. |
| mbed_official | 340:28d1f895c6fe | 45 | |
| mbed_official | 340:28d1f895c6fe | 46 | @endverbatim |
| mbed_official | 340:28d1f895c6fe | 47 | ****************************************************************************** |
| mbed_official | 340:28d1f895c6fe | 48 | * @attention |
| mbed_official | 340:28d1f895c6fe | 49 | * |
| mbed_official | 340:28d1f895c6fe | 50 | * <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2> |
| mbed_official | 340:28d1f895c6fe | 51 | * |
| mbed_official | 340:28d1f895c6fe | 52 | * Redistribution and use in source and binary forms, with or without modification, |
| mbed_official | 340:28d1f895c6fe | 53 | * are permitted provided that the following conditions are met: |
| mbed_official | 340:28d1f895c6fe | 54 | * 1. Redistributions of source code must retain the above copyright notice, |
| mbed_official | 340:28d1f895c6fe | 55 | * this list of conditions and the following disclaimer. |
| mbed_official | 340:28d1f895c6fe | 56 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
| mbed_official | 340:28d1f895c6fe | 57 | * this list of conditions and the following disclaimer in the documentation |
| mbed_official | 340:28d1f895c6fe | 58 | * and/or other materials provided with the distribution. |
| mbed_official | 340:28d1f895c6fe | 59 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
| mbed_official | 340:28d1f895c6fe | 60 | * may be used to endorse or promote products derived from this software |
| mbed_official | 340:28d1f895c6fe | 61 | * without specific prior written permission. |
| mbed_official | 340:28d1f895c6fe | 62 | * |
| mbed_official | 340:28d1f895c6fe | 63 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| mbed_official | 340:28d1f895c6fe | 64 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| mbed_official | 340:28d1f895c6fe | 65 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| mbed_official | 340:28d1f895c6fe | 66 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
| mbed_official | 340:28d1f895c6fe | 67 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
| mbed_official | 340:28d1f895c6fe | 68 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
| mbed_official | 340:28d1f895c6fe | 69 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
| mbed_official | 340:28d1f895c6fe | 70 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
| mbed_official | 340:28d1f895c6fe | 71 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
| mbed_official | 340:28d1f895c6fe | 72 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| mbed_official | 340:28d1f895c6fe | 73 | * |
| mbed_official | 340:28d1f895c6fe | 74 | ****************************************************************************** |
| mbed_official | 340:28d1f895c6fe | 75 | */ |
| mbed_official | 340:28d1f895c6fe | 76 | |
| mbed_official | 340:28d1f895c6fe | 77 | /* Includes ------------------------------------------------------------------*/ |
| mbed_official | 340:28d1f895c6fe | 78 | #include "stm32f0xx_hal.h" |
| mbed_official | 340:28d1f895c6fe | 79 | |
| mbed_official | 441:d2c15dda23c1 | 80 | #ifdef HAL_CEC_MODULE_ENABLED |
| mbed_official | 441:d2c15dda23c1 | 81 | |
| mbed_official | 441:d2c15dda23c1 | 82 | #if defined(STM32F042x6) || defined(STM32F048xx) ||\ |
| mbed_official | 441:d2c15dda23c1 | 83 | defined(STM32F051x8) || defined(STM32F058xx) ||\ |
| mbed_official | 441:d2c15dda23c1 | 84 | defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx) ||\ |
| mbed_official | 441:d2c15dda23c1 | 85 | defined(STM32F091xC) || defined (STM32F098xx) |
| mbed_official | 441:d2c15dda23c1 | 86 | |
| mbed_official | 340:28d1f895c6fe | 87 | /** @addtogroup STM32F0xx_HAL_Driver |
| mbed_official | 340:28d1f895c6fe | 88 | * @{ |
| mbed_official | 340:28d1f895c6fe | 89 | */ |
| mbed_official | 340:28d1f895c6fe | 90 | |
| mbed_official | 340:28d1f895c6fe | 91 | /** @defgroup CEC CEC HAL Module Driver |
| mbed_official | 340:28d1f895c6fe | 92 | * @brief HAL CEC module driver |
| mbed_official | 340:28d1f895c6fe | 93 | * @{ |
| mbed_official | 340:28d1f895c6fe | 94 | */ |
| mbed_official | 340:28d1f895c6fe | 95 | |
| mbed_official | 340:28d1f895c6fe | 96 | /* Private typedef -----------------------------------------------------------*/ |
| mbed_official | 340:28d1f895c6fe | 97 | /* Private define ------------------------------------------------------------*/ |
| mbed_official | 340:28d1f895c6fe | 98 | /** @defgroup CEC_Private_Constants CEC Private Constants |
| mbed_official | 340:28d1f895c6fe | 99 | * @{ |
| mbed_official | 340:28d1f895c6fe | 100 | */ |
| mbed_official | 340:28d1f895c6fe | 101 | #define CEC_CFGR_FIELDS (CEC_CFGR_SFT | CEC_CFGR_RXTOL | CEC_CFGR_BRESTP \ |
| mbed_official | 340:28d1f895c6fe | 102 | | CEC_CFGR_BREGEN | CEC_CFGR_LBPEGEN | CEC_CFGR_SFTOPT \ |
| mbed_official | 340:28d1f895c6fe | 103 | | CEC_CFGR_BRDNOGEN | CEC_CFGR_OAR | CEC_CFGR_LSTN) |
| mbed_official | 340:28d1f895c6fe | 104 | /** |
| mbed_official | 340:28d1f895c6fe | 105 | * @} |
| mbed_official | 340:28d1f895c6fe | 106 | */ |
| mbed_official | 340:28d1f895c6fe | 107 | /* Private macro -------------------------------------------------------------*/ |
| mbed_official | 340:28d1f895c6fe | 108 | /* Private variables ---------------------------------------------------------*/ |
| mbed_official | 340:28d1f895c6fe | 109 | /* Private function prototypes -----------------------------------------------*/ |
| mbed_official | 340:28d1f895c6fe | 110 | /** @defgroup CEC_Private_Functions CEC Private Functions |
| mbed_official | 340:28d1f895c6fe | 111 | * @{ |
| mbed_official | 340:28d1f895c6fe | 112 | */ |
| mbed_official | 340:28d1f895c6fe | 113 | static HAL_StatusTypeDef CEC_Transmit_IT(CEC_HandleTypeDef *hcec); |
| mbed_official | 340:28d1f895c6fe | 114 | static HAL_StatusTypeDef CEC_Receive_IT(CEC_HandleTypeDef *hcec); |
| mbed_official | 340:28d1f895c6fe | 115 | /** |
| mbed_official | 340:28d1f895c6fe | 116 | * @} |
| mbed_official | 340:28d1f895c6fe | 117 | */ |
| mbed_official | 340:28d1f895c6fe | 118 | /* Exported functions ---------------------------------------------------------*/ |
| mbed_official | 340:28d1f895c6fe | 119 | |
| mbed_official | 340:28d1f895c6fe | 120 | /** @defgroup CEC_Exported_Functions CEC Exported Functions |
| mbed_official | 340:28d1f895c6fe | 121 | * @{ |
| mbed_official | 340:28d1f895c6fe | 122 | */ |
| mbed_official | 340:28d1f895c6fe | 123 | |
| mbed_official | 340:28d1f895c6fe | 124 | /** @defgroup CEC_Exported_Functions_Group1 Initialization/de-initialization function |
| mbed_official | 340:28d1f895c6fe | 125 | * @brief Initialization and Configuration functions |
| mbed_official | 340:28d1f895c6fe | 126 | * |
| mbed_official | 340:28d1f895c6fe | 127 | @verbatim |
| mbed_official | 340:28d1f895c6fe | 128 | =============================================================================== |
| mbed_official | 340:28d1f895c6fe | 129 | ##### Initialization and Configuration functions ##### |
| mbed_official | 340:28d1f895c6fe | 130 | =============================================================================== |
| mbed_official | 340:28d1f895c6fe | 131 | [..] |
| mbed_official | 340:28d1f895c6fe | 132 | This subsection provides a set of functions allowing to initialize the CEC |
| mbed_official | 340:28d1f895c6fe | 133 | (+) The following parameters need to be configured: |
| mbed_official | 340:28d1f895c6fe | 134 | (++) SignalFreeTime |
| mbed_official | 340:28d1f895c6fe | 135 | (++) Tolerance |
| mbed_official | 340:28d1f895c6fe | 136 | (++) BRERxStop (RX stopped or not upon Bit Rising Error) |
| mbed_official | 340:28d1f895c6fe | 137 | (++) BREErrorBitGen (Error-Bit generation in case of Bit Rising Error) |
| mbed_official | 340:28d1f895c6fe | 138 | (++) LBPEErrorBitGen (Error-Bit generation in case of Long Bit Period Error) |
| mbed_official | 340:28d1f895c6fe | 139 | (++) BroadcastMsgNoErrorBitGen (Error-bit generation in case of broadcast message error) |
| mbed_official | 340:28d1f895c6fe | 140 | (++) SignalFreeTimeOption (SFT Timer start definition) |
| mbed_official | 340:28d1f895c6fe | 141 | (++) OwnAddress (CEC device address) |
| mbed_official | 340:28d1f895c6fe | 142 | (++) ListenMode |
| mbed_official | 340:28d1f895c6fe | 143 | |
| mbed_official | 340:28d1f895c6fe | 144 | @endverbatim |
| mbed_official | 340:28d1f895c6fe | 145 | * @{ |
| mbed_official | 340:28d1f895c6fe | 146 | */ |
| mbed_official | 340:28d1f895c6fe | 147 | |
| mbed_official | 340:28d1f895c6fe | 148 | /** |
| mbed_official | 340:28d1f895c6fe | 149 | * @brief Initializes the CEC mode according to the specified |
| mbed_official | 340:28d1f895c6fe | 150 | * parameters in the CEC_InitTypeDef and creates the associated handle . |
| mbed_official | 340:28d1f895c6fe | 151 | * @param hcec: CEC handle |
| mbed_official | 340:28d1f895c6fe | 152 | * @retval HAL status |
| mbed_official | 340:28d1f895c6fe | 153 | */ |
| mbed_official | 340:28d1f895c6fe | 154 | HAL_StatusTypeDef HAL_CEC_Init(CEC_HandleTypeDef *hcec) |
| mbed_official | 340:28d1f895c6fe | 155 | { |
| mbed_official | 340:28d1f895c6fe | 156 | uint32_t tmpreg = 0x0; |
| mbed_official | 340:28d1f895c6fe | 157 | |
| mbed_official | 340:28d1f895c6fe | 158 | /* Check the CEC handle allocation */ |
| mbed_official | 441:d2c15dda23c1 | 159 | if(hcec == NULL) |
| mbed_official | 340:28d1f895c6fe | 160 | { |
| mbed_official | 340:28d1f895c6fe | 161 | return HAL_ERROR; |
| mbed_official | 340:28d1f895c6fe | 162 | } |
| mbed_official | 340:28d1f895c6fe | 163 | |
| mbed_official | 340:28d1f895c6fe | 164 | /* Check the parameters */ |
| mbed_official | 340:28d1f895c6fe | 165 | assert_param(IS_CEC_SIGNALFREETIME(hcec->Init.SignalFreeTime)); |
| mbed_official | 340:28d1f895c6fe | 166 | assert_param(IS_CEC_TOLERANCE(hcec->Init.Tolerance)); |
| mbed_official | 340:28d1f895c6fe | 167 | assert_param(IS_CEC_BRERXSTOP(hcec->Init.BRERxStop)); |
| mbed_official | 340:28d1f895c6fe | 168 | assert_param(IS_CEC_BREERRORBITGEN(hcec->Init.BREErrorBitGen)); |
| mbed_official | 340:28d1f895c6fe | 169 | assert_param(IS_CEC_LBPEERRORBITGEN(hcec->Init.LBPEErrorBitGen)); |
| mbed_official | 340:28d1f895c6fe | 170 | assert_param(IS_CEC_BROADCASTERROR_NO_ERRORBIT_GENERATION(hcec->Init.BroadcastMsgNoErrorBitGen)); |
| mbed_official | 340:28d1f895c6fe | 171 | assert_param(IS_CEC_SFTOP(hcec->Init.SignalFreeTimeOption)); |
| mbed_official | 340:28d1f895c6fe | 172 | assert_param(IS_CEC_OAR_ADDRESS(hcec->Init.OwnAddress)); |
| mbed_official | 340:28d1f895c6fe | 173 | assert_param(IS_CEC_LISTENING_MODE(hcec->Init.ListenMode)); |
| mbed_official | 340:28d1f895c6fe | 174 | assert_param(IS_CEC_ADDRESS(hcec->Init.InitiatorAddress)); |
| mbed_official | 340:28d1f895c6fe | 175 | |
| mbed_official | 340:28d1f895c6fe | 176 | |
| mbed_official | 340:28d1f895c6fe | 177 | if(hcec->State == HAL_CEC_STATE_RESET) |
| mbed_official | 340:28d1f895c6fe | 178 | { |
| mbed_official | 340:28d1f895c6fe | 179 | /* Init the low level hardware : GPIO, CLOCK */ |
| mbed_official | 340:28d1f895c6fe | 180 | HAL_CEC_MspInit(hcec); |
| mbed_official | 340:28d1f895c6fe | 181 | } |
| mbed_official | 340:28d1f895c6fe | 182 | |
| mbed_official | 340:28d1f895c6fe | 183 | hcec->State = HAL_CEC_STATE_BUSY; |
| mbed_official | 340:28d1f895c6fe | 184 | |
| mbed_official | 340:28d1f895c6fe | 185 | /* Disable the Peripheral */ |
| mbed_official | 340:28d1f895c6fe | 186 | __HAL_CEC_DISABLE(hcec); |
| mbed_official | 340:28d1f895c6fe | 187 | |
| mbed_official | 340:28d1f895c6fe | 188 | tmpreg = hcec->Init.SignalFreeTime; |
| mbed_official | 340:28d1f895c6fe | 189 | tmpreg |= hcec->Init.Tolerance; |
| mbed_official | 340:28d1f895c6fe | 190 | tmpreg |= hcec->Init.BRERxStop; |
| mbed_official | 340:28d1f895c6fe | 191 | tmpreg |= hcec->Init.BREErrorBitGen; |
| mbed_official | 340:28d1f895c6fe | 192 | tmpreg |= hcec->Init.LBPEErrorBitGen; |
| mbed_official | 340:28d1f895c6fe | 193 | tmpreg |= hcec->Init.BroadcastMsgNoErrorBitGen; |
| mbed_official | 340:28d1f895c6fe | 194 | tmpreg |= hcec->Init.SignalFreeTimeOption; |
| mbed_official | 340:28d1f895c6fe | 195 | tmpreg |= (hcec->Init.OwnAddress << CEC_CFGR_OAR_LSB_POS); |
| mbed_official | 340:28d1f895c6fe | 196 | tmpreg |= hcec->Init.ListenMode; |
| mbed_official | 340:28d1f895c6fe | 197 | |
| mbed_official | 340:28d1f895c6fe | 198 | /* Write to CEC Control Register */ |
| mbed_official | 340:28d1f895c6fe | 199 | MODIFY_REG(hcec->Instance->CFGR, CEC_CFGR_FIELDS, tmpreg); |
| mbed_official | 340:28d1f895c6fe | 200 | |
| mbed_official | 340:28d1f895c6fe | 201 | /* Enable the Peripheral */ |
| mbed_official | 340:28d1f895c6fe | 202 | __HAL_CEC_ENABLE(hcec); |
| mbed_official | 340:28d1f895c6fe | 203 | |
| mbed_official | 340:28d1f895c6fe | 204 | hcec->State = HAL_CEC_STATE_READY; |
| mbed_official | 340:28d1f895c6fe | 205 | |
| mbed_official | 340:28d1f895c6fe | 206 | return HAL_OK; |
| mbed_official | 340:28d1f895c6fe | 207 | } |
| mbed_official | 340:28d1f895c6fe | 208 | |
| mbed_official | 340:28d1f895c6fe | 209 | |
| mbed_official | 340:28d1f895c6fe | 210 | |
| mbed_official | 340:28d1f895c6fe | 211 | /** |
| mbed_official | 340:28d1f895c6fe | 212 | * @brief DeInitializes the CEC peripheral |
| mbed_official | 340:28d1f895c6fe | 213 | * @param hcec: CEC handle |
| mbed_official | 340:28d1f895c6fe | 214 | * @retval HAL status |
| mbed_official | 340:28d1f895c6fe | 215 | */ |
| mbed_official | 340:28d1f895c6fe | 216 | HAL_StatusTypeDef HAL_CEC_DeInit(CEC_HandleTypeDef *hcec) |
| mbed_official | 340:28d1f895c6fe | 217 | { |
| mbed_official | 340:28d1f895c6fe | 218 | /* Check the CEC handle allocation */ |
| mbed_official | 441:d2c15dda23c1 | 219 | if(hcec == NULL) |
| mbed_official | 340:28d1f895c6fe | 220 | { |
| mbed_official | 340:28d1f895c6fe | 221 | return HAL_ERROR; |
| mbed_official | 340:28d1f895c6fe | 222 | } |
| mbed_official | 340:28d1f895c6fe | 223 | |
| mbed_official | 340:28d1f895c6fe | 224 | /* Check the parameters */ |
| mbed_official | 340:28d1f895c6fe | 225 | assert_param(IS_CEC_ALL_INSTANCE(hcec->Instance)); |
| mbed_official | 340:28d1f895c6fe | 226 | |
| mbed_official | 340:28d1f895c6fe | 227 | hcec->State = HAL_CEC_STATE_BUSY; |
| mbed_official | 340:28d1f895c6fe | 228 | |
| mbed_official | 340:28d1f895c6fe | 229 | /* DeInit the low level hardware */ |
| mbed_official | 340:28d1f895c6fe | 230 | HAL_CEC_MspDeInit(hcec); |
| mbed_official | 340:28d1f895c6fe | 231 | /* Disable the Peripheral */ |
| mbed_official | 340:28d1f895c6fe | 232 | __HAL_CEC_DISABLE(hcec); |
| mbed_official | 340:28d1f895c6fe | 233 | |
| mbed_official | 340:28d1f895c6fe | 234 | hcec->ErrorCode = HAL_CEC_ERROR_NONE; |
| mbed_official | 340:28d1f895c6fe | 235 | hcec->State = HAL_CEC_STATE_RESET; |
| mbed_official | 340:28d1f895c6fe | 236 | |
| mbed_official | 340:28d1f895c6fe | 237 | /* Process Unlock */ |
| mbed_official | 340:28d1f895c6fe | 238 | __HAL_UNLOCK(hcec); |
| mbed_official | 340:28d1f895c6fe | 239 | |
| mbed_official | 340:28d1f895c6fe | 240 | return HAL_OK; |
| mbed_official | 340:28d1f895c6fe | 241 | } |
| mbed_official | 340:28d1f895c6fe | 242 | |
| mbed_official | 340:28d1f895c6fe | 243 | /** |
| mbed_official | 340:28d1f895c6fe | 244 | * @brief CEC MSP Init |
| mbed_official | 340:28d1f895c6fe | 245 | * @param hcec: CEC handle |
| mbed_official | 340:28d1f895c6fe | 246 | * @retval None |
| mbed_official | 340:28d1f895c6fe | 247 | */ |
| mbed_official | 340:28d1f895c6fe | 248 | __weak void HAL_CEC_MspInit(CEC_HandleTypeDef *hcec) |
| mbed_official | 340:28d1f895c6fe | 249 | { |
| mbed_official | 340:28d1f895c6fe | 250 | /* NOTE : This function should not be modified, when the callback is needed, |
| mbed_official | 340:28d1f895c6fe | 251 | the HAL_CEC_MspInit can be implemented in the user file |
| mbed_official | 340:28d1f895c6fe | 252 | */ |
| mbed_official | 340:28d1f895c6fe | 253 | } |
| mbed_official | 340:28d1f895c6fe | 254 | |
| mbed_official | 340:28d1f895c6fe | 255 | /** |
| mbed_official | 340:28d1f895c6fe | 256 | * @brief CEC MSP DeInit |
| mbed_official | 340:28d1f895c6fe | 257 | * @param hcec: CEC handle |
| mbed_official | 340:28d1f895c6fe | 258 | * @retval None |
| mbed_official | 340:28d1f895c6fe | 259 | */ |
| mbed_official | 340:28d1f895c6fe | 260 | __weak void HAL_CEC_MspDeInit(CEC_HandleTypeDef *hcec) |
| mbed_official | 340:28d1f895c6fe | 261 | { |
| mbed_official | 340:28d1f895c6fe | 262 | /* NOTE : This function should not be modified, when the callback is needed, |
| mbed_official | 340:28d1f895c6fe | 263 | the HAL_CEC_MspDeInit can be implemented in the user file |
| mbed_official | 340:28d1f895c6fe | 264 | */ |
| mbed_official | 340:28d1f895c6fe | 265 | } |
| mbed_official | 340:28d1f895c6fe | 266 | |
| mbed_official | 340:28d1f895c6fe | 267 | /** |
| mbed_official | 340:28d1f895c6fe | 268 | * @} |
| mbed_official | 340:28d1f895c6fe | 269 | */ |
| mbed_official | 340:28d1f895c6fe | 270 | |
| mbed_official | 340:28d1f895c6fe | 271 | /** @defgroup CEC_Exported_Functions_Group2 IO operation function |
| mbed_official | 340:28d1f895c6fe | 272 | * @brief CEC Transmit/Receive functions |
| mbed_official | 340:28d1f895c6fe | 273 | * |
| mbed_official | 340:28d1f895c6fe | 274 | @verbatim |
| mbed_official | 340:28d1f895c6fe | 275 | =============================================================================== |
| mbed_official | 340:28d1f895c6fe | 276 | ##### IO operation function ##### |
| mbed_official | 340:28d1f895c6fe | 277 | =============================================================================== |
| mbed_official | 340:28d1f895c6fe | 278 | This subsection provides a set of functions allowing to manage the CEC data transfers. |
| mbed_official | 340:28d1f895c6fe | 279 | |
| mbed_official | 340:28d1f895c6fe | 280 | (#) The CEC handle must contain the initiator (TX side) and the destination (RX side) |
| mbed_official | 340:28d1f895c6fe | 281 | logical addresses (4-bit long addresses, 0xF for broadcast messages destination) |
| mbed_official | 340:28d1f895c6fe | 282 | |
| mbed_official | 340:28d1f895c6fe | 283 | (#) There are two mode of transfer: |
| mbed_official | 340:28d1f895c6fe | 284 | (+) Blocking mode: The communication is performed in polling mode. |
| mbed_official | 340:28d1f895c6fe | 285 | The HAL status of all data processing is returned by the same function |
| mbed_official | 340:28d1f895c6fe | 286 | after finishing transfer. |
| mbed_official | 340:28d1f895c6fe | 287 | (+) Non Blocking mode: The communication is performed using Interrupts. |
| mbed_official | 340:28d1f895c6fe | 288 | These API's return the HAL status. |
| mbed_official | 340:28d1f895c6fe | 289 | The end of the data processing will be indicated through the |
| mbed_official | 340:28d1f895c6fe | 290 | dedicated CEC IRQ when using Interrupt mode. |
| mbed_official | 340:28d1f895c6fe | 291 | The HAL_CEC_TxCpltCallback(), HAL_CEC_RxCpltCallback() user callbacks |
| mbed_official | 340:28d1f895c6fe | 292 | will be executed respectivelly at the end of the transmit or Receive process |
| mbed_official | 340:28d1f895c6fe | 293 | The HAL_CEC_ErrorCallback()user callback will be executed when a communication |
| mbed_official | 340:28d1f895c6fe | 294 | error is detected |
| mbed_official | 340:28d1f895c6fe | 295 | |
| mbed_official | 340:28d1f895c6fe | 296 | (#) Blocking mode API s are : |
| mbed_official | 340:28d1f895c6fe | 297 | (+) HAL_CEC_Transmit() |
| mbed_official | 340:28d1f895c6fe | 298 | (+) HAL_CEC_Receive() |
| mbed_official | 340:28d1f895c6fe | 299 | |
| mbed_official | 340:28d1f895c6fe | 300 | (#) Non-Blocking mode API s with Interrupt are : |
| mbed_official | 340:28d1f895c6fe | 301 | (+) HAL_CEC_Transmit_IT() |
| mbed_official | 340:28d1f895c6fe | 302 | (+) HAL_CEC_Receive_IT() |
| mbed_official | 340:28d1f895c6fe | 303 | (+) HAL_CEC_IRQHandler() |
| mbed_official | 340:28d1f895c6fe | 304 | |
| mbed_official | 340:28d1f895c6fe | 305 | (#) A set of Transfer Complete Callbacks are provided in No_Blocking mode: |
| mbed_official | 340:28d1f895c6fe | 306 | (+) HAL_CEC_TxCpltCallback() |
| mbed_official | 340:28d1f895c6fe | 307 | (+) HAL_CEC_RxCpltCallback() |
| mbed_official | 340:28d1f895c6fe | 308 | (+) HAL_CEC_ErrorCallback() |
| mbed_official | 340:28d1f895c6fe | 309 | |
| mbed_official | 340:28d1f895c6fe | 310 | @endverbatim |
| mbed_official | 340:28d1f895c6fe | 311 | * @{ |
| mbed_official | 340:28d1f895c6fe | 312 | */ |
| mbed_official | 340:28d1f895c6fe | 313 | |
| mbed_official | 340:28d1f895c6fe | 314 | /** |
| mbed_official | 340:28d1f895c6fe | 315 | * @brief Send data in blocking mode |
| mbed_official | 340:28d1f895c6fe | 316 | * @param hcec: CEC handle |
| mbed_official | 340:28d1f895c6fe | 317 | * @param DestinationAddress: destination logical address |
| mbed_official | 340:28d1f895c6fe | 318 | * @param pData: pointer to input byte data buffer |
| mbed_official | 340:28d1f895c6fe | 319 | * @param Size: amount of data to be sent in bytes (without counting the header). |
| mbed_official | 340:28d1f895c6fe | 320 | * 0 means only the header is sent (ping operation). |
| mbed_official | 340:28d1f895c6fe | 321 | * Maximum TX size is 15 bytes (1 opcode and up to 14 operands). |
| mbed_official | 340:28d1f895c6fe | 322 | * @param Timeout: Timeout duration. |
| mbed_official | 340:28d1f895c6fe | 323 | * @retval HAL status |
| mbed_official | 340:28d1f895c6fe | 324 | */ |
| mbed_official | 340:28d1f895c6fe | 325 | HAL_StatusTypeDef HAL_CEC_Transmit(CEC_HandleTypeDef *hcec, uint8_t DestinationAddress, uint8_t *pData, uint32_t Size, uint32_t Timeout) |
| mbed_official | 340:28d1f895c6fe | 326 | { |
| mbed_official | 340:28d1f895c6fe | 327 | uint8_t temp = 0; |
| mbed_official | 340:28d1f895c6fe | 328 | uint32_t tempisr = 0; |
| mbed_official | 340:28d1f895c6fe | 329 | uint32_t tickstart = 0; |
| mbed_official | 340:28d1f895c6fe | 330 | |
| mbed_official | 340:28d1f895c6fe | 331 | if((hcec->State == HAL_CEC_STATE_READY) && (__HAL_CEC_GET_TRANSMISSION_START_FLAG(hcec) == RESET)) |
| mbed_official | 340:28d1f895c6fe | 332 | { |
| mbed_official | 340:28d1f895c6fe | 333 | hcec->ErrorCode = HAL_CEC_ERROR_NONE; |
| mbed_official | 441:d2c15dda23c1 | 334 | if((pData == NULL ) && (Size > 0)) |
| mbed_official | 340:28d1f895c6fe | 335 | { |
| mbed_official | 340:28d1f895c6fe | 336 | hcec->State = HAL_CEC_STATE_ERROR; |
| mbed_official | 340:28d1f895c6fe | 337 | return HAL_ERROR; |
| mbed_official | 340:28d1f895c6fe | 338 | } |
| mbed_official | 340:28d1f895c6fe | 339 | |
| mbed_official | 340:28d1f895c6fe | 340 | assert_param(IS_CEC_ADDRESS(DestinationAddress)); |
| mbed_official | 340:28d1f895c6fe | 341 | assert_param(IS_CEC_MSGSIZE(Size)); |
| mbed_official | 340:28d1f895c6fe | 342 | |
| mbed_official | 340:28d1f895c6fe | 343 | /* Process Locked */ |
| mbed_official | 340:28d1f895c6fe | 344 | __HAL_LOCK(hcec); |
| mbed_official | 340:28d1f895c6fe | 345 | |
| mbed_official | 340:28d1f895c6fe | 346 | hcec->State = HAL_CEC_STATE_BUSY_TX; |
| mbed_official | 340:28d1f895c6fe | 347 | |
| mbed_official | 340:28d1f895c6fe | 348 | hcec->TxXferCount = Size; |
| mbed_official | 340:28d1f895c6fe | 349 | |
| mbed_official | 340:28d1f895c6fe | 350 | /* case no data to be sent, sender is only pinging the system */ |
| mbed_official | 340:28d1f895c6fe | 351 | if (Size == 0) |
| mbed_official | 340:28d1f895c6fe | 352 | { |
| mbed_official | 340:28d1f895c6fe | 353 | /* Set TX End of Message (TXEOM) bit, must be set before writing data to TXDR */ |
| mbed_official | 340:28d1f895c6fe | 354 | __HAL_CEC_LAST_BYTE_TX_SET(hcec); |
| mbed_official | 340:28d1f895c6fe | 355 | } |
| mbed_official | 340:28d1f895c6fe | 356 | |
| mbed_official | 340:28d1f895c6fe | 357 | /* send header block */ |
| mbed_official | 340:28d1f895c6fe | 358 | temp = ((uint32_t)hcec->Init.InitiatorAddress << CEC_INITIATOR_LSB_POS) | DestinationAddress; |
| mbed_official | 340:28d1f895c6fe | 359 | hcec->Instance->TXDR = temp; |
| mbed_official | 340:28d1f895c6fe | 360 | /* Set TX Start of Message (TXSOM) bit */ |
| mbed_official | 340:28d1f895c6fe | 361 | __HAL_CEC_FIRST_BYTE_TX_SET(hcec); |
| mbed_official | 340:28d1f895c6fe | 362 | |
| mbed_official | 340:28d1f895c6fe | 363 | while (hcec->TxXferCount > 0) |
| mbed_official | 340:28d1f895c6fe | 364 | { |
| mbed_official | 340:28d1f895c6fe | 365 | hcec->TxXferCount--; |
| mbed_official | 340:28d1f895c6fe | 366 | |
| mbed_official | 340:28d1f895c6fe | 367 | tickstart = HAL_GetTick(); |
| mbed_official | 340:28d1f895c6fe | 368 | while(HAL_IS_BIT_CLR(hcec->Instance->ISR, CEC_ISR_TXBR)) |
| mbed_official | 340:28d1f895c6fe | 369 | { |
| mbed_official | 340:28d1f895c6fe | 370 | if(Timeout != HAL_MAX_DELAY) |
| mbed_official | 340:28d1f895c6fe | 371 | { |
| mbed_official | 340:28d1f895c6fe | 372 | if((Timeout == 0) || ((HAL_GetTick() - tickstart) > Timeout)) |
| mbed_official | 340:28d1f895c6fe | 373 | { |
| mbed_official | 441:d2c15dda23c1 | 374 | hcec->State = HAL_CEC_STATE_READY; |
| mbed_official | 340:28d1f895c6fe | 375 | /* Process Unlocked */ |
| mbed_official | 340:28d1f895c6fe | 376 | __HAL_UNLOCK(hcec); |
| mbed_official | 340:28d1f895c6fe | 377 | return HAL_TIMEOUT; |
| mbed_official | 340:28d1f895c6fe | 378 | } |
| mbed_official | 340:28d1f895c6fe | 379 | } |
| mbed_official | 340:28d1f895c6fe | 380 | |
| mbed_official | 340:28d1f895c6fe | 381 | /* check whether error occured while waiting for TXBR to be set: |
| mbed_official | 340:28d1f895c6fe | 382 | * has Tx underrun occurred ? |
| mbed_official | 340:28d1f895c6fe | 383 | * has Tx error occurred ? |
| mbed_official | 340:28d1f895c6fe | 384 | * has Tx Missing Acknowledge error occurred ? |
| mbed_official | 340:28d1f895c6fe | 385 | * has Arbitration Loss error occurred ? */ |
| mbed_official | 340:28d1f895c6fe | 386 | tempisr = hcec->Instance->ISR; |
| mbed_official | 340:28d1f895c6fe | 387 | if ((tempisr & (CEC_ISR_TXUDR|CEC_ISR_TXERR|CEC_ISR_TXACKE|CEC_ISR_ARBLST)) != 0) |
| mbed_official | 340:28d1f895c6fe | 388 | { |
| mbed_official | 340:28d1f895c6fe | 389 | /* copy ISR for error handling purposes */ |
| mbed_official | 340:28d1f895c6fe | 390 | hcec->ErrorCode = tempisr; |
| mbed_official | 340:28d1f895c6fe | 391 | /* clear all error flags by default */ |
| mbed_official | 340:28d1f895c6fe | 392 | __HAL_CEC_CLEAR_FLAG(hcec, (CEC_ISR_TXUDR|CEC_ISR_TXERR|CEC_ISR_TXACKE|CEC_ISR_ARBLST)); |
| mbed_official | 340:28d1f895c6fe | 393 | hcec->State = HAL_CEC_STATE_ERROR; |
| mbed_official | 340:28d1f895c6fe | 394 | __HAL_UNLOCK(hcec); |
| mbed_official | 340:28d1f895c6fe | 395 | return HAL_ERROR; |
| mbed_official | 340:28d1f895c6fe | 396 | } |
| mbed_official | 340:28d1f895c6fe | 397 | } |
| mbed_official | 340:28d1f895c6fe | 398 | /* TXBR to clear BEFORE writing TXDR register */ |
| mbed_official | 340:28d1f895c6fe | 399 | __HAL_CEC_CLEAR_FLAG(hcec,CEC_ISR_TXBR); |
| mbed_official | 340:28d1f895c6fe | 400 | if (hcec->TxXferCount == 0) |
| mbed_official | 340:28d1f895c6fe | 401 | { |
| mbed_official | 340:28d1f895c6fe | 402 | /* if last byte transmission, set TX End of Message (TXEOM) bit */ |
| mbed_official | 340:28d1f895c6fe | 403 | __HAL_CEC_LAST_BYTE_TX_SET(hcec); |
| mbed_official | 340:28d1f895c6fe | 404 | } |
| mbed_official | 340:28d1f895c6fe | 405 | hcec->Instance->TXDR = *pData++; |
| mbed_official | 340:28d1f895c6fe | 406 | |
| mbed_official | 340:28d1f895c6fe | 407 | /* error check after TX byte write up */ |
| mbed_official | 340:28d1f895c6fe | 408 | tempisr = hcec->Instance->ISR; |
| mbed_official | 340:28d1f895c6fe | 409 | if ((tempisr & (CEC_ISR_TXUDR|CEC_ISR_TXERR|CEC_ISR_TXACKE|CEC_ISR_ARBLST)) != 0) |
| mbed_official | 340:28d1f895c6fe | 410 | { |
| mbed_official | 340:28d1f895c6fe | 411 | /* copy ISR for error handling purposes */ |
| mbed_official | 340:28d1f895c6fe | 412 | hcec->ErrorCode = tempisr; |
| mbed_official | 340:28d1f895c6fe | 413 | /* clear all error flags by default */ |
| mbed_official | 340:28d1f895c6fe | 414 | __HAL_CEC_CLEAR_FLAG(hcec, (CEC_ISR_TXUDR|CEC_ISR_TXERR|CEC_ISR_TXACKE|CEC_ISR_ARBLST)); |
| mbed_official | 340:28d1f895c6fe | 415 | hcec->State = HAL_CEC_STATE_ERROR; |
| mbed_official | 340:28d1f895c6fe | 416 | __HAL_UNLOCK(hcec); |
| mbed_official | 340:28d1f895c6fe | 417 | return HAL_ERROR; |
| mbed_official | 340:28d1f895c6fe | 418 | } |
| mbed_official | 340:28d1f895c6fe | 419 | } /* end while (while (hcec->TxXferCount > 0)) */ |
| mbed_official | 340:28d1f895c6fe | 420 | |
| mbed_official | 340:28d1f895c6fe | 421 | |
| mbed_official | 340:28d1f895c6fe | 422 | /* if no error up to this point, check that transmission is |
| mbed_official | 340:28d1f895c6fe | 423 | * complete, that is wait until TXEOM is reset */ |
| mbed_official | 340:28d1f895c6fe | 424 | tickstart = HAL_GetTick(); |
| mbed_official | 340:28d1f895c6fe | 425 | |
| mbed_official | 340:28d1f895c6fe | 426 | while (HAL_IS_BIT_SET(hcec->Instance->CR, CEC_CR_TXEOM)) |
| mbed_official | 340:28d1f895c6fe | 427 | { |
| mbed_official | 340:28d1f895c6fe | 428 | if(Timeout != HAL_MAX_DELAY) |
| mbed_official | 340:28d1f895c6fe | 429 | { |
| mbed_official | 340:28d1f895c6fe | 430 | if((Timeout == 0) || ((HAL_GetTick() - tickstart) > Timeout)) |
| mbed_official | 340:28d1f895c6fe | 431 | { |
| mbed_official | 340:28d1f895c6fe | 432 | hcec->State = HAL_CEC_STATE_ERROR; |
| mbed_official | 340:28d1f895c6fe | 433 | __HAL_UNLOCK(hcec); |
| mbed_official | 340:28d1f895c6fe | 434 | return HAL_TIMEOUT; |
| mbed_official | 340:28d1f895c6fe | 435 | } |
| mbed_official | 340:28d1f895c6fe | 436 | } |
| mbed_official | 340:28d1f895c6fe | 437 | } |
| mbed_official | 340:28d1f895c6fe | 438 | |
| mbed_official | 340:28d1f895c6fe | 439 | /* Final error check once all bytes have been transmitted */ |
| mbed_official | 340:28d1f895c6fe | 440 | tempisr = hcec->Instance->ISR; |
| mbed_official | 340:28d1f895c6fe | 441 | if ((tempisr & (CEC_ISR_TXUDR|CEC_ISR_TXERR|CEC_ISR_TXACKE)) != 0) |
| mbed_official | 340:28d1f895c6fe | 442 | { |
| mbed_official | 340:28d1f895c6fe | 443 | /* copy ISR for error handling purposes */ |
| mbed_official | 340:28d1f895c6fe | 444 | hcec->ErrorCode = tempisr; |
| mbed_official | 340:28d1f895c6fe | 445 | /* clear all error flags by default */ |
| mbed_official | 340:28d1f895c6fe | 446 | __HAL_CEC_CLEAR_FLAG(hcec, (CEC_ISR_TXUDR|CEC_ISR_TXERR|CEC_ISR_TXACKE)); |
| mbed_official | 340:28d1f895c6fe | 447 | hcec->State = HAL_CEC_STATE_ERROR; |
| mbed_official | 340:28d1f895c6fe | 448 | __HAL_UNLOCK(hcec); |
| mbed_official | 340:28d1f895c6fe | 449 | return HAL_ERROR; |
| mbed_official | 340:28d1f895c6fe | 450 | } |
| mbed_official | 340:28d1f895c6fe | 451 | |
| mbed_official | 340:28d1f895c6fe | 452 | hcec->State = HAL_CEC_STATE_READY; |
| mbed_official | 340:28d1f895c6fe | 453 | __HAL_UNLOCK(hcec); |
| mbed_official | 340:28d1f895c6fe | 454 | |
| mbed_official | 340:28d1f895c6fe | 455 | return HAL_OK; |
| mbed_official | 340:28d1f895c6fe | 456 | } |
| mbed_official | 340:28d1f895c6fe | 457 | else |
| mbed_official | 340:28d1f895c6fe | 458 | { |
| mbed_official | 340:28d1f895c6fe | 459 | return HAL_BUSY; |
| mbed_official | 340:28d1f895c6fe | 460 | } |
| mbed_official | 340:28d1f895c6fe | 461 | } |
| mbed_official | 340:28d1f895c6fe | 462 | |
| mbed_official | 340:28d1f895c6fe | 463 | /** |
| mbed_official | 340:28d1f895c6fe | 464 | * @brief Receive data in blocking mode. Must be invoked when RXBR has been set. |
| mbed_official | 340:28d1f895c6fe | 465 | * @param hcec: CEC handle |
| mbed_official | 340:28d1f895c6fe | 466 | * @param pData: pointer to received data buffer. |
| mbed_official | 340:28d1f895c6fe | 467 | * @param Timeout: Timeout duration. |
| mbed_official | 340:28d1f895c6fe | 468 | * Note that the received data size is not known beforehand, the latter is known |
| mbed_official | 340:28d1f895c6fe | 469 | * when the reception is complete and is stored in hcec->RxXferSize. |
| mbed_official | 340:28d1f895c6fe | 470 | * hcec->RxXferSize is the sum of opcodes + operands (0 to 14 operands max). |
| mbed_official | 340:28d1f895c6fe | 471 | * If only a header is received, hcec->RxXferSize = 0 |
| mbed_official | 340:28d1f895c6fe | 472 | * @retval HAL status |
| mbed_official | 340:28d1f895c6fe | 473 | */ |
| mbed_official | 340:28d1f895c6fe | 474 | HAL_StatusTypeDef HAL_CEC_Receive(CEC_HandleTypeDef *hcec, uint8_t *pData, uint32_t Timeout) |
| mbed_official | 340:28d1f895c6fe | 475 | { |
| mbed_official | 340:28d1f895c6fe | 476 | uint32_t temp; |
| mbed_official | 340:28d1f895c6fe | 477 | uint32_t tickstart = 0; |
| mbed_official | 340:28d1f895c6fe | 478 | |
| mbed_official | 340:28d1f895c6fe | 479 | if (hcec->State == HAL_CEC_STATE_READY) |
| mbed_official | 340:28d1f895c6fe | 480 | { |
| mbed_official | 340:28d1f895c6fe | 481 | hcec->ErrorCode = HAL_CEC_ERROR_NONE; |
| mbed_official | 441:d2c15dda23c1 | 482 | if (pData == NULL ) |
| mbed_official | 340:28d1f895c6fe | 483 | { |
| mbed_official | 340:28d1f895c6fe | 484 | hcec->State = HAL_CEC_STATE_ERROR; |
| mbed_official | 340:28d1f895c6fe | 485 | return HAL_ERROR; |
| mbed_official | 340:28d1f895c6fe | 486 | } |
| mbed_official | 340:28d1f895c6fe | 487 | |
| mbed_official | 340:28d1f895c6fe | 488 | hcec->RxXferSize = 0; |
| mbed_official | 340:28d1f895c6fe | 489 | /* Process Locked */ |
| mbed_official | 340:28d1f895c6fe | 490 | __HAL_LOCK(hcec); |
| mbed_official | 340:28d1f895c6fe | 491 | |
| mbed_official | 340:28d1f895c6fe | 492 | |
| mbed_official | 340:28d1f895c6fe | 493 | /* Rx loop until CEC_ISR_RXEND is set */ |
| mbed_official | 340:28d1f895c6fe | 494 | while (HAL_IS_BIT_CLR(hcec->Instance->ISR, CEC_ISR_RXEND)) |
| mbed_official | 340:28d1f895c6fe | 495 | { |
| mbed_official | 340:28d1f895c6fe | 496 | tickstart = HAL_GetTick(); |
| mbed_official | 340:28d1f895c6fe | 497 | /* Wait for next byte to be received */ |
| mbed_official | 340:28d1f895c6fe | 498 | while (HAL_IS_BIT_CLR(hcec->Instance->ISR, CEC_ISR_RXBR)) |
| mbed_official | 340:28d1f895c6fe | 499 | { |
| mbed_official | 340:28d1f895c6fe | 500 | if(Timeout != HAL_MAX_DELAY) |
| mbed_official | 340:28d1f895c6fe | 501 | { |
| mbed_official | 340:28d1f895c6fe | 502 | if((Timeout == 0) || ((HAL_GetTick() - tickstart) > Timeout)) |
| mbed_official | 340:28d1f895c6fe | 503 | { |
| mbed_official | 441:d2c15dda23c1 | 504 | hcec->State = HAL_CEC_STATE_READY; |
| mbed_official | 340:28d1f895c6fe | 505 | __HAL_UNLOCK(hcec); |
| mbed_official | 340:28d1f895c6fe | 506 | return HAL_TIMEOUT; |
| mbed_official | 340:28d1f895c6fe | 507 | } |
| mbed_official | 340:28d1f895c6fe | 508 | } |
| mbed_official | 340:28d1f895c6fe | 509 | /* any error so far ? |
| mbed_official | 340:28d1f895c6fe | 510 | * has Rx Missing Acknowledge occurred ? |
| mbed_official | 340:28d1f895c6fe | 511 | * has Rx Long Bit Period error occurred ? |
| mbed_official | 340:28d1f895c6fe | 512 | * has Rx Short Bit Period error occurred ? |
| mbed_official | 340:28d1f895c6fe | 513 | * has Rx Bit Rising error occurred ? |
| mbed_official | 340:28d1f895c6fe | 514 | * has Rx Overrun error occurred ? */ |
| mbed_official | 340:28d1f895c6fe | 515 | temp = (uint32_t) (hcec->Instance->ISR); |
| mbed_official | 340:28d1f895c6fe | 516 | if ((temp & (CEC_ISR_RXACKE|CEC_ISR_LBPE|CEC_ISR_SBPE|CEC_ISR_BRE|CEC_ISR_RXOVR)) != 0) |
| mbed_official | 340:28d1f895c6fe | 517 | { |
| mbed_official | 340:28d1f895c6fe | 518 | /* copy ISR for error handling purposes */ |
| mbed_official | 340:28d1f895c6fe | 519 | hcec->ErrorCode = temp; |
| mbed_official | 340:28d1f895c6fe | 520 | /* clear all error flags by default */ |
| mbed_official | 340:28d1f895c6fe | 521 | __HAL_CEC_CLEAR_FLAG(hcec, (CEC_ISR_RXACKE|CEC_ISR_LBPE|CEC_ISR_SBPE|CEC_ISR_BRE|CEC_ISR_RXOVR)); |
| mbed_official | 340:28d1f895c6fe | 522 | hcec->State = HAL_CEC_STATE_ERROR; |
| mbed_official | 340:28d1f895c6fe | 523 | __HAL_UNLOCK(hcec); |
| mbed_official | 340:28d1f895c6fe | 524 | return HAL_ERROR; |
| mbed_official | 340:28d1f895c6fe | 525 | } |
| mbed_official | 340:28d1f895c6fe | 526 | } /* while (HAL_IS_BIT_CLR(hcec->Instance->ISR, CEC_ISR_RXBR)) */ |
| mbed_official | 340:28d1f895c6fe | 527 | |
| mbed_official | 340:28d1f895c6fe | 528 | |
| mbed_official | 340:28d1f895c6fe | 529 | /* read received data */ |
| mbed_official | 340:28d1f895c6fe | 530 | *pData++ = hcec->Instance->RXDR; |
| mbed_official | 340:28d1f895c6fe | 531 | temp = (uint32_t) (hcec->Instance->ISR); |
| mbed_official | 340:28d1f895c6fe | 532 | /* end of message ? */ |
| mbed_official | 340:28d1f895c6fe | 533 | if ((temp & CEC_ISR_RXEND) != 0) |
| mbed_official | 340:28d1f895c6fe | 534 | { |
| mbed_official | 340:28d1f895c6fe | 535 | assert_param(IS_CEC_MSGSIZE(hcec->RxXferSize)); |
| mbed_official | 340:28d1f895c6fe | 536 | __HAL_CEC_CLEAR_FLAG(hcec,CEC_ISR_RXEND); |
| mbed_official | 340:28d1f895c6fe | 537 | hcec->State = HAL_CEC_STATE_READY; |
| mbed_official | 340:28d1f895c6fe | 538 | __HAL_UNLOCK(hcec); |
| mbed_official | 340:28d1f895c6fe | 539 | return HAL_OK; |
| mbed_official | 340:28d1f895c6fe | 540 | } |
| mbed_official | 340:28d1f895c6fe | 541 | |
| mbed_official | 340:28d1f895c6fe | 542 | /* clear Rx-Byte Received flag */ |
| mbed_official | 340:28d1f895c6fe | 543 | __HAL_CEC_CLEAR_FLAG(hcec,CEC_ISR_RXBR); |
| mbed_official | 340:28d1f895c6fe | 544 | /* increment payload byte counter */ |
| mbed_official | 340:28d1f895c6fe | 545 | hcec->RxXferSize++; |
| mbed_official | 340:28d1f895c6fe | 546 | } /* while (HAL_IS_BIT_CLR(hcec->Instance->ISR, CEC_ISR_RXEND)) */ |
| mbed_official | 340:28d1f895c6fe | 547 | |
| mbed_official | 340:28d1f895c6fe | 548 | /* if the instructions below are executed, it means RXEND was set when RXBR was |
| mbed_official | 340:28d1f895c6fe | 549 | * set for the first time: |
| mbed_official | 340:28d1f895c6fe | 550 | * the code within the "while (HAL_IS_BIT_CLR(hcec->Instance->ISR, CEC_ISR_RXEND))" |
| mbed_official | 340:28d1f895c6fe | 551 | * loop has not been executed and this means a single byte has been sent */ |
| mbed_official | 340:28d1f895c6fe | 552 | *pData++ = hcec->Instance->RXDR; |
| mbed_official | 340:28d1f895c6fe | 553 | /* only one header is received: RxXferSize is set to 0 (no operand, no opcode) */ |
| mbed_official | 340:28d1f895c6fe | 554 | hcec->RxXferSize = 0; |
| mbed_official | 340:28d1f895c6fe | 555 | __HAL_CEC_CLEAR_FLAG(hcec,CEC_ISR_RXEND); |
| mbed_official | 340:28d1f895c6fe | 556 | |
| mbed_official | 340:28d1f895c6fe | 557 | hcec->State = HAL_CEC_STATE_READY; |
| mbed_official | 340:28d1f895c6fe | 558 | __HAL_UNLOCK(hcec); |
| mbed_official | 340:28d1f895c6fe | 559 | return HAL_OK; |
| mbed_official | 340:28d1f895c6fe | 560 | } |
| mbed_official | 340:28d1f895c6fe | 561 | else |
| mbed_official | 340:28d1f895c6fe | 562 | { |
| mbed_official | 340:28d1f895c6fe | 563 | return HAL_BUSY; |
| mbed_official | 340:28d1f895c6fe | 564 | } |
| mbed_official | 340:28d1f895c6fe | 565 | } |
| mbed_official | 340:28d1f895c6fe | 566 | |
| mbed_official | 340:28d1f895c6fe | 567 | |
| mbed_official | 340:28d1f895c6fe | 568 | /** |
| mbed_official | 340:28d1f895c6fe | 569 | * @brief Send data in interrupt mode |
| mbed_official | 340:28d1f895c6fe | 570 | * @param hcec: CEC handle |
| mbed_official | 340:28d1f895c6fe | 571 | * @param DestinationAddress: destination logical address |
| mbed_official | 340:28d1f895c6fe | 572 | * @param pData: pointer to input byte data buffer |
| mbed_official | 340:28d1f895c6fe | 573 | * @param Size: amount of data to be sent in bytes (without counting the header). |
| mbed_official | 340:28d1f895c6fe | 574 | * 0 means only the header is sent (ping operation). |
| mbed_official | 340:28d1f895c6fe | 575 | * Maximum TX size is 15 bytes (1 opcode and up to 14 operands). |
| mbed_official | 340:28d1f895c6fe | 576 | * @retval HAL status |
| mbed_official | 340:28d1f895c6fe | 577 | */ |
| mbed_official | 340:28d1f895c6fe | 578 | HAL_StatusTypeDef HAL_CEC_Transmit_IT(CEC_HandleTypeDef *hcec, uint8_t DestinationAddress, uint8_t *pData, uint32_t Size) |
| mbed_official | 340:28d1f895c6fe | 579 | { |
| mbed_official | 340:28d1f895c6fe | 580 | uint8_t temp = 0; |
| mbed_official | 340:28d1f895c6fe | 581 | /* if the IP isn't already busy and if there is no previous transmission |
| mbed_official | 340:28d1f895c6fe | 582 | already pending due to arbitration lost */ |
| mbed_official | 340:28d1f895c6fe | 583 | if (((hcec->State == HAL_CEC_STATE_READY) || (hcec->State == HAL_CEC_STATE_STANDBY_RX)) |
| mbed_official | 340:28d1f895c6fe | 584 | && (__HAL_CEC_GET_TRANSMISSION_START_FLAG(hcec) == RESET)) |
| mbed_official | 340:28d1f895c6fe | 585 | { |
| mbed_official | 441:d2c15dda23c1 | 586 | if((pData == NULL ) && (Size > 0)) |
| mbed_official | 340:28d1f895c6fe | 587 | { |
| mbed_official | 340:28d1f895c6fe | 588 | hcec->State = HAL_CEC_STATE_ERROR; |
| mbed_official | 340:28d1f895c6fe | 589 | return HAL_ERROR; |
| mbed_official | 340:28d1f895c6fe | 590 | } |
| mbed_official | 340:28d1f895c6fe | 591 | |
| mbed_official | 340:28d1f895c6fe | 592 | assert_param(IS_CEC_ADDRESS(DestinationAddress)); |
| mbed_official | 340:28d1f895c6fe | 593 | assert_param(IS_CEC_MSGSIZE(Size)); |
| mbed_official | 340:28d1f895c6fe | 594 | |
| mbed_official | 340:28d1f895c6fe | 595 | /* Process Locked */ |
| mbed_official | 340:28d1f895c6fe | 596 | __HAL_LOCK(hcec); |
| mbed_official | 340:28d1f895c6fe | 597 | hcec->pTxBuffPtr = pData; |
| mbed_official | 340:28d1f895c6fe | 598 | hcec->State = HAL_CEC_STATE_BUSY_TX; |
| mbed_official | 340:28d1f895c6fe | 599 | hcec->ErrorCode = HAL_CEC_ERROR_NONE; |
| mbed_official | 340:28d1f895c6fe | 600 | |
| mbed_official | 340:28d1f895c6fe | 601 | /* Disable Peripheral to write CEC_IER register */ |
| mbed_official | 340:28d1f895c6fe | 602 | __HAL_CEC_DISABLE(hcec); |
| mbed_official | 340:28d1f895c6fe | 603 | |
| mbed_official | 340:28d1f895c6fe | 604 | /* Enable the following two CEC Transmission interrupts as |
| mbed_official | 340:28d1f895c6fe | 605 | * well as the following CEC Transmission Errors interrupts: |
| mbed_official | 340:28d1f895c6fe | 606 | * Tx Byte Request IT |
| mbed_official | 340:28d1f895c6fe | 607 | * End of Transmission IT |
| mbed_official | 340:28d1f895c6fe | 608 | * Tx Missing Acknowledge IT |
| mbed_official | 340:28d1f895c6fe | 609 | * Tx-Error IT |
| mbed_official | 340:28d1f895c6fe | 610 | * Tx-Buffer Underrun IT |
| mbed_official | 340:28d1f895c6fe | 611 | * Tx arbitration lost */ |
| mbed_official | 340:28d1f895c6fe | 612 | __HAL_CEC_ENABLE_IT(hcec, CEC_IER_TXBRIE|CEC_IER_TXENDIE|CEC_IER_TX_ALL_ERR); |
| mbed_official | 340:28d1f895c6fe | 613 | |
| mbed_official | 340:28d1f895c6fe | 614 | /* Enable the Peripheral */ |
| mbed_official | 340:28d1f895c6fe | 615 | __HAL_CEC_ENABLE(hcec); |
| mbed_official | 340:28d1f895c6fe | 616 | |
| mbed_official | 340:28d1f895c6fe | 617 | /* initialize the number of bytes to send, |
| mbed_official | 340:28d1f895c6fe | 618 | * 0 means only one header is sent (ping operation) */ |
| mbed_official | 340:28d1f895c6fe | 619 | hcec->TxXferCount = Size; |
| mbed_official | 340:28d1f895c6fe | 620 | |
| mbed_official | 340:28d1f895c6fe | 621 | /* Process Unlocked */ |
| mbed_official | 340:28d1f895c6fe | 622 | __HAL_UNLOCK(hcec); |
| mbed_official | 340:28d1f895c6fe | 623 | |
| mbed_official | 340:28d1f895c6fe | 624 | /* in case of no payload (Size = 0), sender is only pinging the system; |
| mbed_official | 340:28d1f895c6fe | 625 | * Set TX End of Message (TXEOM) bit, must be set before writing data to TXDR */ |
| mbed_official | 340:28d1f895c6fe | 626 | if (Size == 0) |
| mbed_official | 340:28d1f895c6fe | 627 | { |
| mbed_official | 340:28d1f895c6fe | 628 | __HAL_CEC_LAST_BYTE_TX_SET(hcec); |
| mbed_official | 340:28d1f895c6fe | 629 | } |
| mbed_official | 340:28d1f895c6fe | 630 | |
| mbed_official | 340:28d1f895c6fe | 631 | /* send header block */ |
| mbed_official | 340:28d1f895c6fe | 632 | temp = ((uint32_t)hcec->Init.InitiatorAddress << CEC_INITIATOR_LSB_POS) | DestinationAddress; |
| mbed_official | 340:28d1f895c6fe | 633 | hcec->Instance->TXDR = temp; |
| mbed_official | 340:28d1f895c6fe | 634 | /* Set TX Start of Message (TXSOM) bit */ |
| mbed_official | 340:28d1f895c6fe | 635 | __HAL_CEC_FIRST_BYTE_TX_SET(hcec); |
| mbed_official | 340:28d1f895c6fe | 636 | |
| mbed_official | 340:28d1f895c6fe | 637 | return HAL_OK; |
| mbed_official | 340:28d1f895c6fe | 638 | } |
| mbed_official | 340:28d1f895c6fe | 639 | /* if the IP is already busy or if there is a previous transmission |
| mbed_official | 340:28d1f895c6fe | 640 | already pending due to arbitration loss */ |
| mbed_official | 340:28d1f895c6fe | 641 | else if ((hcec->State == HAL_CEC_STATE_BUSY_TX) |
| mbed_official | 340:28d1f895c6fe | 642 | || (__HAL_CEC_GET_TRANSMISSION_START_FLAG(hcec) != RESET)) |
| mbed_official | 340:28d1f895c6fe | 643 | { |
| mbed_official | 340:28d1f895c6fe | 644 | __HAL_LOCK(hcec); |
| mbed_official | 340:28d1f895c6fe | 645 | /* set state to BUSY TX, in case it wasn't set already (case |
| mbed_official | 340:28d1f895c6fe | 646 | * of transmission new attempt after arbitration loss) */ |
| mbed_official | 340:28d1f895c6fe | 647 | if (hcec->State != HAL_CEC_STATE_BUSY_TX) |
| mbed_official | 340:28d1f895c6fe | 648 | { |
| mbed_official | 340:28d1f895c6fe | 649 | hcec->State = HAL_CEC_STATE_BUSY_TX; |
| mbed_official | 340:28d1f895c6fe | 650 | } |
| mbed_official | 340:28d1f895c6fe | 651 | |
| mbed_official | 340:28d1f895c6fe | 652 | /* if all data have been sent */ |
| mbed_official | 340:28d1f895c6fe | 653 | if(hcec->TxXferCount == 0) |
| mbed_official | 340:28d1f895c6fe | 654 | { |
| mbed_official | 340:28d1f895c6fe | 655 | /* Disable Peripheral to write CEC_IER register */ |
| mbed_official | 340:28d1f895c6fe | 656 | __HAL_CEC_DISABLE(hcec); |
| mbed_official | 340:28d1f895c6fe | 657 | |
| mbed_official | 340:28d1f895c6fe | 658 | /* Disable the CEC Transmission Interrupts */ |
| mbed_official | 340:28d1f895c6fe | 659 | __HAL_CEC_DISABLE_IT(hcec, CEC_IER_TXBRIE|CEC_IER_TXENDIE); |
| mbed_official | 340:28d1f895c6fe | 660 | /* Disable the CEC Transmission Error Interrupts */ |
| mbed_official | 340:28d1f895c6fe | 661 | __HAL_CEC_DISABLE_IT(hcec, CEC_IER_TX_ALL_ERR); |
| mbed_official | 340:28d1f895c6fe | 662 | |
| mbed_official | 340:28d1f895c6fe | 663 | /* Enable the Peripheral */ |
| mbed_official | 340:28d1f895c6fe | 664 | __HAL_CEC_ENABLE(hcec); |
| mbed_official | 340:28d1f895c6fe | 665 | |
| mbed_official | 340:28d1f895c6fe | 666 | __HAL_CEC_CLEAR_FLAG(hcec,CEC_ISR_TXBR|CEC_ISR_TXEND); |
| mbed_official | 340:28d1f895c6fe | 667 | |
| mbed_official | 340:28d1f895c6fe | 668 | hcec->State = HAL_CEC_STATE_READY; |
| mbed_official | 340:28d1f895c6fe | 669 | /* Call the Process Unlocked before calling the Tx call back API to give the possibility to |
| mbed_official | 340:28d1f895c6fe | 670 | start again the Transmission under the Tx call back API */ |
| mbed_official | 340:28d1f895c6fe | 671 | __HAL_UNLOCK(hcec); |
| mbed_official | 340:28d1f895c6fe | 672 | |
| mbed_official | 340:28d1f895c6fe | 673 | HAL_CEC_TxCpltCallback(hcec); |
| mbed_official | 340:28d1f895c6fe | 674 | |
| mbed_official | 340:28d1f895c6fe | 675 | return HAL_OK; |
| mbed_official | 340:28d1f895c6fe | 676 | } |
| mbed_official | 340:28d1f895c6fe | 677 | else |
| mbed_official | 340:28d1f895c6fe | 678 | { |
| mbed_official | 340:28d1f895c6fe | 679 | if (hcec->TxXferCount == 1) |
| mbed_official | 340:28d1f895c6fe | 680 | { |
| mbed_official | 340:28d1f895c6fe | 681 | /* if this is the last byte transmission, set TX End of Message (TXEOM) bit */ |
| mbed_official | 340:28d1f895c6fe | 682 | __HAL_CEC_LAST_BYTE_TX_SET(hcec); |
| mbed_official | 340:28d1f895c6fe | 683 | } |
| mbed_official | 340:28d1f895c6fe | 684 | /* clear Tx-Byte request flag */ |
| mbed_official | 340:28d1f895c6fe | 685 | __HAL_CEC_CLEAR_FLAG(hcec,CEC_ISR_TXBR); |
| mbed_official | 340:28d1f895c6fe | 686 | hcec->Instance->TXDR = *hcec->pTxBuffPtr++; |
| mbed_official | 340:28d1f895c6fe | 687 | hcec->TxXferCount--; |
| mbed_official | 340:28d1f895c6fe | 688 | |
| mbed_official | 340:28d1f895c6fe | 689 | /* Process Unlocked */ |
| mbed_official | 340:28d1f895c6fe | 690 | __HAL_UNLOCK(hcec); |
| mbed_official | 340:28d1f895c6fe | 691 | |
| mbed_official | 340:28d1f895c6fe | 692 | return HAL_OK; |
| mbed_official | 340:28d1f895c6fe | 693 | } |
| mbed_official | 340:28d1f895c6fe | 694 | } |
| mbed_official | 340:28d1f895c6fe | 695 | else |
| mbed_official | 340:28d1f895c6fe | 696 | { |
| mbed_official | 340:28d1f895c6fe | 697 | return HAL_BUSY; |
| mbed_official | 340:28d1f895c6fe | 698 | } |
| mbed_official | 340:28d1f895c6fe | 699 | } |
| mbed_official | 340:28d1f895c6fe | 700 | |
| mbed_official | 340:28d1f895c6fe | 701 | |
| mbed_official | 340:28d1f895c6fe | 702 | /** |
| mbed_official | 340:28d1f895c6fe | 703 | * @brief Receive data in interrupt mode. |
| mbed_official | 340:28d1f895c6fe | 704 | * @param hcec: CEC handle |
| mbed_official | 340:28d1f895c6fe | 705 | * @param pData: pointer to received data buffer. |
| mbed_official | 340:28d1f895c6fe | 706 | * Note that the received data size is not known beforehand, the latter is known |
| mbed_official | 340:28d1f895c6fe | 707 | * when the reception is complete and is stored in hcec->RxXferSize. |
| mbed_official | 340:28d1f895c6fe | 708 | * hcec->RxXferSize is the sum of opcodes + operands (0 to 14 operands max). |
| mbed_official | 340:28d1f895c6fe | 709 | * If only a header is received, hcec->RxXferSize = 0 |
| mbed_official | 340:28d1f895c6fe | 710 | * @retval HAL status |
| mbed_official | 340:28d1f895c6fe | 711 | */ |
| mbed_official | 340:28d1f895c6fe | 712 | HAL_StatusTypeDef HAL_CEC_Receive_IT(CEC_HandleTypeDef *hcec, uint8_t *pData) |
| mbed_official | 340:28d1f895c6fe | 713 | { |
| mbed_official | 340:28d1f895c6fe | 714 | if(hcec->State == HAL_CEC_STATE_READY) |
| mbed_official | 340:28d1f895c6fe | 715 | { |
| mbed_official | 441:d2c15dda23c1 | 716 | if(pData == NULL ) |
| mbed_official | 340:28d1f895c6fe | 717 | { |
| mbed_official | 340:28d1f895c6fe | 718 | hcec->State = HAL_CEC_STATE_ERROR; |
| mbed_official | 340:28d1f895c6fe | 719 | return HAL_ERROR; |
| mbed_official | 340:28d1f895c6fe | 720 | } |
| mbed_official | 340:28d1f895c6fe | 721 | |
| mbed_official | 340:28d1f895c6fe | 722 | /* Process Locked */ |
| mbed_official | 340:28d1f895c6fe | 723 | __HAL_LOCK(hcec); |
| mbed_official | 340:28d1f895c6fe | 724 | hcec->RxXferSize = 0; |
| mbed_official | 340:28d1f895c6fe | 725 | hcec->pRxBuffPtr = pData; |
| mbed_official | 340:28d1f895c6fe | 726 | hcec->ErrorCode = HAL_CEC_ERROR_NONE; |
| mbed_official | 340:28d1f895c6fe | 727 | /* the IP is moving to a ready to receive state */ |
| mbed_official | 340:28d1f895c6fe | 728 | hcec->State = HAL_CEC_STATE_STANDBY_RX; |
| mbed_official | 340:28d1f895c6fe | 729 | |
| mbed_official | 340:28d1f895c6fe | 730 | /* Disable Peripheral to write CEC_IER register */ |
| mbed_official | 340:28d1f895c6fe | 731 | __HAL_CEC_DISABLE(hcec); |
| mbed_official | 340:28d1f895c6fe | 732 | |
| mbed_official | 340:28d1f895c6fe | 733 | /* Enable the following CEC Reception Error Interrupts: |
| mbed_official | 340:28d1f895c6fe | 734 | * Rx overrun |
| mbed_official | 340:28d1f895c6fe | 735 | * Rx bit rising error |
| mbed_official | 340:28d1f895c6fe | 736 | * Rx short bit period error |
| mbed_official | 340:28d1f895c6fe | 737 | * Rx long bit period error |
| mbed_official | 340:28d1f895c6fe | 738 | * Rx missing acknowledge */ |
| mbed_official | 340:28d1f895c6fe | 739 | __HAL_CEC_ENABLE_IT(hcec, CEC_IER_RX_ALL_ERR); |
| mbed_official | 340:28d1f895c6fe | 740 | |
| mbed_official | 340:28d1f895c6fe | 741 | /* Process Unlocked */ |
| mbed_official | 340:28d1f895c6fe | 742 | __HAL_UNLOCK(hcec); |
| mbed_official | 340:28d1f895c6fe | 743 | |
| mbed_official | 340:28d1f895c6fe | 744 | /* Enable the following two CEC Reception interrupts: |
| mbed_official | 340:28d1f895c6fe | 745 | * Rx Byte Received IT |
| mbed_official | 340:28d1f895c6fe | 746 | * End of Reception IT */ |
| mbed_official | 340:28d1f895c6fe | 747 | __HAL_CEC_ENABLE_IT(hcec, CEC_IER_RXBRIE|CEC_IER_RXENDIE); |
| mbed_official | 340:28d1f895c6fe | 748 | |
| mbed_official | 340:28d1f895c6fe | 749 | __HAL_CEC_ENABLE(hcec); |
| mbed_official | 340:28d1f895c6fe | 750 | |
| mbed_official | 340:28d1f895c6fe | 751 | return HAL_OK; |
| mbed_official | 340:28d1f895c6fe | 752 | } |
| mbed_official | 340:28d1f895c6fe | 753 | else |
| mbed_official | 340:28d1f895c6fe | 754 | { |
| mbed_official | 340:28d1f895c6fe | 755 | return HAL_BUSY; |
| mbed_official | 340:28d1f895c6fe | 756 | } |
| mbed_official | 340:28d1f895c6fe | 757 | } |
| mbed_official | 340:28d1f895c6fe | 758 | |
| mbed_official | 340:28d1f895c6fe | 759 | |
| mbed_official | 340:28d1f895c6fe | 760 | |
| mbed_official | 340:28d1f895c6fe | 761 | /** |
| mbed_official | 340:28d1f895c6fe | 762 | * @brief This function handles CEC interrupt requests. |
| mbed_official | 340:28d1f895c6fe | 763 | * @param hcec: CEC handle |
| mbed_official | 340:28d1f895c6fe | 764 | * @retval None |
| mbed_official | 340:28d1f895c6fe | 765 | */ |
| mbed_official | 340:28d1f895c6fe | 766 | void HAL_CEC_IRQHandler(CEC_HandleTypeDef *hcec) |
| mbed_official | 340:28d1f895c6fe | 767 | { |
| mbed_official | 340:28d1f895c6fe | 768 | /* save interrupts register for further error or interrupts handling purposes */ |
| mbed_official | 340:28d1f895c6fe | 769 | hcec->ErrorCode = hcec->Instance->ISR; |
| mbed_official | 340:28d1f895c6fe | 770 | /* CEC TX missing acknowledge error interrupt occurred -------------------------------------*/ |
| mbed_official | 340:28d1f895c6fe | 771 | if((__HAL_CEC_GET_IT(hcec, CEC_ISR_TXACKE) != RESET) && (__HAL_CEC_GET_IT_SOURCE(hcec, CEC_IER_TXACKEIE) != RESET)) |
| mbed_official | 340:28d1f895c6fe | 772 | { |
| mbed_official | 340:28d1f895c6fe | 773 | __HAL_CEC_CLEAR_FLAG(hcec, CEC_ISR_TXACKE); |
| mbed_official | 340:28d1f895c6fe | 774 | hcec->State = HAL_CEC_STATE_ERROR; |
| mbed_official | 340:28d1f895c6fe | 775 | } |
| mbed_official | 340:28d1f895c6fe | 776 | |
| mbed_official | 340:28d1f895c6fe | 777 | /* CEC transmit error interrupt occured --------------------------------------*/ |
| mbed_official | 340:28d1f895c6fe | 778 | if((__HAL_CEC_GET_IT(hcec, CEC_ISR_TXERR) != RESET) && (__HAL_CEC_GET_IT_SOURCE(hcec, CEC_IER_TXERRIE) != RESET)) |
| mbed_official | 340:28d1f895c6fe | 779 | { |
| mbed_official | 340:28d1f895c6fe | 780 | __HAL_CEC_CLEAR_FLAG(hcec, CEC_ISR_TXERR); |
| mbed_official | 340:28d1f895c6fe | 781 | hcec->State = HAL_CEC_STATE_ERROR; |
| mbed_official | 340:28d1f895c6fe | 782 | } |
| mbed_official | 340:28d1f895c6fe | 783 | |
| mbed_official | 340:28d1f895c6fe | 784 | /* CEC TX underrun error interrupt occured --------------------------------------*/ |
| mbed_official | 340:28d1f895c6fe | 785 | if((__HAL_CEC_GET_IT(hcec, CEC_ISR_TXUDR) != RESET) && (__HAL_CEC_GET_IT_SOURCE(hcec, CEC_IER_TXUDRIE) != RESET)) |
| mbed_official | 340:28d1f895c6fe | 786 | { |
| mbed_official | 340:28d1f895c6fe | 787 | __HAL_CEC_CLEAR_FLAG(hcec, CEC_ISR_TXUDR); |
| mbed_official | 340:28d1f895c6fe | 788 | hcec->State = HAL_CEC_STATE_ERROR; |
| mbed_official | 340:28d1f895c6fe | 789 | } |
| mbed_official | 340:28d1f895c6fe | 790 | |
| mbed_official | 340:28d1f895c6fe | 791 | /* CEC TX arbitration error interrupt occured --------------------------------------*/ |
| mbed_official | 340:28d1f895c6fe | 792 | if((__HAL_CEC_GET_IT(hcec, CEC_ISR_ARBLST) != RESET) && (__HAL_CEC_GET_IT_SOURCE(hcec, CEC_IER_ARBLSTIE) != RESET)) |
| mbed_official | 340:28d1f895c6fe | 793 | { |
| mbed_official | 340:28d1f895c6fe | 794 | __HAL_CEC_CLEAR_FLAG(hcec, CEC_ISR_ARBLST); |
| mbed_official | 340:28d1f895c6fe | 795 | hcec->State = HAL_CEC_STATE_ERROR; |
| mbed_official | 340:28d1f895c6fe | 796 | } |
| mbed_official | 340:28d1f895c6fe | 797 | |
| mbed_official | 340:28d1f895c6fe | 798 | /* CEC RX overrun error interrupt occured --------------------------------------*/ |
| mbed_official | 340:28d1f895c6fe | 799 | if((__HAL_CEC_GET_IT(hcec, CEC_ISR_RXOVR) != RESET) && (__HAL_CEC_GET_IT_SOURCE(hcec, CEC_IER_RXOVRIE) != RESET)) |
| mbed_official | 340:28d1f895c6fe | 800 | { |
| mbed_official | 340:28d1f895c6fe | 801 | __HAL_CEC_CLEAR_FLAG(hcec, CEC_ISR_RXOVR); |
| mbed_official | 340:28d1f895c6fe | 802 | hcec->State = HAL_CEC_STATE_ERROR; |
| mbed_official | 340:28d1f895c6fe | 803 | } |
| mbed_official | 340:28d1f895c6fe | 804 | |
| mbed_official | 340:28d1f895c6fe | 805 | /* CEC RX bit rising error interrupt occured --------------------------------------*/ |
| mbed_official | 340:28d1f895c6fe | 806 | if((__HAL_CEC_GET_IT(hcec, CEC_ISR_BRE) != RESET) && (__HAL_CEC_GET_IT_SOURCE(hcec, CEC_IER_BREIE) != RESET)) |
| mbed_official | 340:28d1f895c6fe | 807 | { |
| mbed_official | 340:28d1f895c6fe | 808 | __HAL_CEC_CLEAR_FLAG(hcec, CEC_ISR_BRE); |
| mbed_official | 340:28d1f895c6fe | 809 | hcec->State = HAL_CEC_STATE_ERROR; |
| mbed_official | 340:28d1f895c6fe | 810 | } |
| mbed_official | 340:28d1f895c6fe | 811 | |
| mbed_official | 340:28d1f895c6fe | 812 | /* CEC RX short bit period error interrupt occured --------------------------------------*/ |
| mbed_official | 340:28d1f895c6fe | 813 | if((__HAL_CEC_GET_IT(hcec, CEC_ISR_SBPE) != RESET) && (__HAL_CEC_GET_IT_SOURCE(hcec, CEC_IER_SBPEIE) != RESET)) |
| mbed_official | 340:28d1f895c6fe | 814 | { |
| mbed_official | 340:28d1f895c6fe | 815 | __HAL_CEC_CLEAR_FLAG(hcec, CEC_ISR_SBPE); |
| mbed_official | 340:28d1f895c6fe | 816 | hcec->State = HAL_CEC_STATE_ERROR; |
| mbed_official | 340:28d1f895c6fe | 817 | } |
| mbed_official | 340:28d1f895c6fe | 818 | |
| mbed_official | 340:28d1f895c6fe | 819 | /* CEC RX long bit period error interrupt occured --------------------------------------*/ |
| mbed_official | 340:28d1f895c6fe | 820 | if((__HAL_CEC_GET_IT(hcec, CEC_ISR_LBPE) != RESET) && (__HAL_CEC_GET_IT_SOURCE(hcec, CEC_IER_LBPEIE) != RESET)) |
| mbed_official | 340:28d1f895c6fe | 821 | { |
| mbed_official | 340:28d1f895c6fe | 822 | __HAL_CEC_CLEAR_FLAG(hcec, CEC_ISR_LBPE); |
| mbed_official | 340:28d1f895c6fe | 823 | hcec->State = HAL_CEC_STATE_ERROR; |
| mbed_official | 340:28d1f895c6fe | 824 | } |
| mbed_official | 340:28d1f895c6fe | 825 | |
| mbed_official | 340:28d1f895c6fe | 826 | /* CEC RX missing acknowledge error interrupt occured --------------------------------------*/ |
| mbed_official | 340:28d1f895c6fe | 827 | if((__HAL_CEC_GET_IT(hcec, CEC_ISR_RXACKE) != RESET) && (__HAL_CEC_GET_IT_SOURCE(hcec, CEC_IER_RXACKEIE) != RESET)) |
| mbed_official | 340:28d1f895c6fe | 828 | { |
| mbed_official | 340:28d1f895c6fe | 829 | __HAL_CEC_CLEAR_FLAG(hcec, CEC_ISR_RXACKE); |
| mbed_official | 340:28d1f895c6fe | 830 | hcec->State = HAL_CEC_STATE_ERROR; |
| mbed_official | 340:28d1f895c6fe | 831 | } |
| mbed_official | 340:28d1f895c6fe | 832 | |
| mbed_official | 340:28d1f895c6fe | 833 | if ((hcec->ErrorCode & CEC_ISR_ALL_ERROR) != 0) |
| mbed_official | 340:28d1f895c6fe | 834 | { |
| mbed_official | 340:28d1f895c6fe | 835 | HAL_CEC_ErrorCallback(hcec); |
| mbed_official | 340:28d1f895c6fe | 836 | } |
| mbed_official | 340:28d1f895c6fe | 837 | |
| mbed_official | 340:28d1f895c6fe | 838 | /* CEC RX byte received interrupt ---------------------------------------------------*/ |
| mbed_official | 340:28d1f895c6fe | 839 | if((__HAL_CEC_GET_IT(hcec, CEC_ISR_RXBR) != RESET) && (__HAL_CEC_GET_IT_SOURCE(hcec, CEC_IER_RXBRIE) != RESET)) |
| mbed_official | 340:28d1f895c6fe | 840 | { |
| mbed_official | 340:28d1f895c6fe | 841 | /* RXBR IT is cleared during HAL_CEC_Transmit_IT processing */ |
| mbed_official | 340:28d1f895c6fe | 842 | CEC_Receive_IT(hcec); |
| mbed_official | 340:28d1f895c6fe | 843 | } |
| mbed_official | 340:28d1f895c6fe | 844 | |
| mbed_official | 340:28d1f895c6fe | 845 | /* CEC RX end received interrupt ---------------------------------------------------*/ |
| mbed_official | 340:28d1f895c6fe | 846 | if((__HAL_CEC_GET_IT(hcec, CEC_ISR_RXEND) != RESET) && (__HAL_CEC_GET_IT_SOURCE(hcec, CEC_IER_RXENDIE) != RESET)) |
| mbed_official | 340:28d1f895c6fe | 847 | { |
| mbed_official | 340:28d1f895c6fe | 848 | /* RXBR IT is cleared during HAL_CEC_Transmit_IT processing */ |
| mbed_official | 340:28d1f895c6fe | 849 | CEC_Receive_IT(hcec); |
| mbed_official | 340:28d1f895c6fe | 850 | } |
| mbed_official | 340:28d1f895c6fe | 851 | |
| mbed_official | 340:28d1f895c6fe | 852 | |
| mbed_official | 340:28d1f895c6fe | 853 | /* CEC TX byte request interrupt ------------------------------------------------*/ |
| mbed_official | 340:28d1f895c6fe | 854 | if((__HAL_CEC_GET_IT(hcec, CEC_ISR_TXBR) != RESET) &&(__HAL_CEC_GET_IT_SOURCE(hcec, CEC_IER_TXBRIE) != RESET)) |
| mbed_official | 340:28d1f895c6fe | 855 | { |
| mbed_official | 340:28d1f895c6fe | 856 | /* TXBR IT is cleared during HAL_CEC_Transmit_IT processing */ |
| mbed_official | 340:28d1f895c6fe | 857 | CEC_Transmit_IT(hcec); |
| mbed_official | 340:28d1f895c6fe | 858 | } |
| mbed_official | 340:28d1f895c6fe | 859 | |
| mbed_official | 340:28d1f895c6fe | 860 | /* CEC TX end interrupt ------------------------------------------------*/ |
| mbed_official | 340:28d1f895c6fe | 861 | if((__HAL_CEC_GET_IT(hcec, CEC_ISR_TXEND) != RESET) &&(__HAL_CEC_GET_IT_SOURCE(hcec, CEC_IER_TXENDIE) != RESET)) |
| mbed_official | 340:28d1f895c6fe | 862 | { |
| mbed_official | 340:28d1f895c6fe | 863 | /* TXEND IT is cleared during HAL_CEC_Transmit_IT processing */ |
| mbed_official | 340:28d1f895c6fe | 864 | CEC_Transmit_IT(hcec); |
| mbed_official | 340:28d1f895c6fe | 865 | } |
| mbed_official | 340:28d1f895c6fe | 866 | |
| mbed_official | 340:28d1f895c6fe | 867 | } |
| mbed_official | 340:28d1f895c6fe | 868 | |
| mbed_official | 340:28d1f895c6fe | 869 | |
| mbed_official | 340:28d1f895c6fe | 870 | /** |
| mbed_official | 340:28d1f895c6fe | 871 | * @brief Tx Transfer completed callback |
| mbed_official | 340:28d1f895c6fe | 872 | * @param hcec: CEC handle |
| mbed_official | 340:28d1f895c6fe | 873 | * @retval None |
| mbed_official | 340:28d1f895c6fe | 874 | */ |
| mbed_official | 340:28d1f895c6fe | 875 | __weak void HAL_CEC_TxCpltCallback(CEC_HandleTypeDef *hcec) |
| mbed_official | 340:28d1f895c6fe | 876 | { |
| mbed_official | 340:28d1f895c6fe | 877 | /* NOTE : This function should not be modified, when the callback is needed, |
| mbed_official | 340:28d1f895c6fe | 878 | the HAL_CEC_TxCpltCallback can be implemented in the user file |
| mbed_official | 340:28d1f895c6fe | 879 | */ |
| mbed_official | 340:28d1f895c6fe | 880 | } |
| mbed_official | 340:28d1f895c6fe | 881 | |
| mbed_official | 340:28d1f895c6fe | 882 | /** |
| mbed_official | 340:28d1f895c6fe | 883 | * @brief Rx Transfer completed callback |
| mbed_official | 340:28d1f895c6fe | 884 | * @param hcec: CEC handle |
| mbed_official | 340:28d1f895c6fe | 885 | * @retval None |
| mbed_official | 340:28d1f895c6fe | 886 | */ |
| mbed_official | 340:28d1f895c6fe | 887 | __weak void HAL_CEC_RxCpltCallback(CEC_HandleTypeDef *hcec) |
| mbed_official | 340:28d1f895c6fe | 888 | { |
| mbed_official | 340:28d1f895c6fe | 889 | /* NOTE : This function should not be modified, when the callback is needed, |
| mbed_official | 340:28d1f895c6fe | 890 | the HAL_CEC_TxCpltCallback can be implemented in the user file |
| mbed_official | 340:28d1f895c6fe | 891 | */ |
| mbed_official | 340:28d1f895c6fe | 892 | } |
| mbed_official | 340:28d1f895c6fe | 893 | |
| mbed_official | 340:28d1f895c6fe | 894 | /** |
| mbed_official | 340:28d1f895c6fe | 895 | * @brief CEC error callbacks |
| mbed_official | 340:28d1f895c6fe | 896 | * @param hcec: CEC handle |
| mbed_official | 340:28d1f895c6fe | 897 | * @retval None |
| mbed_official | 340:28d1f895c6fe | 898 | */ |
| mbed_official | 340:28d1f895c6fe | 899 | __weak void HAL_CEC_ErrorCallback(CEC_HandleTypeDef *hcec) |
| mbed_official | 340:28d1f895c6fe | 900 | { |
| mbed_official | 340:28d1f895c6fe | 901 | /* NOTE : This function should not be modified, when the callback is needed, |
| mbed_official | 340:28d1f895c6fe | 902 | the HAL_CEC_ErrorCallback can be implemented in the user file |
| mbed_official | 340:28d1f895c6fe | 903 | */ |
| mbed_official | 340:28d1f895c6fe | 904 | } |
| mbed_official | 340:28d1f895c6fe | 905 | |
| mbed_official | 340:28d1f895c6fe | 906 | /** |
| mbed_official | 340:28d1f895c6fe | 907 | * @} |
| mbed_official | 340:28d1f895c6fe | 908 | */ |
| mbed_official | 340:28d1f895c6fe | 909 | |
| mbed_official | 340:28d1f895c6fe | 910 | /** @defgroup CEC_Exported_Functions_Group3 Peripheral Control function |
| mbed_official | 340:28d1f895c6fe | 911 | * @brief CEC control functions |
| mbed_official | 340:28d1f895c6fe | 912 | * |
| mbed_official | 340:28d1f895c6fe | 913 | @verbatim |
| mbed_official | 340:28d1f895c6fe | 914 | =============================================================================== |
| mbed_official | 340:28d1f895c6fe | 915 | ##### Peripheral Control function ##### |
| mbed_official | 340:28d1f895c6fe | 916 | =============================================================================== |
| mbed_official | 340:28d1f895c6fe | 917 | [..] |
| mbed_official | 340:28d1f895c6fe | 918 | This subsection provides a set of functions allowing to control the CEC. |
| mbed_official | 340:28d1f895c6fe | 919 | (+) HAL_CEC_GetState() API can be helpful to check in run-time the state of the CEC peripheral. |
| mbed_official | 340:28d1f895c6fe | 920 | @endverbatim |
| mbed_official | 340:28d1f895c6fe | 921 | * @{ |
| mbed_official | 340:28d1f895c6fe | 922 | */ |
| mbed_official | 340:28d1f895c6fe | 923 | |
| mbed_official | 340:28d1f895c6fe | 924 | /** |
| mbed_official | 340:28d1f895c6fe | 925 | * @brief return the CEC state |
| mbed_official | 340:28d1f895c6fe | 926 | * @param hcec: CEC handle |
| mbed_official | 340:28d1f895c6fe | 927 | * @retval HAL state |
| mbed_official | 340:28d1f895c6fe | 928 | */ |
| mbed_official | 340:28d1f895c6fe | 929 | HAL_CEC_StateTypeDef HAL_CEC_GetState(CEC_HandleTypeDef *hcec) |
| mbed_official | 340:28d1f895c6fe | 930 | { |
| mbed_official | 340:28d1f895c6fe | 931 | return hcec->State; |
| mbed_official | 340:28d1f895c6fe | 932 | } |
| mbed_official | 340:28d1f895c6fe | 933 | |
| mbed_official | 340:28d1f895c6fe | 934 | /** |
| mbed_official | 340:28d1f895c6fe | 935 | * @brief Return the CEC error code |
| mbed_official | 340:28d1f895c6fe | 936 | * @param hcec : pointer to a CEC_HandleTypeDef structure that contains |
| mbed_official | 340:28d1f895c6fe | 937 | * the configuration information for the specified CEC. |
| mbed_official | 340:28d1f895c6fe | 938 | * @retval CEC Error Code |
| mbed_official | 340:28d1f895c6fe | 939 | */ |
| mbed_official | 340:28d1f895c6fe | 940 | uint32_t HAL_CEC_GetError(CEC_HandleTypeDef *hcec) |
| mbed_official | 340:28d1f895c6fe | 941 | { |
| mbed_official | 340:28d1f895c6fe | 942 | return hcec->ErrorCode; |
| mbed_official | 340:28d1f895c6fe | 943 | } |
| mbed_official | 340:28d1f895c6fe | 944 | |
| mbed_official | 340:28d1f895c6fe | 945 | /** |
| mbed_official | 340:28d1f895c6fe | 946 | * @} |
| mbed_official | 340:28d1f895c6fe | 947 | */ |
| mbed_official | 340:28d1f895c6fe | 948 | |
| mbed_official | 340:28d1f895c6fe | 949 | /** |
| mbed_official | 340:28d1f895c6fe | 950 | * @} |
| mbed_official | 340:28d1f895c6fe | 951 | */ |
| mbed_official | 340:28d1f895c6fe | 952 | |
| mbed_official | 340:28d1f895c6fe | 953 | /** @defgroup CEC_Private_Functions CEC Private Functions |
| mbed_official | 340:28d1f895c6fe | 954 | * @{ |
| mbed_official | 340:28d1f895c6fe | 955 | */ |
| mbed_official | 340:28d1f895c6fe | 956 | |
| mbed_official | 340:28d1f895c6fe | 957 | /** |
| mbed_official | 340:28d1f895c6fe | 958 | * @brief Send data in interrupt mode |
| mbed_official | 340:28d1f895c6fe | 959 | * @param hcec: CEC handle. |
| mbed_official | 340:28d1f895c6fe | 960 | * Function called under interruption only, once |
| mbed_official | 340:28d1f895c6fe | 961 | * interruptions have been enabled by HAL_CEC_Transmit_IT() |
| mbed_official | 340:28d1f895c6fe | 962 | * @retval HAL status |
| mbed_official | 340:28d1f895c6fe | 963 | */ |
| mbed_official | 340:28d1f895c6fe | 964 | static HAL_StatusTypeDef CEC_Transmit_IT(CEC_HandleTypeDef *hcec) |
| mbed_official | 340:28d1f895c6fe | 965 | { |
| mbed_official | 340:28d1f895c6fe | 966 | /* if the IP is already busy or if there is a previous transmission |
| mbed_official | 340:28d1f895c6fe | 967 | already pending due to arbitration loss */ |
| mbed_official | 340:28d1f895c6fe | 968 | if ((hcec->State == HAL_CEC_STATE_BUSY_TX) |
| mbed_official | 340:28d1f895c6fe | 969 | || (__HAL_CEC_GET_TRANSMISSION_START_FLAG(hcec) != RESET)) |
| mbed_official | 340:28d1f895c6fe | 970 | { |
| mbed_official | 340:28d1f895c6fe | 971 | |
| mbed_official | 340:28d1f895c6fe | 972 | /* set state to BUSY TX, in case it wasn't set already (case |
| mbed_official | 340:28d1f895c6fe | 973 | * of transmission new attempt after arbitration loss) */ |
| mbed_official | 340:28d1f895c6fe | 974 | if (hcec->State != HAL_CEC_STATE_BUSY_TX) |
| mbed_official | 340:28d1f895c6fe | 975 | { |
| mbed_official | 340:28d1f895c6fe | 976 | hcec->State = HAL_CEC_STATE_BUSY_TX; |
| mbed_official | 340:28d1f895c6fe | 977 | } |
| mbed_official | 340:28d1f895c6fe | 978 | |
| mbed_official | 340:28d1f895c6fe | 979 | /* if all data have been sent */ |
| mbed_official | 340:28d1f895c6fe | 980 | if(hcec->TxXferCount == 0) |
| mbed_official | 340:28d1f895c6fe | 981 | { |
| mbed_official | 340:28d1f895c6fe | 982 | /* Disable Peripheral to write CEC_IER register */ |
| mbed_official | 340:28d1f895c6fe | 983 | __HAL_CEC_DISABLE(hcec); |
| mbed_official | 340:28d1f895c6fe | 984 | |
| mbed_official | 340:28d1f895c6fe | 985 | /* Disable the CEC Transmission Interrupts */ |
| mbed_official | 340:28d1f895c6fe | 986 | __HAL_CEC_DISABLE_IT(hcec, CEC_IER_TXBRIE|CEC_IER_TXENDIE); |
| mbed_official | 340:28d1f895c6fe | 987 | /* Disable the CEC Transmission Error Interrupts */ |
| mbed_official | 340:28d1f895c6fe | 988 | __HAL_CEC_DISABLE_IT(hcec, CEC_IER_TX_ALL_ERR); |
| mbed_official | 340:28d1f895c6fe | 989 | |
| mbed_official | 340:28d1f895c6fe | 990 | /* Enable the Peripheral */ |
| mbed_official | 340:28d1f895c6fe | 991 | __HAL_CEC_ENABLE(hcec); |
| mbed_official | 340:28d1f895c6fe | 992 | |
| mbed_official | 340:28d1f895c6fe | 993 | __HAL_CEC_CLEAR_FLAG(hcec,CEC_ISR_TXBR|CEC_ISR_TXEND); |
| mbed_official | 441:d2c15dda23c1 | 994 | |
| mbed_official | 441:d2c15dda23c1 | 995 | /* If RX interruptions are enabled, return to HAL_CEC_STATE_STANDBY_RX state */ |
| mbed_official | 441:d2c15dda23c1 | 996 | if (__HAL_CEC_GET_IT_SOURCE(hcec, (CEC_IER_RXBRIE|CEC_IER_RXENDIE) ) != RESET) |
| mbed_official | 441:d2c15dda23c1 | 997 | { |
| mbed_official | 441:d2c15dda23c1 | 998 | hcec->State = HAL_CEC_STATE_STANDBY_RX; |
| mbed_official | 441:d2c15dda23c1 | 999 | } |
| mbed_official | 441:d2c15dda23c1 | 1000 | else |
| mbed_official | 441:d2c15dda23c1 | 1001 | { |
| mbed_official | 441:d2c15dda23c1 | 1002 | hcec->State = HAL_CEC_STATE_READY; |
| mbed_official | 441:d2c15dda23c1 | 1003 | } |
| mbed_official | 340:28d1f895c6fe | 1004 | |
| mbed_official | 340:28d1f895c6fe | 1005 | HAL_CEC_TxCpltCallback(hcec); |
| mbed_official | 340:28d1f895c6fe | 1006 | |
| mbed_official | 340:28d1f895c6fe | 1007 | return HAL_OK; |
| mbed_official | 340:28d1f895c6fe | 1008 | } |
| mbed_official | 340:28d1f895c6fe | 1009 | else |
| mbed_official | 340:28d1f895c6fe | 1010 | { |
| mbed_official | 340:28d1f895c6fe | 1011 | if (hcec->TxXferCount == 1) |
| mbed_official | 340:28d1f895c6fe | 1012 | { |
| mbed_official | 340:28d1f895c6fe | 1013 | /* if this is the last byte transmission, set TX End of Message (TXEOM) bit */ |
| mbed_official | 340:28d1f895c6fe | 1014 | __HAL_CEC_LAST_BYTE_TX_SET(hcec); |
| mbed_official | 340:28d1f895c6fe | 1015 | } |
| mbed_official | 340:28d1f895c6fe | 1016 | /* clear Tx-Byte request flag */ |
| mbed_official | 340:28d1f895c6fe | 1017 | __HAL_CEC_CLEAR_FLAG(hcec,CEC_ISR_TXBR); |
| mbed_official | 340:28d1f895c6fe | 1018 | hcec->Instance->TXDR = *hcec->pTxBuffPtr++; |
| mbed_official | 340:28d1f895c6fe | 1019 | hcec->TxXferCount--; |
| mbed_official | 340:28d1f895c6fe | 1020 | |
| mbed_official | 340:28d1f895c6fe | 1021 | return HAL_OK; |
| mbed_official | 340:28d1f895c6fe | 1022 | } |
| mbed_official | 340:28d1f895c6fe | 1023 | } |
| mbed_official | 340:28d1f895c6fe | 1024 | else |
| mbed_official | 340:28d1f895c6fe | 1025 | { |
| mbed_official | 340:28d1f895c6fe | 1026 | return HAL_BUSY; |
| mbed_official | 340:28d1f895c6fe | 1027 | } |
| mbed_official | 340:28d1f895c6fe | 1028 | } |
| mbed_official | 340:28d1f895c6fe | 1029 | |
| mbed_official | 340:28d1f895c6fe | 1030 | |
| mbed_official | 340:28d1f895c6fe | 1031 | /** |
| mbed_official | 340:28d1f895c6fe | 1032 | * @brief Receive data in interrupt mode. |
| mbed_official | 340:28d1f895c6fe | 1033 | * @param hcec: CEC handle. |
| mbed_official | 340:28d1f895c6fe | 1034 | * Function called under interruption only, once |
| mbed_official | 340:28d1f895c6fe | 1035 | * interruptions have been enabled by HAL_CEC_Receive_IT() |
| mbed_official | 340:28d1f895c6fe | 1036 | * @retval HAL status |
| mbed_official | 340:28d1f895c6fe | 1037 | */ |
| mbed_official | 340:28d1f895c6fe | 1038 | static HAL_StatusTypeDef CEC_Receive_IT(CEC_HandleTypeDef *hcec) |
| mbed_official | 340:28d1f895c6fe | 1039 | { |
| mbed_official | 340:28d1f895c6fe | 1040 | uint32_t tempisr; |
| mbed_official | 340:28d1f895c6fe | 1041 | |
| mbed_official | 340:28d1f895c6fe | 1042 | /* Three different conditions are tested to carry out the RX IT processing: |
| mbed_official | 340:28d1f895c6fe | 1043 | * - the IP is in reception stand-by (the IP state is HAL_CEC_STATE_STANDBY_RX) and |
| mbed_official | 340:28d1f895c6fe | 1044 | * the reception of the first byte is starting |
| mbed_official | 340:28d1f895c6fe | 1045 | * - a message reception is already on-going (the IP state is HAL_CEC_STATE_BUSY_RX) |
| mbed_official | 340:28d1f895c6fe | 1046 | * and a new byte is being received |
| mbed_official | 340:28d1f895c6fe | 1047 | * - a transmission has just been started (the IP state is HAL_CEC_STATE_BUSY_TX) |
| mbed_official | 340:28d1f895c6fe | 1048 | * but has been interrupted by a new message reception or discarded due to |
| mbed_official | 340:28d1f895c6fe | 1049 | * arbitration loss: the reception of the first or higher priority message |
| mbed_official | 340:28d1f895c6fe | 1050 | * (the arbitration winner) is starting */ |
| mbed_official | 340:28d1f895c6fe | 1051 | if ((hcec->State == HAL_CEC_STATE_STANDBY_RX) |
| mbed_official | 340:28d1f895c6fe | 1052 | || (hcec->State == HAL_CEC_STATE_BUSY_RX) |
| mbed_official | 340:28d1f895c6fe | 1053 | || (hcec->State == HAL_CEC_STATE_BUSY_TX)) |
| mbed_official | 340:28d1f895c6fe | 1054 | { |
| mbed_official | 340:28d1f895c6fe | 1055 | /* reception is starting */ |
| mbed_official | 340:28d1f895c6fe | 1056 | hcec->State = HAL_CEC_STATE_BUSY_RX; |
| mbed_official | 340:28d1f895c6fe | 1057 | tempisr = (uint32_t) (hcec->Instance->ISR); |
| mbed_official | 340:28d1f895c6fe | 1058 | if ((tempisr & CEC_ISR_RXBR) != 0) |
| mbed_official | 340:28d1f895c6fe | 1059 | { |
| mbed_official | 340:28d1f895c6fe | 1060 | /* read received byte */ |
| mbed_official | 340:28d1f895c6fe | 1061 | *hcec->pRxBuffPtr++ = hcec->Instance->RXDR; |
| mbed_official | 340:28d1f895c6fe | 1062 | /* if last byte has been received */ |
| mbed_official | 340:28d1f895c6fe | 1063 | if ((tempisr & CEC_ISR_RXEND) != 0) |
| mbed_official | 340:28d1f895c6fe | 1064 | { |
| mbed_official | 340:28d1f895c6fe | 1065 | /* clear IT */ |
| mbed_official | 340:28d1f895c6fe | 1066 | __HAL_CEC_CLEAR_FLAG(hcec,CEC_ISR_RXBR|CEC_ISR_RXEND); |
| mbed_official | 340:28d1f895c6fe | 1067 | /* RX interrupts are not disabled at this point. |
| mbed_official | 340:28d1f895c6fe | 1068 | * Indeed, to disable the IT, the IP must be disabled first |
| mbed_official | 340:28d1f895c6fe | 1069 | * which resets the TXSOM flag. In case of arbitration loss, |
| mbed_official | 340:28d1f895c6fe | 1070 | * this leads to a transmission abort. |
| mbed_official | 340:28d1f895c6fe | 1071 | * Therefore, RX interruptions disabling if so required, |
| mbed_official | 340:28d1f895c6fe | 1072 | * is done in HAL_CEC_RxCpltCallback */ |
| mbed_official | 340:28d1f895c6fe | 1073 | |
| mbed_official | 340:28d1f895c6fe | 1074 | /* IP state is moved to READY. |
| mbed_official | 340:28d1f895c6fe | 1075 | * If the IP must remain in standby mode to listen |
| mbed_official | 340:28d1f895c6fe | 1076 | * any new message, it is up to HAL_CEC_RxCpltCallback |
| mbed_official | 340:28d1f895c6fe | 1077 | * to move it again to HAL_CEC_STATE_STANDBY_RX */ |
| mbed_official | 340:28d1f895c6fe | 1078 | hcec->State = HAL_CEC_STATE_READY; |
| mbed_official | 340:28d1f895c6fe | 1079 | |
| mbed_official | 340:28d1f895c6fe | 1080 | HAL_CEC_RxCpltCallback(hcec); |
| mbed_official | 340:28d1f895c6fe | 1081 | |
| mbed_official | 340:28d1f895c6fe | 1082 | return HAL_OK; |
| mbed_official | 340:28d1f895c6fe | 1083 | } |
| mbed_official | 340:28d1f895c6fe | 1084 | __HAL_CEC_CLEAR_FLAG(hcec, CEC_ISR_RXBR); |
| mbed_official | 340:28d1f895c6fe | 1085 | |
| mbed_official | 340:28d1f895c6fe | 1086 | hcec->RxXferSize++; |
| mbed_official | 340:28d1f895c6fe | 1087 | |
| mbed_official | 340:28d1f895c6fe | 1088 | return HAL_OK; |
| mbed_official | 340:28d1f895c6fe | 1089 | } |
| mbed_official | 340:28d1f895c6fe | 1090 | else |
| mbed_official | 340:28d1f895c6fe | 1091 | { |
| mbed_official | 340:28d1f895c6fe | 1092 | return HAL_BUSY; |
| mbed_official | 340:28d1f895c6fe | 1093 | } |
| mbed_official | 340:28d1f895c6fe | 1094 | } |
| mbed_official | 340:28d1f895c6fe | 1095 | else |
| mbed_official | 340:28d1f895c6fe | 1096 | { |
| mbed_official | 340:28d1f895c6fe | 1097 | return HAL_BUSY; |
| mbed_official | 340:28d1f895c6fe | 1098 | } |
| mbed_official | 340:28d1f895c6fe | 1099 | } |
| mbed_official | 340:28d1f895c6fe | 1100 | |
| mbed_official | 340:28d1f895c6fe | 1101 | /** |
| mbed_official | 340:28d1f895c6fe | 1102 | * @} |
| mbed_official | 340:28d1f895c6fe | 1103 | */ |
| mbed_official | 340:28d1f895c6fe | 1104 | |
| mbed_official | 340:28d1f895c6fe | 1105 | /** |
| mbed_official | 340:28d1f895c6fe | 1106 | * @} |
| mbed_official | 340:28d1f895c6fe | 1107 | */ |
| mbed_official | 340:28d1f895c6fe | 1108 | |
| mbed_official | 340:28d1f895c6fe | 1109 | /** |
| mbed_official | 340:28d1f895c6fe | 1110 | * @} |
| mbed_official | 340:28d1f895c6fe | 1111 | */ |
| mbed_official | 340:28d1f895c6fe | 1112 | |
| mbed_official | 441:d2c15dda23c1 | 1113 | #endif /* defined(STM32F042x6) || defined(STM32F048xx) || defined(STM32F051x8) || defined(STM32F058xx) || */ |
| mbed_official | 441:d2c15dda23c1 | 1114 | /* defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx) || */ |
| mbed_official | 441:d2c15dda23c1 | 1115 | /* defined(STM32F091xC) || defined (STM32F098xx) */ |
| mbed_official | 441:d2c15dda23c1 | 1116 | |
| mbed_official | 441:d2c15dda23c1 | 1117 | #endif /* HAL_CEC_MODULE_ENABLED */ |
| mbed_official | 441:d2c15dda23c1 | 1118 | |
| mbed_official | 340:28d1f895c6fe | 1119 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |