gabriel della-monica / mbed-src

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targets/hal/TARGET_STM/TARGET_NUCLEO_F103RB/us_ticker.c@445:9a3ffe6cfa19, 2015-01-14 (annotated)

Committer:
moirans2
Date:
Wed Jan 14 20:53:08 2015 +0000
Revision:
445:9a3ffe6cfa19
Parent:
402:09075a3b15e3 
internal clock stm32L051

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 52:a51c77007319 1 /* mbed Microcontroller Library
mbed_official 70:c1fbde68b492 2 * Copyright (c) 2014, STMicroelectronics
mbed_official 70:c1fbde68b492 3 * All rights reserved.
mbed_official 52:a51c77007319 4 *
mbed_official 70:c1fbde68b492 5 * Redistribution and use in source and binary forms, with or without
mbed_official 70:c1fbde68b492 6 * modification, are permitted provided that the following conditions are met:
mbed_official 52:a51c77007319 7 *
mbed_official 70:c1fbde68b492 8 * 1. Redistributions of source code must retain the above copyright notice,
mbed_official 70:c1fbde68b492 9 * this list of conditions and the following disclaimer.
mbed_official 70:c1fbde68b492 10 * 2. Redistributions in binary form must reproduce the above copyright notice,
mbed_official 70:c1fbde68b492 11 * this list of conditions and the following disclaimer in the documentation
mbed_official 70:c1fbde68b492 12 * and/or other materials provided with the distribution.
mbed_official 70:c1fbde68b492 13 * 3. Neither the name of STMicroelectronics nor the names of its contributors
mbed_official 70:c1fbde68b492 14 * may be used to endorse or promote products derived from this software
mbed_official 70:c1fbde68b492 15 * without specific prior written permission.
mbed_official 52:a51c77007319 16 *
mbed_official 70:c1fbde68b492 17 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
mbed_official 70:c1fbde68b492 18 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
mbed_official 70:c1fbde68b492 19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
mbed_official 70:c1fbde68b492 20 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
mbed_official 70:c1fbde68b492 21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
mbed_official 70:c1fbde68b492 22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
mbed_official 70:c1fbde68b492 23 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
mbed_official 70:c1fbde68b492 24 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
mbed_official 70:c1fbde68b492 25 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
mbed_official 70:c1fbde68b492 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
mbed_official 52:a51c77007319 27 */
mbed_official 52:a51c77007319 28 #include <stddef.h>
mbed_official 52:a51c77007319 29 #include "us_ticker_api.h"
mbed_official 52:a51c77007319 30 #include "PeripheralNames.h"
mbed_official 52:a51c77007319 31
mbed_official 84:f54042cbc282 32 // Timer selection:
mbed_official 167:d5744491c362 33 #define TIM_MST TIM4
mbed_official 167:d5744491c362 34 #define TIM_MST_IRQ TIM4_IRQn
mbed_official 167:d5744491c362 35 #define TIM_MST_RCC RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM4, ENABLE)
mbed_official 76:aeb1df146756 36
mbed_official 84:f54042cbc282 37 static int us_ticker_inited = 0;
mbed_official 92:05f19f05c134 38 static volatile uint32_t SlaveCounter = 0;
mbed_official 96:c359415e941f 39 static volatile uint32_t oc_int_part = 0;
mbed_official 96:c359415e941f 40 static volatile uint16_t oc_rem_part = 0;
mbed_official 91:0a39e62a0464 41
mbed_official 402:09075a3b15e3 42 void set_compare(uint16_t count)
mbed_official 402:09075a3b15e3 43 {
mbed_official 91:0a39e62a0464 44 // Set new output compare value
mbed_official 91:0a39e62a0464 45 TIM_SetCompare1(TIM_MST, count);
mbed_official 91:0a39e62a0464 46 // Enable IT
mbed_official 91:0a39e62a0464 47 TIM_ITConfig(TIM_MST, TIM_IT_CC1, ENABLE);
mbed_official 91:0a39e62a0464 48 }
mbed_official 84:f54042cbc282 49
mbed_official 402:09075a3b15e3 50 static void tim_irq_handler(void)
mbed_official 402:09075a3b15e3 51 {
mbed_official 167:d5744491c362 52 uint16_t cval = TIM_MST->CNT;
mbed_official 167:d5744491c362 53
mbed_official 84:f54042cbc282 54 if (TIM_GetITStatus(TIM_MST, TIM_IT_Update) == SET) {
mbed_official 84:f54042cbc282 55 TIM_ClearITPendingBit(TIM_MST, TIM_IT_Update);
mbed_official 94:6519f69185ce 56 SlaveCounter++;
mbed_official 84:f54042cbc282 57 }
mbed_official 76:aeb1df146756 58
mbed_official 84:f54042cbc282 59 if (TIM_GetITStatus(TIM_MST, TIM_IT_CC1) == SET) {
mbed_official 84:f54042cbc282 60 TIM_ClearITPendingBit(TIM_MST, TIM_IT_CC1);
mbed_official 167:d5744491c362 61 if (oc_rem_part > 0) {
mbed_official 167:d5744491c362 62 set_compare(oc_rem_part); // Finish the remaining time left
mbed_official 167:d5744491c362 63 oc_rem_part = 0;
mbed_official 174:8bb9f3a33240 64 } else {
mbed_official 167:d5744491c362 65 if (oc_int_part > 0) {
mbed_official 169:60881100c991 66 set_compare(0xFFFF);
mbed_official 169:60881100c991 67 oc_rem_part = cval; // To finish the counter loop the next time
mbed_official 167:d5744491c362 68 oc_int_part--;
mbed_official 174:8bb9f3a33240 69 } else {
mbed_official 167:d5744491c362 70 us_ticker_irq_handler();
mbed_official 167:d5744491c362 71 }
mbed_official 84:f54042cbc282 72 }
mbed_official 91:0a39e62a0464 73 }
mbed_official 84:f54042cbc282 74 }
mbed_official 76:aeb1df146756 75
mbed_official 402:09075a3b15e3 76 void us_ticker_init(void)
mbed_official 402:09075a3b15e3 77 {
mbed_official 52:a51c77007319 78 TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure;
mbed_official 174:8bb9f3a33240 79
mbed_official 52:a51c77007319 80 if (us_ticker_inited) return;
mbed_official 52:a51c77007319 81 us_ticker_inited = 1;
mbed_official 174:8bb9f3a33240 82
mbed_official 174:8bb9f3a33240 83 // Enable timer clock
mbed_official 76:aeb1df146756 84 TIM_MST_RCC;
mbed_official 174:8bb9f3a33240 85
mbed_official 84:f54042cbc282 86 // Configure time base
mbed_official 54:24d77221bceb 87 TIM_TimeBaseStructInit(&TIM_TimeBaseStructure);
mbed_official 52:a51c77007319 88 TIM_TimeBaseStructure.TIM_Period = 0xFFFF;
mbed_official 304:89b9c3a9a045 89 TIM_TimeBaseStructure.TIM_Prescaler = (uint16_t)(SystemCoreClock / 1000000) - 1; // 1 �s tick
mbed_official 52:a51c77007319 90 TIM_TimeBaseStructure.TIM_ClockDivision = 0;
mbed_official 52:a51c77007319 91 TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up;
mbed_official 76:aeb1df146756 92 TIM_TimeBaseInit(TIM_MST, &TIM_TimeBaseStructure);
mbed_official 174:8bb9f3a33240 93
mbed_official 84:f54042cbc282 94 // Configure interrupts
mbed_official 84:f54042cbc282 95 TIM_ITConfig(TIM_MST, TIM_IT_Update, ENABLE);
mbed_official 174:8bb9f3a33240 96
mbed_official 91:0a39e62a0464 97 // Update interrupt used for 32-bit counter
mbed_official 91:0a39e62a0464 98 // Output compare interrupt used for timeout feature
mbed_official 167:d5744491c362 99 NVIC_SetVector(TIM_MST_IRQ, (uint32_t)tim_irq_handler);
mbed_official 167:d5744491c362 100 NVIC_EnableIRQ(TIM_MST_IRQ);
mbed_official 174:8bb9f3a33240 101
mbed_official 84:f54042cbc282 102 // Enable timer
mbed_official 76:aeb1df146756 103 TIM_Cmd(TIM_MST, ENABLE);
mbed_official 52:a51c77007319 104 }
mbed_official 52:a51c77007319 105
mbed_official 402:09075a3b15e3 106 uint32_t us_ticker_read()
mbed_official 402:09075a3b15e3 107 {
mbed_official 54:24d77221bceb 108 uint32_t counter, counter2;
mbed_official 52:a51c77007319 109 if (!us_ticker_inited) us_ticker_init();
mbed_official 76:aeb1df146756 110 // A situation might appear when Master overflows right after Slave is read and before the
mbed_official 76:aeb1df146756 111 // new (overflowed) value of Master is read. Which would make the code below consider the
mbed_official 76:aeb1df146756 112 // previous (incorrect) value of Slave and the new value of Master, which would return a
mbed_official 54:24d77221bceb 113 // value in the past. Avoid this by computing consecutive values of the timer until they
mbed_official 54:24d77221bceb 114 // are properly ordered.
mbed_official 84:f54042cbc282 115 counter = (uint32_t)(SlaveCounter << 16);
mbed_official 91:0a39e62a0464 116 counter += TIM_MST->CNT;
mbed_official 54:24d77221bceb 117 while (1) {
mbed_official 84:f54042cbc282 118 counter2 = (uint32_t)(SlaveCounter << 16);
mbed_official 91:0a39e62a0464 119 counter2 += TIM_MST->CNT;
mbed_official 76:aeb1df146756 120 if (counter2 > counter) {
mbed_official 54:24d77221bceb 121 break;
mbed_official 76:aeb1df146756 122 }
mbed_official 54:24d77221bceb 123 counter = counter2;
mbed_official 54:24d77221bceb 124 }
mbed_official 54:24d77221bceb 125 return counter2;
mbed_official 52:a51c77007319 126 }
mbed_official 52:a51c77007319 127
mbed_official 402:09075a3b15e3 128 void us_ticker_set_interrupt(timestamp_t timestamp)
mbed_official 402:09075a3b15e3 129 {
mbed_official 304:89b9c3a9a045 130 int delta = (int)((uint32_t)timestamp - us_ticker_read());
mbed_official 91:0a39e62a0464 131 uint16_t cval = TIM_MST->CNT;
mbed_official 84:f54042cbc282 132
mbed_official 84:f54042cbc282 133 if (delta <= 0) { // This event was in the past
mbed_official 84:f54042cbc282 134 us_ticker_irq_handler();
mbed_official 174:8bb9f3a33240 135 } else {
mbed_official 91:0a39e62a0464 136 oc_int_part = (uint32_t)(delta >> 16);
mbed_official 91:0a39e62a0464 137 oc_rem_part = (uint16_t)(delta & 0xFFFF);
mbed_official 91:0a39e62a0464 138 if (oc_rem_part <= (0xFFFF - cval)) {
mbed_official 91:0a39e62a0464 139 set_compare(cval + oc_rem_part);
mbed_official 91:0a39e62a0464 140 oc_rem_part = 0;
mbed_official 84:f54042cbc282 141 } else {
mbed_official 91:0a39e62a0464 142 set_compare(0xFFFF);
mbed_official 91:0a39e62a0464 143 oc_rem_part = oc_rem_part - (0xFFFF - cval);
mbed_official 84:f54042cbc282 144 }
mbed_official 52:a51c77007319 145 }
mbed_official 52:a51c77007319 146 }
mbed_official 52:a51c77007319 147
mbed_official 402:09075a3b15e3 148 void us_ticker_disable_interrupt(void)
mbed_official 402:09075a3b15e3 149 {
mbed_official 76:aeb1df146756 150 TIM_ITConfig(TIM_MST, TIM_IT_CC1, DISABLE);
mbed_official 52:a51c77007319 151 }
mbed_official 52:a51c77007319 152
mbed_official 402:09075a3b15e3 153 void us_ticker_clear_interrupt(void)
mbed_official 402:09075a3b15e3 154 {
mbed_official 167:d5744491c362 155 TIM_ClearITPendingBit(TIM_MST, TIM_IT_CC1);
mbed_official 52:a51c77007319 156 }