Paul Jeon / Mbed 2 deprecated GSMTest2PICO-ece493

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Dependencies:   mbed

USBSerialLib/USBDevice/USBHAL_Maxim.cpp@2:5e5cdc3504fe, 2020-02-21 (annotated)

Committer:
kchhouk
Date:
Fri Feb 21 21:03:41 2020 +0000
Revision:
2:5e5cdc3504fe
Parent:
1:6e512faaa17c 
Added the functionality of scanf

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mjoun 1:6e512faaa17c 1 /*******************************************************************************
mjoun 1:6e512faaa17c 2 * Copyright (C) 2016 Maxim Integrated Products, Inc., All Rights Reserved.
mjoun 1:6e512faaa17c 3 *
mjoun 1:6e512faaa17c 4 * Permission is hereby granted, free of charge, to any person obtaining a
mjoun 1:6e512faaa17c 5 * copy of this software and associated documentation files (the "Software"),
mjoun 1:6e512faaa17c 6 * to deal in the Software without restriction, including without limitation
mjoun 1:6e512faaa17c 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
mjoun 1:6e512faaa17c 8 * and/or sell copies of the Software, and to permit persons to whom the
mjoun 1:6e512faaa17c 9 * Software is furnished to do so, subject to the following conditions:
mjoun 1:6e512faaa17c 10 *
mjoun 1:6e512faaa17c 11 * The above copyright notice and this permission notice shall be included
mjoun 1:6e512faaa17c 12 * in all copies or substantial portions of the Software.
mjoun 1:6e512faaa17c 13 *
mjoun 1:6e512faaa17c 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
mjoun 1:6e512faaa17c 15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
mjoun 1:6e512faaa17c 16 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
mjoun 1:6e512faaa17c 17 * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
mjoun 1:6e512faaa17c 18 * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
mjoun 1:6e512faaa17c 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
mjoun 1:6e512faaa17c 20 * OTHER DEALINGS IN THE SOFTWARE.
mjoun 1:6e512faaa17c 21 *
mjoun 1:6e512faaa17c 22 * Except as contained in this notice, the name of Maxim Integrated
mjoun 1:6e512faaa17c 23 * Products, Inc. shall not be used except as stated in the Maxim Integrated
mjoun 1:6e512faaa17c 24 * Products, Inc. Branding Policy.
mjoun 1:6e512faaa17c 25 *
mjoun 1:6e512faaa17c 26 * The mere transfer of this software does not imply any licenses
mjoun 1:6e512faaa17c 27 * of trade secrets, proprietary technology, copyrights, patents,
mjoun 1:6e512faaa17c 28 * trademarks, maskwork rights, or any other form of intellectual
mjoun 1:6e512faaa17c 29 * property whatsoever. Maxim Integrated Products, Inc. retains all
mjoun 1:6e512faaa17c 30 * ownership rights.
mjoun 1:6e512faaa17c 31 *******************************************************************************
mjoun 1:6e512faaa17c 32 */
mjoun 1:6e512faaa17c 33
mjoun 1:6e512faaa17c 34 #if defined(TARGET_Maxim)
mjoun 1:6e512faaa17c 35
mjoun 1:6e512faaa17c 36 #include "USBHAL.h"
mjoun 1:6e512faaa17c 37 #include "usb_regs.h"
mjoun 1:6e512faaa17c 38 #include "clkman_regs.h"
mjoun 1:6e512faaa17c 39
mjoun 1:6e512faaa17c 40 #if defined(TARGET_MAX32625) || defined(TARGET_MAX32630)
mjoun 1:6e512faaa17c 41 #include "pwrman_regs.h"
mjoun 1:6e512faaa17c 42 #endif
mjoun 1:6e512faaa17c 43
mjoun 1:6e512faaa17c 44 #define CONNECT_INTS (MXC_F_USB_DEV_INTEN_BRST | MXC_F_USB_DEV_INTEN_SETUP | MXC_F_USB_DEV_INTEN_EP_IN | MXC_F_USB_DEV_INTEN_EP_OUT | MXC_F_USB_DEV_INTEN_DMA_ERR)
mjoun 1:6e512faaa17c 45
mjoun 1:6e512faaa17c 46 USBHAL *USBHAL::instance;
mjoun 1:6e512faaa17c 47
mjoun 1:6e512faaa17c 48 typedef struct {
mjoun 1:6e512faaa17c 49 volatile uint32_t buf0_desc;
mjoun 1:6e512faaa17c 50 volatile uint32_t buf0_address;
mjoun 1:6e512faaa17c 51 volatile uint32_t buf1_desc;
mjoun 1:6e512faaa17c 52 volatile uint32_t buf1_address;
mjoun 1:6e512faaa17c 53 } ep_buffer_t;
mjoun 1:6e512faaa17c 54
mjoun 1:6e512faaa17c 55 typedef struct {
mjoun 1:6e512faaa17c 56 ep_buffer_t out_buffer;
mjoun 1:6e512faaa17c 57 ep_buffer_t in_buffer;
mjoun 1:6e512faaa17c 58 } ep0_buffer_t;
mjoun 1:6e512faaa17c 59
mjoun 1:6e512faaa17c 60 typedef struct {
mjoun 1:6e512faaa17c 61 ep0_buffer_t ep0;
mjoun 1:6e512faaa17c 62 ep_buffer_t ep[MXC_USB_NUM_EP - 1];
mjoun 1:6e512faaa17c 63 } ep_buffer_descriptor_t;
mjoun 1:6e512faaa17c 64
mjoun 1:6e512faaa17c 65 // Static storage for endpoint buffer descriptor table. Must be 512 byte aligned for DMA.
mjoun 1:6e512faaa17c 66 #ifdef __IAR_SYSTEMS_ICC__
mjoun 1:6e512faaa17c 67 #pragma data_alignment = 512
mjoun 1:6e512faaa17c 68 #else
mjoun 1:6e512faaa17c 69 __attribute__ ((aligned (512)))
mjoun 1:6e512faaa17c 70 #endif
mjoun 1:6e512faaa17c 71 ep_buffer_descriptor_t ep_buffer_descriptor;
mjoun 1:6e512faaa17c 72
mjoun 1:6e512faaa17c 73 // static storage for temporary data buffers. Must be 32 byte aligned.
mjoun 1:6e512faaa17c 74 #ifdef __IAR_SYSTEMS_ICC__
mjoun 1:6e512faaa17c 75 #pragma data_alignment = 4
mjoun 1:6e512faaa17c 76 #else
mjoun 1:6e512faaa17c 77 __attribute__ ((aligned (4)))
mjoun 1:6e512faaa17c 78 #endif
mjoun 1:6e512faaa17c 79 static uint8_t aligned_buffer[NUMBER_OF_LOGICAL_ENDPOINTS][MXC_USB_MAX_PACKET];
mjoun 1:6e512faaa17c 80
mjoun 1:6e512faaa17c 81 // control packet state
mjoun 1:6e512faaa17c 82 static enum {
mjoun 1:6e512faaa17c 83 CTRL_NONE = 0,
mjoun 1:6e512faaa17c 84 CTRL_SETUP,
mjoun 1:6e512faaa17c 85 CTRL_OUT,
mjoun 1:6e512faaa17c 86 CTRL_IN,
mjoun 1:6e512faaa17c 87 } control_state;
mjoun 1:6e512faaa17c 88
mjoun 1:6e512faaa17c 89 USBHAL::USBHAL(void)
mjoun 1:6e512faaa17c 90 {
mjoun 1:6e512faaa17c 91 NVIC_DisableIRQ(USB_IRQn);
mjoun 1:6e512faaa17c 92
mjoun 1:6e512faaa17c 93 #if defined(TARGET_MAX32600)
mjoun 1:6e512faaa17c 94 // The PLL must be enabled for USB
mjoun 1:6e512faaa17c 95 MBED_ASSERT(MXC_CLKMAN->clk_config & MXC_F_CLKMAN_CLK_CONFIG_PLL_ENABLE);
mjoun 1:6e512faaa17c 96
mjoun 1:6e512faaa17c 97 // Enable the USB clock
mjoun 1:6e512faaa17c 98 MXC_CLKMAN->clk_ctrl |= MXC_F_CLKMAN_CLK_CTRL_USB_GATE_N;
mjoun 1:6e512faaa17c 99 #elif defined(TARGET_MAX32620)
mjoun 1:6e512faaa17c 100 // Enable the USB clock
mjoun 1:6e512faaa17c 101 MXC_CLKMAN->clk_ctrl |= MXC_F_CLKMAN_CLK_CTRL_USB_CLOCK_ENABLE;
mjoun 1:6e512faaa17c 102 #elif defined(TARGET_MAX32625) || defined(TARGET_MAX32630)
mjoun 1:6e512faaa17c 103 MXC_PWRMAN->pwr_rst_ctrl |= MXC_F_PWRMAN_PWR_RST_CTRL_USB_POWERED;
mjoun 1:6e512faaa17c 104 MXC_CLKMAN->clk_ctrl |= MXC_F_CLKMAN_CLK_CTRL_USB_CLOCK_ENABLE;
mjoun 1:6e512faaa17c 105 #endif
mjoun 1:6e512faaa17c 106
mjoun 1:6e512faaa17c 107 // reset the device
mjoun 1:6e512faaa17c 108 MXC_USB->cn = 0;
mjoun 1:6e512faaa17c 109 MXC_USB->cn = MXC_F_USB_CN_USB_EN;
mjoun 1:6e512faaa17c 110 MXC_USB->dev_inten = 0;
mjoun 1:6e512faaa17c 111 MXC_USB->dev_cn = 0;
mjoun 1:6e512faaa17c 112 MXC_USB->dev_cn = MXC_F_USB_DEV_CN_URST;
mjoun 1:6e512faaa17c 113 MXC_USB->dev_cn = 0;
mjoun 1:6e512faaa17c 114
mjoun 1:6e512faaa17c 115 // fill in callback arrays
mjoun 1:6e512faaa17c 116 epCallback[EP0OUT] = NULL;
mjoun 1:6e512faaa17c 117 epCallback[EP0IN] = NULL;
mjoun 1:6e512faaa17c 118 epCallback[EP1OUT] = &USBHAL::EP1_OUT_callback;
mjoun 1:6e512faaa17c 119 epCallback[EP1IN ] = &USBHAL::EP1_IN_callback;
mjoun 1:6e512faaa17c 120 epCallback[EP2OUT] = &USBHAL::EP2_OUT_callback;
mjoun 1:6e512faaa17c 121 epCallback[EP2IN ] = &USBHAL::EP2_IN_callback;
mjoun 1:6e512faaa17c 122 epCallback[EP3OUT] = &USBHAL::EP3_OUT_callback;
mjoun 1:6e512faaa17c 123 epCallback[EP3IN ] = &USBHAL::EP3_IN_callback;
mjoun 1:6e512faaa17c 124 epCallback[EP4OUT] = &USBHAL::EP4_OUT_callback;
mjoun 1:6e512faaa17c 125 epCallback[EP4IN ] = &USBHAL::EP4_IN_callback;
mjoun 1:6e512faaa17c 126 epCallback[EP5OUT] = &USBHAL::EP5_OUT_callback;
mjoun 1:6e512faaa17c 127 epCallback[EP5IN ] = &USBHAL::EP5_IN_callback;
mjoun 1:6e512faaa17c 128 epCallback[EP6OUT] = &USBHAL::EP6_OUT_callback;
mjoun 1:6e512faaa17c 129 epCallback[EP6IN ] = &USBHAL::EP6_IN_callback;
mjoun 1:6e512faaa17c 130 epCallback[EP7OUT] = &USBHAL::EP7_OUT_callback;
mjoun 1:6e512faaa17c 131 epCallback[EP7IN ] = &USBHAL::EP7_IN_callback;
mjoun 1:6e512faaa17c 132
mjoun 1:6e512faaa17c 133 // clear driver state
mjoun 1:6e512faaa17c 134 control_state = CTRL_NONE;
mjoun 1:6e512faaa17c 135
mjoun 1:6e512faaa17c 136 // set the descriptor location
mjoun 1:6e512faaa17c 137 MXC_USB->ep_base = (uint32_t)&ep_buffer_descriptor;
mjoun 1:6e512faaa17c 138
mjoun 1:6e512faaa17c 139 // enable VBUS interrupts
mjoun 1:6e512faaa17c 140 MXC_USB->dev_inten = MXC_F_USB_DEV_INTEN_NO_VBUS | MXC_F_USB_DEV_INTEN_VBUS;
mjoun 1:6e512faaa17c 141
mjoun 1:6e512faaa17c 142 // attach IRQ handler and enable interrupts
mjoun 1:6e512faaa17c 143 instance = this;
mjoun 1:6e512faaa17c 144 NVIC_SetVector(USB_IRQn, (uint32_t)&_usbisr);
mjoun 1:6e512faaa17c 145 NVIC_EnableIRQ(USB_IRQn);
mjoun 1:6e512faaa17c 146 }
mjoun 1:6e512faaa17c 147
mjoun 1:6e512faaa17c 148 USBHAL::~USBHAL(void)
mjoun 1:6e512faaa17c 149 {
mjoun 1:6e512faaa17c 150 MXC_USB->dev_cn = MXC_F_USB_DEV_CN_URST;
mjoun 1:6e512faaa17c 151 MXC_USB->dev_cn = 0;
mjoun 1:6e512faaa17c 152 MXC_USB->cn = 0;
mjoun 1:6e512faaa17c 153 }
mjoun 1:6e512faaa17c 154
mjoun 1:6e512faaa17c 155 void USBHAL::connect(void)
mjoun 1:6e512faaa17c 156 {
mjoun 1:6e512faaa17c 157 // enable interrupts
mjoun 1:6e512faaa17c 158 MXC_USB->dev_inten |= CONNECT_INTS;
mjoun 1:6e512faaa17c 159
mjoun 1:6e512faaa17c 160 // allow interrupts on ep0
mjoun 1:6e512faaa17c 161 MXC_USB->ep[0] |= MXC_F_USB_EP_INT_EN;
mjoun 1:6e512faaa17c 162
mjoun 1:6e512faaa17c 163 // pullup enable
mjoun 1:6e512faaa17c 164 MXC_USB->dev_cn |= (MXC_F_USB_DEV_CN_CONNECT | MXC_F_USB_DEV_CN_FIFO_MODE);
mjoun 1:6e512faaa17c 165 }
mjoun 1:6e512faaa17c 166
mjoun 1:6e512faaa17c 167 void USBHAL::disconnect(void)
mjoun 1:6e512faaa17c 168 {
mjoun 1:6e512faaa17c 169 // disable interrupts
mjoun 1:6e512faaa17c 170 MXC_USB->dev_inten &= ~CONNECT_INTS;
mjoun 1:6e512faaa17c 171
mjoun 1:6e512faaa17c 172 // disable pullup
mjoun 1:6e512faaa17c 173 MXC_USB->dev_cn &= ~MXC_F_USB_DEV_CN_CONNECT;
mjoun 1:6e512faaa17c 174 }
mjoun 1:6e512faaa17c 175
mjoun 1:6e512faaa17c 176 void USBHAL::configureDevice(void)
mjoun 1:6e512faaa17c 177 {
mjoun 1:6e512faaa17c 178 // do nothing
mjoun 1:6e512faaa17c 179 }
mjoun 1:6e512faaa17c 180
mjoun 1:6e512faaa17c 181 void USBHAL::unconfigureDevice(void)
mjoun 1:6e512faaa17c 182 {
mjoun 1:6e512faaa17c 183 // reset endpoints
mjoun 1:6e512faaa17c 184 for (int i = 0; i < MXC_USB_NUM_EP; i++) {
mjoun 1:6e512faaa17c 185 // Disable endpoint and clear the data toggle
mjoun 1:6e512faaa17c 186 MXC_USB->ep[i] &= ~MXC_F_USB_EP_DIR;
mjoun 1:6e512faaa17c 187 MXC_USB->ep[i] |= MXC_F_USB_EP_DT;
mjoun 1:6e512faaa17c 188 }
mjoun 1:6e512faaa17c 189 }
mjoun 1:6e512faaa17c 190
mjoun 1:6e512faaa17c 191 void USBHAL::setAddress(uint8_t address)
mjoun 1:6e512faaa17c 192 {
mjoun 1:6e512faaa17c 193 // do nothing
mjoun 1:6e512faaa17c 194 }
mjoun 1:6e512faaa17c 195
mjoun 1:6e512faaa17c 196 void USBHAL::remoteWakeup(void)
mjoun 1:6e512faaa17c 197 {
mjoun 1:6e512faaa17c 198 // do nothing
mjoun 1:6e512faaa17c 199 }
mjoun 1:6e512faaa17c 200
mjoun 1:6e512faaa17c 201 static ep_buffer_t *get_desc(uint8_t endpoint)
mjoun 1:6e512faaa17c 202 {
mjoun 1:6e512faaa17c 203 uint8_t epnum = EP_NUM(endpoint);
mjoun 1:6e512faaa17c 204 ep_buffer_t *desc;
mjoun 1:6e512faaa17c 205
mjoun 1:6e512faaa17c 206 if (epnum == 0) {
mjoun 1:6e512faaa17c 207 if (IN_EP(endpoint)) {
mjoun 1:6e512faaa17c 208 desc = &ep_buffer_descriptor.ep0.in_buffer;
mjoun 1:6e512faaa17c 209 } else {
mjoun 1:6e512faaa17c 210 desc = &ep_buffer_descriptor.ep0.out_buffer;
mjoun 1:6e512faaa17c 211 }
mjoun 1:6e512faaa17c 212 } else {
mjoun 1:6e512faaa17c 213 desc = &ep_buffer_descriptor.ep[epnum - 1];
mjoun 1:6e512faaa17c 214 }
mjoun 1:6e512faaa17c 215
mjoun 1:6e512faaa17c 216 return desc;
mjoun 1:6e512faaa17c 217 }
mjoun 1:6e512faaa17c 218
mjoun 1:6e512faaa17c 219 void USBHAL::EP0setup(uint8_t *buffer)
mjoun 1:6e512faaa17c 220 {
mjoun 1:6e512faaa17c 221 // Setup packet is fixed at 8 bytes
mjoun 1:6e512faaa17c 222 // Setup registers cannot be read in byte mode
mjoun 1:6e512faaa17c 223 uint32_t *ptr32 = (uint32_t*)buffer;
mjoun 1:6e512faaa17c 224 ptr32[0] = (uint32_t)MXC_USB->setup0;
mjoun 1:6e512faaa17c 225 ptr32[1] = (uint32_t)MXC_USB->setup1;
mjoun 1:6e512faaa17c 226 }
mjoun 1:6e512faaa17c 227
mjoun 1:6e512faaa17c 228 void USBHAL::EP0read(void)
mjoun 1:6e512faaa17c 229 {
mjoun 1:6e512faaa17c 230 if (control_state == CTRL_IN) {
mjoun 1:6e512faaa17c 231 // This is the status stage. ACK.
mjoun 1:6e512faaa17c 232 MXC_USB->ep[0] |= MXC_F_USB_EP_ST_ACK;
mjoun 1:6e512faaa17c 233 control_state = CTRL_NONE;
mjoun 1:6e512faaa17c 234 return;
mjoun 1:6e512faaa17c 235 }
mjoun 1:6e512faaa17c 236
mjoun 1:6e512faaa17c 237 control_state = CTRL_OUT;
mjoun 1:6e512faaa17c 238
mjoun 1:6e512faaa17c 239 endpointRead(EP0OUT, MAX_PACKET_SIZE_EP0);
mjoun 1:6e512faaa17c 240 }
mjoun 1:6e512faaa17c 241
mjoun 1:6e512faaa17c 242 void USBHAL::EP0readStage(void)
mjoun 1:6e512faaa17c 243 {
mjoun 1:6e512faaa17c 244 // do nothing
mjoun 1:6e512faaa17c 245 }
mjoun 1:6e512faaa17c 246
mjoun 1:6e512faaa17c 247 uint32_t USBHAL::EP0getReadResult(uint8_t *buffer)
mjoun 1:6e512faaa17c 248 {
mjoun 1:6e512faaa17c 249 uint32_t size;
mjoun 1:6e512faaa17c 250
mjoun 1:6e512faaa17c 251 if (MXC_USB->out_owner & 1) {
mjoun 1:6e512faaa17c 252 return 0;
mjoun 1:6e512faaa17c 253 }
mjoun 1:6e512faaa17c 254
mjoun 1:6e512faaa17c 255 // get the packet length and contents
mjoun 1:6e512faaa17c 256 ep_buffer_t *desc = get_desc(EP0OUT);
mjoun 1:6e512faaa17c 257 size = desc->buf0_desc;
mjoun 1:6e512faaa17c 258 memcpy(buffer, aligned_buffer[0], size);
mjoun 1:6e512faaa17c 259
mjoun 1:6e512faaa17c 260 return size;
mjoun 1:6e512faaa17c 261 }
mjoun 1:6e512faaa17c 262
mjoun 1:6e512faaa17c 263 void USBHAL::EP0write(uint8_t *buffer, uint32_t size)
mjoun 1:6e512faaa17c 264 {
mjoun 1:6e512faaa17c 265 if ((size == 0) && (control_state != CTRL_IN)) {
mjoun 1:6e512faaa17c 266 // This is a status stage ACK. Handle in hardware.
mjoun 1:6e512faaa17c 267 MXC_USB->ep[0] |= MXC_F_USB_EP_ST_ACK;
mjoun 1:6e512faaa17c 268 control_state = CTRL_NONE;
mjoun 1:6e512faaa17c 269 return;
mjoun 1:6e512faaa17c 270 }
mjoun 1:6e512faaa17c 271
mjoun 1:6e512faaa17c 272 control_state = CTRL_IN;
mjoun 1:6e512faaa17c 273
mjoun 1:6e512faaa17c 274 endpointWrite(EP0IN, buffer, size);
mjoun 1:6e512faaa17c 275 }
mjoun 1:6e512faaa17c 276
mjoun 1:6e512faaa17c 277 void USBHAL::EP0stall(void)
mjoun 1:6e512faaa17c 278 {
mjoun 1:6e512faaa17c 279 stallEndpoint(0);
mjoun 1:6e512faaa17c 280 }
mjoun 1:6e512faaa17c 281
mjoun 1:6e512faaa17c 282 EP_STATUS USBHAL::endpointRead(uint8_t endpoint, uint32_t maximumSize)
mjoun 1:6e512faaa17c 283 {
mjoun 1:6e512faaa17c 284 uint8_t epnum = EP_NUM(endpoint);
mjoun 1:6e512faaa17c 285
mjoun 1:6e512faaa17c 286 if ((endpoint >= NUMBER_OF_PHYSICAL_ENDPOINTS) || IN_EP(endpoint)) {
mjoun 1:6e512faaa17c 287 return EP_INVALID;
mjoun 1:6e512faaa17c 288 }
mjoun 1:6e512faaa17c 289
mjoun 1:6e512faaa17c 290 if (maximumSize > MXC_USB_MAX_PACKET) {
mjoun 1:6e512faaa17c 291 return EP_INVALID;
mjoun 1:6e512faaa17c 292 }
mjoun 1:6e512faaa17c 293
mjoun 1:6e512faaa17c 294 uint32_t mask = (1 << epnum);
mjoun 1:6e512faaa17c 295 if (MXC_USB->out_owner & mask) {
mjoun 1:6e512faaa17c 296 return EP_INVALID;
mjoun 1:6e512faaa17c 297 }
mjoun 1:6e512faaa17c 298
mjoun 1:6e512faaa17c 299 ep_buffer_t *desc = get_desc(endpoint);
mjoun 1:6e512faaa17c 300 desc->buf0_desc = maximumSize;
mjoun 1:6e512faaa17c 301 desc->buf0_address = (uint32_t)aligned_buffer[epnum];
mjoun 1:6e512faaa17c 302
mjoun 1:6e512faaa17c 303 MXC_USB->out_owner = mask;
mjoun 1:6e512faaa17c 304
mjoun 1:6e512faaa17c 305 return EP_PENDING;
mjoun 1:6e512faaa17c 306 }
mjoun 1:6e512faaa17c 307
mjoun 1:6e512faaa17c 308 EP_STATUS USBHAL::endpointReadResult(uint8_t endpoint, uint8_t *data, uint32_t *bytesRead)
mjoun 1:6e512faaa17c 309 {
mjoun 1:6e512faaa17c 310 if ((endpoint >= NUMBER_OF_PHYSICAL_ENDPOINTS) || IN_EP(endpoint)) {
mjoun 1:6e512faaa17c 311 return EP_INVALID;
mjoun 1:6e512faaa17c 312 }
mjoun 1:6e512faaa17c 313
mjoun 1:6e512faaa17c 314 uint32_t mask = (1 << EP_NUM(endpoint));
mjoun 1:6e512faaa17c 315 if (MXC_USB->out_owner & mask) {
mjoun 1:6e512faaa17c 316 return EP_PENDING;
mjoun 1:6e512faaa17c 317 }
mjoun 1:6e512faaa17c 318
mjoun 1:6e512faaa17c 319 // get the packet length and contents
mjoun 1:6e512faaa17c 320 ep_buffer_t *desc = get_desc(endpoint);
mjoun 1:6e512faaa17c 321 *bytesRead = desc->buf0_desc;
mjoun 1:6e512faaa17c 322 memcpy(data, aligned_buffer[EP_NUM(endpoint)], *bytesRead);
mjoun 1:6e512faaa17c 323
mjoun 1:6e512faaa17c 324 return EP_COMPLETED;
mjoun 1:6e512faaa17c 325 }
mjoun 1:6e512faaa17c 326
mjoun 1:6e512faaa17c 327 EP_STATUS USBHAL::endpointWrite(uint8_t endpoint, uint8_t *data, uint32_t size)
mjoun 1:6e512faaa17c 328 {
mjoun 1:6e512faaa17c 329 uint8_t epnum = EP_NUM(endpoint);
mjoun 1:6e512faaa17c 330
mjoun 1:6e512faaa17c 331 if ((endpoint >= NUMBER_OF_PHYSICAL_ENDPOINTS) || OUT_EP(endpoint)) {
mjoun 1:6e512faaa17c 332 return EP_INVALID;
mjoun 1:6e512faaa17c 333 }
mjoun 1:6e512faaa17c 334
mjoun 1:6e512faaa17c 335 if (size > MXC_USB_MAX_PACKET) {
mjoun 1:6e512faaa17c 336 return EP_INVALID;
mjoun 1:6e512faaa17c 337 }
mjoun 1:6e512faaa17c 338
mjoun 1:6e512faaa17c 339 uint32_t mask = (1 << epnum);
mjoun 1:6e512faaa17c 340 if (MXC_USB->in_owner & mask) {
mjoun 1:6e512faaa17c 341 return EP_INVALID;
mjoun 1:6e512faaa17c 342 }
mjoun 1:6e512faaa17c 343
mjoun 1:6e512faaa17c 344 memcpy(aligned_buffer[epnum], data, size);
mjoun 1:6e512faaa17c 345
mjoun 1:6e512faaa17c 346 ep_buffer_t *desc = get_desc(endpoint);
mjoun 1:6e512faaa17c 347 desc->buf0_desc = size;
mjoun 1:6e512faaa17c 348 desc->buf0_address = (uint32_t)aligned_buffer[epnum];
mjoun 1:6e512faaa17c 349
mjoun 1:6e512faaa17c 350 // start the DMA
mjoun 1:6e512faaa17c 351 MXC_USB->in_owner = mask;
mjoun 1:6e512faaa17c 352
mjoun 1:6e512faaa17c 353 return EP_PENDING;
mjoun 1:6e512faaa17c 354 }
mjoun 1:6e512faaa17c 355
mjoun 1:6e512faaa17c 356 EP_STATUS USBHAL::endpointWriteResult(uint8_t endpoint)
mjoun 1:6e512faaa17c 357 {
mjoun 1:6e512faaa17c 358 uint32_t mask = (1 << EP_NUM(endpoint));
mjoun 1:6e512faaa17c 359 if (MXC_USB->in_owner & mask) {
mjoun 1:6e512faaa17c 360 return EP_PENDING;
mjoun 1:6e512faaa17c 361 }
mjoun 1:6e512faaa17c 362
mjoun 1:6e512faaa17c 363 return EP_COMPLETED;
mjoun 1:6e512faaa17c 364 }
mjoun 1:6e512faaa17c 365
mjoun 1:6e512faaa17c 366 void USBHAL::stallEndpoint(uint8_t endpoint)
mjoun 1:6e512faaa17c 367 {
mjoun 1:6e512faaa17c 368 uint8_t epnum = EP_NUM(endpoint);
mjoun 1:6e512faaa17c 369
mjoun 1:6e512faaa17c 370 if (epnum == 0) {
mjoun 1:6e512faaa17c 371 MXC_USB->ep[epnum] |= MXC_F_USB_EP_ST_STALL;
mjoun 1:6e512faaa17c 372 }
mjoun 1:6e512faaa17c 373
mjoun 1:6e512faaa17c 374 MXC_USB->ep[epnum] |= MXC_F_USB_EP_STALL;
mjoun 1:6e512faaa17c 375 }
mjoun 1:6e512faaa17c 376
mjoun 1:6e512faaa17c 377 void USBHAL::unstallEndpoint(uint8_t endpoint)
mjoun 1:6e512faaa17c 378 {
mjoun 1:6e512faaa17c 379 MXC_USB->ep[EP_NUM(endpoint)] &= ~MXC_F_USB_EP_STALL;
mjoun 1:6e512faaa17c 380 }
mjoun 1:6e512faaa17c 381
mjoun 1:6e512faaa17c 382 bool USBHAL::realiseEndpoint(uint8_t endpoint, uint32_t maxPacket, uint32_t options)
mjoun 1:6e512faaa17c 383 {
mjoun 1:6e512faaa17c 384 uint8_t epnum = EP_NUM(endpoint);
mjoun 1:6e512faaa17c 385 uint32_t ep_ctrl;
mjoun 1:6e512faaa17c 386
mjoun 1:6e512faaa17c 387 if (epnum >= NUMBER_OF_PHYSICAL_ENDPOINTS) {
mjoun 1:6e512faaa17c 388 return false;
mjoun 1:6e512faaa17c 389 }
mjoun 1:6e512faaa17c 390
mjoun 1:6e512faaa17c 391 if (IN_EP(endpoint)) {
mjoun 1:6e512faaa17c 392 ep_ctrl = (MXC_V_USB_EP_DIR_IN << MXC_F_USB_EP_DIR_POS);
mjoun 1:6e512faaa17c 393 } else {
mjoun 1:6e512faaa17c 394 ep_ctrl = (MXC_S_USB_EP_DIR_OUT << MXC_F_USB_EP_DIR_POS);
mjoun 1:6e512faaa17c 395 }
mjoun 1:6e512faaa17c 396
mjoun 1:6e512faaa17c 397 ep_ctrl |= (MXC_F_USB_EP_DT | MXC_F_USB_EP_INT_EN);
mjoun 1:6e512faaa17c 398
mjoun 1:6e512faaa17c 399 MXC_USB->ep[epnum] = ep_ctrl;
mjoun 1:6e512faaa17c 400
mjoun 1:6e512faaa17c 401 return true;
mjoun 1:6e512faaa17c 402 }
mjoun 1:6e512faaa17c 403
mjoun 1:6e512faaa17c 404 bool USBHAL::getEndpointStallState(unsigned char endpoint)
mjoun 1:6e512faaa17c 405 {
mjoun 1:6e512faaa17c 406 return !!(MXC_USB->ep[endpoint] & MXC_F_USB_EP_STALL);
mjoun 1:6e512faaa17c 407 }
mjoun 1:6e512faaa17c 408
mjoun 1:6e512faaa17c 409 void USBHAL::_usbisr(void)
mjoun 1:6e512faaa17c 410 {
mjoun 1:6e512faaa17c 411 instance->usbisr();
mjoun 1:6e512faaa17c 412 }
mjoun 1:6e512faaa17c 413
mjoun 1:6e512faaa17c 414 void USBHAL::usbisr(void)
mjoun 1:6e512faaa17c 415 {
mjoun 1:6e512faaa17c 416 // get and clear irqs
mjoun 1:6e512faaa17c 417 uint32_t irq_flags = MXC_USB->dev_intfl;
mjoun 1:6e512faaa17c 418 MXC_USB->dev_intfl = irq_flags;
mjoun 1:6e512faaa17c 419
mjoun 1:6e512faaa17c 420 // process only enabled interrupts
mjoun 1:6e512faaa17c 421 irq_flags &= MXC_USB->dev_inten;
mjoun 1:6e512faaa17c 422
mjoun 1:6e512faaa17c 423 // suspend
mjoun 1:6e512faaa17c 424 if (irq_flags & MXC_F_USB_DEV_INTFL_SUSP) {
mjoun 1:6e512faaa17c 425 suspendStateChanged(1);
mjoun 1:6e512faaa17c 426 }
mjoun 1:6e512faaa17c 427
mjoun 1:6e512faaa17c 428 // bus reset
mjoun 1:6e512faaa17c 429 if (irq_flags & MXC_F_USB_DEV_INTFL_BRST) {
mjoun 1:6e512faaa17c 430
mjoun 1:6e512faaa17c 431 // reset endpoints
mjoun 1:6e512faaa17c 432 for (int i = 0; i < MXC_USB_NUM_EP; i++) {
mjoun 1:6e512faaa17c 433 // Disable endpoint and clear the data toggle
mjoun 1:6e512faaa17c 434 MXC_USB->ep[i] &= ~MXC_F_USB_EP_DIR;
mjoun 1:6e512faaa17c 435 MXC_USB->ep[i] |= MXC_F_USB_EP_DT;
mjoun 1:6e512faaa17c 436 }
mjoun 1:6e512faaa17c 437
mjoun 1:6e512faaa17c 438 // clear driver state
mjoun 1:6e512faaa17c 439 control_state = CTRL_NONE;
mjoun 1:6e512faaa17c 440
mjoun 1:6e512faaa17c 441 busReset();
mjoun 1:6e512faaa17c 442
mjoun 1:6e512faaa17c 443 // no need to process events after reset
mjoun 1:6e512faaa17c 444 return;
mjoun 1:6e512faaa17c 445 }
mjoun 1:6e512faaa17c 446
mjoun 1:6e512faaa17c 447 // Setup packet
mjoun 1:6e512faaa17c 448 if (irq_flags & MXC_F_USB_DEV_INTFL_SETUP) {
mjoun 1:6e512faaa17c 449 control_state = CTRL_SETUP;
mjoun 1:6e512faaa17c 450 EP0setupCallback();
mjoun 1:6e512faaa17c 451 }
mjoun 1:6e512faaa17c 452
mjoun 1:6e512faaa17c 453 // IN packets
mjoun 1:6e512faaa17c 454 if (irq_flags & MXC_F_USB_DEV_INTFL_EP_IN) {
mjoun 1:6e512faaa17c 455 // get and clear IN irqs
mjoun 1:6e512faaa17c 456 uint32_t in_irqs = MXC_USB->in_int;
mjoun 1:6e512faaa17c 457 MXC_USB->in_int = in_irqs;
mjoun 1:6e512faaa17c 458
mjoun 1:6e512faaa17c 459 if (in_irqs & 1) {
mjoun 1:6e512faaa17c 460 EP0in();
mjoun 1:6e512faaa17c 461 }
mjoun 1:6e512faaa17c 462
mjoun 1:6e512faaa17c 463 for (uint8_t epnum = 1; epnum < NUMBER_OF_LOGICAL_ENDPOINTS; epnum++) {
mjoun 1:6e512faaa17c 464 uint32_t irq_mask = (1 << epnum);
mjoun 1:6e512faaa17c 465 if (in_irqs & irq_mask) {
mjoun 1:6e512faaa17c 466 uint8_t endpoint = (epnum << 1) | DIR_IN;
mjoun 1:6e512faaa17c 467 (instance->*(epCallback[endpoint]))();
mjoun 1:6e512faaa17c 468 }
mjoun 1:6e512faaa17c 469 }
mjoun 1:6e512faaa17c 470 }
mjoun 1:6e512faaa17c 471
mjoun 1:6e512faaa17c 472 // OUT packets
mjoun 1:6e512faaa17c 473 if (irq_flags & MXC_F_USB_DEV_INTFL_EP_OUT) {
mjoun 1:6e512faaa17c 474 // get and clear OUT irqs
mjoun 1:6e512faaa17c 475 uint32_t out_irqs = MXC_USB->out_int;
mjoun 1:6e512faaa17c 476 MXC_USB->out_int = out_irqs;
mjoun 1:6e512faaa17c 477
mjoun 1:6e512faaa17c 478 if (out_irqs & 1) {
mjoun 1:6e512faaa17c 479 EP0out();
mjoun 1:6e512faaa17c 480 }
mjoun 1:6e512faaa17c 481
mjoun 1:6e512faaa17c 482 for (uint8_t epnum = 1; epnum < NUMBER_OF_LOGICAL_ENDPOINTS; epnum++) {
mjoun 1:6e512faaa17c 483 uint32_t irq_mask = (1 << epnum);
mjoun 1:6e512faaa17c 484 if (out_irqs & irq_mask) {
mjoun 1:6e512faaa17c 485 uint8_t endpoint = (epnum << 1) | DIR_OUT;
mjoun 1:6e512faaa17c 486 (instance->*(epCallback[endpoint]))();
mjoun 1:6e512faaa17c 487 }
mjoun 1:6e512faaa17c 488 }
mjoun 1:6e512faaa17c 489 }
mjoun 1:6e512faaa17c 490 }
mjoun 1:6e512faaa17c 491
mjoun 1:6e512faaa17c 492 #endif