Paul Jeon / Mbed 2 deprecated GSMTest2PICO-ece493

works!

Dependencies:   mbed

USBSerialLib/USBDevice/USBHAL_KL25Z.cpp@2:5e5cdc3504fe, 2020-02-21 (annotated)

Committer:
kchhouk
Date:
Fri Feb 21 21:03:41 2020 +0000
Revision:
2:5e5cdc3504fe
Parent:
1:6e512faaa17c 
Added the functionality of scanf

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mjoun 1:6e512faaa17c 1 /* Copyright (c) 2010-2011 mbed.org, MIT License
mjoun 1:6e512faaa17c 2 *
mjoun 1:6e512faaa17c 3 * Permission is hereby granted, free of charge, to any person obtaining a copy of this software
mjoun 1:6e512faaa17c 4 * and associated documentation files (the "Software"), to deal in the Software without
mjoun 1:6e512faaa17c 5 * restriction, including without limitation the rights to use, copy, modify, merge, publish,
mjoun 1:6e512faaa17c 6 * distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the
mjoun 1:6e512faaa17c 7 * Software is furnished to do so, subject to the following conditions:
mjoun 1:6e512faaa17c 8 *
mjoun 1:6e512faaa17c 9 * The above copyright notice and this permission notice shall be included in all copies or
mjoun 1:6e512faaa17c 10 * substantial portions of the Software.
mjoun 1:6e512faaa17c 11 *
mjoun 1:6e512faaa17c 12 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
mjoun 1:6e512faaa17c 13 * BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
mjoun 1:6e512faaa17c 14 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM,
mjoun 1:6e512faaa17c 15 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
mjoun 1:6e512faaa17c 16 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
mjoun 1:6e512faaa17c 17 */
mjoun 1:6e512faaa17c 18
mjoun 1:6e512faaa17c 19 #if defined(TARGET_KL25Z) | defined(TARGET_KL43Z) | defined(TARGET_KL46Z) | defined(TARGET_K20D50M) | defined(TARGET_K64F) | defined(TARGET_K22F) | defined(TARGET_TEENSY3_1)
mjoun 1:6e512faaa17c 20
mjoun 1:6e512faaa17c 21 #include "USBHAL.h"
mjoun 1:6e512faaa17c 22
mjoun 1:6e512faaa17c 23 USBHAL * USBHAL::instance;
mjoun 1:6e512faaa17c 24
mjoun 1:6e512faaa17c 25 static volatile int epComplete = 0;
mjoun 1:6e512faaa17c 26
mjoun 1:6e512faaa17c 27 // Convert physical endpoint number to register bit
mjoun 1:6e512faaa17c 28 #define EP(endpoint) (1<<(endpoint))
mjoun 1:6e512faaa17c 29
mjoun 1:6e512faaa17c 30 // Convert physical to logical
mjoun 1:6e512faaa17c 31 #define PHY_TO_LOG(endpoint) ((endpoint)>>1)
mjoun 1:6e512faaa17c 32
mjoun 1:6e512faaa17c 33 // Get endpoint direction
mjoun 1:6e512faaa17c 34 #define IN_EP(endpoint) ((endpoint) & 1U ? true : false)
mjoun 1:6e512faaa17c 35 #define OUT_EP(endpoint) ((endpoint) & 1U ? false : true)
mjoun 1:6e512faaa17c 36
mjoun 1:6e512faaa17c 37 #define BD_OWN_MASK (1<<7)
mjoun 1:6e512faaa17c 38 #define BD_DATA01_MASK (1<<6)
mjoun 1:6e512faaa17c 39 #define BD_KEEP_MASK (1<<5)
mjoun 1:6e512faaa17c 40 #define BD_NINC_MASK (1<<4)
mjoun 1:6e512faaa17c 41 #define BD_DTS_MASK (1<<3)
mjoun 1:6e512faaa17c 42 #define BD_STALL_MASK (1<<2)
mjoun 1:6e512faaa17c 43
mjoun 1:6e512faaa17c 44 #define TX 1
mjoun 1:6e512faaa17c 45 #define RX 0
mjoun 1:6e512faaa17c 46 #define ODD 0
mjoun 1:6e512faaa17c 47 #define EVEN 1
mjoun 1:6e512faaa17c 48 // this macro waits a physical endpoint number
mjoun 1:6e512faaa17c 49 #define EP_BDT_IDX(ep, dir, odd) (((ep * 4) + (2 * dir) + (1 * odd)))
mjoun 1:6e512faaa17c 50
mjoun 1:6e512faaa17c 51 #define SETUP_TOKEN 0x0D
mjoun 1:6e512faaa17c 52 #define IN_TOKEN 0x09
mjoun 1:6e512faaa17c 53 #define OUT_TOKEN 0x01
mjoun 1:6e512faaa17c 54 #define TOK_PID(idx) ((bdt[idx].info >> 2) & 0x0F)
mjoun 1:6e512faaa17c 55
mjoun 1:6e512faaa17c 56 // for each endpt: 8 bytes
mjoun 1:6e512faaa17c 57 typedef struct BDT {
mjoun 1:6e512faaa17c 58 uint8_t info; // BD[0:7]
mjoun 1:6e512faaa17c 59 uint8_t dummy; // RSVD: BD[8:15]
mjoun 1:6e512faaa17c 60 uint16_t byte_count; // BD[16:32]
mjoun 1:6e512faaa17c 61 uint32_t address; // Addr
mjoun 1:6e512faaa17c 62 } BDT;
mjoun 1:6e512faaa17c 63
mjoun 1:6e512faaa17c 64
mjoun 1:6e512faaa17c 65 // there are:
mjoun 1:6e512faaa17c 66 // * 16 bidirectionnal endpt -> 32 physical endpt
mjoun 1:6e512faaa17c 67 // * as there are ODD and EVEN buffer -> 32*2 bdt
mjoun 1:6e512faaa17c 68 __attribute__((__aligned__(512))) BDT bdt[NUMBER_OF_PHYSICAL_ENDPOINTS * 2];
mjoun 1:6e512faaa17c 69 uint8_t * endpoint_buffer[(NUMBER_OF_PHYSICAL_ENDPOINTS - 2) * 2];
mjoun 1:6e512faaa17c 70 uint8_t * endpoint_buffer_iso[2*2];
mjoun 1:6e512faaa17c 71
mjoun 1:6e512faaa17c 72 static uint8_t set_addr = 0;
mjoun 1:6e512faaa17c 73 static uint8_t addr = 0;
mjoun 1:6e512faaa17c 74
mjoun 1:6e512faaa17c 75 static uint32_t Data1 = 0x55555555;
mjoun 1:6e512faaa17c 76
mjoun 1:6e512faaa17c 77 static uint32_t frameNumber() {
mjoun 1:6e512faaa17c 78 return((USB0->FRMNUML | (USB0->FRMNUMH << 8)) & 0x07FF);
mjoun 1:6e512faaa17c 79 }
mjoun 1:6e512faaa17c 80
mjoun 1:6e512faaa17c 81 uint32_t USBHAL::endpointReadcore(uint8_t endpoint, uint8_t *buffer) {
mjoun 1:6e512faaa17c 82 return 0;
mjoun 1:6e512faaa17c 83 }
mjoun 1:6e512faaa17c 84
mjoun 1:6e512faaa17c 85 USBHAL::USBHAL(void) {
mjoun 1:6e512faaa17c 86 // Disable IRQ
mjoun 1:6e512faaa17c 87 NVIC_DisableIRQ(USB0_IRQn);
mjoun 1:6e512faaa17c 88
mjoun 1:6e512faaa17c 89 #if defined(TARGET_K64F)
mjoun 1:6e512faaa17c 90 MPU->CESR=0;
mjoun 1:6e512faaa17c 91 #endif
mjoun 1:6e512faaa17c 92 // fill in callback array
mjoun 1:6e512faaa17c 93 epCallback[0] = &USBHAL::EP1_OUT_callback;
mjoun 1:6e512faaa17c 94 epCallback[1] = &USBHAL::EP1_IN_callback;
mjoun 1:6e512faaa17c 95 epCallback[2] = &USBHAL::EP2_OUT_callback;
mjoun 1:6e512faaa17c 96 epCallback[3] = &USBHAL::EP2_IN_callback;
mjoun 1:6e512faaa17c 97 epCallback[4] = &USBHAL::EP3_OUT_callback;
mjoun 1:6e512faaa17c 98 epCallback[5] = &USBHAL::EP3_IN_callback;
mjoun 1:6e512faaa17c 99 epCallback[6] = &USBHAL::EP4_OUT_callback;
mjoun 1:6e512faaa17c 100 epCallback[7] = &USBHAL::EP4_IN_callback;
mjoun 1:6e512faaa17c 101 epCallback[8] = &USBHAL::EP5_OUT_callback;
mjoun 1:6e512faaa17c 102 epCallback[9] = &USBHAL::EP5_IN_callback;
mjoun 1:6e512faaa17c 103 epCallback[10] = &USBHAL::EP6_OUT_callback;
mjoun 1:6e512faaa17c 104 epCallback[11] = &USBHAL::EP6_IN_callback;
mjoun 1:6e512faaa17c 105 epCallback[12] = &USBHAL::EP7_OUT_callback;
mjoun 1:6e512faaa17c 106 epCallback[13] = &USBHAL::EP7_IN_callback;
mjoun 1:6e512faaa17c 107 epCallback[14] = &USBHAL::EP8_OUT_callback;
mjoun 1:6e512faaa17c 108 epCallback[15] = &USBHAL::EP8_IN_callback;
mjoun 1:6e512faaa17c 109 epCallback[16] = &USBHAL::EP9_OUT_callback;
mjoun 1:6e512faaa17c 110 epCallback[17] = &USBHAL::EP9_IN_callback;
mjoun 1:6e512faaa17c 111 epCallback[18] = &USBHAL::EP10_OUT_callback;
mjoun 1:6e512faaa17c 112 epCallback[19] = &USBHAL::EP10_IN_callback;
mjoun 1:6e512faaa17c 113 epCallback[20] = &USBHAL::EP11_OUT_callback;
mjoun 1:6e512faaa17c 114 epCallback[21] = &USBHAL::EP11_IN_callback;
mjoun 1:6e512faaa17c 115 epCallback[22] = &USBHAL::EP12_OUT_callback;
mjoun 1:6e512faaa17c 116 epCallback[23] = &USBHAL::EP12_IN_callback;
mjoun 1:6e512faaa17c 117 epCallback[24] = &USBHAL::EP13_OUT_callback;
mjoun 1:6e512faaa17c 118 epCallback[25] = &USBHAL::EP13_IN_callback;
mjoun 1:6e512faaa17c 119 epCallback[26] = &USBHAL::EP14_OUT_callback;
mjoun 1:6e512faaa17c 120 epCallback[27] = &USBHAL::EP14_IN_callback;
mjoun 1:6e512faaa17c 121 epCallback[28] = &USBHAL::EP15_OUT_callback;
mjoun 1:6e512faaa17c 122 epCallback[29] = &USBHAL::EP15_IN_callback;
mjoun 1:6e512faaa17c 123
mjoun 1:6e512faaa17c 124 #if defined(TARGET_KL43Z)
mjoun 1:6e512faaa17c 125 // enable USBFS clock
mjoun 1:6e512faaa17c 126 SIM->SCGC4 |= SIM_SCGC4_USBFS_MASK;
mjoun 1:6e512faaa17c 127
mjoun 1:6e512faaa17c 128 // enable the IRC48M clock
mjoun 1:6e512faaa17c 129 USB0->CLK_RECOVER_IRC_EN |= USB_CLK_RECOVER_IRC_EN_IRC_EN_MASK;
mjoun 1:6e512faaa17c 130
mjoun 1:6e512faaa17c 131 // enable the USB clock recovery tuning
mjoun 1:6e512faaa17c 132 USB0->CLK_RECOVER_CTRL |= USB_CLK_RECOVER_CTRL_CLOCK_RECOVER_EN_MASK;
mjoun 1:6e512faaa17c 133
mjoun 1:6e512faaa17c 134 // choose usb src clock
mjoun 1:6e512faaa17c 135 SIM->SOPT2 |= SIM_SOPT2_USBSRC_MASK;
mjoun 1:6e512faaa17c 136 #else
mjoun 1:6e512faaa17c 137 // choose usb src as PLL
mjoun 1:6e512faaa17c 138 SIM->SOPT2 &= ~SIM_SOPT2_PLLFLLSEL_MASK;
mjoun 1:6e512faaa17c 139 SIM->SOPT2 |= (SIM_SOPT2_USBSRC_MASK | (1 << SIM_SOPT2_PLLFLLSEL_SHIFT));
mjoun 1:6e512faaa17c 140
mjoun 1:6e512faaa17c 141 // enable OTG clock
mjoun 1:6e512faaa17c 142 SIM->SCGC4 |= SIM_SCGC4_USBOTG_MASK;
mjoun 1:6e512faaa17c 143 #endif
mjoun 1:6e512faaa17c 144
mjoun 1:6e512faaa17c 145 // Attach IRQ
mjoun 1:6e512faaa17c 146 instance = this;
mjoun 1:6e512faaa17c 147 NVIC_SetVector(USB0_IRQn, (uint32_t)&_usbisr);
mjoun 1:6e512faaa17c 148 NVIC_EnableIRQ(USB0_IRQn);
mjoun 1:6e512faaa17c 149
mjoun 1:6e512faaa17c 150 // USB Module Configuration
mjoun 1:6e512faaa17c 151 // Reset USB Module
mjoun 1:6e512faaa17c 152 USB0->USBTRC0 |= USB_USBTRC0_USBRESET_MASK;
mjoun 1:6e512faaa17c 153 while(USB0->USBTRC0 & USB_USBTRC0_USBRESET_MASK);
mjoun 1:6e512faaa17c 154
mjoun 1:6e512faaa17c 155 // Set BDT Base Register
mjoun 1:6e512faaa17c 156 USB0->BDTPAGE1 = (uint8_t)((uint32_t)bdt>>8);
mjoun 1:6e512faaa17c 157 USB0->BDTPAGE2 = (uint8_t)((uint32_t)bdt>>16);
mjoun 1:6e512faaa17c 158 USB0->BDTPAGE3 = (uint8_t)((uint32_t)bdt>>24);
mjoun 1:6e512faaa17c 159
mjoun 1:6e512faaa17c 160 // Clear interrupt flag
mjoun 1:6e512faaa17c 161 USB0->ISTAT = 0xff;
mjoun 1:6e512faaa17c 162
mjoun 1:6e512faaa17c 163 // USB Interrupt Enablers
mjoun 1:6e512faaa17c 164 USB0->INTEN |= USB_INTEN_TOKDNEEN_MASK |
mjoun 1:6e512faaa17c 165 USB_INTEN_SOFTOKEN_MASK |
mjoun 1:6e512faaa17c 166 USB_INTEN_ERROREN_MASK |
mjoun 1:6e512faaa17c 167 USB_INTEN_USBRSTEN_MASK;
mjoun 1:6e512faaa17c 168
mjoun 1:6e512faaa17c 169 // Disable weak pull downs
mjoun 1:6e512faaa17c 170 USB0->USBCTRL &= ~(USB_USBCTRL_PDE_MASK | USB_USBCTRL_SUSP_MASK);
mjoun 1:6e512faaa17c 171
mjoun 1:6e512faaa17c 172 USB0->USBTRC0 |= 0x40;
mjoun 1:6e512faaa17c 173 }
mjoun 1:6e512faaa17c 174
mjoun 1:6e512faaa17c 175 USBHAL::~USBHAL(void) { }
mjoun 1:6e512faaa17c 176
mjoun 1:6e512faaa17c 177 void USBHAL::connect(void) {
mjoun 1:6e512faaa17c 178 // enable USB
mjoun 1:6e512faaa17c 179 USB0->CTL |= USB_CTL_USBENSOFEN_MASK;
mjoun 1:6e512faaa17c 180 // Pull up enable
mjoun 1:6e512faaa17c 181 USB0->CONTROL |= USB_CONTROL_DPPULLUPNONOTG_MASK;
mjoun 1:6e512faaa17c 182 }
mjoun 1:6e512faaa17c 183
mjoun 1:6e512faaa17c 184 void USBHAL::disconnect(void) {
mjoun 1:6e512faaa17c 185 // disable USB
mjoun 1:6e512faaa17c 186 USB0->CTL &= ~USB_CTL_USBENSOFEN_MASK;
mjoun 1:6e512faaa17c 187 // Pull up disable
mjoun 1:6e512faaa17c 188 USB0->CONTROL &= ~USB_CONTROL_DPPULLUPNONOTG_MASK;
mjoun 1:6e512faaa17c 189
mjoun 1:6e512faaa17c 190 //Free buffers if required:
mjoun 1:6e512faaa17c 191 for (int i = 0; i<(NUMBER_OF_PHYSICAL_ENDPOINTS - 2) * 2; i++) {
mjoun 1:6e512faaa17c 192 free(endpoint_buffer[i]);
mjoun 1:6e512faaa17c 193 endpoint_buffer[i] = NULL;
mjoun 1:6e512faaa17c 194 }
mjoun 1:6e512faaa17c 195 free(endpoint_buffer_iso[2]);
mjoun 1:6e512faaa17c 196 endpoint_buffer_iso[2] = NULL;
mjoun 1:6e512faaa17c 197 free(endpoint_buffer_iso[0]);
mjoun 1:6e512faaa17c 198 endpoint_buffer_iso[0] = NULL;
mjoun 1:6e512faaa17c 199 }
mjoun 1:6e512faaa17c 200
mjoun 1:6e512faaa17c 201 void USBHAL::configureDevice(void) {
mjoun 1:6e512faaa17c 202 // not needed
mjoun 1:6e512faaa17c 203 }
mjoun 1:6e512faaa17c 204
mjoun 1:6e512faaa17c 205 void USBHAL::unconfigureDevice(void) {
mjoun 1:6e512faaa17c 206 // not needed
mjoun 1:6e512faaa17c 207 }
mjoun 1:6e512faaa17c 208
mjoun 1:6e512faaa17c 209 void USBHAL::setAddress(uint8_t address) {
mjoun 1:6e512faaa17c 210 // we don't set the address now otherwise the usb controller does not ack
mjoun 1:6e512faaa17c 211 // we set a flag instead
mjoun 1:6e512faaa17c 212 // see usbisr when an IN token is received
mjoun 1:6e512faaa17c 213 set_addr = 1;
mjoun 1:6e512faaa17c 214 addr = address;
mjoun 1:6e512faaa17c 215 }
mjoun 1:6e512faaa17c 216
mjoun 1:6e512faaa17c 217 bool USBHAL::realiseEndpoint(uint8_t endpoint, uint32_t maxPacket, uint32_t flags) {
mjoun 1:6e512faaa17c 218 uint32_t handshake_flag = 0;
mjoun 1:6e512faaa17c 219 uint8_t * buf;
mjoun 1:6e512faaa17c 220
mjoun 1:6e512faaa17c 221 if (endpoint > NUMBER_OF_PHYSICAL_ENDPOINTS - 1) {
mjoun 1:6e512faaa17c 222 return false;
mjoun 1:6e512faaa17c 223 }
mjoun 1:6e512faaa17c 224
mjoun 1:6e512faaa17c 225 uint32_t log_endpoint = PHY_TO_LOG(endpoint);
mjoun 1:6e512faaa17c 226
mjoun 1:6e512faaa17c 227 if ((flags & ISOCHRONOUS) == 0) {
mjoun 1:6e512faaa17c 228 handshake_flag = USB_ENDPT_EPHSHK_MASK;
mjoun 1:6e512faaa17c 229 if (IN_EP(endpoint)) {
mjoun 1:6e512faaa17c 230 if (endpoint_buffer[EP_BDT_IDX(log_endpoint, TX, ODD)] == NULL)
mjoun 1:6e512faaa17c 231 endpoint_buffer[EP_BDT_IDX(log_endpoint, TX, ODD)] = (uint8_t *) malloc (64);
mjoun 1:6e512faaa17c 232 buf = &endpoint_buffer[EP_BDT_IDX(log_endpoint, TX, ODD)][0];
mjoun 1:6e512faaa17c 233 } else {
mjoun 1:6e512faaa17c 234 if (endpoint_buffer[EP_BDT_IDX(log_endpoint, RX, ODD)] == NULL)
mjoun 1:6e512faaa17c 235 endpoint_buffer[EP_BDT_IDX(log_endpoint, RX, ODD)] = (uint8_t *) malloc (64);
mjoun 1:6e512faaa17c 236 buf = &endpoint_buffer[EP_BDT_IDX(log_endpoint, RX, ODD)][0];
mjoun 1:6e512faaa17c 237 }
mjoun 1:6e512faaa17c 238 } else {
mjoun 1:6e512faaa17c 239 if (IN_EP(endpoint)) {
mjoun 1:6e512faaa17c 240 if (endpoint_buffer_iso[2] == NULL)
mjoun 1:6e512faaa17c 241 endpoint_buffer_iso[2] = (uint8_t *) malloc (1023);
mjoun 1:6e512faaa17c 242 buf = &endpoint_buffer_iso[2][0];
mjoun 1:6e512faaa17c 243 } else {
mjoun 1:6e512faaa17c 244 if (endpoint_buffer_iso[0] == NULL)
mjoun 1:6e512faaa17c 245 endpoint_buffer_iso[0] = (uint8_t *) malloc (1023);
mjoun 1:6e512faaa17c 246 buf = &endpoint_buffer_iso[0][0];
mjoun 1:6e512faaa17c 247 }
mjoun 1:6e512faaa17c 248 }
mjoun 1:6e512faaa17c 249
mjoun 1:6e512faaa17c 250 // IN endpt -> device to host (TX)
mjoun 1:6e512faaa17c 251 if (IN_EP(endpoint)) {
mjoun 1:6e512faaa17c 252 USB0->ENDPOINT[log_endpoint].ENDPT |= handshake_flag | // ep handshaking (not if iso endpoint)
mjoun 1:6e512faaa17c 253 USB_ENDPT_EPTXEN_MASK; // en TX (IN) tran
mjoun 1:6e512faaa17c 254 bdt[EP_BDT_IDX(log_endpoint, TX, ODD )].address = (uint32_t) buf;
mjoun 1:6e512faaa17c 255 bdt[EP_BDT_IDX(log_endpoint, TX, EVEN)].address = 0;
mjoun 1:6e512faaa17c 256 }
mjoun 1:6e512faaa17c 257 // OUT endpt -> host to device (RX)
mjoun 1:6e512faaa17c 258 else {
mjoun 1:6e512faaa17c 259 USB0->ENDPOINT[log_endpoint].ENDPT |= handshake_flag | // ep handshaking (not if iso endpoint)
mjoun 1:6e512faaa17c 260 USB_ENDPT_EPRXEN_MASK; // en RX (OUT) tran.
mjoun 1:6e512faaa17c 261 bdt[EP_BDT_IDX(log_endpoint, RX, ODD )].byte_count = maxPacket;
mjoun 1:6e512faaa17c 262 bdt[EP_BDT_IDX(log_endpoint, RX, ODD )].address = (uint32_t) buf;
mjoun 1:6e512faaa17c 263 bdt[EP_BDT_IDX(log_endpoint, RX, ODD )].info = BD_OWN_MASK | BD_DTS_MASK;
mjoun 1:6e512faaa17c 264 bdt[EP_BDT_IDX(log_endpoint, RX, EVEN)].info = 0;
mjoun 1:6e512faaa17c 265 }
mjoun 1:6e512faaa17c 266
mjoun 1:6e512faaa17c 267 Data1 |= (1 << endpoint);
mjoun 1:6e512faaa17c 268
mjoun 1:6e512faaa17c 269 return true;
mjoun 1:6e512faaa17c 270 }
mjoun 1:6e512faaa17c 271
mjoun 1:6e512faaa17c 272 // read setup packet
mjoun 1:6e512faaa17c 273 void USBHAL::EP0setup(uint8_t *buffer) {
mjoun 1:6e512faaa17c 274 uint32_t sz;
mjoun 1:6e512faaa17c 275 endpointReadResult(EP0OUT, buffer, &sz);
mjoun 1:6e512faaa17c 276 }
mjoun 1:6e512faaa17c 277
mjoun 1:6e512faaa17c 278 void USBHAL::EP0readStage(void) {
mjoun 1:6e512faaa17c 279 Data1 &= ~1UL; // set DATA0
mjoun 1:6e512faaa17c 280 bdt[0].info = (BD_DTS_MASK | BD_OWN_MASK);
mjoun 1:6e512faaa17c 281 }
mjoun 1:6e512faaa17c 282
mjoun 1:6e512faaa17c 283 void USBHAL::EP0read(void) {
mjoun 1:6e512faaa17c 284 uint32_t idx = EP_BDT_IDX(PHY_TO_LOG(EP0OUT), RX, 0);
mjoun 1:6e512faaa17c 285 bdt[idx].byte_count = MAX_PACKET_SIZE_EP0;
mjoun 1:6e512faaa17c 286 }
mjoun 1:6e512faaa17c 287
mjoun 1:6e512faaa17c 288 uint32_t USBHAL::EP0getReadResult(uint8_t *buffer) {
mjoun 1:6e512faaa17c 289 uint32_t sz;
mjoun 1:6e512faaa17c 290 endpointReadResult(EP0OUT, buffer, &sz);
mjoun 1:6e512faaa17c 291 return sz;
mjoun 1:6e512faaa17c 292 }
mjoun 1:6e512faaa17c 293
mjoun 1:6e512faaa17c 294 void USBHAL::EP0write(uint8_t *buffer, uint32_t size) {
mjoun 1:6e512faaa17c 295 endpointWrite(EP0IN, buffer, size);
mjoun 1:6e512faaa17c 296 }
mjoun 1:6e512faaa17c 297
mjoun 1:6e512faaa17c 298 void USBHAL::EP0getWriteResult(void) {
mjoun 1:6e512faaa17c 299 }
mjoun 1:6e512faaa17c 300
mjoun 1:6e512faaa17c 301 void USBHAL::EP0stall(void) {
mjoun 1:6e512faaa17c 302 stallEndpoint(EP0OUT);
mjoun 1:6e512faaa17c 303 }
mjoun 1:6e512faaa17c 304
mjoun 1:6e512faaa17c 305 EP_STATUS USBHAL::endpointRead(uint8_t endpoint, uint32_t maximumSize) {
mjoun 1:6e512faaa17c 306 endpoint = PHY_TO_LOG(endpoint);
mjoun 1:6e512faaa17c 307 uint32_t idx = EP_BDT_IDX(endpoint, RX, 0);
mjoun 1:6e512faaa17c 308 bdt[idx].byte_count = maximumSize;
mjoun 1:6e512faaa17c 309 return EP_PENDING;
mjoun 1:6e512faaa17c 310 }
mjoun 1:6e512faaa17c 311
mjoun 1:6e512faaa17c 312 EP_STATUS USBHAL::endpointReadResult(uint8_t endpoint, uint8_t * buffer, uint32_t *bytesRead) {
mjoun 1:6e512faaa17c 313 uint32_t n, sz, idx, setup = 0;
mjoun 1:6e512faaa17c 314 uint8_t not_iso;
mjoun 1:6e512faaa17c 315 uint8_t * ep_buf;
mjoun 1:6e512faaa17c 316
mjoun 1:6e512faaa17c 317 uint32_t log_endpoint = PHY_TO_LOG(endpoint);
mjoun 1:6e512faaa17c 318
mjoun 1:6e512faaa17c 319 if (endpoint > NUMBER_OF_PHYSICAL_ENDPOINTS - 1) {
mjoun 1:6e512faaa17c 320 return EP_INVALID;
mjoun 1:6e512faaa17c 321 }
mjoun 1:6e512faaa17c 322
mjoun 1:6e512faaa17c 323 // if read on a IN endpoint -> error
mjoun 1:6e512faaa17c 324 if (IN_EP(endpoint)) {
mjoun 1:6e512faaa17c 325 return EP_INVALID;
mjoun 1:6e512faaa17c 326 }
mjoun 1:6e512faaa17c 327
mjoun 1:6e512faaa17c 328 idx = EP_BDT_IDX(log_endpoint, RX, 0);
mjoun 1:6e512faaa17c 329 sz = bdt[idx].byte_count;
mjoun 1:6e512faaa17c 330 not_iso = USB0->ENDPOINT[log_endpoint].ENDPT & USB_ENDPT_EPHSHK_MASK;
mjoun 1:6e512faaa17c 331
mjoun 1:6e512faaa17c 332 //for isochronous endpoint, we don't wait an interrupt
mjoun 1:6e512faaa17c 333 if ((log_endpoint != 0) && not_iso && !(epComplete & EP(endpoint))) {
mjoun 1:6e512faaa17c 334 return EP_PENDING;
mjoun 1:6e512faaa17c 335 }
mjoun 1:6e512faaa17c 336
mjoun 1:6e512faaa17c 337 if ((log_endpoint == 0) && (TOK_PID(idx) == SETUP_TOKEN)) {
mjoun 1:6e512faaa17c 338 setup = 1;
mjoun 1:6e512faaa17c 339 }
mjoun 1:6e512faaa17c 340
mjoun 1:6e512faaa17c 341 // non iso endpoint
mjoun 1:6e512faaa17c 342 if (not_iso) {
mjoun 1:6e512faaa17c 343 ep_buf = endpoint_buffer[idx];
mjoun 1:6e512faaa17c 344 } else {
mjoun 1:6e512faaa17c 345 ep_buf = endpoint_buffer_iso[0];
mjoun 1:6e512faaa17c 346 }
mjoun 1:6e512faaa17c 347
mjoun 1:6e512faaa17c 348 for (n = 0; n < sz; n++) {
mjoun 1:6e512faaa17c 349 buffer[n] = ep_buf[n];
mjoun 1:6e512faaa17c 350 }
mjoun 1:6e512faaa17c 351
mjoun 1:6e512faaa17c 352 if (((Data1 >> endpoint) & 1) == ((bdt[idx].info >> 6) & 1)) {
mjoun 1:6e512faaa17c 353 if (setup && (buffer[6] == 0)) // if no setup data stage,
mjoun 1:6e512faaa17c 354 Data1 &= ~1UL; // set DATA0
mjoun 1:6e512faaa17c 355 else
mjoun 1:6e512faaa17c 356 Data1 ^= (1 << endpoint);
mjoun 1:6e512faaa17c 357 }
mjoun 1:6e512faaa17c 358
mjoun 1:6e512faaa17c 359 if (((Data1 >> endpoint) & 1)) {
mjoun 1:6e512faaa17c 360 bdt[idx].info = BD_DTS_MASK | BD_DATA01_MASK | BD_OWN_MASK;
mjoun 1:6e512faaa17c 361 }
mjoun 1:6e512faaa17c 362 else {
mjoun 1:6e512faaa17c 363 bdt[idx].info = BD_DTS_MASK | BD_OWN_MASK;
mjoun 1:6e512faaa17c 364 }
mjoun 1:6e512faaa17c 365
mjoun 1:6e512faaa17c 366 USB0->CTL &= ~USB_CTL_TXSUSPENDTOKENBUSY_MASK;
mjoun 1:6e512faaa17c 367 *bytesRead = sz;
mjoun 1:6e512faaa17c 368
mjoun 1:6e512faaa17c 369 epComplete &= ~EP(endpoint);
mjoun 1:6e512faaa17c 370 return EP_COMPLETED;
mjoun 1:6e512faaa17c 371 }
mjoun 1:6e512faaa17c 372
mjoun 1:6e512faaa17c 373 EP_STATUS USBHAL::endpointWrite(uint8_t endpoint, uint8_t *data, uint32_t size) {
mjoun 1:6e512faaa17c 374 uint32_t idx, n;
mjoun 1:6e512faaa17c 375 uint8_t * ep_buf;
mjoun 1:6e512faaa17c 376
mjoun 1:6e512faaa17c 377 if (endpoint > NUMBER_OF_PHYSICAL_ENDPOINTS - 1) {
mjoun 1:6e512faaa17c 378 return EP_INVALID;
mjoun 1:6e512faaa17c 379 }
mjoun 1:6e512faaa17c 380
mjoun 1:6e512faaa17c 381 // if write on a OUT endpoint -> error
mjoun 1:6e512faaa17c 382 if (OUT_EP(endpoint)) {
mjoun 1:6e512faaa17c 383 return EP_INVALID;
mjoun 1:6e512faaa17c 384 }
mjoun 1:6e512faaa17c 385
mjoun 1:6e512faaa17c 386 idx = EP_BDT_IDX(PHY_TO_LOG(endpoint), TX, 0);
mjoun 1:6e512faaa17c 387 bdt[idx].byte_count = size;
mjoun 1:6e512faaa17c 388
mjoun 1:6e512faaa17c 389
mjoun 1:6e512faaa17c 390 // non iso endpoint
mjoun 1:6e512faaa17c 391 if (USB0->ENDPOINT[PHY_TO_LOG(endpoint)].ENDPT & USB_ENDPT_EPHSHK_MASK) {
mjoun 1:6e512faaa17c 392 ep_buf = endpoint_buffer[idx];
mjoun 1:6e512faaa17c 393 } else {
mjoun 1:6e512faaa17c 394 ep_buf = endpoint_buffer_iso[2];
mjoun 1:6e512faaa17c 395 }
mjoun 1:6e512faaa17c 396
mjoun 1:6e512faaa17c 397 for (n = 0; n < size; n++) {
mjoun 1:6e512faaa17c 398 ep_buf[n] = data[n];
mjoun 1:6e512faaa17c 399 }
mjoun 1:6e512faaa17c 400
mjoun 1:6e512faaa17c 401 if ((Data1 >> endpoint) & 1) {
mjoun 1:6e512faaa17c 402 bdt[idx].info = BD_OWN_MASK | BD_DTS_MASK;
mjoun 1:6e512faaa17c 403 } else {
mjoun 1:6e512faaa17c 404 bdt[idx].info = BD_OWN_MASK | BD_DTS_MASK | BD_DATA01_MASK;
mjoun 1:6e512faaa17c 405 }
mjoun 1:6e512faaa17c 406
mjoun 1:6e512faaa17c 407 Data1 ^= (1 << endpoint);
mjoun 1:6e512faaa17c 408
mjoun 1:6e512faaa17c 409 return EP_PENDING;
mjoun 1:6e512faaa17c 410 }
mjoun 1:6e512faaa17c 411
mjoun 1:6e512faaa17c 412 EP_STATUS USBHAL::endpointWriteResult(uint8_t endpoint) {
mjoun 1:6e512faaa17c 413 if (epComplete & EP(endpoint)) {
mjoun 1:6e512faaa17c 414 epComplete &= ~EP(endpoint);
mjoun 1:6e512faaa17c 415 return EP_COMPLETED;
mjoun 1:6e512faaa17c 416 }
mjoun 1:6e512faaa17c 417
mjoun 1:6e512faaa17c 418 return EP_PENDING;
mjoun 1:6e512faaa17c 419 }
mjoun 1:6e512faaa17c 420
mjoun 1:6e512faaa17c 421 void USBHAL::stallEndpoint(uint8_t endpoint) {
mjoun 1:6e512faaa17c 422 USB0->ENDPOINT[PHY_TO_LOG(endpoint)].ENDPT |= USB_ENDPT_EPSTALL_MASK;
mjoun 1:6e512faaa17c 423 }
mjoun 1:6e512faaa17c 424
mjoun 1:6e512faaa17c 425 void USBHAL::unstallEndpoint(uint8_t endpoint) {
mjoun 1:6e512faaa17c 426 USB0->ENDPOINT[PHY_TO_LOG(endpoint)].ENDPT &= ~USB_ENDPT_EPSTALL_MASK;
mjoun 1:6e512faaa17c 427 }
mjoun 1:6e512faaa17c 428
mjoun 1:6e512faaa17c 429 bool USBHAL::getEndpointStallState(uint8_t endpoint) {
mjoun 1:6e512faaa17c 430 uint8_t stall = (USB0->ENDPOINT[PHY_TO_LOG(endpoint)].ENDPT & USB_ENDPT_EPSTALL_MASK);
mjoun 1:6e512faaa17c 431 return (stall) ? true : false;
mjoun 1:6e512faaa17c 432 }
mjoun 1:6e512faaa17c 433
mjoun 1:6e512faaa17c 434 void USBHAL::remoteWakeup(void) {
mjoun 1:6e512faaa17c 435 // [TODO]
mjoun 1:6e512faaa17c 436 }
mjoun 1:6e512faaa17c 437
mjoun 1:6e512faaa17c 438
mjoun 1:6e512faaa17c 439 void USBHAL::_usbisr(void) {
mjoun 1:6e512faaa17c 440 instance->usbisr();
mjoun 1:6e512faaa17c 441 }
mjoun 1:6e512faaa17c 442
mjoun 1:6e512faaa17c 443
mjoun 1:6e512faaa17c 444 void USBHAL::usbisr(void) {
mjoun 1:6e512faaa17c 445 uint8_t i;
mjoun 1:6e512faaa17c 446 uint8_t istat = USB0->ISTAT;
mjoun 1:6e512faaa17c 447
mjoun 1:6e512faaa17c 448 // reset interrupt
mjoun 1:6e512faaa17c 449 if (istat & USB_ISTAT_USBRST_MASK) {
mjoun 1:6e512faaa17c 450 // disable all endpt
mjoun 1:6e512faaa17c 451 for(i = 0; i < 16; i++) {
mjoun 1:6e512faaa17c 452 USB0->ENDPOINT[i].ENDPT = 0x00;
mjoun 1:6e512faaa17c 453 }
mjoun 1:6e512faaa17c 454
mjoun 1:6e512faaa17c 455 // enable control endpoint
mjoun 1:6e512faaa17c 456 realiseEndpoint(EP0OUT, MAX_PACKET_SIZE_EP0, 0);
mjoun 1:6e512faaa17c 457 realiseEndpoint(EP0IN, MAX_PACKET_SIZE_EP0, 0);
mjoun 1:6e512faaa17c 458
mjoun 1:6e512faaa17c 459 Data1 = 0x55555555;
mjoun 1:6e512faaa17c 460 USB0->CTL |= USB_CTL_ODDRST_MASK;
mjoun 1:6e512faaa17c 461
mjoun 1:6e512faaa17c 462 USB0->ISTAT = 0xFF; // clear all interrupt status flags
mjoun 1:6e512faaa17c 463 USB0->ERRSTAT = 0xFF; // clear all error flags
mjoun 1:6e512faaa17c 464 USB0->ERREN = 0xFF; // enable error interrupt sources
mjoun 1:6e512faaa17c 465 USB0->ADDR = 0x00; // set default address
mjoun 1:6e512faaa17c 466
mjoun 1:6e512faaa17c 467 return;
mjoun 1:6e512faaa17c 468 }
mjoun 1:6e512faaa17c 469
mjoun 1:6e512faaa17c 470 // resume interrupt
mjoun 1:6e512faaa17c 471 if (istat & USB_ISTAT_RESUME_MASK) {
mjoun 1:6e512faaa17c 472 USB0->ISTAT = USB_ISTAT_RESUME_MASK;
mjoun 1:6e512faaa17c 473 }
mjoun 1:6e512faaa17c 474
mjoun 1:6e512faaa17c 475 // SOF interrupt
mjoun 1:6e512faaa17c 476 if (istat & USB_ISTAT_SOFTOK_MASK) {
mjoun 1:6e512faaa17c 477 USB0->ISTAT = USB_ISTAT_SOFTOK_MASK;
mjoun 1:6e512faaa17c 478 // SOF event, read frame number
mjoun 1:6e512faaa17c 479 SOF(frameNumber());
mjoun 1:6e512faaa17c 480 }
mjoun 1:6e512faaa17c 481
mjoun 1:6e512faaa17c 482 // stall interrupt
mjoun 1:6e512faaa17c 483 if (istat & 1<<7) {
mjoun 1:6e512faaa17c 484 if (USB0->ENDPOINT[0].ENDPT & USB_ENDPT_EPSTALL_MASK)
mjoun 1:6e512faaa17c 485 USB0->ENDPOINT[0].ENDPT &= ~USB_ENDPT_EPSTALL_MASK;
mjoun 1:6e512faaa17c 486 USB0->ISTAT |= USB_ISTAT_STALL_MASK;
mjoun 1:6e512faaa17c 487 }
mjoun 1:6e512faaa17c 488
mjoun 1:6e512faaa17c 489 // token interrupt
mjoun 1:6e512faaa17c 490 if (istat & 1<<3) {
mjoun 1:6e512faaa17c 491 uint32_t num = (USB0->STAT >> 4) & 0x0F;
mjoun 1:6e512faaa17c 492 uint32_t dir = (USB0->STAT >> 3) & 0x01;
mjoun 1:6e512faaa17c 493 uint32_t ev_odd = (USB0->STAT >> 2) & 0x01;
mjoun 1:6e512faaa17c 494 int endpoint = (num << 1) | dir;
mjoun 1:6e512faaa17c 495
mjoun 1:6e512faaa17c 496 // setup packet
mjoun 1:6e512faaa17c 497 if ((num == 0) && (TOK_PID((EP_BDT_IDX(num, dir, ev_odd))) == SETUP_TOKEN)) {
mjoun 1:6e512faaa17c 498 Data1 &= ~0x02;
mjoun 1:6e512faaa17c 499 bdt[EP_BDT_IDX(0, TX, EVEN)].info &= ~BD_OWN_MASK;
mjoun 1:6e512faaa17c 500 bdt[EP_BDT_IDX(0, TX, ODD)].info &= ~BD_OWN_MASK;
mjoun 1:6e512faaa17c 501
mjoun 1:6e512faaa17c 502 // EP0 SETUP event (SETUP data received)
mjoun 1:6e512faaa17c 503 EP0setupCallback();
mjoun 1:6e512faaa17c 504
mjoun 1:6e512faaa17c 505 } else {
mjoun 1:6e512faaa17c 506 // OUT packet
mjoun 1:6e512faaa17c 507 if (TOK_PID((EP_BDT_IDX(num, dir, ev_odd))) == OUT_TOKEN) {
mjoun 1:6e512faaa17c 508 if (num == 0)
mjoun 1:6e512faaa17c 509 EP0out();
mjoun 1:6e512faaa17c 510 else {
mjoun 1:6e512faaa17c 511 epComplete |= EP(endpoint);
mjoun 1:6e512faaa17c 512 if ((instance->*(epCallback[endpoint - 2]))()) {
mjoun 1:6e512faaa17c 513 epComplete &= ~EP(endpoint);
mjoun 1:6e512faaa17c 514 }
mjoun 1:6e512faaa17c 515 }
mjoun 1:6e512faaa17c 516 }
mjoun 1:6e512faaa17c 517
mjoun 1:6e512faaa17c 518 // IN packet
mjoun 1:6e512faaa17c 519 if (TOK_PID((EP_BDT_IDX(num, dir, ev_odd))) == IN_TOKEN) {
mjoun 1:6e512faaa17c 520 if (num == 0) {
mjoun 1:6e512faaa17c 521 EP0in();
mjoun 1:6e512faaa17c 522 if (set_addr == 1) {
mjoun 1:6e512faaa17c 523 USB0->ADDR = addr & 0x7F;
mjoun 1:6e512faaa17c 524 set_addr = 0;
mjoun 1:6e512faaa17c 525 }
mjoun 1:6e512faaa17c 526 }
mjoun 1:6e512faaa17c 527 else {
mjoun 1:6e512faaa17c 528 epComplete |= EP(endpoint);
mjoun 1:6e512faaa17c 529 if ((instance->*(epCallback[endpoint - 2]))()) {
mjoun 1:6e512faaa17c 530 epComplete &= ~EP(endpoint);
mjoun 1:6e512faaa17c 531 }
mjoun 1:6e512faaa17c 532 }
mjoun 1:6e512faaa17c 533 }
mjoun 1:6e512faaa17c 534 }
mjoun 1:6e512faaa17c 535
mjoun 1:6e512faaa17c 536 USB0->ISTAT = USB_ISTAT_TOKDNE_MASK;
mjoun 1:6e512faaa17c 537 }
mjoun 1:6e512faaa17c 538
mjoun 1:6e512faaa17c 539 // sleep interrupt
mjoun 1:6e512faaa17c 540 if (istat & 1<<4) {
mjoun 1:6e512faaa17c 541 USB0->ISTAT |= USB_ISTAT_SLEEP_MASK;
mjoun 1:6e512faaa17c 542 }
mjoun 1:6e512faaa17c 543
mjoun 1:6e512faaa17c 544 // error interrupt
mjoun 1:6e512faaa17c 545 if (istat & USB_ISTAT_ERROR_MASK) {
mjoun 1:6e512faaa17c 546 USB0->ERRSTAT = 0xFF;
mjoun 1:6e512faaa17c 547 USB0->ISTAT |= USB_ISTAT_ERROR_MASK;
mjoun 1:6e512faaa17c 548 }
mjoun 1:6e512faaa17c 549 }
mjoun 1:6e512faaa17c 550
mjoun 1:6e512faaa17c 551
mjoun 1:6e512faaa17c 552 #endif