MR raw bit

Fork of MMA8451Q by Emilio Monti

Committer:
mireyarod23
Date:
Mon Feb 20 08:43:35 2017 +0000
Revision:
5:56050102ef00
Parent:
3:db7126dbd63f
Changes to raw bits;

Who changed what in which revision?

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samux 1:d2630136d51e 1 /* Copyright (c) 2010-2011 mbed.org, MIT License
samux 1:d2630136d51e 2 *
samux 1:d2630136d51e 3 * Permission is hereby granted, free of charge, to any person obtaining a copy of this software
samux 1:d2630136d51e 4 * and associated documentation files (the "Software"), to deal in the Software without
samux 1:d2630136d51e 5 * restriction, including without limitation the rights to use, copy, modify, merge, publish,
samux 1:d2630136d51e 6 * distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the
samux 1:d2630136d51e 7 * Software is furnished to do so, subject to the following conditions:
samux 1:d2630136d51e 8 *
samux 1:d2630136d51e 9 * The above copyright notice and this permission notice shall be included in all copies or
samux 1:d2630136d51e 10 * substantial portions of the Software.
samux 1:d2630136d51e 11 *
samux 1:d2630136d51e 12 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
samux 1:d2630136d51e 13 * BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
samux 1:d2630136d51e 14 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM,
samux 1:d2630136d51e 15 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
samux 1:d2630136d51e 16 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
samux 1:d2630136d51e 17 */
samux 1:d2630136d51e 18
emilmont 0:6149091f755d 19 #include "MMA8451Q.h"
emilmont 0:6149091f755d 20
samux 1:d2630136d51e 21 #define REG_WHO_AM_I 0x0D
samux 1:d2630136d51e 22 #define REG_CTRL_REG_1 0x2A
emilmont 0:6149091f755d 23 #define REG_OUT_X_MSB 0x01
emilmont 0:6149091f755d 24 #define REG_OUT_Y_MSB 0x03
emilmont 0:6149091f755d 25 #define REG_OUT_Z_MSB 0x05
mireyarod23 5:56050102ef00 26 #define XYZ_DATA_CFG 0x0E
emilmont 0:6149091f755d 27
samux 1:d2630136d51e 28 #define UINT14_MAX 16383
mireyarod23 5:56050102ef00 29 #define MAX_2G 0x00
mireyarod23 5:56050102ef00 30 #define MAX_4G 0X01
mireyarod23 5:56050102ef00 31 #define MAX_8G 0X10
mireyarod23 5:56050102ef00 32
mireyarod23 5:56050102ef00 33 #define GSCALING 1024.0
mireyarod23 5:56050102ef00 34 #define //define property that will return all bits
mireyarod23 5:56050102ef00 35
mireyarod23 5:56050102ef00 36
emilmont 0:6149091f755d 37
emilmont 0:6149091f755d 38 MMA8451Q::MMA8451Q(PinName sda, PinName scl, int addr) : m_i2c(sda, scl), m_addr(addr) {
emilmont 0:6149091f755d 39 // activate the peripheral
emilmont 0:6149091f755d 40 uint8_t data[2] = {REG_CTRL_REG_1, 0x01};
samux 1:d2630136d51e 41 writeRegs(data, 2);
emilmont 0:6149091f755d 42 }
emilmont 0:6149091f755d 43
mireyarod23 5:56050102ef00 44 void MMA8451Q::setGLImit()
mireyarod23 5:56050102ef00 45 {
mireyarod23 5:56050102ef00 46 uint8_t data[2] = {EEG_CTRL_REG_1, 0X00};
mireyarod23 5:56050102ef00 47 writeRegs(data, 2); //put in standby
mireyarod23 5:56050102ef00 48 data[0] = XYZ_DATA_CFG;
mireyarod23 5:56050102ef00 49 data[1] = 0x02;
mireyarod23 5:56050102ef00 50 writeRegs(data, 2);
mireyarod23 5:56050102ef00 51 data[0] = REG_CTRL_REG_1;
mireyarod23 5:56050102ef00 52 data[1] = 0x01;
mireyarod23 5:56050102ef00 53 writeRegs(data, 2); //make active
mireyarod23 5:56050102ef00 54 }
mireyarod23 5:56050102ef00 55
emilmont 0:6149091f755d 56 MMA8451Q::~MMA8451Q() { }
emilmont 0:6149091f755d 57
emilmont 0:6149091f755d 58 uint8_t MMA8451Q::getWhoAmI() {
emilmont 0:6149091f755d 59 uint8_t who_am_i = 0;
samux 1:d2630136d51e 60 readRegs(REG_WHO_AM_I, &who_am_i, 1);
emilmont 0:6149091f755d 61 return who_am_i;
emilmont 0:6149091f755d 62 }
emilmont 0:6149091f755d 63
chris 3:db7126dbd63f 64 float MMA8451Q::getAccX() {
chris 3:db7126dbd63f 65 return (float(getAccAxis(REG_OUT_X_MSB))/4096.0);
emilmont 0:6149091f755d 66 }
emilmont 0:6149091f755d 67
chris 3:db7126dbd63f 68 float MMA8451Q::getAccY() {
chris 3:db7126dbd63f 69 return (float(getAccAxis(REG_OUT_Y_MSB))/4096.0);
emilmont 0:6149091f755d 70 }
emilmont 0:6149091f755d 71
chris 3:db7126dbd63f 72 float MMA8451Q::getAccZ() {
chris 3:db7126dbd63f 73 return (float(getAccAxis(REG_OUT_Z_MSB))/4096.0);
emilmont 0:6149091f755d 74 }
emilmont 0:6149091f755d 75
chris 3:db7126dbd63f 76 void MMA8451Q::getAccAllAxis(float * res) {
emilmont 0:6149091f755d 77 res[0] = getAccX();
emilmont 0:6149091f755d 78 res[1] = getAccY();
emilmont 0:6149091f755d 79 res[2] = getAccZ();
emilmont 0:6149091f755d 80 }
emilmont 0:6149091f755d 81
emilmont 0:6149091f755d 82 int16_t MMA8451Q::getAccAxis(uint8_t addr) {
emilmont 0:6149091f755d 83 int16_t acc;
emilmont 0:6149091f755d 84 uint8_t res[2];
samux 1:d2630136d51e 85 readRegs(addr, res, 2);
emilmont 0:6149091f755d 86
emilmont 0:6149091f755d 87 acc = (res[0] << 6) | (res[1] >> 2);
emilmont 0:6149091f755d 88 if (acc > UINT14_MAX/2)
emilmont 0:6149091f755d 89 acc -= UINT14_MAX;
emilmont 0:6149091f755d 90
emilmont 0:6149091f755d 91 return acc;
emilmont 0:6149091f755d 92 }
emilmont 0:6149091f755d 93
samux 1:d2630136d51e 94 void MMA8451Q::readRegs(int addr, uint8_t * data, int len) {
emilmont 0:6149091f755d 95 char t[1] = {addr};
emilmont 0:6149091f755d 96 m_i2c.write(m_addr, t, 1, true);
emilmont 0:6149091f755d 97 m_i2c.read(m_addr, (char *)data, len);
emilmont 0:6149091f755d 98 }
emilmont 0:6149091f755d 99
samux 1:d2630136d51e 100 void MMA8451Q::writeRegs(uint8_t * data, int len) {
emilmont 0:6149091f755d 101 m_i2c.write(m_addr, (char *)data, len);
mireyarod23 5:56050102ef00 102
mireyarod23 5:56050102ef00 103 //return the values to be able to read
mireyarod23 5:56050102ef00 104 return {m_addr, (char *) data, len};
emilmont 0:6149091f755d 105 }