fuyuno sakura / Mbed 2 deprecated OV7670_with_AL422B_QVGA_LCD_test

Dependencies:   mbed

Files at this revision

API Documentation at this revision

Revision 1:509676f3be32, committed 2012-02-17

Comitter:
mio
Date:
Fri Feb 17 15:06:15 2012 +0000
Parent:
0:f3f80a0695ff
Commit message:
Hflip Vflip init param support.

Changed in this revision

main.cpp Show annotated file Show diff for this revision Revisions of this file
ov7670.h Show annotated file Show diff for this revision Revisions of this file 
diff -r f3f80a0695ff -r 509676f3be32 main.cpp
--- a/main.cpp	Fri Feb 17 13:07:18 2012 +0000
+++ b/main.cpp	Fri Feb 17 15:06:15 2012 +0000
@@ -20,6 +20,8 @@
 Serial pc(USBTX,USBRX) ;
 Timer t;
 
+#undef QQVGA
+
 #ifdef QQVGA
 # define SIZEX (160)
 # define SIZEY (120)
@@ -34,9 +36,9 @@
     camera.Reset() ;
 
 #ifdef QQVGA
-    camera.InitQQVGA565() ;
+    camera.InitQQVGA565(true,false) ;
 #else
-    camera.InitQVGA565() ;
+    camera.InitQVGA565(true,false) ;
 #endif
 
     // CAPTURE and SEND LOOP

diff -r f3f80a0695ff -r 509676f3be32 ov7670.h
--- a/ov7670.h	Fri Feb 17 13:07:18 2012 +0000
+++ b/ov7670.h	Fri Feb 17 15:06:15 2012 +0000
@@ -113,7 +113,7 @@
         wait_ms(200) ;
     }
     
-    void InitQQVGA565() {
+    void InitQQVGA565(bool flipv,bool fliph) {
         // QQVGA RGB565
         WriteReg(REG_CLKRC,0x80);
         WriteReg(REG_COM11,0x0A) ;
@@ -130,6 +130,7 @@
         WriteReg(REG_COM10,0x02) ;
         WriteReg(REG_COM3, 0x04);
         WriteReg(REG_COM14, 0x1a);
+        WriteReg(REG_MVFP,0x07 | (flipv ? 0x10:0) | (fliph ? 0x20:0)) ;
         WriteReg(0x72, 0x22);
         WriteReg(0x73, 0xf2);
 
@@ -159,7 +160,7 @@
         WriteReg(0xb0,0x84);
     }    
 
-    void InitQVGA565() {
+    void InitQVGA565(bool flipv,bool fliph) {
         // QVGA RGB565
         WriteReg(REG_CLKRC,0x80);
         WriteReg(REG_COM11,0x0A) ;
@@ -176,6 +177,7 @@
         WriteReg(REG_COM10,0x02) ;
         WriteReg(REG_COM3, 0x04);
         WriteReg(REG_COM14, 0x19);
+        WriteReg(REG_MVFP,0x07 | (flipv ? 0x10:0) | (fliph ? 0x20:0)) ;
         WriteReg(0x72, 0x11);
         WriteReg(0x73, 0xf1);