OV7670 with FIFO AL422B (TORAGI Camera TYPE B) test program

Dependencies:   mbed

Files at this revision

API Documentation at this revision

Comitter:
mio
Date:
Tue Feb 14 13:25:25 2012 +0000
Commit message:
First Version

Changed in this revision

main.cpp Show annotated file Show diff for this revision Revisions of this file
mbed.bld Show annotated file Show diff for this revision Revisions of this file
ov7670.h Show annotated file Show diff for this revision Revisions of this file
ov7670reg.h Show annotated file Show diff for this revision Revisions of this file
diff -r 000000000000 -r d69a19a5c0ff main.cpp
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/main.cpp	Tue Feb 14 13:25:25 2012 +0000
@@ -0,0 +1,76 @@
+//
+// OV7670 + FIFO AL422B camera board test
+//
+#include "mbed.h"
+#include "ov7670.h"
+
+OV7670 camera(
+    p28,p27,       // SDA,SCL(I2C / SCCB)
+    p21,p22,p20,   // VSYNC,HREF,WEN(FIFO)
+    p19,p18,p17,p16,p15,p14,p13,p12, // D7-D0
+    p23,p24,p25) ; // RRST,OE,RCLK
+
+Serial pc(USBTX,USBRX) ;
+
+#define SIZEX (160)
+#define SIZEY (120)
+
+int main() {
+    int i ;
+    pc.baud(115200) ;
+    pc.printf("Camera resetting..\r\n") ;
+
+    camera.Reset() ;
+
+    pc.printf("Before Init...\r\n") ;    
+    pc.printf("AD : +0 +1 +2 +3 +4 +5 +6 +7 +8 +9 +A +B +C +D +E +F") ;
+    for (i=0;i<OV7670_REGMAX;i++) {
+        int data ;
+        data = camera.ReadReg(i) ; // READ REG
+        if ((i & 0x0F) == 0) {
+            pc.printf("\r\n%02X : ",i) ;
+        }
+        pc.printf("%02X ",data) ;
+    }
+    pc.printf("\r\n") ;
+
+    camera.InitQQVGA() ;
+
+    pc.printf("After Init...\r\n") ;    
+    pc.printf("AD : +0 +1 +2 +3 +4 +5 +6 +7 +8 +9 +A +B +C +D +E +F") ;
+    for (i=0;i<OV7670_REGMAX;i++) {
+        int data ;
+        data = camera.ReadReg(i) ; // READ REG
+        if ((i & 0x0F) == 0) {
+            pc.printf("\r\n%02X : ",i) ;
+        }
+        pc.printf("%02X ",data) ;
+    }
+    pc.printf("\r\n") ;
+    
+    // CAPTURE and SEND LOOP
+    while(1)
+    {
+        pc.printf("Hit Any Key to send RGBx160x120 Capture Data.\r\n") ;
+        while(!pc.readable()) ;
+        pc.getc() ;
+        camera.CaptureNext() ;
+        while(camera.CaptureDone() == false) ;
+        pc.printf("*\r\n") ;
+        camera.ReadStart() ;
+        i = 0 ;
+        for (int y = 0;y < SIZEY;y++) {
+            int r,g,b,d1,d2 ;
+            for (int x = 0;x < SIZEX;x++) {
+                d1 = camera.ReadOneByte() ; // upper nibble is XXX , lower nibble is B
+                d2 = camera.ReadOneByte() ; // upper nibble is G   , lower nibble is R
+                b = (d1 & 0x0F) ;
+                g = (d2 & 0xF0) >> 4 ;
+                r = (d2 & 0x0F) ;
+                pc.printf ("%1X%1X%1X",r,g,b) ;
+            }
+            pc.printf("\r\n") ;
+        }
+        camera.ReadStop() ;        
+    }
+}
diff -r 000000000000 -r d69a19a5c0ff mbed.bld
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/mbed.bld	Tue Feb 14 13:25:25 2012 +0000
@@ -0,0 +1,1 @@
+http://mbed.org/users/mbed_official/code/mbed/builds/14f4805c468c
diff -r 000000000000 -r d69a19a5c0ff ov7670.h
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/ov7670.h	Tue Feb 14 13:25:25 2012 +0000
@@ -0,0 +1,228 @@
+#include "mbed.h"
+#include "ov7670reg.h"
+
+#define OV7670_WRITE (0x42)
+#define OV7670_READ  (0x43)
+#define OV7670_WRITEWAIT (20)
+#define OV7670_NOACK (0)
+#define OV7670_REGMAX (201)
+#define OV7670_I2CFREQ (50000)
+
+//
+// OV7670 + FIFO AL422B camera board test
+//
+class OV7670 : public Base
+{
+public:
+    I2C camera ;
+    InterruptIn vsync,href;
+    DigitalOut wen ;
+    BusIn data ;
+    DigitalOut rrst,oe,rclk ;
+    volatile int LineCounter ;
+    volatile int LastLines ;
+    volatile bool CaptureReq ;
+    volatile bool Busy ;
+    volatile bool Done ;
+
+    OV7670(
+        PinName sda,// Camera I2C port
+        PinName scl,// Camera I2C port
+        PinName vs, // VSYNC
+        PinName hr, // HREF
+        PinName we, // WEN
+        PinName d7, // D7
+        PinName d6, // D6
+        PinName d5, // D5
+        PinName d4, // D4
+        PinName d3, // D3
+        PinName d2, // D2
+        PinName d1, // D1
+        PinName d0, // D0
+        PinName rt, // /RRST
+        PinName o,  // /OE
+        PinName rc  // RCLK      
+        ) : camera(sda,scl),vsync(vs),href(hr),wen(we),data(d0,d1,d2,d3,d4,d5,d6,d7),rrst(rt),oe(o),rclk(rc)
+    {
+        camera.stop() ;
+        camera.frequency(OV7670_I2CFREQ) ;
+        vsync.fall(this,&OV7670::VsyncHandler) ;
+        href.rise(this,&OV7670::HrefHandler) ;
+        CaptureReq = false ;
+        Busy = false ;
+        Done = false ;
+        LineCounter = 0 ;
+        rrst = 1 ;
+        oe = 1 ;
+        rclk = 1 ;
+        wen = 0 ;
+    }
+
+    // capture request
+    void CaptureNext(void)
+    {
+        CaptureReq = true ;
+        Busy = true ;
+    }
+    
+    // capture done? (with clear)
+    bool CaptureDone(void)
+    {
+        bool result ;
+        if (Busy) {
+            result = false ;
+        } else {
+            result = Done ;
+            Done = false ;
+        }
+        return result ;
+    }
+
+    // write to camera
+    void WriteReg(int addr,int data)
+    {
+        // WRITE 0x42,ADDR,DATA
+        camera.start() ;
+        camera.write(OV7670_WRITE) ;
+        wait_us(OV7670_WRITEWAIT);
+        camera.write(addr) ;
+        wait_us(OV7670_WRITEWAIT);
+        camera.write(data) ;
+        camera.stop() ;
+    }
+
+    // read from camera
+    int ReadReg(int addr)
+    {
+        int data ;
+
+        // WRITE 0x42,ADDR
+        camera.start() ;
+        camera.write(OV7670_WRITE) ;
+        wait_us(OV7670_WRITEWAIT);
+        camera.write(addr) ;
+        camera.stop() ;
+        wait_us(OV7670_WRITEWAIT);    
+
+        // WRITE 0x43,READ
+        camera.start() ;
+        camera.write(OV7670_READ) ;
+        wait_us(OV7670_WRITEWAIT);
+        data = camera.read(OV7670_NOACK) ;
+        camera.stop() ;
+    
+        return data ;
+    }
+
+    void Reset(void) {    
+        WriteReg(0x12,0x80) ; // RESET CAMERA
+        wait_ms(200) ;
+    }
+    
+    void InitQQVGA() {
+        // QQVGA RGB444
+        WriteReg(REG_CLKRC,0x80);
+        WriteReg(REG_COM11,0x0A) ;
+        WriteReg(REG_TSLB,0x04);
+        WriteReg(REG_COM7,0x04) ;
+        WriteReg(REG_RGB444, 0x02);
+        WriteReg(REG_COM15, 0xd0);
+        WriteReg(REG_HSTART,0x16) ;
+        WriteReg(REG_HSTOP,0x04) ;
+        WriteReg(REG_HREF,0x24) ;
+        WriteReg(REG_VSTART,0x02) ;
+        WriteReg(REG_VSTOP,0x7a) ;
+        WriteReg(REG_VREF,0x0a) ;
+        WriteReg(REG_COM10,0x02) ;
+        WriteReg(REG_COM3, 0x04);
+        WriteReg(REG_COM14, 0x1a);
+        WriteReg(0x72, 0x22);
+        WriteReg(0x73, 0xf2);
+
+        // COLOR SETTING
+        WriteReg(0x4f,0x80);
+        WriteReg(0x50,0x80);
+        WriteReg(0x51,0x00);
+        WriteReg(0x52,0x22);
+        WriteReg(0x53,0x5e);
+        WriteReg(0x54,0x80);
+        WriteReg(0x56,0x40);
+        WriteReg(0x58,0x9e);
+        WriteReg(0x59,0x88);
+        WriteReg(0x5a,0x88);
+        WriteReg(0x5b,0x44);
+        WriteReg(0x5c,0x67);
+        WriteReg(0x5d,0x49);
+        WriteReg(0x5e,0x0e);
+        WriteReg(0x69,0x00);
+        WriteReg(0x6a,0x40);
+        WriteReg(0x6b,0x0a);
+        WriteReg(0x6c,0x0a);
+        WriteReg(0x6d,0x55);
+        WriteReg(0x6e,0x11);
+        WriteReg(0x6f,0x9f);
+
+        WriteReg(0xb0,0x84);
+    }    
+
+
+
+    // vsync handler
+    void VsyncHandler(void)
+    {
+        // Capture Enable
+        if (CaptureReq) {
+            wen = 1 ;
+            Done = false ;
+            CaptureReq = false ;
+        } else {
+            wen = 0 ;
+            if (Busy) {
+                Busy = false ;
+                Done = true ;
+            }
+        }
+
+        // Hline Counter
+        LastLines = LineCounter ;
+        LineCounter = 0 ;
+    }
+    
+    // href handler
+    void HrefHandler(void)
+    {
+        LineCounter++ ;
+    }
+    
+    // Data Read
+    int ReadOneByte(void)
+    {
+        int result ;
+        rclk = 1 ;
+//        wait_us(1) ;
+        result = data ;
+        rclk = 0 ;
+        return result ;
+    }
+    
+    // Data Start
+    void ReadStart(void)
+    {        
+        rrst = 0 ;
+        oe = 0 ;
+        wait_us(1) ;
+        rclk = 0 ;
+        wait_us(1) ;
+        rclk = 1 ;
+        wait_us(1) ;        
+        rrst = 1 ;
+    }
+    
+    // Data Stop
+    void ReadStop(void)
+    {
+        oe = 1 ;
+        ReadOneByte() ;
+        rclk = 1 ;
+    }
+};
diff -r 000000000000 -r d69a19a5c0ff ov7670reg.h
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/ov7670reg.h	Tue Feb 14 13:25:25 2012 +0000
@@ -0,0 +1,116 @@
+#define REG_GAIN        0x00    /* Gain lower 8 bits (rest in vref) */
+#define REG_BLUE        0x01    /* blue gain */
+#define REG_RED         0x02    /* red gain */
+#define REG_VREF        0x03    /* Pieces of GAIN, VSTART, VSTOP */
+#define REG_COM1        0x04    /* Control 1 */
+#define COM1_CCIR656    0x40    /* CCIR656 enable */
+#define REG_BAVE        0x05    /* U/B Average level */
+#define REG_GbAVE       0x06    /* Y/Gb Average level */
+#define REG_AECHH       0x07    /* AEC MS 5 bits */
+#define REG_RAVE        0x08    /* V/R Average level */
+#define REG_COM2        0x09    /* Control 2 */
+#define COM2_SSLEEP     0x10    /* Soft sleep mode */
+#define REG_PID         0x0a    /* Product ID MSB */
+#define REG_VER         0x0b    /* Product ID LSB */
+#define REG_COM3        0x0c    /* Control 3 */
+#define COM3_SWAP       0x40    /* Byte swap */
+#define COM3_SCALEEN    0x08    /* Enable scaling */
+#define COM3_DCWEN      0x04    /* Enable downsamp/crop/window */
+#define REG_COM4        0x0d    /* Control 4 */
+#define REG_COM5        0x0e    /* All "reserved" */
+#define REG_COM6        0x0f    /* Control 6 */
+#define REG_AECH        0x10    /* More bits of AEC value */
+#define REG_CLKRC       0x11    /* Clocl control */
+#define CLK_EXT         0x40    /* Use external clock directly */
+#define CLK_SCALE       0x3f    /* Mask for internal clock scale */
+#define REG_COM7        0x12    /* Control 7 */
+#define COM7_RESET      0x80    /* Register reset */
+#define COM7_FMT_MASK   0x38
+#define COM7_FMT_VGA    0x00
+#define COM7_FMT_CIF    0x20    /* CIF format */
+#define COM7_FMT_QVGA   0x10    /* QVGA format */
+#define COM7_FMT_QCIF   0x08    /* QCIF format */
+#define COM7_RGB        0x04    /* bits 0 and 2 - RGB format */
+#define COM7_YUV        0x00    /* YUV */
+#define COM7_BAYER      0x01    /* Bayer format */
+#define COM7_PBAYER     0x05    /* "Processed bayer" */
+#define REG_COM8        0x13    /* Control 8 */
+#define COM8_FASTAEC    0x80    /* Enable fast AGC/AEC */
+#define COM8_AECSTEP    0x40    /* Unlimited AEC step size */
+#define COM8_BFILT      0x20    /* Band filter enable */
+#define COM8_AGC        0x04    /* Auto gain enable */
+#define COM8_AWB        0x02    /* White balance enable */
+#define COM8_AEC        0x01    /* Auto exposure enable */
+#define REG_COM9        0x14    /* Control 9  - gain ceiling */
+#define REG_COM10       0x15    /* Control 10 */
+#define COM10_HSYNC     0x40    /* HSYNC instead of HREF */
+#define COM10_PCLK_HB   0x20    /* Suppress PCLK on horiz blank */
+#define COM10_HREF_REV  0x08    /* Reverse HREF */
+#define COM10_VS_LEAD   0x04    /* VSYNC on clock leading edge */
+#define COM10_VS_NEG    0x02    /* VSYNC negative */
+#define COM10_HS_NEG    0x01    /* HSYNC negative */
+#define REG_HSTART      0x17    /* Horiz start high bits */
+#define REG_HSTOP       0x18    /* Horiz stop high bits */
+#define REG_VSTART      0x19    /* Vert start high bits */
+#define REG_VSTOP       0x1a    /* Vert stop high bits */
+#define REG_PSHFT       0x1b    /* Pixel delay after HREF */
+#define REG_MIDH        0x1c    /* Manuf. ID high */
+#define REG_MIDL        0x1d    /* Manuf. ID low */
+#define REG_MVFP        0x1e    /* Mirror / vflip */
+#define MVFP_MIRROR     0x20    /* Mirror image */
+#define MVFP_FLIP       0x10    /* Vertical flip */
+#define REG_AEW         0x24    /* AGC upper limit */
+#define REG_AEB         0x25    /* AGC lower limit */
+#define REG_VPT         0x26    /* AGC/AEC fast mode op region */
+#define REG_HSYST       0x30    /* HSYNC rising edge delay */
+#define REG_HSYEN       0x31    /* HSYNC falling edge delay */
+#define REG_HREF        0x32    /* HREF pieces */
+#define REG_TSLB        0x3a    /* lots of stuff */
+#define TSLB_YLAST      0x04    /* UYVY or VYUY - see com13 */
+#define REG_COM11       0x3b    /* Control 11 */
+#define COM11_NIGHT     0x80    /* NIght mode enable */
+#define COM11_NMFR      0x60    /* Two bit NM frame rate */
+#define COM11_HZAUTO    0x10    /* Auto detect 50/60 Hz */
+#define COM11_50HZ      0x08    /* Manual 50Hz select */
+#define COM11_EXP       0x02
+#define REG_COM12       0x3c    /* Control 12 */
+#define COM12_HREF      0x80    /* HREF always */
+#define REG_COM13       0x3d    /* Control 13 */
+#define COM13_GAMMA     0x80    /* Gamma enable */
+#define COM13_UVSAT     0x40    /* UV saturation auto adjustment */
+#define COM13_UVSWAP    0x01    /* V before U - w/TSLB */
+#define REG_COM14       0x3e    /* Control 14 */
+#define COM14_DCWEN     0x10    /* DCW/PCLK-scale enable */
+#define REG_EDGE        0x3f    /* Edge enhancement factor */
+#define REG_COM15       0x40    /* Control 15 */
+#define COM15_R10F0     0x00    /* Data range 10 to F0 */
+#define COM15_R01FE     0x80    /*            01 to FE */
+#define COM15_R00FF     0xc0    /*            00 to FF */
+#define COM15_RGB565    0x10    /* RGB565 output */
+#define COM15_RGB555    0x30    /* RGB555 output */
+#define REG_COM16       0x41    /* Control 16 */
+#define COM16_AWBGAIN   0x08    /* AWB gain enable */
+#define REG_COM17       0x42    /* Control 17 */
+#define COM17_AECWIN    0xc0    /* AEC window - must match COM4 */
+#define COM17_CBAR      0x08    /* DSP Color bar */
+#define REG_CMATRIX_BASE 0x4f
+#define CMATRIX_LEN 6
+#define REG_CMATRIX_SIGN 0x58
+#define REG_BRIGHT      0x55    /* Brightness */
+#define REG_CONTRAS     0x56    /* Contrast control */
+#define REG_GFIX        0x69    /* Fix gain control */
+#define REG_REG76       0x76    /* OV's name */
+#define R76_BLKPCOR     0x80    /* Black pixel correction enable */
+#define R76_WHTPCOR     0x40    /* White pixel correction enable */
+#define REG_RGB444      0x8c    /* RGB 444 control */
+#define R444_ENABLE     0x02    /* Turn on RGB444, overrides 5x5 */
+#define R444_RGBX       0x01    /* Empty nibble at end */
+#define REG_HAECC1      0x9f    /* Hist AEC/AGC control 1 */
+#define REG_HAECC2      0xa0    /* Hist AEC/AGC control 2 */
+#define REG_BD50MAX     0xa5    /* 50hz banding step limit */
+#define REG_HAECC3      0xa6    /* Hist AEC/AGC control 3 */
+#define REG_HAECC4      0xa7    /* Hist AEC/AGC control 4 */
+#define REG_HAECC5      0xa8    /* Hist AEC/AGC control 5 */
+#define REG_HAECC6      0xa9    /* Hist AEC/AGC control 6 */
+#define REG_HAECC7      0xaa    /* Hist AEC/AGC control 7 */
+#define REG_BD60MAX     0xab    /* 60hz banding step limit */