minicube.net . / mbed-src-LPC1114FN28

Fork of mbed-src file paths change. LPC1114FN28 use only.

Fork of mbed-src by mbed official

Information

この情報は2013/10/28時点での解決方法です。
現在はmbed-src、標準ライブラリで問題なくコンパイルが可能です。

・使う物
LPC1114FN28
mbed SDK

LPC1114FN28でmbed-SDKのLibraryを使うとCompile出来ない。（2013/10/28） /media/uploads/minicube/mbed_lpc1114_sdk.png

パスが通ってないだけのようなのでファイルを以下に移動する。

mbed-src\targets\cmsis\TARGET_NXP\TARGET_LPC11XX_11CXX\
mbed-src\targets\cmsis\TARGET_NXP\TARGET_LPC11XX_11CXX\TARGET_LPC11XX\

にあるファイルをすべて

mbed-src\targets\cmsis\TARGET_NXP\

へ移動

mbed-src\targets\cmsis\TARGET_NXP\TARGET_LPC11XX_11CXX\にある

TOOLCHAIN_ARM_MICRO

をフォルダごと

mbed-src\targets\cmsis\TARGET_NXP\

へ移動

mbed-src\targets\hal\TARGET_NXP\TARGET_LPC11XX_11CXX\
mbed-src\targets\hal\TARGET_NXP\TARGET_LPC11XX_11CXX\TARGET_LPC11XX\

にあるファイルをすべて

mbed-src\targets\hal\TARGET_NXP\

へ移動

移動後は以下のような構成になると思います。
※不要なファイルは削除してあります。

/media/uploads/minicube/mbed_lpc1114_sdk_tree.png


ファイルの移動が面倒なので以下に本家からフォークしたライブラリを置いておきます。

Import librarymbed-src-LPC1114FN28

Fork of mbed-src file paths change. LPC1114FN28 use only.

Last commit 27 Oct 2013 by minicube.net .


エラーが出力される場合

"TOOLCHAIN_ARM_MICRO"が無いとエラーになる。

Error: Undefined symbol _initial_sp (referred from entry2.o).
Error: Undefined symbol _heap_base (referred from malloc.o).
Error: Undefined symbol _heap_limit (referred from malloc.o).

LPC1114FN28はMicrolibを使ってCompileされるため上記のエラーになるようです。

targets/hal/TARGET_Freescale/TARGET_KL25Z/us_ticker.c@13:0645d8841f51, 2013-08-05 (annotated)

Committer:
bogdanm
Date:
Mon Aug 05 14:12:34 2013 +0300
Revision:
13:0645d8841f51
Parent:
vendor/Freescale/KL25Z/hal/us_ticker.c@10:3bc89ef62ce7 
Update mbed sources to revision 64

Who changed what in which revision?

UserRevisionLine numberNew contents of line
emilmont 10:3bc89ef62ce7 1 /* mbed Microcontroller Library
emilmont 10:3bc89ef62ce7 2 * Copyright (c) 2006-2013 ARM Limited
emilmont 10:3bc89ef62ce7 3 *
emilmont 10:3bc89ef62ce7 4 * Licensed under the Apache License, Version 2.0 (the "License");
emilmont 10:3bc89ef62ce7 5 * you may not use this file except in compliance with the License.
emilmont 10:3bc89ef62ce7 6 * You may obtain a copy of the License at
emilmont 10:3bc89ef62ce7 7 *
emilmont 10:3bc89ef62ce7 8 * http://www.apache.org/licenses/LICENSE-2.0
emilmont 10:3bc89ef62ce7 9 *
emilmont 10:3bc89ef62ce7 10 * Unless required by applicable law or agreed to in writing, software
emilmont 10:3bc89ef62ce7 11 * distributed under the License is distributed on an "AS IS" BASIS,
emilmont 10:3bc89ef62ce7 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
emilmont 10:3bc89ef62ce7 13 * See the License for the specific language governing permissions and
emilmont 10:3bc89ef62ce7 14 * limitations under the License.
emilmont 10:3bc89ef62ce7 15 */
emilmont 10:3bc89ef62ce7 16 #include <stddef.h>
emilmont 10:3bc89ef62ce7 17 #include "us_ticker_api.h"
emilmont 10:3bc89ef62ce7 18 #include "PeripheralNames.h"
emilmont 10:3bc89ef62ce7 19
emilmont 10:3bc89ef62ce7 20 static void pit_init(void);
emilmont 10:3bc89ef62ce7 21 static void lptmr_init(void);
emilmont 10:3bc89ef62ce7 22
emilmont 10:3bc89ef62ce7 23 static int us_ticker_inited = 0;
emilmont 10:3bc89ef62ce7 24
emilmont 10:3bc89ef62ce7 25 void us_ticker_init(void) {
emilmont 10:3bc89ef62ce7 26 if (us_ticker_inited) return;
emilmont 10:3bc89ef62ce7 27 us_ticker_inited = 1;
emilmont 10:3bc89ef62ce7 28
emilmont 10:3bc89ef62ce7 29 pit_init();
emilmont 10:3bc89ef62ce7 30 lptmr_init();
emilmont 10:3bc89ef62ce7 31 }
emilmont 10:3bc89ef62ce7 32
emilmont 10:3bc89ef62ce7 33 /******************************************************************************
emilmont 10:3bc89ef62ce7 34 * Timer for us timing.
emilmont 10:3bc89ef62ce7 35 ******************************************************************************/
emilmont 10:3bc89ef62ce7 36 static void pit_init(void) {
emilmont 10:3bc89ef62ce7 37 SIM->SCGC6 |= SIM_SCGC6_PIT_MASK; // Clock PIT
emilmont 10:3bc89ef62ce7 38 PIT->MCR = 0; // Enable PIT
emilmont 10:3bc89ef62ce7 39
emilmont 10:3bc89ef62ce7 40 // Channel 1
emilmont 10:3bc89ef62ce7 41 PIT->CHANNEL[1].LDVAL = 0xFFFFFFFF;
emilmont 10:3bc89ef62ce7 42 PIT->CHANNEL[1].TCTRL = PIT_TCTRL_CHN_MASK; // Chain to timer 0, disable Interrupts
emilmont 10:3bc89ef62ce7 43 PIT->CHANNEL[1].TCTRL |= PIT_TCTRL_TEN_MASK; // Start timer 1
emilmont 10:3bc89ef62ce7 44
emilmont 10:3bc89ef62ce7 45 // Use channel 0 as a prescaler for channel 1
emilmont 10:3bc89ef62ce7 46 PIT->CHANNEL[0].LDVAL = 23;
emilmont 10:3bc89ef62ce7 47 PIT->CHANNEL[0].TCTRL = PIT_TCTRL_TEN_MASK; // Start timer 0, disable interrupts
emilmont 10:3bc89ef62ce7 48 }
emilmont 10:3bc89ef62ce7 49
emilmont 10:3bc89ef62ce7 50 uint32_t us_ticker_read() {
emilmont 10:3bc89ef62ce7 51 if (!us_ticker_inited)
emilmont 10:3bc89ef62ce7 52 us_ticker_init();
emilmont 10:3bc89ef62ce7 53
emilmont 10:3bc89ef62ce7 54 // The PIT is a countdown timer
emilmont 10:3bc89ef62ce7 55 return ~(PIT->CHANNEL[1].CVAL);
emilmont 10:3bc89ef62ce7 56 }
emilmont 10:3bc89ef62ce7 57
emilmont 10:3bc89ef62ce7 58 /******************************************************************************
emilmont 10:3bc89ef62ce7 59 * Timer Event
emilmont 10:3bc89ef62ce7 60 *
emilmont 10:3bc89ef62ce7 61 * It schedules interrupts at given (32bit)us interval of time.
emilmont 10:3bc89ef62ce7 62 * It is implemented used the 16bit Low Power Timer that remains powered in all
emilmont 10:3bc89ef62ce7 63 * power modes.
emilmont 10:3bc89ef62ce7 64 ******************************************************************************/
emilmont 10:3bc89ef62ce7 65 static void lptmr_isr(void);
emilmont 10:3bc89ef62ce7 66
emilmont 10:3bc89ef62ce7 67 static void lptmr_init(void) {
emilmont 10:3bc89ef62ce7 68 /* Clock the timer */
emilmont 10:3bc89ef62ce7 69 SIM->SCGC5 |= SIM_SCGC5_LPTMR_MASK;
emilmont 10:3bc89ef62ce7 70
emilmont 10:3bc89ef62ce7 71 /* Reset */
emilmont 10:3bc89ef62ce7 72 LPTMR0->CSR = 0;
emilmont 10:3bc89ef62ce7 73
emilmont 10:3bc89ef62ce7 74 /* Set interrupt handler */
emilmont 10:3bc89ef62ce7 75 NVIC_SetVector(LPTimer_IRQn, (uint32_t)lptmr_isr);
emilmont 10:3bc89ef62ce7 76 NVIC_EnableIRQ(LPTimer_IRQn);
emilmont 10:3bc89ef62ce7 77
emilmont 10:3bc89ef62ce7 78 /* Clock at (1)MHz -> (1)tick/us */
emilmont 10:3bc89ef62ce7 79 LPTMR0->PSR = LPTMR_PSR_PCS(3); // OSCERCLK -> 8MHz
emilmont 10:3bc89ef62ce7 80 LPTMR0->PSR |= LPTMR_PSR_PRESCALE(2); // divide by 8
emilmont 10:3bc89ef62ce7 81 }
emilmont 10:3bc89ef62ce7 82
emilmont 10:3bc89ef62ce7 83 void us_ticker_disable_interrupt(void) {
emilmont 10:3bc89ef62ce7 84 LPTMR0->CSR &= ~LPTMR_CSR_TIE_MASK;
emilmont 10:3bc89ef62ce7 85 }
emilmont 10:3bc89ef62ce7 86
emilmont 10:3bc89ef62ce7 87 void us_ticker_clear_interrupt(void) {
emilmont 10:3bc89ef62ce7 88 // we already clear interrupt in lptmr_isr
emilmont 10:3bc89ef62ce7 89 }
emilmont 10:3bc89ef62ce7 90
emilmont 10:3bc89ef62ce7 91 static uint32_t us_ticker_int_counter = 0;
emilmont 10:3bc89ef62ce7 92 static uint16_t us_ticker_int_remainder = 0;
emilmont 10:3bc89ef62ce7 93
emilmont 10:3bc89ef62ce7 94 static void lptmr_set(unsigned short count) {
emilmont 10:3bc89ef62ce7 95 /* Reset */
emilmont 10:3bc89ef62ce7 96 LPTMR0->CSR = 0;
emilmont 10:3bc89ef62ce7 97
emilmont 10:3bc89ef62ce7 98 /* Set the compare register */
emilmont 10:3bc89ef62ce7 99 LPTMR0->CMR = count;
emilmont 10:3bc89ef62ce7 100
emilmont 10:3bc89ef62ce7 101 /* Enable interrupt */
emilmont 10:3bc89ef62ce7 102 LPTMR0->CSR |= LPTMR_CSR_TIE_MASK;
emilmont 10:3bc89ef62ce7 103
emilmont 10:3bc89ef62ce7 104 /* Start the timer */
emilmont 10:3bc89ef62ce7 105 LPTMR0->CSR |= LPTMR_CSR_TEN_MASK;
emilmont 10:3bc89ef62ce7 106 }
emilmont 10:3bc89ef62ce7 107
emilmont 10:3bc89ef62ce7 108 static void lptmr_isr(void) {
emilmont 10:3bc89ef62ce7 109 // write 1 to TCF to clear the LPT timer compare flag
emilmont 10:3bc89ef62ce7 110 LPTMR0->CSR |= LPTMR_CSR_TCF_MASK;
emilmont 10:3bc89ef62ce7 111
emilmont 10:3bc89ef62ce7 112 if (us_ticker_int_counter > 0) {
emilmont 10:3bc89ef62ce7 113 lptmr_set(0xFFFF);
emilmont 10:3bc89ef62ce7 114 us_ticker_int_counter--;
emilmont 10:3bc89ef62ce7 115
emilmont 10:3bc89ef62ce7 116 } else {
emilmont 10:3bc89ef62ce7 117 if (us_ticker_int_remainder > 0) {
emilmont 10:3bc89ef62ce7 118 lptmr_set(us_ticker_int_remainder);
emilmont 10:3bc89ef62ce7 119 us_ticker_int_remainder = 0;
emilmont 10:3bc89ef62ce7 120
emilmont 10:3bc89ef62ce7 121 } else {
emilmont 10:3bc89ef62ce7 122 // This function is going to disable the interrupts if there are
emilmont 10:3bc89ef62ce7 123 // no other events in the queue
emilmont 10:3bc89ef62ce7 124 us_ticker_irq_handler();
emilmont 10:3bc89ef62ce7 125 }
emilmont 10:3bc89ef62ce7 126 }
emilmont 10:3bc89ef62ce7 127 }
emilmont 10:3bc89ef62ce7 128
emilmont 10:3bc89ef62ce7 129 void us_ticker_set_interrupt(unsigned int timestamp) {
emilmont 10:3bc89ef62ce7 130 int delta = (int)(timestamp - us_ticker_read());
emilmont 10:3bc89ef62ce7 131 if (delta <= 0) {
emilmont 10:3bc89ef62ce7 132 // This event was in the past:
emilmont 10:3bc89ef62ce7 133 us_ticker_irq_handler();
emilmont 10:3bc89ef62ce7 134 return;
emilmont 10:3bc89ef62ce7 135 }
emilmont 10:3bc89ef62ce7 136
emilmont 10:3bc89ef62ce7 137 us_ticker_int_counter = (uint32_t)(delta >> 16);
emilmont 10:3bc89ef62ce7 138 us_ticker_int_remainder = (uint16_t)(0xFFFF & delta);
emilmont 10:3bc89ef62ce7 139 if (us_ticker_int_counter > 0) {
emilmont 10:3bc89ef62ce7 140 lptmr_set(0xFFFF);
emilmont 10:3bc89ef62ce7 141 us_ticker_int_counter--;
emilmont 10:3bc89ef62ce7 142 } else {
emilmont 10:3bc89ef62ce7 143 lptmr_set(us_ticker_int_remainder);
emilmont 10:3bc89ef62ce7 144 us_ticker_int_remainder = 0;
emilmont 10:3bc89ef62ce7 145 }
emilmont 10:3bc89ef62ce7 146 }