first 2016/02 SDFileSystemDMA inherited from Official SDFileSystem.
Dependents: SDFileSystemDMA-test DmdFullRGB_0_1
Fork of SDFileSystemDMA by
SDFileSystemDMA is enhanced SDFileSystem library for STM32 micros by using DMA functionality.
Max read transfer rate reaches over 2MByte/sec at 24MHz SPI clock if enough read buffer size is set.
Even though minimum read buffer size (512Byte) is set, read transfer rate will reach over 1MByte/sec at 24MHz SPI Clock.
( but depends on the ability of each SD card)
Test program is here.
https://developer.mbed.org/users/mimi3/code/SDFileSystemDMA-test/
Supported SPI port is shown below table.
(v): Verified. It works well.
(w): Probably it will work well. (not tested)
(c): Only compiled. (not tested)
(f): Over flash.
(r): Only read mode. (when _FS_READONLY==1)
(u) Under construction
(z): Dose not work.
Caution
If your board has SRAM less than or equal to 8KB, the buffer size must be set to 512 Bytes.
Supported Boards:
Cortex-M0
Board | SRAM | SPI1 | SPI2 | SPI3 |
---|---|---|---|---|
NUCLEO-F030R8 | 8KB | (v) | ||
DISCO-F051R8 | 8KB | (w) | ||
4KB | (f) | |||
NUCLEO-F042K6 | 6KB | (r) | ||
NUCLEO-F070RB | 16KB | (w) | ||
NUCLEO-F072RB | 16KB | (w) | ||
NUCLEO-F091RC | 32KB | (c) |
Cortex-L0
Board | SRAM | SPI1 | SPI2 | SPI3 |
---|---|---|---|---|
DISCO-L053C8 | 8KB | (c) | ||
NUCLEO-L053R8 | 8KB | (c) | ||
NUCLEO-L073RZ | 20KB | (c) |
Cortex-M3
Board | SRAM | SPI1 | SPI2 | SPI3 |
---|---|---|---|---|
DISCO-F100RB | 8KB | (v) | (v) | - |
BLUEPILL-F103CB | 20KB | (w) | (w) | - |
NUCLEO-F103RB | 20KB | (v) | (v) | - |
NUCLEO-L152RE | 80KB | (v) | (w) | - |
MOTE-L152RC | 32KB | (w) | (w) | - |
Cortex-M4
F3
Board | SRAM | SPI1 | SPI2 | SPI3 |
---|---|---|---|---|
DISCO-F303VC | 40KB | - | (v) | (v) |
NUCLEO-F303RE | 64KB | (w) | (w) | (w) |
NUCLEO-F302R8 | 16KB | - | - | (c) |
NUCLEO-F303K8 | 12KB | (c) | - | - |
DISCO-F334C8 | 12KB | (c) | - | - |
NUCLEO-F334R8 | 12KB | (c) | - | - |
F4
Board | SPI1 | SPI2 | SPI3 |
---|---|---|---|
ELMO-F411RE | (w) | - | (w) |
MTS-MDOT-F411RE | (u) | - | (u) |
MTS-DRAGONFLY-F411RE | (w) | - | (w) |
NUCLEO-F411RE | (v) | - | (v) |
NUCLEO-F401RE | (w) | - | (w) |
MTS-MDOT-F405RG | (u) | - | (u) |
NUCLEO-F410RB | (c) | - | (c) |
NUCLEO-F446RE | (c) | - | (c) |
NUCLEO-F429ZI | (c) | - | (c) |
B96B-F446VE | (c) | - | (c) |
NUCLEO-F446ZE | (c) | - | (c) |
DISCO-F429ZI | (u) | - | (u) |
DISCO-F469NI | (c) | - | (c) |
Information
This library is set to use "short file name" in SDFileSystemDMA/FATFileSystem/ChaN/ffconf.h . ( _USE_LFN=0)
You can change this option to _USE_LFN=1 .
spi_dma/spi_dma_common.c@18:1b1a0e68008a, 2016-02-15 (annotated)
- Committer:
- mimi3
- Date:
- Mon Feb 15 22:40:26 2016 +0900
- Revision:
- 18:1b1a0e68008a
- Parent:
- 17:e6d3b7ed3799
- Child:
- 21:41129109d6ab
Refactoring: part1: F0,F3,F4
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
mimi3 | 2:0e871408d51b | 1 | #include "spi_dma.h" |
mimi3 | 2:0e871408d51b | 2 | |
mimi3 | 2:0e871408d51b | 3 | DMA_HandleTypeDef hdma_spi1_tx; |
mimi3 | 2:0e871408d51b | 4 | DMA_HandleTypeDef hdma_spi1_rx; |
mimi3 | 2:0e871408d51b | 5 | SPI_HandleTypeDef Spi1Handle; |
mimi3 | 5:809e2eece945 | 6 | |
mimi3 | 5:809e2eece945 | 7 | DMA_HandleTypeDef hdma_spi3_tx; |
mimi3 | 5:809e2eece945 | 8 | DMA_HandleTypeDef hdma_spi3_rx; |
mimi3 | 5:809e2eece945 | 9 | SPI_HandleTypeDef Spi3Handle; |
mimi3 | 2:0e871408d51b | 10 | #if 0 |
mimi3 | 2:0e871408d51b | 11 | SPI_HandleTypeDef Spi2Handle; |
mimi3 | 2:0e871408d51b | 12 | #endif |
mimi3 | 2:0e871408d51b | 13 | |
mimi3 | 2:0e871408d51b | 14 | |
mimi3 | 2:0e871408d51b | 15 | static void spi_dma_error_handler(void) |
mimi3 | 2:0e871408d51b | 16 | { |
mimi3 | 2:0e871408d51b | 17 | while(1) |
mimi3 | 2:0e871408d51b | 18 | { |
mimi3 | 2:0e871408d51b | 19 | /* infinite loop */ |
mimi3 | 2:0e871408d51b | 20 | } |
mimi3 | 2:0e871408d51b | 21 | } |
mimi3 | 2:0e871408d51b | 22 | |
mimi3 | 2:0e871408d51b | 23 | static void spi_dma_start( SPI_TypeDef *spi, uint8_t *txbuff, uint8_t *rxbuff, uint16_t count) |
mimi3 | 2:0e871408d51b | 24 | { |
mimi3 | 2:0e871408d51b | 25 | SPI_HandleTypeDef *hspi; |
mimi3 | 2:0e871408d51b | 26 | if( spi == SPI1 ) { |
mimi3 | 2:0e871408d51b | 27 | hspi = &Spi1Handle; |
mimi3 | 2:0e871408d51b | 28 | } |
mimi3 | 9:367773f8eba4 | 29 | #if defined(SPI3_BASE) |
mimi3 | 5:809e2eece945 | 30 | else if( spi == SPI3 ) { |
mimi3 | 5:809e2eece945 | 31 | hspi = &Spi3Handle; |
mimi3 | 5:809e2eece945 | 32 | } |
mimi3 | 9:367773f8eba4 | 33 | #endif |
mimi3 | 2:0e871408d51b | 34 | #if 0 |
mimi3 | 2:0e871408d51b | 35 | else{ |
mimi3 | 2:0e871408d51b | 36 | hspi = &Spi2Handle; |
mimi3 | 2:0e871408d51b | 37 | } |
mimi3 | 2:0e871408d51b | 38 | #endif |
mimi3 | 2:0e871408d51b | 39 | if( HAL_SPI_TransmitReceive_DMA( hspi, (uint8_t *)txbuff, (uint8_t *)rxbuff, count) != HAL_OK) { |
mimi3 | 2:0e871408d51b | 40 | spi_dma_error_handler(); |
mimi3 | 2:0e871408d51b | 41 | } |
mimi3 | 2:0e871408d51b | 42 | } |
mimi3 | 2:0e871408d51b | 43 | |
mimi3 | 2:0e871408d51b | 44 | static void spi_dma_wait_end( SPI_TypeDef *spi ) |
mimi3 | 2:0e871408d51b | 45 | { |
mimi3 | 2:0e871408d51b | 46 | SPI_HandleTypeDef *hspi; |
mimi3 | 2:0e871408d51b | 47 | if( spi == SPI1 ) { |
mimi3 | 2:0e871408d51b | 48 | hspi = &Spi1Handle; |
mimi3 | 2:0e871408d51b | 49 | } |
mimi3 | 9:367773f8eba4 | 50 | #if defined(SPI3_BASE) |
mimi3 | 5:809e2eece945 | 51 | else if( spi == SPI3 ) { |
mimi3 | 5:809e2eece945 | 52 | hspi = &Spi3Handle; |
mimi3 | 5:809e2eece945 | 53 | } |
mimi3 | 9:367773f8eba4 | 54 | #endif |
mimi3 | 2:0e871408d51b | 55 | #if 0 |
mimi3 | 2:0e871408d51b | 56 | else{ |
mimi3 | 2:0e871408d51b | 57 | hspi = &Spi2Handle; |
mimi3 | 2:0e871408d51b | 58 | } |
mimi3 | 2:0e871408d51b | 59 | #endif |
mimi3 | 2:0e871408d51b | 60 | while (HAL_SPI_GetState( hspi ) != HAL_SPI_STATE_READY) { |
mimi3 | 2:0e871408d51b | 61 | /* just wait */ |
mimi3 | 2:0e871408d51b | 62 | } |
mimi3 | 2:0e871408d51b | 63 | } |
mimi3 | 2:0e871408d51b | 64 | |
mimi3 | 5:809e2eece945 | 65 | static void spi_dma_deinit( SPI_TypeDef *spi) |
mimi3 | 5:809e2eece945 | 66 | { |
mimi3 | 2:0e871408d51b | 67 | if( spi == SPI1 ) { |
mimi3 | 18:1b1a0e68008a | 68 | HAL_DMA_DeInit( &hdma_spi1_tx); |
mimi3 | 18:1b1a0e68008a | 69 | HAL_DMA_DeInit( &hdma_spi1_rx); |
mimi3 | 2:0e871408d51b | 70 | } |
mimi3 | 9:367773f8eba4 | 71 | #if defined(SPI3_BASE) |
mimi3 | 5:809e2eece945 | 72 | else if( spi == SPI3 ) { |
mimi3 | 18:1b1a0e68008a | 73 | HAL_DMA_DeInit( &hdma_spi3_tx); |
mimi3 | 18:1b1a0e68008a | 74 | HAL_DMA_DeInit( &hdma_spi3_rx); |
mimi3 | 5:809e2eece945 | 75 | } |
mimi3 | 9:367773f8eba4 | 76 | #endif |
mimi3 | 2:0e871408d51b | 77 | #if 0 |
mimi3 | 2:0e871408d51b | 78 | else{ |
mimi3 | 2:0e871408d51b | 79 | } |
mimi3 | 2:0e871408d51b | 80 | #endif |
mimi3 | 2:0e871408d51b | 81 | } |
mimi3 | 18:1b1a0e68008a | 82 | |
mimi3 | 18:1b1a0e68008a | 83 | /* SPI1 init function */ |
mimi3 | 18:1b1a0e68008a | 84 | |
mimi3 | 2:0e871408d51b | 85 | |
mimi3 | 2:0e871408d51b | 86 | void __spi_dma_read_write( SPI_TypeDef *spi, uint8_t *txbuff, uint8_t *rxbuff, uint16_t count, uint8_t mode) |
mimi3 | 2:0e871408d51b | 87 | { |
mimi3 | 18:1b1a0e68008a | 88 | static uint8_t spi_dma_inited = 0; |
mimi3 | 2:0e871408d51b | 89 | if( spi_dma_inited == 0 ) { |
mimi3 | 2:0e871408d51b | 90 | spi_dma_inited = 1; |
mimi3 | 18:1b1a0e68008a | 91 | spi_dma_irq_setup( spi ); |
mimi3 | 18:1b1a0e68008a | 92 | spi_dma_get_info( spi ); |
mimi3 | 2:0e871408d51b | 93 | } |
mimi3 | 2:0e871408d51b | 94 | spi_dma_handle_setup( spi, mode ); |
mimi3 | 2:0e871408d51b | 95 | spi_dma_start( spi, txbuff, rxbuff, count ); |
mimi3 | 2:0e871408d51b | 96 | spi_dma_wait_end( spi ); |
mimi3 | 17:e6d3b7ed3799 | 97 | spi_dma_deinit(spi); |
mimi3 | 2:0e871408d51b | 98 | } |
mimi3 | 2:0e871408d51b | 99 |