mi mi / SDFileSystemDMA Featured

first 2016/02 SDFileSystemDMA inherited from Official SDFileSystem.

Dependents:   SDFileSystemDMA-test DmdFullRGB_0_1

Fork of SDFileSystemDMA by mi mi

SDFileSystemDMA is enhanced SDFileSystem library for STM32 micros by using DMA functionality.
Max read transfer rate reaches over 2MByte/sec at 24MHz SPI clock if enough read buffer size is set.
Even though minimum read buffer size (512Byte) is set, read transfer rate will reach over 1MByte/sec at 24MHz SPI Clock.
( but depends on the ability of each SD card)

Test program is here.
https://developer.mbed.org/users/mimi3/code/SDFileSystemDMA-test/

/media/uploads/mimi3/sdfilesystemdma-speed-test3-read-buffer-512byte.png

/media/uploads/mimi3/sdfilesystemdma-speed-test-buffer-vs-spi-clock-nucleo-f411re-96mhz.png

Supported SPI port is shown below table.

(v): Verified. It works well.
(w): Probably it will work well. (not tested)
(c): Only compiled. (not tested)
(f): Over flash.
(r): Only read mode. (when _FS_READONLY==1)
(u) Under construction
(z): Dose not work.

Caution

If your board has SRAM less than or equal to 8KB, the buffer size must be set to 512 Bytes.

Supported Boards:
Cortex-M0

BoardSRAMSPI1SPI2SPI3
NUCLEO-F030R88KB(v)
DISCO-F051R88KB(w)
NUCLEO-F031K64KB(f)
NUCLEO-F042K66KB(r)
NUCLEO-F070RB16KB(w)
NUCLEO-F072RB16KB(w)
NUCLEO-F091RC32KB(c)

Cortex-L0

BoardSRAMSPI1SPI2SPI3
DISCO-L053C88KB(c)
NUCLEO-L053R88KB(c)
NUCLEO-L073RZ20KB(c)

Cortex-M3

BoardSRAMSPI1SPI2SPI3
DISCO-F100RB8KB(v)(v)-
BLUEPILL-F103CB20KB(w)(w)-
NUCLEO-F103RB20KB(v)(v)-
NUCLEO-L152RE80KB(v)(w)-
MOTE-L152RC32KB(w)(w)-

Cortex-M4
F3

BoardSRAMSPI1SPI2SPI3
DISCO-F303VC40KB-(v)(v)
NUCLEO-F303RE64KB(w)(w)(w)
NUCLEO-F302R816KB--(c)
NUCLEO-F303K812KB(c)--
DISCO-F334C812KB(c)--
NUCLEO-F334R812KB(c)--

F4

BoardSPI1SPI2SPI3
ELMO-F411RE(w)-(w)
MTS-MDOT-F411RE(u)-(u)
MTS-DRAGONFLY-F411RE(w)-(w)
NUCLEO-F411RE(v)-(v)
NUCLEO-F401RE(w)-(w)
MTS-MDOT-F405RG(u)-(u)
NUCLEO-F410RB(c)-(c)
NUCLEO-F446RE(c)-(c)
NUCLEO-F429ZI(c)-(c)
B96B-F446VE(c)-(c)
NUCLEO-F446ZE(c)-(c)
DISCO-F429ZI(u)-(u)
DISCO-F469NI(c)-(c)

Information

This library is set to use "short file name" in SDFileSystemDMA/FATFileSystem/ChaN/ffconf.h . ( _USE_LFN=0)
You can change this option to _USE_LFN=1 .

spi_dma/spi_dma_common.c@5:809e2eece945, 2016-02-14 (annotated)

Committer:
mimi3
Date:
Sun Feb 14 15:57:06 2016 +0900
Revision:
5:809e2eece945
Parent:
2:0e871408d51b
Child:
9:367773f8eba4
DISCO-F303VC: OK. Verified

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mimi3 2:0e871408d51b 1 #include "spi_dma.h"
mimi3 2:0e871408d51b 2
mimi3 2:0e871408d51b 3 DMA_HandleTypeDef hdma_spi1_tx;
mimi3 2:0e871408d51b 4 DMA_HandleTypeDef hdma_spi1_rx;
mimi3 2:0e871408d51b 5 SPI_HandleTypeDef Spi1Handle;
mimi3 5:809e2eece945 6
mimi3 5:809e2eece945 7 DMA_HandleTypeDef hdma_spi3_tx;
mimi3 5:809e2eece945 8 DMA_HandleTypeDef hdma_spi3_rx;
mimi3 5:809e2eece945 9 SPI_HandleTypeDef Spi3Handle;
mimi3 2:0e871408d51b 10 #if 0
mimi3 2:0e871408d51b 11 SPI_HandleTypeDef Spi2Handle;
mimi3 2:0e871408d51b 12 #endif
mimi3 2:0e871408d51b 13
mimi3 2:0e871408d51b 14
mimi3 2:0e871408d51b 15 static void spi_dma_error_handler(void)
mimi3 2:0e871408d51b 16 {
mimi3 2:0e871408d51b 17 while(1)
mimi3 2:0e871408d51b 18 {
mimi3 2:0e871408d51b 19 /* infinite loop */
mimi3 2:0e871408d51b 20 }
mimi3 2:0e871408d51b 21 }
mimi3 2:0e871408d51b 22
mimi3 2:0e871408d51b 23 static void spi_dma_start( SPI_TypeDef *spi, uint8_t *txbuff, uint8_t *rxbuff, uint16_t count)
mimi3 2:0e871408d51b 24 {
mimi3 2:0e871408d51b 25 SPI_HandleTypeDef *hspi;
mimi3 2:0e871408d51b 26 if( spi == SPI1 ) {
mimi3 2:0e871408d51b 27 hspi = &Spi1Handle;
mimi3 2:0e871408d51b 28 }
mimi3 5:809e2eece945 29 else if( spi == SPI3 ) {
mimi3 5:809e2eece945 30 hspi = &Spi3Handle;
mimi3 5:809e2eece945 31 }
mimi3 2:0e871408d51b 32 #if 0
mimi3 2:0e871408d51b 33 else{
mimi3 2:0e871408d51b 34 hspi = &Spi2Handle;
mimi3 2:0e871408d51b 35 }
mimi3 2:0e871408d51b 36 #endif
mimi3 2:0e871408d51b 37 if( HAL_SPI_TransmitReceive_DMA( hspi, (uint8_t *)txbuff, (uint8_t *)rxbuff, count) != HAL_OK) {
mimi3 2:0e871408d51b 38 spi_dma_error_handler();
mimi3 2:0e871408d51b 39 }
mimi3 2:0e871408d51b 40 }
mimi3 2:0e871408d51b 41
mimi3 2:0e871408d51b 42 static void spi_dma_wait_end( SPI_TypeDef *spi )
mimi3 2:0e871408d51b 43 {
mimi3 2:0e871408d51b 44 SPI_HandleTypeDef *hspi;
mimi3 2:0e871408d51b 45 if( spi == SPI1 ) {
mimi3 2:0e871408d51b 46 hspi = &Spi1Handle;
mimi3 2:0e871408d51b 47 }
mimi3 5:809e2eece945 48 else if( spi == SPI3 ) {
mimi3 5:809e2eece945 49 hspi = &Spi3Handle;
mimi3 5:809e2eece945 50 }
mimi3 2:0e871408d51b 51 #if 0
mimi3 2:0e871408d51b 52 else{
mimi3 2:0e871408d51b 53 hspi = &Spi2Handle;
mimi3 2:0e871408d51b 54 }
mimi3 2:0e871408d51b 55 #endif
mimi3 2:0e871408d51b 56 while (HAL_SPI_GetState( hspi ) != HAL_SPI_STATE_READY) {
mimi3 2:0e871408d51b 57 /* just wait */
mimi3 2:0e871408d51b 58 }
mimi3 2:0e871408d51b 59 }
mimi3 2:0e871408d51b 60
mimi3 2:0e871408d51b 61 /* SPI1 init function */
mimi3 2:0e871408d51b 62 static uint8_t spi_dma_inited = 0;
mimi3 2:0e871408d51b 63 static void spi_dma_init( SPI_TypeDef *spi)
mimi3 2:0e871408d51b 64 {
mimi3 5:809e2eece945 65 spi_dma_irq_setup( spi );
mimi3 5:809e2eece945 66 }
mimi3 2:0e871408d51b 67
mimi3 5:809e2eece945 68 static void spi_dma_deinit( SPI_TypeDef *spi)
mimi3 5:809e2eece945 69 {
mimi3 5:809e2eece945 70 DMA_HandleTypeDef *phdma_rx,*phdma_tx;
mimi3 2:0e871408d51b 71
mimi3 2:0e871408d51b 72 if( spi == SPI1 ) {
mimi3 2:0e871408d51b 73 phdma_tx = &hdma_spi1_tx;
mimi3 2:0e871408d51b 74 phdma_rx = &hdma_spi1_rx;
mimi3 2:0e871408d51b 75 }
mimi3 5:809e2eece945 76 else if( spi == SPI3 ) {
mimi3 5:809e2eece945 77 phdma_tx = &hdma_spi3_tx;
mimi3 5:809e2eece945 78 phdma_rx = &hdma_spi3_rx;
mimi3 5:809e2eece945 79 }
mimi3 2:0e871408d51b 80 #if 0
mimi3 2:0e871408d51b 81 else{
mimi3 2:0e871408d51b 82 }
mimi3 2:0e871408d51b 83 #endif
mimi3 2:0e871408d51b 84 /* At first, execute DeInit for reset DMA */
mimi3 2:0e871408d51b 85 HAL_DMA_DeInit( phdma_tx );
mimi3 2:0e871408d51b 86 HAL_DMA_DeInit( phdma_rx );
mimi3 2:0e871408d51b 87 }
mimi3 2:0e871408d51b 88
mimi3 2:0e871408d51b 89 void __spi_dma_read_write( SPI_TypeDef *spi, uint8_t *txbuff, uint8_t *rxbuff, uint16_t count, uint8_t mode)
mimi3 2:0e871408d51b 90 {
mimi3 2:0e871408d51b 91 if( spi_dma_inited == 0 ) {
mimi3 2:0e871408d51b 92 spi_dma_inited = 1;
mimi3 2:0e871408d51b 93 spi_dma_init( spi );
mimi3 2:0e871408d51b 94 }
mimi3 2:0e871408d51b 95 spi_dma_get_info( spi );
mimi3 2:0e871408d51b 96 spi_dma_handle_setup( spi, mode );
mimi3 2:0e871408d51b 97 spi_dma_start( spi, txbuff, rxbuff, count );
mimi3 2:0e871408d51b 98 spi_dma_wait_end( spi );
mimi3 5:809e2eece945 99 //spi_dma_deinit(spi);
mimi3 2:0e871408d51b 100 }
mimi3 2:0e871408d51b 101