mi mi
My forked repository. DISCO_F407VG, DISCO_F303VC, DISCO_F051R8 and DISCO_F100RB maybe added.
Dependents: FastPWM-DISCO-test
Device/FastPWM_KLXX.cpp@6:0f57969697b6, 2014-03-17 (annotated)
- Committer:
- Sissors
- Date:
- Mon Mar 17 22:12:58 2014 +0000
- Revision:
- 6:0f57969697b6
- Parent:
- 5:2812f0a115f7
- Child:
- 8:a7745c791b0c
Changing period now keeps pulsewidth the same instead of duty cycle
;
; KLXX now doesn't give glitches when changing pulsewidth
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| Sissors | 5:2812f0a115f7 | 1 | #ifdef TARGET_KLXX |
| Sissors | 4:a7b9f778c4b4 | 2 | |
| Sissors | 4:a7b9f778c4b4 | 3 | #include "FastPWM.h" |
| Sissors | 4:a7b9f778c4b4 | 4 | |
| Sissors | 4:a7b9f778c4b4 | 5 | volatile uint32_t *TPM_SC; |
| Sissors | 4:a7b9f778c4b4 | 6 | |
| Sissors | 4:a7b9f778c4b4 | 7 | void FastPWM::initFastPWM( void ) { |
| Sissors | 4:a7b9f778c4b4 | 8 | bits = 16; |
| Sissors | 4:a7b9f778c4b4 | 9 | |
| Sissors | 4:a7b9f778c4b4 | 10 | //Yes this is ugly, yes I should feel bad about it |
| Sissors | 4:a7b9f778c4b4 | 11 | TPM_SC = _pwm.MOD - 2; |
| Sissors | 4:a7b9f778c4b4 | 12 | } |
| Sissors | 4:a7b9f778c4b4 | 13 | |
| Sissors | 4:a7b9f778c4b4 | 14 | void FastPWM::pulsewidth_ticks( uint32_t ticks ) { |
| Sissors | 4:a7b9f778c4b4 | 15 | *(_pwm.CnV) = ticks; |
| Sissors | 4:a7b9f778c4b4 | 16 | } |
| Sissors | 4:a7b9f778c4b4 | 17 | |
| Sissors | 4:a7b9f778c4b4 | 18 | void FastPWM::period_ticks( uint32_t ticks ) { |
| Sissors | 4:a7b9f778c4b4 | 19 | *(_pwm.MOD) = ticks; |
| Sissors | 4:a7b9f778c4b4 | 20 | } |
| Sissors | 4:a7b9f778c4b4 | 21 | |
| Sissors | 4:a7b9f778c4b4 | 22 | uint32_t FastPWM::getPeriod( void ) { |
| Sissors | 4:a7b9f778c4b4 | 23 | return *(_pwm.MOD); |
| Sissors | 4:a7b9f778c4b4 | 24 | } |
| Sissors | 4:a7b9f778c4b4 | 25 | |
| Sissors | 4:a7b9f778c4b4 | 26 | uint32_t FastPWM::setPrescaler(uint32_t reqScale) { |
| Sissors | 4:a7b9f778c4b4 | 27 | const char prescalers[] = {1, 2, 4, 8, 16, 32, 64, 128}; |
| Sissors | 4:a7b9f778c4b4 | 28 | |
| Sissors | 4:a7b9f778c4b4 | 29 | //If prescaler is 0, return current one |
| Sissors | 4:a7b9f778c4b4 | 30 | if (reqScale == 0) |
| Sissors | 4:a7b9f778c4b4 | 31 | return (prescalers[(*TPM_SC) & 0x07]); |
| Sissors | 4:a7b9f778c4b4 | 32 | |
| Sissors | 4:a7b9f778c4b4 | 33 | uint32_t retval = 0; |
| Sissors | 4:a7b9f778c4b4 | 34 | char bin; |
| Sissors | 4:a7b9f778c4b4 | 35 | |
| Sissors | 4:a7b9f778c4b4 | 36 | for (bin = 0; bin<8; bin++) { |
| Sissors | 4:a7b9f778c4b4 | 37 | retval = prescalers[bin]; |
| Sissors | 4:a7b9f778c4b4 | 38 | if (retval >= reqScale) |
| Sissors | 4:a7b9f778c4b4 | 39 | break; |
| Sissors | 4:a7b9f778c4b4 | 40 | } |
| Sissors | 4:a7b9f778c4b4 | 41 | |
| Sissors | 4:a7b9f778c4b4 | 42 | //Clear lower 5 bits, write new value: |
| Sissors | 4:a7b9f778c4b4 | 43 | char clockbits = *TPM_SC & (3<<3); |
| Sissors | 4:a7b9f778c4b4 | 44 | |
| Sissors | 4:a7b9f778c4b4 | 45 | //For some reason clearing them takes some effort |
| Sissors | 4:a7b9f778c4b4 | 46 | while ((*TPM_SC & 0x1F) != 0) |
| Sissors | 4:a7b9f778c4b4 | 47 | *TPM_SC &= ~0x1F; |
| Sissors | 4:a7b9f778c4b4 | 48 | |
| Sissors | 4:a7b9f778c4b4 | 49 | |
| Sissors | 4:a7b9f778c4b4 | 50 | *TPM_SC |= bin + clockbits; |
| Sissors | 4:a7b9f778c4b4 | 51 | |
| Sissors | 4:a7b9f778c4b4 | 52 | return retval; |
| Sissors | 4:a7b9f778c4b4 | 53 | } |
| Sissors | 4:a7b9f778c4b4 | 54 | #endif |