Alex Millane / Mbed 2 deprecated IFARanging

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Dependencies:   mbed

DW1000/DW1000.h@0:99928431bb44, 2015-07-07 (annotated)

Committer:
millanea
Date:
Tue Jul 07 09:36:12 2015 +0000
Revision:
0:99928431bb44
First commit. Committing the entire project such that it can be published.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
millanea 0:99928431bb44 1 // by Matthias Grob & Manuel Stalder - ETH Zürich - 2015
millanea 0:99928431bb44 2
millanea 0:99928431bb44 3 #ifndef DW1000_H
millanea 0:99928431bb44 4 #define DW1000_H
millanea 0:99928431bb44 5
millanea 0:99928431bb44 6 #include "mbed.h"
millanea 0:99928431bb44 7
millanea 0:99928431bb44 8 // register addresses
millanea 0:99928431bb44 9 // Mnemonic Address Bytes Description
millanea 0:99928431bb44 10 #define DW1000_DEV_ID 0x00 // 4 Device Identifier – includes device type and revision information
millanea 0:99928431bb44 11 #define DW1000_EUI 0x01 // 8 Extended Unique Identifier
millanea 0:99928431bb44 12 #define DW1000_PANADR 0x03 // 4 PAN Identifier and Short Address
millanea 0:99928431bb44 13 #define DW1000_SYS_CFG 0x04 // 4 System Configuration bitmap
millanea 0:99928431bb44 14 #define DW1000_SYS_TIME 0x06 // 5 System Time Counter (40-bit)
millanea 0:99928431bb44 15 #define DW1000_TX_FCTRL 0x08 // 5 Transmit Frame Control
millanea 0:99928431bb44 16 #define DW1000_TX_BUFFER 0x09 // 1024 Transmit Data Buffer
millanea 0:99928431bb44 17 #define DW1000_DX_TIME 0x0A // 5 Delayed Send or Receive Time (40-bit)
millanea 0:99928431bb44 18 #define DW1000_RX_FWTO 0x0C // 2 Receive Frame Wait Timeout Period
millanea 0:99928431bb44 19 #define DW1000_SYS_CTRL 0x0D // 4 System Control Register
millanea 0:99928431bb44 20 #define DW1000_SYS_MASK 0x0E // 4 System Event Mask Register
millanea 0:99928431bb44 21 #define DW1000_SYS_STATUS 0x0F // 5 System Event Status Register
millanea 0:99928431bb44 22 #define DW1000_RX_FINFO 0x10 // 4 RX Frame Information (in double buffer set)
millanea 0:99928431bb44 23 #define DW1000_RX_BUFFER 0x11 // 1024 Receive Data Buffer (in double buffer set)
millanea 0:99928431bb44 24 #define DW1000_RX_FQUAL 0x12 // 8 Rx Frame Quality information (in double buffer set)
millanea 0:99928431bb44 25 #define DW1000_RX_TTCKI 0x13 // 4 Receiver Time Tracking Interval (in double buffer set)
millanea 0:99928431bb44 26 #define DW1000_RX_TTCKO 0x14 // 5 Receiver Time Tracking Offset (in double buffer set)
millanea 0:99928431bb44 27 #define DW1000_RX_TIME 0x15 // 14 Receive Message Time of Arrival (in double buffer set)
millanea 0:99928431bb44 28 #define DW1000_TX_TIME 0x17 // 10 Transmit Message Time of Sending (in double buffer set)
millanea 0:99928431bb44 29 #define DW1000_TX_ANTD 0x18 // 2 16-bit Delay from Transmit to Antenna
millanea 0:99928431bb44 30 #define DW1000_SYS_STATE 0x19 // 5 System State information
millanea 0:99928431bb44 31 #define DW1000_ACK_RESP_T 0x1A // 4 Acknowledgement Time and Response Time
millanea 0:99928431bb44 32 #define DW1000_RX_SNIFF 0x1D // 4 Pulsed Preamble Reception Configuration
millanea 0:99928431bb44 33 #define DW1000_TX_POWER 0x1E // 4 TX Power Control
millanea 0:99928431bb44 34 #define DW1000_CHAN_CTRL 0x1F // 4 Channel Control
millanea 0:99928431bb44 35 #define DW1000_USR_SFD 0x21 // 41 User-specified short/long TX/RX SFD sequences
millanea 0:99928431bb44 36 #define DW1000_AGC_CTRL 0x23 // 32 Automatic Gain Control configuration
millanea 0:99928431bb44 37 #define DW1000_EXT_SYNC 0x24 // 12 External synchronisation control.
millanea 0:99928431bb44 38 #define DW1000_ACC_MEM 0x25 // 4064 Read access to accumulator data
millanea 0:99928431bb44 39 #define DW1000_GPIO_CTRL 0x26 // 44 Peripheral register bus 1 access - GPIO control
millanea 0:99928431bb44 40 #define DW1000_DRX_CONF 0x27 // 44 Digital Receiver configuration
millanea 0:99928431bb44 41 #define DW1000_RF_CONF 0x28 // 58 Analog RF Configuration
millanea 0:99928431bb44 42 #define DW1000_TX_CAL 0x2A // 52 Transmitter calibration block
millanea 0:99928431bb44 43 #define DW1000_FS_CTRL 0x2B // 21 Frequency synthesiser control block
millanea 0:99928431bb44 44 #define DW1000_AON 0x2C // 12 Always-On register set
millanea 0:99928431bb44 45 #define DW1000_OTP_IF 0x2D // 18 One Time Programmable Memory Interface
millanea 0:99928431bb44 46 #define DW1000_LDE_CTRL 0x2E // - Leading edge detection control block
millanea 0:99928431bb44 47 #define DW1000_DIG_DIAG 0x2F // 41 Digital Diagnostics Interface
millanea 0:99928431bb44 48 #define DW1000_PMSC 0x36 // 48 Power Management System Control Block
millanea 0:99928431bb44 49
millanea 0:99928431bb44 50 #define DW1000_WRITE_FLAG 0x80 // First Bit of the address has to be 1 to indicate we want to write
millanea 0:99928431bb44 51 #define DW1000_SUBADDRESS_FLAG 0x40 // if we have a sub address second Bit has to be 1
millanea 0:99928431bb44 52 #define DW1000_2_SUBADDRESS_FLAG 0x80 // if we have a long sub adress (more than 7 Bit) we set this Bit in the first part
millanea 0:99928431bb44 53
millanea 0:99928431bb44 54 class DW1000 {
millanea 0:99928431bb44 55 public:
millanea 0:99928431bb44 56 DW1000(PinName MOSI, PinName MISO, PinName SCLK, PinName CS, PinName IRQ); // constructor, uses SPI class
millanea 0:99928431bb44 57 void setCallbacks(void (*callbackRX)(void), void (*callbackTX)(void)); // setter for callback functions, automatically enables interrupt, if NULL is passed the coresponding interrupt gets disabled
millanea 0:99928431bb44 58 template<typename T>
millanea 0:99928431bb44 59 void setCallbacks(T* tptr, void (T::*mptrRX)(void), void (T::*mptrTX)(void)) { // overloaded setter to treat member function pointers of objects
millanea 0:99928431bb44 60 callbackRX.attach(tptr, mptrRX); // possible client code: dw.setCallbacks(this, &A::callbackRX, &A::callbackTX);
millanea 0:99928431bb44 61 callbackTX.attach(tptr, mptrTX); // concept seen in line 100 of http://developer.mbed.org/users/mbed_official/code/mbed/docs/4fc01daae5a5/InterruptIn_8h_source.html
millanea 0:99928431bb44 62 setInterrupt(true,true);
millanea 0:99928431bb44 63 }
millanea 0:99928431bb44 64
millanea 0:99928431bb44 65 // Device API
millanea 0:99928431bb44 66 uint32_t getDeviceID(); // gets the Device ID which should be 0xDECA0130 (good for testing SPI!)
millanea 0:99928431bb44 67 uint64_t getEUI(); // gets 64 bit Extended Unique Identifier according to IEEE standard
millanea 0:99928431bb44 68 void setEUI(uint64_t EUI); // sets 64 bit Extended Unique Identifier according to IEEE standard
millanea 0:99928431bb44 69 float getVoltage(); // gets the current chip voltage measurement form the A/D converter
millanea 0:99928431bb44 70 uint64_t getStatus(); // get the 40 bit device status
millanea 0:99928431bb44 71 uint64_t getRXTimestamp();
millanea 0:99928431bb44 72 uint64_t getTXTimestamp();
millanea 0:99928431bb44 73
millanea 0:99928431bb44 74 void sendString(char* message); // to send String with arbitrary length
millanea 0:99928431bb44 75 void receiveString(char* message); // to receive char string (length of the buffer must be 1021 to be safe)
millanea 0:99928431bb44 76 void sendFrame(uint8_t* message, uint16_t length); // send a raw frame (length in bytes)
millanea 0:99928431bb44 77 void sendDelayedFrame(uint8_t* message, uint16_t length, uint64_t TxTimestamp);
millanea 0:99928431bb44 78 void startRX(); // start listening for frames
millanea 0:99928431bb44 79 void stopTRX(); // disable tranceiver go back to idle mode
millanea 0:99928431bb44 80
millanea 0:99928431bb44 81 //private:
millanea 0:99928431bb44 82 void loadLDE(); // load the leading edge detection algorithm to RAM, [IMPORTANT because receiving malfunction may occur] see User Manual LDELOAD on p22 & p158
millanea 0:99928431bb44 83 void resetRX(); // soft reset only the tranciever part of DW1000
millanea 0:99928431bb44 84 void resetAll(); // soft reset the entire DW1000 (some registers stay as they were see User Manual)
millanea 0:99928431bb44 85
millanea 0:99928431bb44 86 // Interrupt
millanea 0:99928431bb44 87 InterruptIn irq; // Pin used to handle Events from DW1000 by an Interrupthandler
millanea 0:99928431bb44 88 FunctionPointer callbackRX; // function pointer to callback which is called when successfull RX took place
millanea 0:99928431bb44 89 FunctionPointer callbackTX; // function pointer to callback which is called when successfull TX took place
millanea 0:99928431bb44 90 void setInterrupt(bool RX, bool TX); // set Interrupt for received a good frame (CRC ok) or transmission done
millanea 0:99928431bb44 91 void ISR(); // interrupt handling method (also calls according callback methods)
millanea 0:99928431bb44 92 uint16_t getFramelength(); // to get the framelength of the received frame from the PHY header
millanea 0:99928431bb44 93
millanea 0:99928431bb44 94 // SPI Inteface
millanea 0:99928431bb44 95 SPI spi; // SPI Bus
millanea 0:99928431bb44 96 DigitalOut cs; // Slave selector for SPI-Bus (here explicitly needed to start and end SPI transactions also usable to wake up DW1000)
millanea 0:99928431bb44 97
millanea 0:99928431bb44 98 uint8_t readRegister8(uint8_t reg, uint16_t subaddress); // expressive methods to read or write the number of bits written in the name
millanea 0:99928431bb44 99 uint16_t readRegister16(uint8_t reg, uint16_t subaddress);
millanea 0:99928431bb44 100 uint64_t readRegister40(uint8_t reg, uint16_t subaddress);
millanea 0:99928431bb44 101 void writeRegister8(uint8_t reg, uint16_t subaddress, uint8_t buffer);
millanea 0:99928431bb44 102 void writeRegister16(uint8_t reg, uint16_t subaddress, uint16_t buffer);
millanea 0:99928431bb44 103 void writeRegister32(uint8_t reg, uint16_t subaddress, uint32_t buffer);
millanea 0:99928431bb44 104 void writeRegister40(uint8_t reg, uint16_t subaddress, uint64_t buffer);
millanea 0:99928431bb44 105
millanea 0:99928431bb44 106 void readRegister(uint8_t reg, uint16_t subaddress, uint8_t *buffer, int length); // reads the selected part of a slave register into the buffer memory
millanea 0:99928431bb44 107 void writeRegister(uint8_t reg, uint16_t subaddress, uint8_t *buffer, int length); // writes the buffer memory to the selected slave register
millanea 0:99928431bb44 108 void setupTransaction(uint8_t reg, uint16_t subaddress, bool write); // sets up an SPI read or write transaction with correct register address and offset
millanea 0:99928431bb44 109 void select(); // selects the only slave for a transaction
millanea 0:99928431bb44 110 void deselect(); // deselects the only slave after transaction
millanea 0:99928431bb44 111 };
millanea 0:99928431bb44 112
millanea 0:99928431bb44 113 #endif