Michele Riccio / mbed-dsp_F767ZI

mbed-os 6.10 versione

cmsis_dsp/BasicMathFunctions/arm_mult_f32.c@5:ed60e5c5c2a8, 2021-06-21 (annotated)

Committer:
michelericcio
Date:
Mon Jun 21 10:16:02 2021 +0000
Revision:
5:ed60e5c5c2a8
Parent:
3:7a284390b0ce 
mbed-dsp working on ST Nucleo F767ZI and mbed-OS 6

Who changed what in which revision?

UserRevisionLine numberNew contents of line
emilmont 1:fdd22bb7aa52 1 /* ----------------------------------------------------------------------
mbed_official 3:7a284390b0ce 2 * Copyright (C) 2010-2013 ARM Limited. All rights reserved.
emilmont 1:fdd22bb7aa52 3 *
mbed_official 3:7a284390b0ce 4 * $Date: 17. January 2013
mbed_official 3:7a284390b0ce 5 * $Revision: V1.4.1
emilmont 1:fdd22bb7aa52 6 *
emilmont 2:da51fb522205 7 * Project: CMSIS DSP Library
emilmont 2:da51fb522205 8 * Title: arm_mult_f32.c
emilmont 1:fdd22bb7aa52 9 *
emilmont 2:da51fb522205 10 * Description: Floating-point vector multiplication.
emilmont 1:fdd22bb7aa52 11 *
emilmont 1:fdd22bb7aa52 12 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
emilmont 1:fdd22bb7aa52 13 *
mbed_official 3:7a284390b0ce 14 * Redistribution and use in source and binary forms, with or without
mbed_official 3:7a284390b0ce 15 * modification, are permitted provided that the following conditions
mbed_official 3:7a284390b0ce 16 * are met:
mbed_official 3:7a284390b0ce 17 * - Redistributions of source code must retain the above copyright
mbed_official 3:7a284390b0ce 18 * notice, this list of conditions and the following disclaimer.
mbed_official 3:7a284390b0ce 19 * - Redistributions in binary form must reproduce the above copyright
mbed_official 3:7a284390b0ce 20 * notice, this list of conditions and the following disclaimer in
mbed_official 3:7a284390b0ce 21 * the documentation and/or other materials provided with the
mbed_official 3:7a284390b0ce 22 * distribution.
mbed_official 3:7a284390b0ce 23 * - Neither the name of ARM LIMITED nor the names of its contributors
mbed_official 3:7a284390b0ce 24 * may be used to endorse or promote products derived from this
mbed_official 3:7a284390b0ce 25 * software without specific prior written permission.
mbed_official 3:7a284390b0ce 26 *
mbed_official 3:7a284390b0ce 27 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
mbed_official 3:7a284390b0ce 28 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
mbed_official 3:7a284390b0ce 29 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
mbed_official 3:7a284390b0ce 30 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
mbed_official 3:7a284390b0ce 31 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
mbed_official 3:7a284390b0ce 32 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
mbed_official 3:7a284390b0ce 33 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
mbed_official 3:7a284390b0ce 34 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
mbed_official 3:7a284390b0ce 35 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
mbed_official 3:7a284390b0ce 36 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
mbed_official 3:7a284390b0ce 37 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
mbed_official 3:7a284390b0ce 38 * POSSIBILITY OF SUCH DAMAGE.
emilmont 1:fdd22bb7aa52 39 * -------------------------------------------------------------------- */
emilmont 1:fdd22bb7aa52 40
emilmont 1:fdd22bb7aa52 41 #include "arm_math.h"
emilmont 1:fdd22bb7aa52 42
emilmont 1:fdd22bb7aa52 43 /**
emilmont 1:fdd22bb7aa52 44 * @ingroup groupMath
emilmont 1:fdd22bb7aa52 45 */
emilmont 1:fdd22bb7aa52 46
emilmont 1:fdd22bb7aa52 47 /**
emilmont 1:fdd22bb7aa52 48 * @defgroup BasicMult Vector Multiplication
emilmont 1:fdd22bb7aa52 49 *
emilmont 1:fdd22bb7aa52 50 * Element-by-element multiplication of two vectors.
emilmont 1:fdd22bb7aa52 51 *
emilmont 1:fdd22bb7aa52 52 * <pre>
emilmont 1:fdd22bb7aa52 53 * pDst[n] = pSrcA[n] * pSrcB[n], 0 <= n < blockSize.
emilmont 1:fdd22bb7aa52 54 * </pre>
emilmont 1:fdd22bb7aa52 55 *
emilmont 1:fdd22bb7aa52 56 * There are separate functions for floating-point, Q7, Q15, and Q31 data types.
emilmont 1:fdd22bb7aa52 57 */
emilmont 1:fdd22bb7aa52 58
emilmont 1:fdd22bb7aa52 59 /**
emilmont 1:fdd22bb7aa52 60 * @addtogroup BasicMult
emilmont 1:fdd22bb7aa52 61 * @{
emilmont 1:fdd22bb7aa52 62 */
emilmont 1:fdd22bb7aa52 63
emilmont 1:fdd22bb7aa52 64 /**
emilmont 1:fdd22bb7aa52 65 * @brief Floating-point vector multiplication.
emilmont 1:fdd22bb7aa52 66 * @param[in] *pSrcA points to the first input vector
emilmont 1:fdd22bb7aa52 67 * @param[in] *pSrcB points to the second input vector
emilmont 1:fdd22bb7aa52 68 * @param[out] *pDst points to the output vector
emilmont 1:fdd22bb7aa52 69 * @param[in] blockSize number of samples in each vector
emilmont 1:fdd22bb7aa52 70 * @return none.
emilmont 1:fdd22bb7aa52 71 */
emilmont 1:fdd22bb7aa52 72
emilmont 1:fdd22bb7aa52 73 void arm_mult_f32(
emilmont 1:fdd22bb7aa52 74 float32_t * pSrcA,
emilmont 1:fdd22bb7aa52 75 float32_t * pSrcB,
emilmont 1:fdd22bb7aa52 76 float32_t * pDst,
emilmont 1:fdd22bb7aa52 77 uint32_t blockSize)
emilmont 1:fdd22bb7aa52 78 {
emilmont 1:fdd22bb7aa52 79 uint32_t blkCnt; /* loop counters */
mbed_official 3:7a284390b0ce 80 #ifndef ARM_MATH_CM0_FAMILY
emilmont 1:fdd22bb7aa52 81
emilmont 1:fdd22bb7aa52 82 /* Run the below code for Cortex-M4 and Cortex-M3 */
emilmont 1:fdd22bb7aa52 83 float32_t inA1, inA2, inA3, inA4; /* temporary input variables */
emilmont 1:fdd22bb7aa52 84 float32_t inB1, inB2, inB3, inB4; /* temporary input variables */
emilmont 1:fdd22bb7aa52 85 float32_t out1, out2, out3, out4; /* temporary output variables */
emilmont 1:fdd22bb7aa52 86
emilmont 1:fdd22bb7aa52 87 /* loop Unrolling */
emilmont 1:fdd22bb7aa52 88 blkCnt = blockSize >> 2u;
emilmont 1:fdd22bb7aa52 89
emilmont 1:fdd22bb7aa52 90 /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
emilmont 1:fdd22bb7aa52 91 ** a second loop below computes the remaining 1 to 3 samples. */
emilmont 1:fdd22bb7aa52 92 while(blkCnt > 0u)
emilmont 1:fdd22bb7aa52 93 {
emilmont 1:fdd22bb7aa52 94 /* C = A * B */
emilmont 1:fdd22bb7aa52 95 /* Multiply the inputs and store the results in output buffer */
emilmont 1:fdd22bb7aa52 96 /* read sample from sourceA */
emilmont 1:fdd22bb7aa52 97 inA1 = *pSrcA;
emilmont 1:fdd22bb7aa52 98 /* read sample from sourceB */
emilmont 1:fdd22bb7aa52 99 inB1 = *pSrcB;
emilmont 1:fdd22bb7aa52 100 /* read sample from sourceA */
emilmont 1:fdd22bb7aa52 101 inA2 = *(pSrcA + 1);
emilmont 1:fdd22bb7aa52 102 /* read sample from sourceB */
emilmont 1:fdd22bb7aa52 103 inB2 = *(pSrcB + 1);
emilmont 1:fdd22bb7aa52 104
emilmont 1:fdd22bb7aa52 105 /* out = sourceA * sourceB */
emilmont 1:fdd22bb7aa52 106 out1 = inA1 * inB1;
emilmont 1:fdd22bb7aa52 107
emilmont 1:fdd22bb7aa52 108 /* read sample from sourceA */
emilmont 1:fdd22bb7aa52 109 inA3 = *(pSrcA + 2);
emilmont 1:fdd22bb7aa52 110 /* read sample from sourceB */
emilmont 1:fdd22bb7aa52 111 inB3 = *(pSrcB + 2);
emilmont 1:fdd22bb7aa52 112
emilmont 1:fdd22bb7aa52 113 /* out = sourceA * sourceB */
emilmont 1:fdd22bb7aa52 114 out2 = inA2 * inB2;
emilmont 1:fdd22bb7aa52 115
emilmont 1:fdd22bb7aa52 116 /* read sample from sourceA */
emilmont 1:fdd22bb7aa52 117 inA4 = *(pSrcA + 3);
emilmont 1:fdd22bb7aa52 118
emilmont 1:fdd22bb7aa52 119 /* store result to destination buffer */
emilmont 1:fdd22bb7aa52 120 *pDst = out1;
emilmont 1:fdd22bb7aa52 121
emilmont 1:fdd22bb7aa52 122 /* read sample from sourceB */
emilmont 1:fdd22bb7aa52 123 inB4 = *(pSrcB + 3);
emilmont 1:fdd22bb7aa52 124
emilmont 1:fdd22bb7aa52 125 /* out = sourceA * sourceB */
emilmont 1:fdd22bb7aa52 126 out3 = inA3 * inB3;
emilmont 1:fdd22bb7aa52 127
emilmont 1:fdd22bb7aa52 128 /* store result to destination buffer */
emilmont 1:fdd22bb7aa52 129 *(pDst + 1) = out2;
emilmont 1:fdd22bb7aa52 130
emilmont 1:fdd22bb7aa52 131 /* out = sourceA * sourceB */
emilmont 1:fdd22bb7aa52 132 out4 = inA4 * inB4;
emilmont 1:fdd22bb7aa52 133 /* store result to destination buffer */
emilmont 1:fdd22bb7aa52 134 *(pDst + 2) = out3;
emilmont 1:fdd22bb7aa52 135 /* store result to destination buffer */
emilmont 1:fdd22bb7aa52 136 *(pDst + 3) = out4;
emilmont 1:fdd22bb7aa52 137
emilmont 1:fdd22bb7aa52 138
emilmont 1:fdd22bb7aa52 139 /* update pointers to process next samples */
emilmont 1:fdd22bb7aa52 140 pSrcA += 4u;
emilmont 1:fdd22bb7aa52 141 pSrcB += 4u;
emilmont 1:fdd22bb7aa52 142 pDst += 4u;
emilmont 1:fdd22bb7aa52 143
emilmont 1:fdd22bb7aa52 144 /* Decrement the blockSize loop counter */
emilmont 1:fdd22bb7aa52 145 blkCnt--;
emilmont 1:fdd22bb7aa52 146 }
emilmont 1:fdd22bb7aa52 147
emilmont 1:fdd22bb7aa52 148 /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
emilmont 1:fdd22bb7aa52 149 ** No loop unrolling is used. */
emilmont 1:fdd22bb7aa52 150 blkCnt = blockSize % 0x4u;
emilmont 1:fdd22bb7aa52 151
emilmont 1:fdd22bb7aa52 152 #else
emilmont 1:fdd22bb7aa52 153
emilmont 1:fdd22bb7aa52 154 /* Run the below code for Cortex-M0 */
emilmont 1:fdd22bb7aa52 155
emilmont 1:fdd22bb7aa52 156 /* Initialize blkCnt with number of samples */
emilmont 1:fdd22bb7aa52 157 blkCnt = blockSize;
emilmont 1:fdd22bb7aa52 158
mbed_official 3:7a284390b0ce 159 #endif /* #ifndef ARM_MATH_CM0_FAMILY */
emilmont 1:fdd22bb7aa52 160
emilmont 1:fdd22bb7aa52 161 while(blkCnt > 0u)
emilmont 1:fdd22bb7aa52 162 {
emilmont 1:fdd22bb7aa52 163 /* C = A * B */
emilmont 1:fdd22bb7aa52 164 /* Multiply the inputs and store the results in output buffer */
emilmont 1:fdd22bb7aa52 165 *pDst++ = (*pSrcA++) * (*pSrcB++);
emilmont 1:fdd22bb7aa52 166
emilmont 1:fdd22bb7aa52 167 /* Decrement the blockSize loop counter */
emilmont 1:fdd22bb7aa52 168 blkCnt--;
emilmont 1:fdd22bb7aa52 169 }
emilmont 1:fdd22bb7aa52 170 }
emilmont 1:fdd22bb7aa52 171
emilmont 1:fdd22bb7aa52 172 /**
emilmont 1:fdd22bb7aa52 173 * @} end of BasicMult group
emilmont 1:fdd22bb7aa52 174 */