Michele Riccio / mbed-dsp_F767ZI

mbed-os 6.10 versione

cmsis_dsp/StatisticsFunctions/arm_rms_q15.c@2:da51fb522205, 2013-05-30 (annotated)

Committer:
emilmont
Date:
Thu May 30 17:10:11 2013 +0100
Revision:
2:da51fb522205
Parent:
1:fdd22bb7aa52
Child:
3:7a284390b0ce
Keep "cmsis-dsp" module in synch with its source

Who changed what in which revision?

UserRevisionLine numberNew contents of line
emilmont 1:fdd22bb7aa52 1 /* ----------------------------------------------------------------------
emilmont 1:fdd22bb7aa52 2 * Copyright (C) 2010 ARM Limited. All rights reserved.
emilmont 1:fdd22bb7aa52 3 *
emilmont 1:fdd22bb7aa52 4 * $Date: 15. February 2012
emilmont 2:da51fb522205 5 * $Revision: V1.1.0
emilmont 1:fdd22bb7aa52 6 *
emilmont 2:da51fb522205 7 * Project: CMSIS DSP Library
emilmont 2:da51fb522205 8 * Title: arm_rms_q15.c
emilmont 1:fdd22bb7aa52 9 *
emilmont 2:da51fb522205 10 * Description: Root Mean Square of the elements of a Q15 vector.
emilmont 1:fdd22bb7aa52 11 *
emilmont 1:fdd22bb7aa52 12 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
emilmont 1:fdd22bb7aa52 13 *
emilmont 1:fdd22bb7aa52 14 * Version 1.1.0 2012/02/15
emilmont 1:fdd22bb7aa52 15 * Updated with more optimizations, bug fixes and minor API changes.
emilmont 1:fdd22bb7aa52 16 *
emilmont 1:fdd22bb7aa52 17 * Version 1.0.10 2011/7/15
emilmont 1:fdd22bb7aa52 18 * Big Endian support added and Merged M0 and M3/M4 Source code.
emilmont 1:fdd22bb7aa52 19 *
emilmont 1:fdd22bb7aa52 20 * Version 1.0.3 2010/11/29
emilmont 1:fdd22bb7aa52 21 * Re-organized the CMSIS folders and updated documentation.
emilmont 1:fdd22bb7aa52 22 *
emilmont 1:fdd22bb7aa52 23 * Version 1.0.2 2010/11/11
emilmont 1:fdd22bb7aa52 24 * Documentation updated.
emilmont 1:fdd22bb7aa52 25 *
emilmont 1:fdd22bb7aa52 26 * Version 1.0.1 2010/10/05
emilmont 1:fdd22bb7aa52 27 * Production release and review comments incorporated.
emilmont 1:fdd22bb7aa52 28 *
emilmont 1:fdd22bb7aa52 29 * Version 1.0.0 2010/09/20
emilmont 1:fdd22bb7aa52 30 * Production release and review comments incorporated.
emilmont 1:fdd22bb7aa52 31 * ---------------------------------------------------------------------------- */
emilmont 1:fdd22bb7aa52 32
emilmont 1:fdd22bb7aa52 33 #include "arm_math.h"
emilmont 1:fdd22bb7aa52 34
emilmont 1:fdd22bb7aa52 35 /**
emilmont 1:fdd22bb7aa52 36 * @addtogroup RMS
emilmont 1:fdd22bb7aa52 37 * @{
emilmont 1:fdd22bb7aa52 38 */
emilmont 1:fdd22bb7aa52 39
emilmont 1:fdd22bb7aa52 40 /**
emilmont 1:fdd22bb7aa52 41 * @brief Root Mean Square of the elements of a Q15 vector.
emilmont 1:fdd22bb7aa52 42 * @param[in] *pSrc points to the input vector
emilmont 1:fdd22bb7aa52 43 * @param[in] blockSize length of the input vector
emilmont 1:fdd22bb7aa52 44 * @param[out] *pResult rms value returned here
emilmont 1:fdd22bb7aa52 45 * @return none.
emilmont 1:fdd22bb7aa52 46 *
emilmont 1:fdd22bb7aa52 47 * @details
emilmont 1:fdd22bb7aa52 48 * <b>Scaling and Overflow Behavior:</b>
emilmont 1:fdd22bb7aa52 49 *
emilmont 1:fdd22bb7aa52 50 * \par
emilmont 1:fdd22bb7aa52 51 * The function is implemented using a 64-bit internal accumulator.
emilmont 1:fdd22bb7aa52 52 * The input is represented in 1.15 format.
emilmont 1:fdd22bb7aa52 53 * Intermediate multiplication yields a 2.30 format, and this
emilmont 1:fdd22bb7aa52 54 * result is added without saturation to a 64-bit accumulator in 34.30 format.
emilmont 1:fdd22bb7aa52 55 * With 33 guard bits in the accumulator, there is no risk of overflow, and the
emilmont 1:fdd22bb7aa52 56 * full precision of the intermediate multiplication is preserved.
emilmont 1:fdd22bb7aa52 57 * Finally, the 34.30 result is truncated to 34.15 format by discarding the lower
emilmont 1:fdd22bb7aa52 58 * 15 bits, and then saturated to yield a result in 1.15 format.
emilmont 1:fdd22bb7aa52 59 *
emilmont 1:fdd22bb7aa52 60 */
emilmont 1:fdd22bb7aa52 61
emilmont 1:fdd22bb7aa52 62 void arm_rms_q15(
emilmont 1:fdd22bb7aa52 63 q15_t * pSrc,
emilmont 1:fdd22bb7aa52 64 uint32_t blockSize,
emilmont 1:fdd22bb7aa52 65 q15_t * pResult)
emilmont 1:fdd22bb7aa52 66 {
emilmont 1:fdd22bb7aa52 67 q63_t sum = 0; /* accumulator */
emilmont 1:fdd22bb7aa52 68
emilmont 1:fdd22bb7aa52 69 #ifndef ARM_MATH_CM0
emilmont 1:fdd22bb7aa52 70
emilmont 1:fdd22bb7aa52 71 /* Run the below code for Cortex-M4 and Cortex-M3 */
emilmont 1:fdd22bb7aa52 72
emilmont 1:fdd22bb7aa52 73 q31_t in; /* temporary variable to store the input value */
emilmont 1:fdd22bb7aa52 74 q15_t in1; /* temporary variable to store the input value */
emilmont 1:fdd22bb7aa52 75 uint32_t blkCnt; /* loop counter */
emilmont 1:fdd22bb7aa52 76
emilmont 1:fdd22bb7aa52 77 /* loop Unrolling */
emilmont 1:fdd22bb7aa52 78 blkCnt = blockSize >> 2u;
emilmont 1:fdd22bb7aa52 79
emilmont 1:fdd22bb7aa52 80 /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
emilmont 1:fdd22bb7aa52 81 ** a second loop below computes the remaining 1 to 3 samples. */
emilmont 1:fdd22bb7aa52 82 while(blkCnt > 0u)
emilmont 1:fdd22bb7aa52 83 {
emilmont 1:fdd22bb7aa52 84 /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */
emilmont 1:fdd22bb7aa52 85 /* Compute sum of the squares and then store the results in a temporary variable, sum */
emilmont 1:fdd22bb7aa52 86 in = *__SIMD32(pSrc)++;
emilmont 1:fdd22bb7aa52 87 sum = __SMLALD(in, in, sum);
emilmont 1:fdd22bb7aa52 88 in = *__SIMD32(pSrc)++;
emilmont 1:fdd22bb7aa52 89 sum = __SMLALD(in, in, sum);
emilmont 1:fdd22bb7aa52 90
emilmont 1:fdd22bb7aa52 91 /* Decrement the loop counter */
emilmont 1:fdd22bb7aa52 92 blkCnt--;
emilmont 1:fdd22bb7aa52 93 }
emilmont 1:fdd22bb7aa52 94
emilmont 1:fdd22bb7aa52 95 /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
emilmont 1:fdd22bb7aa52 96 ** No loop unrolling is used. */
emilmont 1:fdd22bb7aa52 97 blkCnt = blockSize % 0x4u;
emilmont 1:fdd22bb7aa52 98
emilmont 1:fdd22bb7aa52 99 while(blkCnt > 0u)
emilmont 1:fdd22bb7aa52 100 {
emilmont 1:fdd22bb7aa52 101 /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */
emilmont 1:fdd22bb7aa52 102 /* Compute sum of the squares and then store the results in a temporary variable, sum */
emilmont 1:fdd22bb7aa52 103 in1 = *pSrc++;
emilmont 1:fdd22bb7aa52 104 sum = __SMLALD(in1, in1, sum);
emilmont 1:fdd22bb7aa52 105
emilmont 1:fdd22bb7aa52 106 /* Decrement the loop counter */
emilmont 1:fdd22bb7aa52 107 blkCnt--;
emilmont 1:fdd22bb7aa52 108 }
emilmont 1:fdd22bb7aa52 109
emilmont 1:fdd22bb7aa52 110 /* Truncating and saturating the accumulator to 1.15 format */
emilmont 1:fdd22bb7aa52 111 sum = __SSAT((q31_t) (sum >> 15), 16);
emilmont 1:fdd22bb7aa52 112
emilmont 1:fdd22bb7aa52 113 in1 = (q15_t) (sum / blockSize);
emilmont 1:fdd22bb7aa52 114
emilmont 1:fdd22bb7aa52 115 /* Store the result in the destination */
emilmont 1:fdd22bb7aa52 116 arm_sqrt_q15(in1, pResult);
emilmont 1:fdd22bb7aa52 117
emilmont 1:fdd22bb7aa52 118 #else
emilmont 1:fdd22bb7aa52 119
emilmont 1:fdd22bb7aa52 120 /* Run the below code for Cortex-M0 */
emilmont 1:fdd22bb7aa52 121
emilmont 1:fdd22bb7aa52 122 q15_t in; /* temporary variable to store the input value */
emilmont 1:fdd22bb7aa52 123 uint32_t blkCnt; /* loop counter */
emilmont 1:fdd22bb7aa52 124
emilmont 1:fdd22bb7aa52 125 /* Loop over blockSize number of values */
emilmont 1:fdd22bb7aa52 126 blkCnt = blockSize;
emilmont 1:fdd22bb7aa52 127
emilmont 1:fdd22bb7aa52 128 while(blkCnt > 0u)
emilmont 1:fdd22bb7aa52 129 {
emilmont 1:fdd22bb7aa52 130 /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */
emilmont 1:fdd22bb7aa52 131 /* Compute sum of the squares and then store the results in a temporary variable, sum */
emilmont 1:fdd22bb7aa52 132 in = *pSrc++;
emilmont 1:fdd22bb7aa52 133 sum += ((q31_t) in * in);
emilmont 1:fdd22bb7aa52 134
emilmont 1:fdd22bb7aa52 135 /* Decrement the loop counter */
emilmont 1:fdd22bb7aa52 136 blkCnt--;
emilmont 1:fdd22bb7aa52 137 }
emilmont 1:fdd22bb7aa52 138
emilmont 1:fdd22bb7aa52 139 /* Truncating and saturating the accumulator to 1.15 format */
emilmont 1:fdd22bb7aa52 140 sum = __SSAT((q31_t) (sum >> 15), 16);
emilmont 1:fdd22bb7aa52 141
emilmont 1:fdd22bb7aa52 142 in = (q15_t) (sum / blockSize);
emilmont 1:fdd22bb7aa52 143
emilmont 1:fdd22bb7aa52 144 /* Store the result in the destination */
emilmont 1:fdd22bb7aa52 145 arm_sqrt_q15(in, pResult);
emilmont 1:fdd22bb7aa52 146
emilmont 1:fdd22bb7aa52 147 #endif /* #ifndef ARM_MATH_CM0 */
emilmont 1:fdd22bb7aa52 148
emilmont 1:fdd22bb7aa52 149 }
emilmont 1:fdd22bb7aa52 150
emilmont 1:fdd22bb7aa52 151 /**
emilmont 1:fdd22bb7aa52 152 * @} end of RMS group
emilmont 1:fdd22bb7aa52 153 */