mbed-os 6.10 versione
cmsis_dsp/ComplexMathFunctions/arm_cmplx_mult_real_q15.c@3:7a284390b0ce, 2013-11-08 (annotated)
- Committer:
- mbed_official
- Date:
- Fri Nov 08 13:45:10 2013 +0000
- Revision:
- 3:7a284390b0ce
- Parent:
- 2:da51fb522205
Synchronized with git revision e69956aba2f68a2a26ac26b051f8d349deaa1ce8
Who changed what in which revision?
User | Revision | Line number | New contents of line |
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emilmont | 1:fdd22bb7aa52 | 1 | /* ---------------------------------------------------------------------- |
mbed_official | 3:7a284390b0ce | 2 | * Copyright (C) 2010-2013 ARM Limited. All rights reserved. |
emilmont | 1:fdd22bb7aa52 | 3 | * |
mbed_official | 3:7a284390b0ce | 4 | * $Date: 17. January 2013 |
mbed_official | 3:7a284390b0ce | 5 | * $Revision: V1.4.1 |
emilmont | 1:fdd22bb7aa52 | 6 | * |
emilmont | 2:da51fb522205 | 7 | * Project: CMSIS DSP Library |
emilmont | 2:da51fb522205 | 8 | * Title: arm_cmplx_mult_real_q15.c |
emilmont | 1:fdd22bb7aa52 | 9 | * |
emilmont | 2:da51fb522205 | 10 | * Description: Q15 complex by real multiplication |
emilmont | 1:fdd22bb7aa52 | 11 | * |
emilmont | 1:fdd22bb7aa52 | 12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 |
emilmont | 1:fdd22bb7aa52 | 13 | * |
mbed_official | 3:7a284390b0ce | 14 | * Redistribution and use in source and binary forms, with or without |
mbed_official | 3:7a284390b0ce | 15 | * modification, are permitted provided that the following conditions |
mbed_official | 3:7a284390b0ce | 16 | * are met: |
mbed_official | 3:7a284390b0ce | 17 | * - Redistributions of source code must retain the above copyright |
mbed_official | 3:7a284390b0ce | 18 | * notice, this list of conditions and the following disclaimer. |
mbed_official | 3:7a284390b0ce | 19 | * - Redistributions in binary form must reproduce the above copyright |
mbed_official | 3:7a284390b0ce | 20 | * notice, this list of conditions and the following disclaimer in |
mbed_official | 3:7a284390b0ce | 21 | * the documentation and/or other materials provided with the |
mbed_official | 3:7a284390b0ce | 22 | * distribution. |
mbed_official | 3:7a284390b0ce | 23 | * - Neither the name of ARM LIMITED nor the names of its contributors |
mbed_official | 3:7a284390b0ce | 24 | * may be used to endorse or promote products derived from this |
mbed_official | 3:7a284390b0ce | 25 | * software without specific prior written permission. |
mbed_official | 3:7a284390b0ce | 26 | * |
mbed_official | 3:7a284390b0ce | 27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
mbed_official | 3:7a284390b0ce | 28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
mbed_official | 3:7a284390b0ce | 29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS |
mbed_official | 3:7a284390b0ce | 30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE |
mbed_official | 3:7a284390b0ce | 31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, |
mbed_official | 3:7a284390b0ce | 32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, |
mbed_official | 3:7a284390b0ce | 33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
mbed_official | 3:7a284390b0ce | 34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
mbed_official | 3:7a284390b0ce | 35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
mbed_official | 3:7a284390b0ce | 36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN |
mbed_official | 3:7a284390b0ce | 37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
mbed_official | 3:7a284390b0ce | 38 | * POSSIBILITY OF SUCH DAMAGE. |
emilmont | 1:fdd22bb7aa52 | 39 | * -------------------------------------------------------------------- */ |
emilmont | 1:fdd22bb7aa52 | 40 | |
emilmont | 1:fdd22bb7aa52 | 41 | #include "arm_math.h" |
emilmont | 1:fdd22bb7aa52 | 42 | |
emilmont | 1:fdd22bb7aa52 | 43 | /** |
emilmont | 1:fdd22bb7aa52 | 44 | * @ingroup groupCmplxMath |
emilmont | 1:fdd22bb7aa52 | 45 | */ |
emilmont | 1:fdd22bb7aa52 | 46 | |
emilmont | 1:fdd22bb7aa52 | 47 | /** |
emilmont | 1:fdd22bb7aa52 | 48 | * @addtogroup CmplxByRealMult |
emilmont | 1:fdd22bb7aa52 | 49 | * @{ |
emilmont | 1:fdd22bb7aa52 | 50 | */ |
emilmont | 1:fdd22bb7aa52 | 51 | |
emilmont | 1:fdd22bb7aa52 | 52 | |
emilmont | 1:fdd22bb7aa52 | 53 | /** |
emilmont | 1:fdd22bb7aa52 | 54 | * @brief Q15 complex-by-real multiplication |
emilmont | 1:fdd22bb7aa52 | 55 | * @param[in] *pSrcCmplx points to the complex input vector |
emilmont | 1:fdd22bb7aa52 | 56 | * @param[in] *pSrcReal points to the real input vector |
emilmont | 1:fdd22bb7aa52 | 57 | * @param[out] *pCmplxDst points to the complex output vector |
emilmont | 1:fdd22bb7aa52 | 58 | * @param[in] numSamples number of samples in each vector |
emilmont | 1:fdd22bb7aa52 | 59 | * @return none. |
emilmont | 1:fdd22bb7aa52 | 60 | * |
emilmont | 1:fdd22bb7aa52 | 61 | * <b>Scaling and Overflow Behavior:</b> |
emilmont | 1:fdd22bb7aa52 | 62 | * \par |
emilmont | 1:fdd22bb7aa52 | 63 | * The function uses saturating arithmetic. |
emilmont | 1:fdd22bb7aa52 | 64 | * Results outside of the allowable Q15 range [0x8000 0x7FFF] will be saturated. |
emilmont | 1:fdd22bb7aa52 | 65 | */ |
emilmont | 1:fdd22bb7aa52 | 66 | |
emilmont | 1:fdd22bb7aa52 | 67 | void arm_cmplx_mult_real_q15( |
emilmont | 1:fdd22bb7aa52 | 68 | q15_t * pSrcCmplx, |
emilmont | 1:fdd22bb7aa52 | 69 | q15_t * pSrcReal, |
emilmont | 1:fdd22bb7aa52 | 70 | q15_t * pCmplxDst, |
emilmont | 1:fdd22bb7aa52 | 71 | uint32_t numSamples) |
emilmont | 1:fdd22bb7aa52 | 72 | { |
emilmont | 1:fdd22bb7aa52 | 73 | q15_t in; /* Temporary variable to store input value */ |
emilmont | 1:fdd22bb7aa52 | 74 | |
mbed_official | 3:7a284390b0ce | 75 | #ifndef ARM_MATH_CM0_FAMILY |
emilmont | 1:fdd22bb7aa52 | 76 | |
emilmont | 1:fdd22bb7aa52 | 77 | /* Run the below code for Cortex-M4 and Cortex-M3 */ |
emilmont | 1:fdd22bb7aa52 | 78 | uint32_t blkCnt; /* loop counters */ |
emilmont | 1:fdd22bb7aa52 | 79 | q31_t inA1, inA2; /* Temporary variables to hold input data */ |
emilmont | 1:fdd22bb7aa52 | 80 | q31_t inB1; /* Temporary variables to hold input data */ |
emilmont | 1:fdd22bb7aa52 | 81 | q15_t out1, out2, out3, out4; /* Temporary variables to hold output data */ |
emilmont | 1:fdd22bb7aa52 | 82 | q31_t mul1, mul2, mul3, mul4; /* Temporary variables to hold intermediate data */ |
emilmont | 1:fdd22bb7aa52 | 83 | |
emilmont | 1:fdd22bb7aa52 | 84 | /* loop Unrolling */ |
emilmont | 1:fdd22bb7aa52 | 85 | blkCnt = numSamples >> 2u; |
emilmont | 1:fdd22bb7aa52 | 86 | |
emilmont | 1:fdd22bb7aa52 | 87 | /* First part of the processing with loop unrolling. Compute 4 outputs at a time. |
emilmont | 1:fdd22bb7aa52 | 88 | ** a second loop below computes the remaining 1 to 3 samples. */ |
emilmont | 1:fdd22bb7aa52 | 89 | while(blkCnt > 0u) |
emilmont | 1:fdd22bb7aa52 | 90 | { |
emilmont | 1:fdd22bb7aa52 | 91 | /* C[2 * i] = A[2 * i] * B[i]. */ |
emilmont | 1:fdd22bb7aa52 | 92 | /* C[2 * i + 1] = A[2 * i + 1] * B[i]. */ |
emilmont | 1:fdd22bb7aa52 | 93 | /* read complex number both real and imaginary from complex input buffer */ |
emilmont | 1:fdd22bb7aa52 | 94 | inA1 = *__SIMD32(pSrcCmplx)++; |
emilmont | 1:fdd22bb7aa52 | 95 | /* read two real values at a time from real input buffer */ |
emilmont | 1:fdd22bb7aa52 | 96 | inB1 = *__SIMD32(pSrcReal)++; |
emilmont | 1:fdd22bb7aa52 | 97 | /* read complex number both real and imaginary from complex input buffer */ |
emilmont | 1:fdd22bb7aa52 | 98 | inA2 = *__SIMD32(pSrcCmplx)++; |
emilmont | 1:fdd22bb7aa52 | 99 | |
emilmont | 1:fdd22bb7aa52 | 100 | /* multiply complex number with real numbers */ |
emilmont | 1:fdd22bb7aa52 | 101 | #ifndef ARM_MATH_BIG_ENDIAN |
emilmont | 1:fdd22bb7aa52 | 102 | |
emilmont | 1:fdd22bb7aa52 | 103 | mul1 = (q31_t) ((q15_t) (inA1) * (q15_t) (inB1)); |
emilmont | 1:fdd22bb7aa52 | 104 | mul2 = (q31_t) ((q15_t) (inA1 >> 16) * (q15_t) (inB1)); |
emilmont | 1:fdd22bb7aa52 | 105 | mul3 = (q31_t) ((q15_t) (inA2) * (q15_t) (inB1 >> 16)); |
emilmont | 1:fdd22bb7aa52 | 106 | mul4 = (q31_t) ((q15_t) (inA2 >> 16) * (q15_t) (inB1 >> 16)); |
emilmont | 1:fdd22bb7aa52 | 107 | |
emilmont | 1:fdd22bb7aa52 | 108 | #else |
emilmont | 1:fdd22bb7aa52 | 109 | |
emilmont | 1:fdd22bb7aa52 | 110 | mul2 = (q31_t) ((q15_t) (inA1 >> 16) * (q15_t) (inB1 >> 16)); |
emilmont | 1:fdd22bb7aa52 | 111 | mul1 = (q31_t) ((q15_t) inA1 * (q15_t) (inB1 >> 16)); |
emilmont | 1:fdd22bb7aa52 | 112 | mul4 = (q31_t) ((q15_t) (inA2 >> 16) * (q15_t) inB1); |
emilmont | 1:fdd22bb7aa52 | 113 | mul3 = (q31_t) ((q15_t) inA2 * (q15_t) inB1); |
emilmont | 1:fdd22bb7aa52 | 114 | |
emilmont | 1:fdd22bb7aa52 | 115 | #endif // #ifndef ARM_MATH_BIG_ENDIAN |
emilmont | 1:fdd22bb7aa52 | 116 | |
emilmont | 1:fdd22bb7aa52 | 117 | /* saturate the result */ |
emilmont | 1:fdd22bb7aa52 | 118 | out1 = (q15_t) __SSAT(mul1 >> 15u, 16); |
emilmont | 1:fdd22bb7aa52 | 119 | out2 = (q15_t) __SSAT(mul2 >> 15u, 16); |
emilmont | 1:fdd22bb7aa52 | 120 | out3 = (q15_t) __SSAT(mul3 >> 15u, 16); |
emilmont | 1:fdd22bb7aa52 | 121 | out4 = (q15_t) __SSAT(mul4 >> 15u, 16); |
emilmont | 1:fdd22bb7aa52 | 122 | |
emilmont | 1:fdd22bb7aa52 | 123 | /* pack real and imaginary outputs and store them to destination */ |
emilmont | 1:fdd22bb7aa52 | 124 | *__SIMD32(pCmplxDst)++ = __PKHBT(out1, out2, 16); |
emilmont | 1:fdd22bb7aa52 | 125 | *__SIMD32(pCmplxDst)++ = __PKHBT(out3, out4, 16); |
emilmont | 1:fdd22bb7aa52 | 126 | |
emilmont | 1:fdd22bb7aa52 | 127 | inA1 = *__SIMD32(pSrcCmplx)++; |
emilmont | 1:fdd22bb7aa52 | 128 | inB1 = *__SIMD32(pSrcReal)++; |
emilmont | 1:fdd22bb7aa52 | 129 | inA2 = *__SIMD32(pSrcCmplx)++; |
emilmont | 1:fdd22bb7aa52 | 130 | |
emilmont | 1:fdd22bb7aa52 | 131 | #ifndef ARM_MATH_BIG_ENDIAN |
emilmont | 1:fdd22bb7aa52 | 132 | |
emilmont | 1:fdd22bb7aa52 | 133 | mul1 = (q31_t) ((q15_t) (inA1) * (q15_t) (inB1)); |
emilmont | 1:fdd22bb7aa52 | 134 | mul2 = (q31_t) ((q15_t) (inA1 >> 16) * (q15_t) (inB1)); |
emilmont | 1:fdd22bb7aa52 | 135 | mul3 = (q31_t) ((q15_t) (inA2) * (q15_t) (inB1 >> 16)); |
emilmont | 1:fdd22bb7aa52 | 136 | mul4 = (q31_t) ((q15_t) (inA2 >> 16) * (q15_t) (inB1 >> 16)); |
emilmont | 1:fdd22bb7aa52 | 137 | |
emilmont | 1:fdd22bb7aa52 | 138 | #else |
emilmont | 1:fdd22bb7aa52 | 139 | |
emilmont | 1:fdd22bb7aa52 | 140 | mul2 = (q31_t) ((q15_t) (inA1 >> 16) * (q15_t) (inB1 >> 16)); |
emilmont | 1:fdd22bb7aa52 | 141 | mul1 = (q31_t) ((q15_t) inA1 * (q15_t) (inB1 >> 16)); |
emilmont | 1:fdd22bb7aa52 | 142 | mul4 = (q31_t) ((q15_t) (inA2 >> 16) * (q15_t) inB1); |
emilmont | 1:fdd22bb7aa52 | 143 | mul3 = (q31_t) ((q15_t) inA2 * (q15_t) inB1); |
emilmont | 1:fdd22bb7aa52 | 144 | |
emilmont | 1:fdd22bb7aa52 | 145 | #endif // #ifndef ARM_MATH_BIG_ENDIAN |
emilmont | 1:fdd22bb7aa52 | 146 | |
emilmont | 1:fdd22bb7aa52 | 147 | out1 = (q15_t) __SSAT(mul1 >> 15u, 16); |
emilmont | 1:fdd22bb7aa52 | 148 | out2 = (q15_t) __SSAT(mul2 >> 15u, 16); |
emilmont | 1:fdd22bb7aa52 | 149 | out3 = (q15_t) __SSAT(mul3 >> 15u, 16); |
emilmont | 1:fdd22bb7aa52 | 150 | out4 = (q15_t) __SSAT(mul4 >> 15u, 16); |
emilmont | 1:fdd22bb7aa52 | 151 | |
emilmont | 1:fdd22bb7aa52 | 152 | *__SIMD32(pCmplxDst)++ = __PKHBT(out1, out2, 16); |
emilmont | 1:fdd22bb7aa52 | 153 | *__SIMD32(pCmplxDst)++ = __PKHBT(out3, out4, 16); |
emilmont | 1:fdd22bb7aa52 | 154 | |
emilmont | 1:fdd22bb7aa52 | 155 | /* Decrement the numSamples loop counter */ |
emilmont | 1:fdd22bb7aa52 | 156 | blkCnt--; |
emilmont | 1:fdd22bb7aa52 | 157 | } |
emilmont | 1:fdd22bb7aa52 | 158 | |
emilmont | 1:fdd22bb7aa52 | 159 | /* If the numSamples is not a multiple of 4, compute any remaining output samples here. |
emilmont | 1:fdd22bb7aa52 | 160 | ** No loop unrolling is used. */ |
emilmont | 1:fdd22bb7aa52 | 161 | blkCnt = numSamples % 0x4u; |
emilmont | 1:fdd22bb7aa52 | 162 | |
emilmont | 1:fdd22bb7aa52 | 163 | while(blkCnt > 0u) |
emilmont | 1:fdd22bb7aa52 | 164 | { |
emilmont | 1:fdd22bb7aa52 | 165 | /* C[2 * i] = A[2 * i] * B[i]. */ |
emilmont | 1:fdd22bb7aa52 | 166 | /* C[2 * i + 1] = A[2 * i + 1] * B[i]. */ |
emilmont | 1:fdd22bb7aa52 | 167 | in = *pSrcReal++; |
emilmont | 1:fdd22bb7aa52 | 168 | /* store the result in the destination buffer. */ |
emilmont | 1:fdd22bb7aa52 | 169 | *pCmplxDst++ = |
emilmont | 1:fdd22bb7aa52 | 170 | (q15_t) __SSAT((((q31_t) (*pSrcCmplx++) * (in)) >> 15), 16); |
emilmont | 1:fdd22bb7aa52 | 171 | *pCmplxDst++ = |
emilmont | 1:fdd22bb7aa52 | 172 | (q15_t) __SSAT((((q31_t) (*pSrcCmplx++) * (in)) >> 15), 16); |
emilmont | 1:fdd22bb7aa52 | 173 | |
emilmont | 1:fdd22bb7aa52 | 174 | /* Decrement the numSamples loop counter */ |
emilmont | 1:fdd22bb7aa52 | 175 | blkCnt--; |
emilmont | 1:fdd22bb7aa52 | 176 | } |
emilmont | 1:fdd22bb7aa52 | 177 | |
emilmont | 1:fdd22bb7aa52 | 178 | #else |
emilmont | 1:fdd22bb7aa52 | 179 | |
emilmont | 1:fdd22bb7aa52 | 180 | /* Run the below code for Cortex-M0 */ |
emilmont | 1:fdd22bb7aa52 | 181 | |
emilmont | 1:fdd22bb7aa52 | 182 | while(numSamples > 0u) |
emilmont | 1:fdd22bb7aa52 | 183 | { |
emilmont | 1:fdd22bb7aa52 | 184 | /* realOut = realA * realB. */ |
emilmont | 1:fdd22bb7aa52 | 185 | /* imagOut = imagA * realB. */ |
emilmont | 1:fdd22bb7aa52 | 186 | in = *pSrcReal++; |
emilmont | 1:fdd22bb7aa52 | 187 | /* store the result in the destination buffer. */ |
emilmont | 1:fdd22bb7aa52 | 188 | *pCmplxDst++ = |
emilmont | 1:fdd22bb7aa52 | 189 | (q15_t) __SSAT((((q31_t) (*pSrcCmplx++) * (in)) >> 15), 16); |
emilmont | 1:fdd22bb7aa52 | 190 | *pCmplxDst++ = |
emilmont | 1:fdd22bb7aa52 | 191 | (q15_t) __SSAT((((q31_t) (*pSrcCmplx++) * (in)) >> 15), 16); |
emilmont | 1:fdd22bb7aa52 | 192 | |
emilmont | 1:fdd22bb7aa52 | 193 | /* Decrement the numSamples loop counter */ |
emilmont | 1:fdd22bb7aa52 | 194 | numSamples--; |
emilmont | 1:fdd22bb7aa52 | 195 | } |
emilmont | 1:fdd22bb7aa52 | 196 | |
mbed_official | 3:7a284390b0ce | 197 | #endif /* #ifndef ARM_MATH_CM0_FAMILY */ |
emilmont | 1:fdd22bb7aa52 | 198 | |
emilmont | 1:fdd22bb7aa52 | 199 | } |
emilmont | 1:fdd22bb7aa52 | 200 | |
emilmont | 1:fdd22bb7aa52 | 201 | /** |
emilmont | 1:fdd22bb7aa52 | 202 | * @} end of CmplxByRealMult group |
emilmont | 1:fdd22bb7aa52 | 203 | */ |