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PololuLedStrip.cpp@16:eaed541b08b0, 2013-03-01 (annotated)
- Committer:
- DavidEGrayson
- Date:
- Fri Mar 01 05:09:55 2013 +0000
- Revision:
- 16:eaed541b08b0
- Parent:
- 15:d69eebdee025
- Child:
- 17:91fb934a2166
Fine tuned the fudge factors for the M3 at 96 MHz again. I'm not sure why they were not well tuned.
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
DavidEGrayson | 1:102307d9b701 | 1 | #include "PololuLedStrip.h" |
DavidEGrayson | 1:102307d9b701 | 2 | |
DavidEGrayson | 1:102307d9b701 | 3 | bool PololuLedStrip::interruptFriendly = false; |
DavidEGrayson | 1:102307d9b701 | 4 | |
DavidEGrayson | 15:d69eebdee025 | 5 | // The three timed delays, in units of half-cycles. |
DavidEGrayson | 7:9a088f042ee0 | 6 | uint8_t led_strip_write_delays[3]; |
DavidEGrayson | 4:d3b60bd43811 | 7 | |
DavidEGrayson | 7:9a088f042ee0 | 8 | void PololuLedStrip::calculateDelays() |
DavidEGrayson | 7:9a088f042ee0 | 9 | { |
DavidEGrayson | 15:d69eebdee025 | 10 | int f_mhz = SystemCoreClock / 1000000; // Clock frequency in MHz. |
DavidEGrayson | 14:672baf3cf941 | 11 | |
DavidEGrayson | 14:672baf3cf941 | 12 | if (f_mhz <= 48) |
DavidEGrayson | 14:672baf3cf941 | 13 | { |
DavidEGrayson | 14:672baf3cf941 | 14 | // The delays below result in 800/1590 ns pulses and a 2500 ns period on the mbed NXP LPC11U24. |
DavidEGrayson | 14:672baf3cf941 | 15 | led_strip_write_delays[0] = 0; |
DavidEGrayson | 14:672baf3cf941 | 16 | led_strip_write_delays[1] = 0; |
DavidEGrayson | 15:d69eebdee025 | 17 | led_strip_write_delays[2] = 5; |
DavidEGrayson | 14:672baf3cf941 | 18 | } |
DavidEGrayson | 14:672baf3cf941 | 19 | else |
DavidEGrayson | 14:672baf3cf941 | 20 | { |
DavidEGrayson | 15:d69eebdee025 | 21 | // Try to generally compute what the delays should be for a ide range of clock frequencies. |
DavidEGrayson | 14:672baf3cf941 | 22 | |
DavidEGrayson | 14:672baf3cf941 | 23 | // The fudge factors below were experimentally chosen so that we would have |
DavidEGrayson | 15:d69eebdee025 | 24 | // 700/1300 ns pulses and a ~2500 ns period on the mbed NXP LPC1768 (96 MHz Cortex-M3). |
DavidEGrayson | 14:672baf3cf941 | 25 | // If you ever change these numbers, it is important to check the the subtractions below |
DavidEGrayson | 15:d69eebdee025 | 26 | // will not overflow in the worst case, which is f_mhz = 49. |
DavidEGrayson | 15:d69eebdee025 | 27 | led_strip_write_delays[0] = 700*f_mhz/1000 - 23; |
DavidEGrayson | 16:eaed541b08b0 | 28 | led_strip_write_delays[1] = 600*f_mhz/1000 - 18; |
DavidEGrayson | 16:eaed541b08b0 | 29 | led_strip_write_delays[2] = 1200*f_mhz/1000 - 33; |
DavidEGrayson | 15:d69eebdee025 | 30 | } |
DavidEGrayson | 15:d69eebdee025 | 31 | |
DavidEGrayson | 15:d69eebdee025 | 32 | // Convert from units of cycles to units of half-cycles; it makes the assembly faster. |
DavidEGrayson | 15:d69eebdee025 | 33 | for(int i = 0; i < 3; i++) |
DavidEGrayson | 15:d69eebdee025 | 34 | { |
DavidEGrayson | 15:d69eebdee025 | 35 | led_strip_write_delays[i] <<= 1; |
DavidEGrayson | 12:b6df8ac053c8 | 36 | } |
DavidEGrayson | 7:9a088f042ee0 | 37 | } |
DavidEGrayson | 6:9d0530b7dae2 | 38 | |
DavidEGrayson | 1:102307d9b701 | 39 | PololuLedStrip::PololuLedStrip(PinName pinName) |
DavidEGrayson | 1:102307d9b701 | 40 | { |
DavidEGrayson | 1:102307d9b701 | 41 | gpio_init(&gpio, pinName, PIN_OUTPUT); |
DavidEGrayson | 1:102307d9b701 | 42 | } |
DavidEGrayson | 1:102307d9b701 | 43 | |
DavidEGrayson | 1:102307d9b701 | 44 | void PololuLedStrip::write(rgb_color * colors, unsigned int count) |
DavidEGrayson | 1:102307d9b701 | 45 | { |
DavidEGrayson | 8:1578776ceac5 | 46 | calculateDelays(); |
DavidEGrayson | 8:1578776ceac5 | 47 | |
DavidEGrayson | 1:102307d9b701 | 48 | __disable_irq(); // Disable interrupts temporarily because we don't want our pulse timing to be messed up. |
DavidEGrayson | 7:9a088f042ee0 | 49 | |
DavidEGrayson | 1:102307d9b701 | 50 | while(count--) |
DavidEGrayson | 1:102307d9b701 | 51 | { |
DavidEGrayson | 9:6ffb85d69eaf | 52 | led_strip_write_color(colors, gpio.reg_set, gpio.reg_clr, gpio.mask); |
DavidEGrayson | 9:6ffb85d69eaf | 53 | colors++; |
DavidEGrayson | 9:6ffb85d69eaf | 54 | |
DavidEGrayson | 1:102307d9b701 | 55 | if (interruptFriendly) |
DavidEGrayson | 1:102307d9b701 | 56 | { |
DavidEGrayson | 1:102307d9b701 | 57 | __enable_irq(); |
DavidEGrayson | 1:102307d9b701 | 58 | __nop(); |
DavidEGrayson | 1:102307d9b701 | 59 | __nop(); |
DavidEGrayson | 1:102307d9b701 | 60 | __nop(); |
DavidEGrayson | 1:102307d9b701 | 61 | __disable_irq(); |
DavidEGrayson | 1:102307d9b701 | 62 | } |
DavidEGrayson | 1:102307d9b701 | 63 | } |
DavidEGrayson | 1:102307d9b701 | 64 | |
DavidEGrayson | 1:102307d9b701 | 65 | __enable_irq(); // Re-enable interrupts now that we are done. |
DavidEGrayson | 1:102307d9b701 | 66 | wait_us(24); // Hold the line low for 24 microseconds to send the reset signal. |
DavidEGrayson | 9:6ffb85d69eaf | 67 | |
DavidEGrayson | 9:6ffb85d69eaf | 68 | //*(gpio.reg_set) = gpio.mask; |
DavidEGrayson | 9:6ffb85d69eaf | 69 | //*(gpio.reg_clr) = gpio.mask; |
DavidEGrayson | 9:6ffb85d69eaf | 70 | |
DavidEGrayson | 1:102307d9b701 | 71 | } |