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Fork of PololuLedStripx by
Diff: PololuLedStrip.cpp
- Revision:
- 19:46d7ab0ba3e7
- Parent:
- 17:91fb934a2166
- Child:
- 22:77e743378104
--- a/PololuLedStrip.cpp Fri Mar 01 05:17:02 2013 +0000 +++ b/PololuLedStrip.cpp Wed Oct 09 01:13:49 2013 +0000 @@ -2,8 +2,8 @@ bool PololuLedStrip::interruptFriendly = false; -// The three timed delays, in units of half-cycles. -uint8_t led_strip_write_delays[3]; +// The two timed delays, in units of half-cycles. +uint8_t led_strip_write_delays[2]; void PololuLedStrip::calculateDelays() { @@ -11,28 +11,26 @@ if (f_mhz <= 48) { - // The delays below result in 800/1590 ns pulses and a 2500 ns period on the mbed NXP LPC11U24. + // The delays below result in 360/1120 ns pulses and a 1880 ns period on the mbed NXP LPC11U24. led_strip_write_delays[0] = 0; led_strip_write_delays[1] = 0; - led_strip_write_delays[2] = 5; } else { // Try to generally compute what the delays should be for a ide range of clock frequencies. // The fudge factors below were experimentally chosen so that we would have - // ~700/1300 ns pulses and a ~2500 ns period on the mbed NXP LPC1768 (96 MHz Cortex-M3). + // ~100/840 ns pulses and a ~1430 ns period on the mbed NXP LPC1768 (96 MHz Cortex-M3). // There seem to be some ~100 ns inconsistencies in the timing depending on which example program is // running; the most likely explanation is some kind of flash caching that affects the timing. // If you ever change these numbers, it is important to check the the subtractions below - // will not overflow in the worst case, which is f_mhz = 49. - led_strip_write_delays[0] = 700*f_mhz/1000 - 23; - led_strip_write_delays[1] = 600*f_mhz/1000 - 18; - led_strip_write_delays[2] = 1200*f_mhz/1000 - 33; + // will not overflow in the worst case (smallest possible f_mhz). + led_strip_write_delays[0] = 750*f_mhz/1000 - 33; + led_strip_write_delays[1] = 550*f_mhz/1000 - 20; } // Convert from units of cycles to units of half-cycles; it makes the assembly faster. - for(int i = 0; i < 3; i++) + for(int i = 0; i < 2; i++) { led_strip_write_delays[i] <<= 1; }