Michael Koster / PololuLedStripNucleo

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Fork of PololuLedStrip by David Grayson

PololuLedStrip.cpp@22:7a2bda46a606, 2014-12-24 (annotated)

Committer:
michaeljkoster
Date:
Wed Dec 24 18:15:59 2014 +0000
Revision:
22:7a2bda46a606
Parent:
19:46d7ab0ba3e7
Child:
23:aa89fb2a5769
ST Nucleo F411RE changes and tweaks

Who changed what in which revision?

UserRevisionLine numberNew contents of line
DavidEGrayson 1:102307d9b701 1 #include "PololuLedStrip.h"
michaeljkoster 22:7a2bda46a606 2 extern Serial pc;
DavidEGrayson 1:102307d9b701 3
DavidEGrayson 1:102307d9b701 4 bool PololuLedStrip::interruptFriendly = false;
DavidEGrayson 1:102307d9b701 5
DavidEGrayson 19:46d7ab0ba3e7 6 // The two timed delays, in units of half-cycles.
DavidEGrayson 19:46d7ab0ba3e7 7 uint8_t led_strip_write_delays[2];
DavidEGrayson 4:d3b60bd43811 8
DavidEGrayson 7:9a088f042ee0 9 void PololuLedStrip::calculateDelays()
DavidEGrayson 7:9a088f042ee0 10 {
DavidEGrayson 15:d69eebdee025 11 int f_mhz = SystemCoreClock / 1000000; // Clock frequency in MHz.
DavidEGrayson 14:672baf3cf941 12
DavidEGrayson 14:672baf3cf941 13 if (f_mhz <= 48)
DavidEGrayson 14:672baf3cf941 14 {
DavidEGrayson 19:46d7ab0ba3e7 15 // The delays below result in 360/1120 ns pulses and a 1880 ns period on the mbed NXP LPC11U24.
DavidEGrayson 14:672baf3cf941 16 led_strip_write_delays[0] = 0;
DavidEGrayson 14:672baf3cf941 17 led_strip_write_delays[1] = 0;
DavidEGrayson 14:672baf3cf941 18 }
DavidEGrayson 14:672baf3cf941 19 else
DavidEGrayson 14:672baf3cf941 20 {
DavidEGrayson 15:d69eebdee025 21 // Try to generally compute what the delays should be for a ide range of clock frequencies.
DavidEGrayson 14:672baf3cf941 22
DavidEGrayson 14:672baf3cf941 23 // The fudge factors below were experimentally chosen so that we would have
DavidEGrayson 19:46d7ab0ba3e7 24 // ~100/840 ns pulses and a ~1430 ns period on the mbed NXP LPC1768 (96 MHz Cortex-M3).
DavidEGrayson 17:91fb934a2166 25 // There seem to be some ~100 ns inconsistencies in the timing depending on which example program is
DavidEGrayson 17:91fb934a2166 26 // running; the most likely explanation is some kind of flash caching that affects the timing.
DavidEGrayson 14:672baf3cf941 27 // If you ever change these numbers, it is important to check the the subtractions below
DavidEGrayson 19:46d7ab0ba3e7 28 // will not overflow in the worst case (smallest possible f_mhz).
michaeljkoster 22:7a2bda46a606 29 //led_strip_write_delays[0] = 750*f_mhz/1000 - 33;
michaeljkoster 22:7a2bda46a606 30 //led_strip_write_delays[1] = 550*f_mhz/1000 - 20;
michaeljkoster 22:7a2bda46a606 31 led_strip_write_delays[0] = 28; // for Nucleo F411RE
michaeljkoster 22:7a2bda46a606 32 led_strip_write_delays[1] = 20;
DavidEGrayson 15:d69eebdee025 33 }
DavidEGrayson 15:d69eebdee025 34
DavidEGrayson 15:d69eebdee025 35 // Convert from units of cycles to units of half-cycles; it makes the assembly faster.
DavidEGrayson 19:46d7ab0ba3e7 36 for(int i = 0; i < 2; i++)
DavidEGrayson 15:d69eebdee025 37 {
DavidEGrayson 15:d69eebdee025 38 led_strip_write_delays[i] <<= 1;
DavidEGrayson 12:b6df8ac053c8 39 }
DavidEGrayson 7:9a088f042ee0 40 }
DavidEGrayson 6:9d0530b7dae2 41
DavidEGrayson 1:102307d9b701 42 PololuLedStrip::PololuLedStrip(PinName pinName)
DavidEGrayson 1:102307d9b701 43 {
michaeljkoster 22:7a2bda46a606 44 // gpio_init(&gpio, pinName, PIN_OUTPUT);
michaeljkoster 22:7a2bda46a606 45 gpio_init_out(&gpio, pinName); // for Nucleo F411RE
DavidEGrayson 1:102307d9b701 46 }
DavidEGrayson 1:102307d9b701 47
DavidEGrayson 1:102307d9b701 48 void PololuLedStrip::write(rgb_color * colors, unsigned int count)
DavidEGrayson 1:102307d9b701 49 {
DavidEGrayson 8:1578776ceac5 50 calculateDelays();
DavidEGrayson 8:1578776ceac5 51
DavidEGrayson 1:102307d9b701 52 __disable_irq(); // Disable interrupts temporarily because we don't want our pulse timing to be messed up.
DavidEGrayson 7:9a088f042ee0 53
DavidEGrayson 1:102307d9b701 54 while(count--)
DavidEGrayson 1:102307d9b701 55 {
DavidEGrayson 9:6ffb85d69eaf 56 led_strip_write_color(colors, gpio.reg_set, gpio.reg_clr, gpio.mask);
DavidEGrayson 9:6ffb85d69eaf 57 colors++;
DavidEGrayson 9:6ffb85d69eaf 58
DavidEGrayson 1:102307d9b701 59 if (interruptFriendly)
DavidEGrayson 1:102307d9b701 60 {
DavidEGrayson 1:102307d9b701 61 __enable_irq();
DavidEGrayson 1:102307d9b701 62 __nop();
DavidEGrayson 1:102307d9b701 63 __nop();
DavidEGrayson 1:102307d9b701 64 __nop();
DavidEGrayson 1:102307d9b701 65 __disable_irq();
DavidEGrayson 1:102307d9b701 66 }
DavidEGrayson 1:102307d9b701 67 }
DavidEGrayson 1:102307d9b701 68
DavidEGrayson 1:102307d9b701 69 __enable_irq(); // Re-enable interrupts now that we are done.
DavidEGrayson 1:102307d9b701 70 wait_us(24); // Hold the line low for 24 microseconds to send the reset signal.
DavidEGrayson 9:6ffb85d69eaf 71
DavidEGrayson 9:6ffb85d69eaf 72 //*(gpio.reg_set) = gpio.mask;
DavidEGrayson 9:6ffb85d69eaf 73 //*(gpio.reg_clr) = gpio.mask;
DavidEGrayson 9:6ffb85d69eaf 74
DavidEGrayson 1:102307d9b701 75 }