Diff: Timer_LPTMR.cpp

Revision:

1:7dde0e4d30da

Child:

2:5056ec8c52e8

--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/Timer_LPTMR.cpp	Sun Mar 09 01:09:56 2014 +0000
@@ -0,0 +1,60 @@
+/* Timer_LPTMR.cpp
+ * Tested with mbed board: FRDM-KL46Z
+ * Author: Mark Gottscho
+ * mgottscho@ucla.edu
+ */
+
+#include "mbed.h"
+#include "HardwareTimer.h"
+#include "Timer_LPTMR.h"
+#include "PreciseTime.h"
+
+//Init class static variable
+bool Timer_LPTMR::__initialized_lptmr = false;
+uint16_t Timer_LPTMR::__rolloverValue = 0xFFFF;
+uint32_t Timer_LPTMR::__count = 0;
+
+Timer_LPTMR::Timer_LPTMR() :
+            HardwareTimer(1) //1ms per tick
+            {
+}
+
+Timer_LPTMR::~Timer_LPTMR() {}
+
+void Timer_LPTMR::disableTimer() {
+    if (!__valid)
+        return;
+        
+    LPTMR0->CSR = 0; //Reset the LPTMR timer control/status register
+    __enabled = false;
+}
+
+uint32_t Timer_LPTMR::getTick() {
+    if (!__valid)
+        return 0;
+        
+    //Get the raw time
+    __disable_irq();
+    LPTMR0->CNR = 0; //need to write to the register in order to read it due to buffering
+    uint16_t ticks = LPTMR0->CNR;
+    uint32_t count = __count;
+    __enable_irq();
+    
+    //Convert to ticks
+    return (uint32_t) ((count * __rolloverValue) + ticks);
+}
+
+
+void Timer_LPTMR::__isr_lptmr() {
+    LPTMR0->CSR |= LPTMR_CSR_TCF_MASK;  //Write 1 to TCF to clear the LPT timer compare flag
+    __set_lptmr(__rolloverValue); //Set timer again
+    __count++;
+}
+
+void Timer_LPTMR::__set_lptmr(uint16_t count) {
+    LPTMR0->CSR = 0; //Reset the timer control/status register
+    LPTMR0->CMR = count; //Set the compare register
+    LPTMR0->CSR |= LPTMR_CSR_TIE_MASK; //Enable interrupt
+   // LPTMR0->CSR |= LPTMR_CSR_TFC_MASK; //Set free-running mode
+    LPTMR0->CSR |= LPTMR_CSR_TEN_MASK; //Start the timer
+}
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