Mark Gottscho / HardwareTimersLib

Fork of HardwareTimersLib by Mark Gottscho

Committer:
mgottscho
Date:
Sun Mar 09 03:02:55 2014 +0000
Revision:
2:5056ec8c52e8
Parent:
1:7dde0e4d30da
Child:
7:78f6ee57d324
Refactored code and added new PIT timer support.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mgottscho 1:7dde0e4d30da 1 /* Timer_LPTMR.cpp
mgottscho 1:7dde0e4d30da 2 * Tested with mbed board: FRDM-KL46Z
mgottscho 1:7dde0e4d30da 3 * Author: Mark Gottscho
mgottscho 1:7dde0e4d30da 4 * mgottscho@ucla.edu
mgottscho 1:7dde0e4d30da 5 */
mgottscho 1:7dde0e4d30da 6
mgottscho 1:7dde0e4d30da 7 #include "mbed.h"
mgottscho 1:7dde0e4d30da 8 #include "HardwareTimer.h"
mgottscho 1:7dde0e4d30da 9 #include "Timer_LPTMR.h"
mgottscho 1:7dde0e4d30da 10 #include "PreciseTime.h"
mgottscho 1:7dde0e4d30da 11
mgottscho 1:7dde0e4d30da 12 //Init class static variable
mgottscho 1:7dde0e4d30da 13 bool Timer_LPTMR::__initialized_lptmr = false;
mgottscho 1:7dde0e4d30da 14 uint16_t Timer_LPTMR::__rolloverValue = 0xFFFF;
mgottscho 1:7dde0e4d30da 15 uint32_t Timer_LPTMR::__count = 0;
mgottscho 1:7dde0e4d30da 16
mgottscho 2:5056ec8c52e8 17 Timer_LPTMR::Timer_LPTMR(float tickValue) :
mgottscho 2:5056ec8c52e8 18 HardwareTimer(tickValue)
mgottscho 1:7dde0e4d30da 19 {
mgottscho 1:7dde0e4d30da 20 }
mgottscho 1:7dde0e4d30da 21
mgottscho 1:7dde0e4d30da 22 Timer_LPTMR::~Timer_LPTMR() {}
mgottscho 1:7dde0e4d30da 23
mgottscho 1:7dde0e4d30da 24 void Timer_LPTMR::disableTimer() {
mgottscho 1:7dde0e4d30da 25 if (!__valid)
mgottscho 1:7dde0e4d30da 26 return;
mgottscho 1:7dde0e4d30da 27
mgottscho 1:7dde0e4d30da 28 LPTMR0->CSR = 0; //Reset the LPTMR timer control/status register
mgottscho 1:7dde0e4d30da 29 __enabled = false;
mgottscho 1:7dde0e4d30da 30 }
mgottscho 1:7dde0e4d30da 31
mgottscho 1:7dde0e4d30da 32 uint32_t Timer_LPTMR::getTick() {
mgottscho 1:7dde0e4d30da 33 if (!__valid)
mgottscho 1:7dde0e4d30da 34 return 0;
mgottscho 1:7dde0e4d30da 35
mgottscho 1:7dde0e4d30da 36 //Get the raw time
mgottscho 1:7dde0e4d30da 37 __disable_irq();
mgottscho 1:7dde0e4d30da 38 LPTMR0->CNR = 0; //need to write to the register in order to read it due to buffering
mgottscho 1:7dde0e4d30da 39 uint16_t ticks = LPTMR0->CNR;
mgottscho 1:7dde0e4d30da 40 uint32_t count = __count;
mgottscho 1:7dde0e4d30da 41 __enable_irq();
mgottscho 1:7dde0e4d30da 42
mgottscho 1:7dde0e4d30da 43 //Convert to ticks
mgottscho 1:7dde0e4d30da 44 return (uint32_t) ((count * __rolloverValue) + ticks);
mgottscho 1:7dde0e4d30da 45 }
mgottscho 1:7dde0e4d30da 46
mgottscho 1:7dde0e4d30da 47
mgottscho 1:7dde0e4d30da 48 void Timer_LPTMR::__isr_lptmr() {
mgottscho 1:7dde0e4d30da 49 LPTMR0->CSR |= LPTMR_CSR_TCF_MASK; //Write 1 to TCF to clear the LPT timer compare flag
mgottscho 1:7dde0e4d30da 50 __set_lptmr(__rolloverValue); //Set timer again
mgottscho 1:7dde0e4d30da 51 __count++;
mgottscho 1:7dde0e4d30da 52 }
mgottscho 1:7dde0e4d30da 53
mgottscho 1:7dde0e4d30da 54 void Timer_LPTMR::__set_lptmr(uint16_t count) {
mgottscho 1:7dde0e4d30da 55 LPTMR0->CSR = 0; //Reset the timer control/status register
mgottscho 1:7dde0e4d30da 56 LPTMR0->CMR = count; //Set the compare register
mgottscho 1:7dde0e4d30da 57 LPTMR0->CSR |= LPTMR_CSR_TIE_MASK; //Enable interrupt
mgottscho 1:7dde0e4d30da 58 // LPTMR0->CSR |= LPTMR_CSR_TFC_MASK; //Set free-running mode
mgottscho 1:7dde0e4d30da 59 LPTMR0->CSR |= LPTMR_CSR_TEN_MASK; //Start the timer
mgottscho 1:7dde0e4d30da 60 }