megan gimple / SDFileSystem

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Dependents:   gimple_A4_3_Temp_Light

SDFileSystem.cpp@0:07ff9ae5339f, 2021-11-13 (annotated)

Committer:
mgimple
Date:
Sat Nov 13 20:10:05 2021 +0000
Revision:
0:07ff9ae5339f
SD

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mgimple 0:07ff9ae5339f 1 /* mbed Microcontroller Library
mgimple 0:07ff9ae5339f 2 * Copyright (c) 2006-2012 ARM Limited
mgimple 0:07ff9ae5339f 3 *
mgimple 0:07ff9ae5339f 4 * Permission is hereby granted, free of charge, to any person obtaining a copy
mgimple 0:07ff9ae5339f 5 * of this software and associated documentation files (the "Software"), to deal
mgimple 0:07ff9ae5339f 6 * in the Software without restriction, including without limitation the rights
mgimple 0:07ff9ae5339f 7 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
mgimple 0:07ff9ae5339f 8 * copies of the Software, and to permit persons to whom the Software is
mgimple 0:07ff9ae5339f 9 * furnished to do so, subject to the following conditions:
mgimple 0:07ff9ae5339f 10 *
mgimple 0:07ff9ae5339f 11 * The above copyright notice and this permission notice shall be included in
mgimple 0:07ff9ae5339f 12 * all copies or substantial portions of the Software.
mgimple 0:07ff9ae5339f 13 *
mgimple 0:07ff9ae5339f 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
mgimple 0:07ff9ae5339f 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
mgimple 0:07ff9ae5339f 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
mgimple 0:07ff9ae5339f 17 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
mgimple 0:07ff9ae5339f 18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
mgimple 0:07ff9ae5339f 19 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
mgimple 0:07ff9ae5339f 20 * SOFTWARE.
mgimple 0:07ff9ae5339f 21 */
mgimple 0:07ff9ae5339f 22 /* Introduction
mgimple 0:07ff9ae5339f 23 * ------------
mgimple 0:07ff9ae5339f 24 * SD and MMC cards support a number of interfaces, but common to them all
mgimple 0:07ff9ae5339f 25 * is one based on SPI. This is the one I'm implmenting because it means
mgimple 0:07ff9ae5339f 26 * it is much more portable even though not so performant, and we already
mgimple 0:07ff9ae5339f 27 * have the mbed SPI Interface!
mgimple 0:07ff9ae5339f 28 *
mgimple 0:07ff9ae5339f 29 * The main reference I'm using is Chapter 7, "SPI Mode" of:
mgimple 0:07ff9ae5339f 30 * http://www.sdcard.org/developers/tech/sdcard/pls/Simplified_Physical_Layer_Spec.pdf
mgimple 0:07ff9ae5339f 31 *
mgimple 0:07ff9ae5339f 32 * SPI Startup
mgimple 0:07ff9ae5339f 33 * -----------
mgimple 0:07ff9ae5339f 34 * The SD card powers up in SD mode. The SPI interface mode is selected by
mgimple 0:07ff9ae5339f 35 * asserting CS low and sending the reset command (CMD0). The card will
mgimple 0:07ff9ae5339f 36 * respond with a (R1) response.
mgimple 0:07ff9ae5339f 37 *
mgimple 0:07ff9ae5339f 38 * CMD8 is optionally sent to determine the voltage range supported, and
mgimple 0:07ff9ae5339f 39 * indirectly determine whether it is a version 1.x SD/non-SD card or
mgimple 0:07ff9ae5339f 40 * version 2.x. I'll just ignore this for now.
mgimple 0:07ff9ae5339f 41 *
mgimple 0:07ff9ae5339f 42 * ACMD41 is repeatedly issued to initialise the card, until "in idle"
mgimple 0:07ff9ae5339f 43 * (bit 0) of the R1 response goes to '0', indicating it is initialised.
mgimple 0:07ff9ae5339f 44 *
mgimple 0:07ff9ae5339f 45 * You should also indicate whether the host supports High Capicity cards,
mgimple 0:07ff9ae5339f 46 * and check whether the card is high capacity - i'll also ignore this
mgimple 0:07ff9ae5339f 47 *
mgimple 0:07ff9ae5339f 48 * SPI Protocol
mgimple 0:07ff9ae5339f 49 * ------------
mgimple 0:07ff9ae5339f 50 * The SD SPI protocol is based on transactions made up of 8-bit words, with
mgimple 0:07ff9ae5339f 51 * the host starting every bus transaction by asserting the CS signal low. The
mgimple 0:07ff9ae5339f 52 * card always responds to commands, data blocks and errors.
mgimple 0:07ff9ae5339f 53 *
mgimple 0:07ff9ae5339f 54 * The protocol supports a CRC, but by default it is off (except for the
mgimple 0:07ff9ae5339f 55 * first reset CMD0, where the CRC can just be pre-calculated, and CMD8)
mgimple 0:07ff9ae5339f 56 * I'll leave the CRC off I think!
mgimple 0:07ff9ae5339f 57 *
mgimple 0:07ff9ae5339f 58 * Standard capacity cards have variable data block sizes, whereas High
mgimple 0:07ff9ae5339f 59 * Capacity cards fix the size of data block to 512 bytes. I'll therefore
mgimple 0:07ff9ae5339f 60 * just always use the Standard Capacity cards with a block size of 512 bytes.
mgimple 0:07ff9ae5339f 61 * This is set with CMD16.
mgimple 0:07ff9ae5339f 62 *
mgimple 0:07ff9ae5339f 63 * You can read and write single blocks (CMD17, CMD25) or multiple blocks
mgimple 0:07ff9ae5339f 64 * (CMD18, CMD25). For simplicity, I'll just use single block accesses. When
mgimple 0:07ff9ae5339f 65 * the card gets a read command, it responds with a response token, and then
mgimple 0:07ff9ae5339f 66 * a data token or an error.
mgimple 0:07ff9ae5339f 67 *
mgimple 0:07ff9ae5339f 68 * SPI Command Format
mgimple 0:07ff9ae5339f 69 * ------------------
mgimple 0:07ff9ae5339f 70 * Commands are 6-bytes long, containing the command, 32-bit argument, and CRC.
mgimple 0:07ff9ae5339f 71 *
mgimple 0:07ff9ae5339f 72 * +---------------+------------+------------+-----------+----------+--------------+
mgimple 0:07ff9ae5339f 73 * | 01 | cmd[5:0] | arg[31:24] | arg[23:16] | arg[15:8] | arg[7:0] | crc[6:0] | 1 |
mgimple 0:07ff9ae5339f 74 * +---------------+------------+------------+-----------+----------+--------------+
mgimple 0:07ff9ae5339f 75 *
mgimple 0:07ff9ae5339f 76 * As I'm not using CRC, I can fix that byte to what is needed for CMD0 (0x95)
mgimple 0:07ff9ae5339f 77 *
mgimple 0:07ff9ae5339f 78 * All Application Specific commands shall be preceded with APP_CMD (CMD55).
mgimple 0:07ff9ae5339f 79 *
mgimple 0:07ff9ae5339f 80 * SPI Response Format
mgimple 0:07ff9ae5339f 81 * -------------------
mgimple 0:07ff9ae5339f 82 * The main response format (R1) is a status byte (normally zero). Key flags:
mgimple 0:07ff9ae5339f 83 * idle - 1 if the card is in an idle state/initialising
mgimple 0:07ff9ae5339f 84 * cmd - 1 if an illegal command code was detected
mgimple 0:07ff9ae5339f 85 *
mgimple 0:07ff9ae5339f 86 * +-------------------------------------------------+
mgimple 0:07ff9ae5339f 87 * R1 | 0 | arg | addr | seq | crc | cmd | erase | idle |
mgimple 0:07ff9ae5339f 88 * +-------------------------------------------------+
mgimple 0:07ff9ae5339f 89 *
mgimple 0:07ff9ae5339f 90 * R1b is the same, except it is followed by a busy signal (zeros) until
mgimple 0:07ff9ae5339f 91 * the first non-zero byte when it is ready again.
mgimple 0:07ff9ae5339f 92 *
mgimple 0:07ff9ae5339f 93 * Data Response Token
mgimple 0:07ff9ae5339f 94 * -------------------
mgimple 0:07ff9ae5339f 95 * Every data block written to the card is acknowledged by a byte
mgimple 0:07ff9ae5339f 96 * response token
mgimple 0:07ff9ae5339f 97 *
mgimple 0:07ff9ae5339f 98 * +----------------------+
mgimple 0:07ff9ae5339f 99 * | xxx | 0 | status | 1 |
mgimple 0:07ff9ae5339f 100 * +----------------------+
mgimple 0:07ff9ae5339f 101 * 010 - OK!
mgimple 0:07ff9ae5339f 102 * 101 - CRC Error
mgimple 0:07ff9ae5339f 103 * 110 - Write Error
mgimple 0:07ff9ae5339f 104 *
mgimple 0:07ff9ae5339f 105 * Single Block Read and Write
mgimple 0:07ff9ae5339f 106 * ---------------------------
mgimple 0:07ff9ae5339f 107 *
mgimple 0:07ff9ae5339f 108 * Block transfers have a byte header, followed by the data, followed
mgimple 0:07ff9ae5339f 109 * by a 16-bit CRC. In our case, the data will always be 512 bytes.
mgimple 0:07ff9ae5339f 110 *
mgimple 0:07ff9ae5339f 111 * +------+---------+---------+- - - -+---------+-----------+----------+
mgimple 0:07ff9ae5339f 112 * | 0xFE | data[0] | data[1] | | data[n] | crc[15:8] | crc[7:0] |
mgimple 0:07ff9ae5339f 113 * +------+---------+---------+- - - -+---------+-----------+----------+
mgimple 0:07ff9ae5339f 114 */
mgimple 0:07ff9ae5339f 115 #include "SDFileSystem.h"
mgimple 0:07ff9ae5339f 116 #include "mbed_debug.h"
mgimple 0:07ff9ae5339f 117
mgimple 0:07ff9ae5339f 118 #define SD_COMMAND_TIMEOUT 5000
mgimple 0:07ff9ae5339f 119
mgimple 0:07ff9ae5339f 120 #define SD_DBG 0
mgimple 0:07ff9ae5339f 121
mgimple 0:07ff9ae5339f 122 SDFileSystem::SDFileSystem(PinName mosi, PinName miso, PinName sclk, PinName cs, const char* name) :
mgimple 0:07ff9ae5339f 123 FATFileSystem(name), _spi(mosi, miso, sclk), _cs(cs), _is_initialized(0) {
mgimple 0:07ff9ae5339f 124 _cs = 1;
mgimple 0:07ff9ae5339f 125
mgimple 0:07ff9ae5339f 126 // Set default to 100kHz for initialisation and 1MHz for data transfer
mgimple 0:07ff9ae5339f 127 _init_sck = 100000;
mgimple 0:07ff9ae5339f 128 _transfer_sck = 1000000;
mgimple 0:07ff9ae5339f 129 }
mgimple 0:07ff9ae5339f 130
mgimple 0:07ff9ae5339f 131 #define R1_IDLE_STATE (1 << 0)
mgimple 0:07ff9ae5339f 132 #define R1_ERASE_RESET (1 << 1)
mgimple 0:07ff9ae5339f 133 #define R1_ILLEGAL_COMMAND (1 << 2)
mgimple 0:07ff9ae5339f 134 #define R1_COM_CRC_ERROR (1 << 3)
mgimple 0:07ff9ae5339f 135 #define R1_ERASE_SEQUENCE_ERROR (1 << 4)
mgimple 0:07ff9ae5339f 136 #define R1_ADDRESS_ERROR (1 << 5)
mgimple 0:07ff9ae5339f 137 #define R1_PARAMETER_ERROR (1 << 6)
mgimple 0:07ff9ae5339f 138
mgimple 0:07ff9ae5339f 139 // Types
mgimple 0:07ff9ae5339f 140 // - v1.x Standard Capacity
mgimple 0:07ff9ae5339f 141 // - v2.x Standard Capacity
mgimple 0:07ff9ae5339f 142 // - v2.x High Capacity
mgimple 0:07ff9ae5339f 143 // - Not recognised as an SD Card
mgimple 0:07ff9ae5339f 144 #define SDCARD_FAIL 0
mgimple 0:07ff9ae5339f 145 #define SDCARD_V1 1
mgimple 0:07ff9ae5339f 146 #define SDCARD_V2 2
mgimple 0:07ff9ae5339f 147 #define SDCARD_V2HC 3
mgimple 0:07ff9ae5339f 148
mgimple 0:07ff9ae5339f 149 int SDFileSystem::initialise_card() {
mgimple 0:07ff9ae5339f 150 // Set to SCK for initialisation, and clock card with cs = 1
mgimple 0:07ff9ae5339f 151 _spi.frequency(_init_sck);
mgimple 0:07ff9ae5339f 152 _cs = 1;
mgimple 0:07ff9ae5339f 153 for (int i = 0; i < 16; i++) {
mgimple 0:07ff9ae5339f 154 _spi.write(0xFF);
mgimple 0:07ff9ae5339f 155 }
mgimple 0:07ff9ae5339f 156
mgimple 0:07ff9ae5339f 157 // send CMD0, should return with all zeros except IDLE STATE set (bit 0)
mgimple 0:07ff9ae5339f 158 if (_cmd(0, 0) != R1_IDLE_STATE) {
mgimple 0:07ff9ae5339f 159 debug("No disk, or could not put SD card in to SPI idle state\n");
mgimple 0:07ff9ae5339f 160 return SDCARD_FAIL;
mgimple 0:07ff9ae5339f 161 }
mgimple 0:07ff9ae5339f 162
mgimple 0:07ff9ae5339f 163 // send CMD8 to determine whther it is ver 2.x
mgimple 0:07ff9ae5339f 164 int r = _cmd8();
mgimple 0:07ff9ae5339f 165 if (r == R1_IDLE_STATE) {
mgimple 0:07ff9ae5339f 166 return initialise_card_v2();
mgimple 0:07ff9ae5339f 167 } else if (r == (R1_IDLE_STATE | R1_ILLEGAL_COMMAND)) {
mgimple 0:07ff9ae5339f 168 return initialise_card_v1();
mgimple 0:07ff9ae5339f 169 } else {
mgimple 0:07ff9ae5339f 170 debug("Not in idle state after sending CMD8 (not an SD card?)\n");
mgimple 0:07ff9ae5339f 171 return SDCARD_FAIL;
mgimple 0:07ff9ae5339f 172 }
mgimple 0:07ff9ae5339f 173 }
mgimple 0:07ff9ae5339f 174
mgimple 0:07ff9ae5339f 175 int SDFileSystem::initialise_card_v1() {
mgimple 0:07ff9ae5339f 176 for (int i = 0; i < SD_COMMAND_TIMEOUT; i++) {
mgimple 0:07ff9ae5339f 177 _cmd(55, 0);
mgimple 0:07ff9ae5339f 178 if (_cmd(41, 0) == 0) {
mgimple 0:07ff9ae5339f 179 cdv = 512;
mgimple 0:07ff9ae5339f 180 debug_if(SD_DBG, "\n\rInit: SEDCARD_V1\n\r");
mgimple 0:07ff9ae5339f 181 return SDCARD_V1;
mgimple 0:07ff9ae5339f 182 }
mgimple 0:07ff9ae5339f 183 }
mgimple 0:07ff9ae5339f 184
mgimple 0:07ff9ae5339f 185 debug("Timeout waiting for v1.x card\n");
mgimple 0:07ff9ae5339f 186 return SDCARD_FAIL;
mgimple 0:07ff9ae5339f 187 }
mgimple 0:07ff9ae5339f 188
mgimple 0:07ff9ae5339f 189 int SDFileSystem::initialise_card_v2() {
mgimple 0:07ff9ae5339f 190 for (int i = 0; i < SD_COMMAND_TIMEOUT; i++) {
mgimple 0:07ff9ae5339f 191 wait_ms(50);
mgimple 0:07ff9ae5339f 192 _cmd58();
mgimple 0:07ff9ae5339f 193 _cmd(55, 0);
mgimple 0:07ff9ae5339f 194 if (_cmd(41, 0x40000000) == 0) {
mgimple 0:07ff9ae5339f 195 _cmd58();
mgimple 0:07ff9ae5339f 196 debug_if(SD_DBG, "\n\rInit: SDCARD_V2\n\r");
mgimple 0:07ff9ae5339f 197 cdv = 1;
mgimple 0:07ff9ae5339f 198 return SDCARD_V2;
mgimple 0:07ff9ae5339f 199 }
mgimple 0:07ff9ae5339f 200 }
mgimple 0:07ff9ae5339f 201
mgimple 0:07ff9ae5339f 202 debug("Timeout waiting for v2.x card\n");
mgimple 0:07ff9ae5339f 203 return SDCARD_FAIL;
mgimple 0:07ff9ae5339f 204 }
mgimple 0:07ff9ae5339f 205
mgimple 0:07ff9ae5339f 206 int SDFileSystem::disk_initialize() {
mgimple 0:07ff9ae5339f 207 _is_initialized = initialise_card();
mgimple 0:07ff9ae5339f 208 if (_is_initialized == 0) {
mgimple 0:07ff9ae5339f 209 debug("Fail to initialize card\n");
mgimple 0:07ff9ae5339f 210 return 1;
mgimple 0:07ff9ae5339f 211 }
mgimple 0:07ff9ae5339f 212 debug_if(SD_DBG, "init card = %d\n", _is_initialized);
mgimple 0:07ff9ae5339f 213 _sectors = _sd_sectors();
mgimple 0:07ff9ae5339f 214
mgimple 0:07ff9ae5339f 215 // Set block length to 512 (CMD16)
mgimple 0:07ff9ae5339f 216 if (_cmd(16, 512) != 0) {
mgimple 0:07ff9ae5339f 217 debug("Set 512-byte block timed out\n");
mgimple 0:07ff9ae5339f 218 return 1;
mgimple 0:07ff9ae5339f 219 }
mgimple 0:07ff9ae5339f 220
mgimple 0:07ff9ae5339f 221 // Set SCK for data transfer
mgimple 0:07ff9ae5339f 222 _spi.frequency(_transfer_sck);
mgimple 0:07ff9ae5339f 223 return 0;
mgimple 0:07ff9ae5339f 224 }
mgimple 0:07ff9ae5339f 225
mgimple 0:07ff9ae5339f 226 int SDFileSystem::disk_write(const uint8_t* buffer, uint32_t block_number, uint32_t count) {
mgimple 0:07ff9ae5339f 227 if (!_is_initialized) {
mgimple 0:07ff9ae5339f 228 return -1;
mgimple 0:07ff9ae5339f 229 }
mgimple 0:07ff9ae5339f 230
mgimple 0:07ff9ae5339f 231 for (uint32_t b = block_number; b < block_number + count; b++) {
mgimple 0:07ff9ae5339f 232 // set write address for single block (CMD24)
mgimple 0:07ff9ae5339f 233 if (_cmd(24, b * cdv) != 0) {
mgimple 0:07ff9ae5339f 234 return 1;
mgimple 0:07ff9ae5339f 235 }
mgimple 0:07ff9ae5339f 236
mgimple 0:07ff9ae5339f 237 // send the data block
mgimple 0:07ff9ae5339f 238 _write(buffer, 512);
mgimple 0:07ff9ae5339f 239 buffer += 512;
mgimple 0:07ff9ae5339f 240 }
mgimple 0:07ff9ae5339f 241
mgimple 0:07ff9ae5339f 242 return 0;
mgimple 0:07ff9ae5339f 243 }
mgimple 0:07ff9ae5339f 244
mgimple 0:07ff9ae5339f 245 int SDFileSystem::disk_read(uint8_t* buffer, uint32_t block_number, uint32_t count) {
mgimple 0:07ff9ae5339f 246 if (!_is_initialized) {
mgimple 0:07ff9ae5339f 247 return -1;
mgimple 0:07ff9ae5339f 248 }
mgimple 0:07ff9ae5339f 249
mgimple 0:07ff9ae5339f 250 for (uint32_t b = block_number; b < block_number + count; b++) {
mgimple 0:07ff9ae5339f 251 // set read address for single block (CMD17)
mgimple 0:07ff9ae5339f 252 if (_cmd(17, b * cdv) != 0) {
mgimple 0:07ff9ae5339f 253 return 1;
mgimple 0:07ff9ae5339f 254 }
mgimple 0:07ff9ae5339f 255
mgimple 0:07ff9ae5339f 256 // receive the data
mgimple 0:07ff9ae5339f 257 _read(buffer, 512);
mgimple 0:07ff9ae5339f 258 buffer += 512;
mgimple 0:07ff9ae5339f 259 }
mgimple 0:07ff9ae5339f 260
mgimple 0:07ff9ae5339f 261 return 0;
mgimple 0:07ff9ae5339f 262 }
mgimple 0:07ff9ae5339f 263
mgimple 0:07ff9ae5339f 264 int SDFileSystem::disk_status() {
mgimple 0:07ff9ae5339f 265 // FATFileSystem::disk_status() returns 0 when initialized
mgimple 0:07ff9ae5339f 266 if (_is_initialized) {
mgimple 0:07ff9ae5339f 267 return 0;
mgimple 0:07ff9ae5339f 268 } else {
mgimple 0:07ff9ae5339f 269 return 1;
mgimple 0:07ff9ae5339f 270 }
mgimple 0:07ff9ae5339f 271 }
mgimple 0:07ff9ae5339f 272
mgimple 0:07ff9ae5339f 273 int SDFileSystem::disk_sync() { return 0; }
mgimple 0:07ff9ae5339f 274 uint32_t SDFileSystem::disk_sectors() { return _sectors; }
mgimple 0:07ff9ae5339f 275
mgimple 0:07ff9ae5339f 276
mgimple 0:07ff9ae5339f 277 // PRIVATE FUNCTIONS
mgimple 0:07ff9ae5339f 278 int SDFileSystem::_cmd(int cmd, int arg) {
mgimple 0:07ff9ae5339f 279 _cs = 0;
mgimple 0:07ff9ae5339f 280
mgimple 0:07ff9ae5339f 281 // send a command
mgimple 0:07ff9ae5339f 282 _spi.write(0x40 | cmd);
mgimple 0:07ff9ae5339f 283 _spi.write(arg >> 24);
mgimple 0:07ff9ae5339f 284 _spi.write(arg >> 16);
mgimple 0:07ff9ae5339f 285 _spi.write(arg >> 8);
mgimple 0:07ff9ae5339f 286 _spi.write(arg >> 0);
mgimple 0:07ff9ae5339f 287 _spi.write(0x95);
mgimple 0:07ff9ae5339f 288
mgimple 0:07ff9ae5339f 289 // wait for the repsonse (response[7] == 0)
mgimple 0:07ff9ae5339f 290 for (int i = 0; i < SD_COMMAND_TIMEOUT; i++) {
mgimple 0:07ff9ae5339f 291 int response = _spi.write(0xFF);
mgimple 0:07ff9ae5339f 292 if (!(response & 0x80)) {
mgimple 0:07ff9ae5339f 293 _cs = 1;
mgimple 0:07ff9ae5339f 294 _spi.write(0xFF);
mgimple 0:07ff9ae5339f 295 return response;
mgimple 0:07ff9ae5339f 296 }
mgimple 0:07ff9ae5339f 297 }
mgimple 0:07ff9ae5339f 298 _cs = 1;
mgimple 0:07ff9ae5339f 299 _spi.write(0xFF);
mgimple 0:07ff9ae5339f 300 return -1; // timeout
mgimple 0:07ff9ae5339f 301 }
mgimple 0:07ff9ae5339f 302 int SDFileSystem::_cmdx(int cmd, int arg) {
mgimple 0:07ff9ae5339f 303 _cs = 0;
mgimple 0:07ff9ae5339f 304
mgimple 0:07ff9ae5339f 305 // send a command
mgimple 0:07ff9ae5339f 306 _spi.write(0x40 | cmd);
mgimple 0:07ff9ae5339f 307 _spi.write(arg >> 24);
mgimple 0:07ff9ae5339f 308 _spi.write(arg >> 16);
mgimple 0:07ff9ae5339f 309 _spi.write(arg >> 8);
mgimple 0:07ff9ae5339f 310 _spi.write(arg >> 0);
mgimple 0:07ff9ae5339f 311 _spi.write(0x95);
mgimple 0:07ff9ae5339f 312
mgimple 0:07ff9ae5339f 313 // wait for the repsonse (response[7] == 0)
mgimple 0:07ff9ae5339f 314 for (int i = 0; i < SD_COMMAND_TIMEOUT; i++) {
mgimple 0:07ff9ae5339f 315 int response = _spi.write(0xFF);
mgimple 0:07ff9ae5339f 316 if (!(response & 0x80)) {
mgimple 0:07ff9ae5339f 317 return response;
mgimple 0:07ff9ae5339f 318 }
mgimple 0:07ff9ae5339f 319 }
mgimple 0:07ff9ae5339f 320 _cs = 1;
mgimple 0:07ff9ae5339f 321 _spi.write(0xFF);
mgimple 0:07ff9ae5339f 322 return -1; // timeout
mgimple 0:07ff9ae5339f 323 }
mgimple 0:07ff9ae5339f 324
mgimple 0:07ff9ae5339f 325
mgimple 0:07ff9ae5339f 326 int SDFileSystem::_cmd58() {
mgimple 0:07ff9ae5339f 327 _cs = 0;
mgimple 0:07ff9ae5339f 328 int arg = 0;
mgimple 0:07ff9ae5339f 329
mgimple 0:07ff9ae5339f 330 // send a command
mgimple 0:07ff9ae5339f 331 _spi.write(0x40 | 58);
mgimple 0:07ff9ae5339f 332 _spi.write(arg >> 24);
mgimple 0:07ff9ae5339f 333 _spi.write(arg >> 16);
mgimple 0:07ff9ae5339f 334 _spi.write(arg >> 8);
mgimple 0:07ff9ae5339f 335 _spi.write(arg >> 0);
mgimple 0:07ff9ae5339f 336 _spi.write(0x95);
mgimple 0:07ff9ae5339f 337
mgimple 0:07ff9ae5339f 338 // wait for the repsonse (response[7] == 0)
mgimple 0:07ff9ae5339f 339 for (int i = 0; i < SD_COMMAND_TIMEOUT; i++) {
mgimple 0:07ff9ae5339f 340 int response = _spi.write(0xFF);
mgimple 0:07ff9ae5339f 341 if (!(response & 0x80)) {
mgimple 0:07ff9ae5339f 342 int ocr = _spi.write(0xFF) << 24;
mgimple 0:07ff9ae5339f 343 ocr |= _spi.write(0xFF) << 16;
mgimple 0:07ff9ae5339f 344 ocr |= _spi.write(0xFF) << 8;
mgimple 0:07ff9ae5339f 345 ocr |= _spi.write(0xFF) << 0;
mgimple 0:07ff9ae5339f 346 _cs = 1;
mgimple 0:07ff9ae5339f 347 _spi.write(0xFF);
mgimple 0:07ff9ae5339f 348 return response;
mgimple 0:07ff9ae5339f 349 }
mgimple 0:07ff9ae5339f 350 }
mgimple 0:07ff9ae5339f 351 _cs = 1;
mgimple 0:07ff9ae5339f 352 _spi.write(0xFF);
mgimple 0:07ff9ae5339f 353 return -1; // timeout
mgimple 0:07ff9ae5339f 354 }
mgimple 0:07ff9ae5339f 355
mgimple 0:07ff9ae5339f 356 int SDFileSystem::_cmd8() {
mgimple 0:07ff9ae5339f 357 _cs = 0;
mgimple 0:07ff9ae5339f 358
mgimple 0:07ff9ae5339f 359 // send a command
mgimple 0:07ff9ae5339f 360 _spi.write(0x40 | 8); // CMD8
mgimple 0:07ff9ae5339f 361 _spi.write(0x00); // reserved
mgimple 0:07ff9ae5339f 362 _spi.write(0x00); // reserved
mgimple 0:07ff9ae5339f 363 _spi.write(0x01); // 3.3v
mgimple 0:07ff9ae5339f 364 _spi.write(0xAA); // check pattern
mgimple 0:07ff9ae5339f 365 _spi.write(0x87); // crc
mgimple 0:07ff9ae5339f 366
mgimple 0:07ff9ae5339f 367 // wait for the repsonse (response[7] == 0)
mgimple 0:07ff9ae5339f 368 for (int i = 0; i < SD_COMMAND_TIMEOUT * 1000; i++) {
mgimple 0:07ff9ae5339f 369 char response[5];
mgimple 0:07ff9ae5339f 370 response[0] = _spi.write(0xFF);
mgimple 0:07ff9ae5339f 371 if (!(response[0] & 0x80)) {
mgimple 0:07ff9ae5339f 372 for (int j = 1; j < 5; j++) {
mgimple 0:07ff9ae5339f 373 response[i] = _spi.write(0xFF);
mgimple 0:07ff9ae5339f 374 }
mgimple 0:07ff9ae5339f 375 _cs = 1;
mgimple 0:07ff9ae5339f 376 _spi.write(0xFF);
mgimple 0:07ff9ae5339f 377 return response[0];
mgimple 0:07ff9ae5339f 378 }
mgimple 0:07ff9ae5339f 379 }
mgimple 0:07ff9ae5339f 380 _cs = 1;
mgimple 0:07ff9ae5339f 381 _spi.write(0xFF);
mgimple 0:07ff9ae5339f 382 return -1; // timeout
mgimple 0:07ff9ae5339f 383 }
mgimple 0:07ff9ae5339f 384
mgimple 0:07ff9ae5339f 385 int SDFileSystem::_read(uint8_t *buffer, uint32_t length) {
mgimple 0:07ff9ae5339f 386 _cs = 0;
mgimple 0:07ff9ae5339f 387
mgimple 0:07ff9ae5339f 388 // read until start byte (0xFF)
mgimple 0:07ff9ae5339f 389 while (_spi.write(0xFF) != 0xFE);
mgimple 0:07ff9ae5339f 390
mgimple 0:07ff9ae5339f 391 // read data
mgimple 0:07ff9ae5339f 392 for (uint32_t i = 0; i < length; i++) {
mgimple 0:07ff9ae5339f 393 buffer[i] = _spi.write(0xFF);
mgimple 0:07ff9ae5339f 394 }
mgimple 0:07ff9ae5339f 395 _spi.write(0xFF); // checksum
mgimple 0:07ff9ae5339f 396 _spi.write(0xFF);
mgimple 0:07ff9ae5339f 397
mgimple 0:07ff9ae5339f 398 _cs = 1;
mgimple 0:07ff9ae5339f 399 _spi.write(0xFF);
mgimple 0:07ff9ae5339f 400 return 0;
mgimple 0:07ff9ae5339f 401 }
mgimple 0:07ff9ae5339f 402
mgimple 0:07ff9ae5339f 403 int SDFileSystem::_write(const uint8_t*buffer, uint32_t length) {
mgimple 0:07ff9ae5339f 404 _cs = 0;
mgimple 0:07ff9ae5339f 405
mgimple 0:07ff9ae5339f 406 // indicate start of block
mgimple 0:07ff9ae5339f 407 _spi.write(0xFE);
mgimple 0:07ff9ae5339f 408
mgimple 0:07ff9ae5339f 409 // write the data
mgimple 0:07ff9ae5339f 410 for (uint32_t i = 0; i < length; i++) {
mgimple 0:07ff9ae5339f 411 _spi.write(buffer[i]);
mgimple 0:07ff9ae5339f 412 }
mgimple 0:07ff9ae5339f 413
mgimple 0:07ff9ae5339f 414 // write the checksum
mgimple 0:07ff9ae5339f 415 _spi.write(0xFF);
mgimple 0:07ff9ae5339f 416 _spi.write(0xFF);
mgimple 0:07ff9ae5339f 417
mgimple 0:07ff9ae5339f 418 // check the response token
mgimple 0:07ff9ae5339f 419 if ((_spi.write(0xFF) & 0x1F) != 0x05) {
mgimple 0:07ff9ae5339f 420 _cs = 1;
mgimple 0:07ff9ae5339f 421 _spi.write(0xFF);
mgimple 0:07ff9ae5339f 422 return 1;
mgimple 0:07ff9ae5339f 423 }
mgimple 0:07ff9ae5339f 424
mgimple 0:07ff9ae5339f 425 // wait for write to finish
mgimple 0:07ff9ae5339f 426 while (_spi.write(0xFF) == 0);
mgimple 0:07ff9ae5339f 427
mgimple 0:07ff9ae5339f 428 _cs = 1;
mgimple 0:07ff9ae5339f 429 _spi.write(0xFF);
mgimple 0:07ff9ae5339f 430 return 0;
mgimple 0:07ff9ae5339f 431 }
mgimple 0:07ff9ae5339f 432
mgimple 0:07ff9ae5339f 433 static uint32_t ext_bits(unsigned char *data, int msb, int lsb) {
mgimple 0:07ff9ae5339f 434 uint32_t bits = 0;
mgimple 0:07ff9ae5339f 435 uint32_t size = 1 + msb - lsb;
mgimple 0:07ff9ae5339f 436 for (uint32_t i = 0; i < size; i++) {
mgimple 0:07ff9ae5339f 437 uint32_t position = lsb + i;
mgimple 0:07ff9ae5339f 438 uint32_t byte = 15 - (position >> 3);
mgimple 0:07ff9ae5339f 439 uint32_t bit = position & 0x7;
mgimple 0:07ff9ae5339f 440 uint32_t value = (data[byte] >> bit) & 1;
mgimple 0:07ff9ae5339f 441 bits |= value << i;
mgimple 0:07ff9ae5339f 442 }
mgimple 0:07ff9ae5339f 443 return bits;
mgimple 0:07ff9ae5339f 444 }
mgimple 0:07ff9ae5339f 445
mgimple 0:07ff9ae5339f 446 uint32_t SDFileSystem::_sd_sectors() {
mgimple 0:07ff9ae5339f 447 uint32_t c_size, c_size_mult, read_bl_len;
mgimple 0:07ff9ae5339f 448 uint32_t block_len, mult, blocknr, capacity;
mgimple 0:07ff9ae5339f 449 uint32_t hc_c_size;
mgimple 0:07ff9ae5339f 450 uint32_t blocks;
mgimple 0:07ff9ae5339f 451
mgimple 0:07ff9ae5339f 452 // CMD9, Response R2 (R1 byte + 16-byte block read)
mgimple 0:07ff9ae5339f 453 if (_cmdx(9, 0) != 0) {
mgimple 0:07ff9ae5339f 454 debug("Didn't get a response from the disk\n");
mgimple 0:07ff9ae5339f 455 return 0;
mgimple 0:07ff9ae5339f 456 }
mgimple 0:07ff9ae5339f 457
mgimple 0:07ff9ae5339f 458 uint8_t csd[16];
mgimple 0:07ff9ae5339f 459 if (_read(csd, 16) != 0) {
mgimple 0:07ff9ae5339f 460 debug("Couldn't read csd response from disk\n");
mgimple 0:07ff9ae5339f 461 return 0;
mgimple 0:07ff9ae5339f 462 }
mgimple 0:07ff9ae5339f 463
mgimple 0:07ff9ae5339f 464 // csd_structure : csd[127:126]
mgimple 0:07ff9ae5339f 465 // c_size : csd[73:62]
mgimple 0:07ff9ae5339f 466 // c_size_mult : csd[49:47]
mgimple 0:07ff9ae5339f 467 // read_bl_len : csd[83:80] - the *maximum* read block length
mgimple 0:07ff9ae5339f 468
mgimple 0:07ff9ae5339f 469 int csd_structure = ext_bits(csd, 127, 126);
mgimple 0:07ff9ae5339f 470
mgimple 0:07ff9ae5339f 471 switch (csd_structure) {
mgimple 0:07ff9ae5339f 472 case 0:
mgimple 0:07ff9ae5339f 473 cdv = 512;
mgimple 0:07ff9ae5339f 474 c_size = ext_bits(csd, 73, 62);
mgimple 0:07ff9ae5339f 475 c_size_mult = ext_bits(csd, 49, 47);
mgimple 0:07ff9ae5339f 476 read_bl_len = ext_bits(csd, 83, 80);
mgimple 0:07ff9ae5339f 477
mgimple 0:07ff9ae5339f 478 block_len = 1 << read_bl_len;
mgimple 0:07ff9ae5339f 479 mult = 1 << (c_size_mult + 2);
mgimple 0:07ff9ae5339f 480 blocknr = (c_size + 1) * mult;
mgimple 0:07ff9ae5339f 481 capacity = blocknr * block_len;
mgimple 0:07ff9ae5339f 482 blocks = capacity / 512;
mgimple 0:07ff9ae5339f 483 debug_if(SD_DBG, "\n\rSDCard\n\rc_size: %d \n\rcapacity: %ld \n\rsectors: %lld\n\r", c_size, capacity, blocks);
mgimple 0:07ff9ae5339f 484 break;
mgimple 0:07ff9ae5339f 485
mgimple 0:07ff9ae5339f 486 case 1:
mgimple 0:07ff9ae5339f 487 cdv = 1;
mgimple 0:07ff9ae5339f 488 hc_c_size = ext_bits(csd, 63, 48);
mgimple 0:07ff9ae5339f 489 blocks = (hc_c_size+1)*1024;
mgimple 0:07ff9ae5339f 490 debug_if(SD_DBG, "\n\rSDHC Card \n\rhc_c_size: %d\n\rcapacity: %lld \n\rsectors: %lld\n\r", hc_c_size, blocks*512, blocks);
mgimple 0:07ff9ae5339f 491 break;
mgimple 0:07ff9ae5339f 492
mgimple 0:07ff9ae5339f 493 default:
mgimple 0:07ff9ae5339f 494 debug("CSD struct unsupported\r\n");
mgimple 0:07ff9ae5339f 495 return 0;
mgimple 0:07ff9ae5339f 496 };
mgimple 0:07ff9ae5339f 497 return blocks;
mgimple 0:07ff9ae5339f 498 }