Mike Fruge / OneWire

Implementation of 1-Wire with added Alarm Search Functionality

Dependents:   Max32630_One_Wire_Interface

Masters/TARGET_Maxim/TARGET_MAX32600/OwGpio/OwGpio.cpp@139:f0e0a7976846, 2016-12-13 (annotated)

Committer:
j3
Date:
Tue Dec 13 13:31:30 2016 -0800
Revision:
139:f0e0a7976846
Parent:
138:5bd0a7a82bb4 
Merge from svn

Who changed what in which revision?

UserRevisionLine numberNew contents of line
j3 138:5bd0a7a82bb4 1 /******************************************************************//**
j3 138:5bd0a7a82bb4 2 * Copyright (C) 2016 Maxim Integrated Products, Inc., All Rights Reserved.
j3 138:5bd0a7a82bb4 3 *
j3 138:5bd0a7a82bb4 4 * Permission is hereby granted, free of charge, to any person obtaining a
j3 138:5bd0a7a82bb4 5 * copy of this software and associated documentation files (the "Software"),
j3 138:5bd0a7a82bb4 6 * to deal in the Software without restriction, including without limitation
j3 138:5bd0a7a82bb4 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
j3 138:5bd0a7a82bb4 8 * and/or sell copies of the Software, and to permit persons to whom the
j3 138:5bd0a7a82bb4 9 * Software is furnished to do so, subject to the following conditions:
j3 138:5bd0a7a82bb4 10 *
j3 138:5bd0a7a82bb4 11 * The above copyright notice and this permission notice shall be included
j3 138:5bd0a7a82bb4 12 * in all copies or substantial portions of the Software.
j3 138:5bd0a7a82bb4 13 *
j3 138:5bd0a7a82bb4 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
j3 138:5bd0a7a82bb4 15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
j3 138:5bd0a7a82bb4 16 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
j3 138:5bd0a7a82bb4 17 * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
j3 138:5bd0a7a82bb4 18 * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
j3 138:5bd0a7a82bb4 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
j3 138:5bd0a7a82bb4 20 * OTHER DEALINGS IN THE SOFTWARE.
j3 138:5bd0a7a82bb4 21 *
j3 138:5bd0a7a82bb4 22 * Except as contained in this notice, the name of Maxim Integrated
j3 138:5bd0a7a82bb4 23 * Products, Inc. shall not be used except as stated in the Maxim Integrated
j3 138:5bd0a7a82bb4 24 * Products, Inc. Branding Policy.
j3 138:5bd0a7a82bb4 25 *
j3 138:5bd0a7a82bb4 26 * The mere transfer of this software does not imply any licenses
j3 138:5bd0a7a82bb4 27 * of trade secrets, proprietary technology, copyrights, patents,
j3 138:5bd0a7a82bb4 28 * trademarks, maskwork rights, or any other form of intellectual
j3 138:5bd0a7a82bb4 29 * property whatsoever. Maxim Integrated Products, Inc. retains all
j3 138:5bd0a7a82bb4 30 * ownership rights.
j3 138:5bd0a7a82bb4 31 **********************************************************************/
j3 138:5bd0a7a82bb4 32
j3 138:5bd0a7a82bb4 33 #ifdef TARGET_MAX32600
j3 138:5bd0a7a82bb4 34
j3 138:5bd0a7a82bb4 35 #include "Masters/TARGET_Maxim/TARGET_MAX32600/OwGpio/OwGpio.h"
j3 138:5bd0a7a82bb4 36 #include "Masters/TARGET_Maxim/TARGET_MAX32600/OwGpio/owlink.h"
j3 138:5bd0a7a82bb4 37 #include "gpio_regs.h"
j3 138:5bd0a7a82bb4 38 #include "clkman_regs.h"
j3 138:5bd0a7a82bb4 39
j3 138:5bd0a7a82bb4 40
j3 138:5bd0a7a82bb4 41 using OneWire::OneWireMaster;
j3 138:5bd0a7a82bb4 42 using OneWire::OwGpio;
j3 138:5bd0a7a82bb4 43
j3 138:5bd0a7a82bb4 44 static const OwTiming stdTiming = {
j3 138:5bd0a7a82bb4 45 560, // tRSTL
j3 138:5bd0a7a82bb4 46 68, // tMSP
j3 138:5bd0a7a82bb4 47 64, // tW0L
j3 138:5bd0a7a82bb4 48 8, // tW1L
j3 138:5bd0a7a82bb4 49 12, // tMSR
j3 138:5bd0a7a82bb4 50 70, // tSLOT
j3 138:5bd0a7a82bb4 51 };
j3 138:5bd0a7a82bb4 52
j3 138:5bd0a7a82bb4 53 static const OwTiming odTiming = {
j3 138:5bd0a7a82bb4 54 56, // tRSTL
j3 138:5bd0a7a82bb4 55 8, // tMSP
j3 138:5bd0a7a82bb4 56 8, // tW0L
j3 138:5bd0a7a82bb4 57 1, // tW1L
j3 138:5bd0a7a82bb4 58 1, // tMSR
j3 138:5bd0a7a82bb4 59 10, // tSLOT
j3 138:5bd0a7a82bb4 60 };
j3 138:5bd0a7a82bb4 61
j3 138:5bd0a7a82bb4 62 OwGpio::OwGpio(PinName owGpio, PinName extSpu, bool extSpuActiveHigh)
j3 138:5bd0a7a82bb4 63 : owPort(PINNAME_TO_PORT(owGpio)), owPin(PINNAME_TO_PIN(owGpio)), owSpeed(StandardSpeed),
j3 138:5bd0a7a82bb4 64 extSpu(extSpu), extSpuActiveHigh(extSpuActiveHigh)
j3 138:5bd0a7a82bb4 65 {
j3 138:5bd0a7a82bb4 66
j3 138:5bd0a7a82bb4 67 }
j3 138:5bd0a7a82bb4 68
j3 138:5bd0a7a82bb4 69 OneWireMaster::CmdResult OwGpio::OWInitMaster()
j3 138:5bd0a7a82bb4 70 {
j3 138:5bd0a7a82bb4 71 if (MXC_CLKMAN->clk_ctrl_1_gpio == MXC_E_CLKMAN_CLK_SCALE_DISABLED)
j3 138:5bd0a7a82bb4 72 {
j3 138:5bd0a7a82bb4 73 MXC_CLKMAN->clk_ctrl_1_gpio = MXC_E_CLKMAN_CLK_SCALE_ENABLED;
j3 138:5bd0a7a82bb4 74 }
j3 138:5bd0a7a82bb4 75
j3 138:5bd0a7a82bb4 76 /* Set function */
j3 138:5bd0a7a82bb4 77 MXC_GPIO->func_sel[owPort] &= ~(0xF << (4 * owPin));
j3 138:5bd0a7a82bb4 78
j3 138:5bd0a7a82bb4 79 /* Normal input is always enabled */
j3 138:5bd0a7a82bb4 80 MXC_GPIO->in_mode[owPort] &= ~(0xF << (4 * owPin));
j3 138:5bd0a7a82bb4 81
j3 138:5bd0a7a82bb4 82 writeOwGpioHigh();
j3 138:5bd0a7a82bb4 83 OWSetLevel(NormalLevel);
j3 138:5bd0a7a82bb4 84
j3 138:5bd0a7a82bb4 85 return OneWireMaster::Success;
j3 138:5bd0a7a82bb4 86 }
j3 138:5bd0a7a82bb4 87
j3 138:5bd0a7a82bb4 88 OneWireMaster::CmdResult OwGpio::OWReset()
j3 138:5bd0a7a82bb4 89 {
j3 138:5bd0a7a82bb4 90 const OwTiming & curTiming(owSpeed == OverdriveSpeed ? odTiming : stdTiming);
j3 138:5bd0a7a82bb4 91 uint16_t tREC = curTiming.tRSTL - curTiming.tMSP; // tSLOT = 2 *tRSTL
j3 138:5bd0a7a82bb4 92
j3 138:5bd0a7a82bb4 93 __disable_irq(); // Enter critical section
j3 138:5bd0a7a82bb4 94
j3 138:5bd0a7a82bb4 95 writeOwGpioLow(); // Pull low
j3 138:5bd0a7a82bb4 96 ow_usdelay(curTiming.tRSTL); // Wait specified time for reset pulse
j3 138:5bd0a7a82bb4 97 writeOwGpioHigh(); // Let go of pin
j3 138:5bd0a7a82bb4 98 ow_usdelay(curTiming.tMSP); // Wait specified time for master sample
j3 138:5bd0a7a82bb4 99 uint8_t pd_pulse = readOwGpio(); // Get sample
j3 138:5bd0a7a82bb4 100 ow_usdelay(tREC); // Wait for slot time to finish including recovery
j3 138:5bd0a7a82bb4 101
j3 138:5bd0a7a82bb4 102 __enable_irq(); // Exit critical section
j3 138:5bd0a7a82bb4 103
j3 138:5bd0a7a82bb4 104 return((pd_pulse == 0) ? OneWireMaster::Success : OneWireMaster::OperationFailure);
j3 138:5bd0a7a82bb4 105 }
j3 138:5bd0a7a82bb4 106
j3 138:5bd0a7a82bb4 107 OneWireMaster::CmdResult OwGpio::OWTouchBitSetLevel(uint8_t & sendRecvBit, OWLevel afterLevel)
j3 138:5bd0a7a82bb4 108 {
j3 138:5bd0a7a82bb4 109 __disable_irq(); // Enter critical section
j3 138:5bd0a7a82bb4 110
j3 138:5bd0a7a82bb4 111 ow_bit(&sendRecvBit, &MXC_GPIO->in_val[owPort], &MXC_GPIO->out_val[owPort], (1 << owPin),
j3 138:5bd0a7a82bb4 112 ((owSpeed == OverdriveSpeed) ? &odTiming : &stdTiming));
j3 138:5bd0a7a82bb4 113 OWSetLevel(afterLevel);
j3 138:5bd0a7a82bb4 114
j3 138:5bd0a7a82bb4 115 __enable_irq(); // Exit critical section
j3 138:5bd0a7a82bb4 116
j3 138:5bd0a7a82bb4 117 return OneWireMaster::Success;
j3 138:5bd0a7a82bb4 118 }
j3 138:5bd0a7a82bb4 119
j3 138:5bd0a7a82bb4 120 OneWireMaster::CmdResult OwGpio::OWWriteByteSetLevel(uint8_t sendByte, OWLevel afterLevel)
j3 138:5bd0a7a82bb4 121 {
j3 138:5bd0a7a82bb4 122 OneWireMaster::CmdResult result;
j3 138:5bd0a7a82bb4 123
j3 138:5bd0a7a82bb4 124 for (uint8_t idx = 0; idx < 8; idx++)
j3 138:5bd0a7a82bb4 125 {
j3 138:5bd0a7a82bb4 126 result = OneWireMaster::OWWriteBit(0x01 & (sendByte >> idx));
j3 138:5bd0a7a82bb4 127 if (result != OneWireMaster::Success)
j3 138:5bd0a7a82bb4 128 {
j3 138:5bd0a7a82bb4 129 break;
j3 138:5bd0a7a82bb4 130 }
j3 138:5bd0a7a82bb4 131 }
j3 138:5bd0a7a82bb4 132
j3 138:5bd0a7a82bb4 133 if (result == OneWireMaster::Success)
j3 138:5bd0a7a82bb4 134 {
j3 138:5bd0a7a82bb4 135 OWSetLevel(afterLevel);
j3 138:5bd0a7a82bb4 136 }
j3 138:5bd0a7a82bb4 137
j3 138:5bd0a7a82bb4 138 return result;
j3 138:5bd0a7a82bb4 139 }
j3 138:5bd0a7a82bb4 140
j3 138:5bd0a7a82bb4 141 OneWireMaster::CmdResult OwGpio::OWReadByteSetLevel(uint8_t & recvByte, OWLevel afterLevel)
j3 138:5bd0a7a82bb4 142 {
j3 138:5bd0a7a82bb4 143 OneWireMaster::CmdResult result;
j3 138:5bd0a7a82bb4 144 uint8_t recvBit;
j3 138:5bd0a7a82bb4 145 recvByte = 0;
j3 138:5bd0a7a82bb4 146
j3 138:5bd0a7a82bb4 147 for (unsigned int idx = 0; idx < 8; idx++)
j3 138:5bd0a7a82bb4 148 {
j3 138:5bd0a7a82bb4 149 result = OneWireMaster::OWReadBit(recvBit);
j3 138:5bd0a7a82bb4 150 if (result != OneWireMaster::Success)
j3 138:5bd0a7a82bb4 151 {
j3 138:5bd0a7a82bb4 152 break;
j3 138:5bd0a7a82bb4 153 }
j3 138:5bd0a7a82bb4 154 //else
j3 138:5bd0a7a82bb4 155 recvByte |= ((0x01 & recvBit) << idx);
j3 138:5bd0a7a82bb4 156 }
j3 138:5bd0a7a82bb4 157
j3 138:5bd0a7a82bb4 158 if (result == OneWireMaster::Success)
j3 138:5bd0a7a82bb4 159 {
j3 138:5bd0a7a82bb4 160 OWSetLevel(afterLevel);
j3 138:5bd0a7a82bb4 161 }
j3 138:5bd0a7a82bb4 162
j3 138:5bd0a7a82bb4 163 return result;
j3 138:5bd0a7a82bb4 164 }
j3 138:5bd0a7a82bb4 165
j3 138:5bd0a7a82bb4 166 OneWireMaster::CmdResult OwGpio::OWSetSpeed(OWSpeed newSpeed)
j3 138:5bd0a7a82bb4 167 {
j3 138:5bd0a7a82bb4 168 owSpeed = newSpeed;
j3 138:5bd0a7a82bb4 169 return OneWireMaster::Success;
j3 138:5bd0a7a82bb4 170 }
j3 138:5bd0a7a82bb4 171
j3 138:5bd0a7a82bb4 172 OneWireMaster::CmdResult OwGpio::OWSetLevel(OWLevel newLevel)
j3 138:5bd0a7a82bb4 173 {
j3 138:5bd0a7a82bb4 174 switch (newLevel)
j3 138:5bd0a7a82bb4 175 {
j3 138:5bd0a7a82bb4 176 case NormalLevel:
j3 138:5bd0a7a82bb4 177 default:
j3 138:5bd0a7a82bb4 178 setOwGpioMode(MXC_V_GPIO_OUT_MODE_OPEN_DRAIN);
j3 138:5bd0a7a82bb4 179 if (extSpu.is_connected())
j3 138:5bd0a7a82bb4 180 {
j3 138:5bd0a7a82bb4 181 extSpu = !extSpuActiveHigh;
j3 138:5bd0a7a82bb4 182 }
j3 138:5bd0a7a82bb4 183 break;
j3 138:5bd0a7a82bb4 184
j3 138:5bd0a7a82bb4 185 case StrongLevel:
j3 138:5bd0a7a82bb4 186 if (extSpu.is_connected())
j3 138:5bd0a7a82bb4 187 {
j3 138:5bd0a7a82bb4 188 extSpu = extSpuActiveHigh;
j3 138:5bd0a7a82bb4 189 }
j3 138:5bd0a7a82bb4 190 else
j3 138:5bd0a7a82bb4 191 {
j3 138:5bd0a7a82bb4 192 setOwGpioMode(MXC_V_GPIO_OUT_MODE_NORMAL_DRIVE);
j3 138:5bd0a7a82bb4 193 }
j3 138:5bd0a7a82bb4 194 break;
j3 138:5bd0a7a82bb4 195 }
j3 138:5bd0a7a82bb4 196
j3 138:5bd0a7a82bb4 197 return OneWireMaster::Success;
j3 138:5bd0a7a82bb4 198 }
j3 138:5bd0a7a82bb4 199
j3 138:5bd0a7a82bb4 200 inline void OwGpio::writeOwGpioLow()
j3 138:5bd0a7a82bb4 201 {
j3 138:5bd0a7a82bb4 202 MXC_GPIO->out_val[owPort] &= ~(1 << owPin);
j3 138:5bd0a7a82bb4 203 }
j3 138:5bd0a7a82bb4 204
j3 138:5bd0a7a82bb4 205 inline void OwGpio::writeOwGpioHigh()
j3 138:5bd0a7a82bb4 206 {
j3 138:5bd0a7a82bb4 207 MXC_GPIO->out_val[owPort] |= (1 << owPin);
j3 138:5bd0a7a82bb4 208 }
j3 138:5bd0a7a82bb4 209
j3 138:5bd0a7a82bb4 210 inline bool OwGpio::readOwGpio()
j3 138:5bd0a7a82bb4 211 {
j3 138:5bd0a7a82bb4 212 return ((MXC_GPIO->in_val[owPort] & (1 << owPin)) >> owPin);
j3 138:5bd0a7a82bb4 213 }
j3 138:5bd0a7a82bb4 214
j3 138:5bd0a7a82bb4 215 inline void OwGpio::setOwGpioMode(unsigned int mode)
j3 138:5bd0a7a82bb4 216 {
j3 138:5bd0a7a82bb4 217 //read port out_mode
j3 138:5bd0a7a82bb4 218 uint32_t ow_out_mode = MXC_GPIO->out_mode[owPort];
j3 138:5bd0a7a82bb4 219 //clear the mode for ow_pin
j3 138:5bd0a7a82bb4 220 ow_out_mode &= ~(0xF << (owPin * 4));
j3 138:5bd0a7a82bb4 221 //write ow_pin mode and original data back
j3 138:5bd0a7a82bb4 222 MXC_GPIO->out_mode[owPort] = (ow_out_mode | (mode << (owPin * 4)));
j3 138:5bd0a7a82bb4 223 }
j3 138:5bd0a7a82bb4 224
j3 138:5bd0a7a82bb4 225 #endif /* TARGET_MAX32600 */