Implementation of 1-Wire with added Alarm Search Functionality
Dependents: Max32630_One_Wire_Interface
OneWire_Masters/DS248x/ds248x.cpp@27:d5aaefa252f1, 2016-03-25 (annotated)
- Committer:
- IanBenzMaxim
- Date:
- Fri Mar 25 11:11:59 2016 -0500
- Revision:
- 27:d5aaefa252f1
- Parent:
- 26:a361e3f42ba5
- Child:
- 32:bce180b544ed
Do not reconfigure DS2465 if requested speed or level is already set. Use forward declarations to speed up compilation.
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
j3 | 1:91e52f8ab8bf | 1 | /******************************************************************//** |
j3 | 1:91e52f8ab8bf | 2 | * Copyright (C) 2016 Maxim Integrated Products, Inc., All Rights Reserved. |
j3 | 1:91e52f8ab8bf | 3 | * |
j3 | 1:91e52f8ab8bf | 4 | * Permission is hereby granted, free of charge, to any person obtaining a |
j3 | 1:91e52f8ab8bf | 5 | * copy of this software and associated documentation files (the "Software"), |
j3 | 1:91e52f8ab8bf | 6 | * to deal in the Software without restriction, including without limitation |
j3 | 1:91e52f8ab8bf | 7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
j3 | 1:91e52f8ab8bf | 8 | * and/or sell copies of the Software, and to permit persons to whom the |
j3 | 1:91e52f8ab8bf | 9 | * Software is furnished to do so, subject to the following conditions: |
j3 | 1:91e52f8ab8bf | 10 | * |
j3 | 1:91e52f8ab8bf | 11 | * The above copyright notice and this permission notice shall be included |
j3 | 1:91e52f8ab8bf | 12 | * in all copies or substantial portions of the Software. |
j3 | 1:91e52f8ab8bf | 13 | * |
j3 | 1:91e52f8ab8bf | 14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS |
j3 | 1:91e52f8ab8bf | 15 | * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF |
j3 | 1:91e52f8ab8bf | 16 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. |
j3 | 1:91e52f8ab8bf | 17 | * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES |
j3 | 1:91e52f8ab8bf | 18 | * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, |
j3 | 1:91e52f8ab8bf | 19 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR |
j3 | 1:91e52f8ab8bf | 20 | * OTHER DEALINGS IN THE SOFTWARE. |
j3 | 1:91e52f8ab8bf | 21 | * |
j3 | 1:91e52f8ab8bf | 22 | * Except as contained in this notice, the name of Maxim Integrated |
j3 | 1:91e52f8ab8bf | 23 | * Products, Inc. shall not be used except as stated in the Maxim Integrated |
j3 | 1:91e52f8ab8bf | 24 | * Products, Inc. Branding Policy. |
j3 | 1:91e52f8ab8bf | 25 | * |
j3 | 1:91e52f8ab8bf | 26 | * The mere transfer of this software does not imply any licenses |
j3 | 1:91e52f8ab8bf | 27 | * of trade secrets, proprietary technology, copyrights, patents, |
j3 | 1:91e52f8ab8bf | 28 | * trademarks, maskwork rights, or any other form of intellectual |
j3 | 1:91e52f8ab8bf | 29 | * property whatsoever. Maxim Integrated Products, Inc. retains all |
j3 | 1:91e52f8ab8bf | 30 | * ownership rights. |
j3 | 1:91e52f8ab8bf | 31 | **********************************************************************/ |
j3 | 1:91e52f8ab8bf | 32 | |
j3 | 1:91e52f8ab8bf | 33 | |
j3 | 1:91e52f8ab8bf | 34 | #include "ds248x.h" |
IanBenzMaxim | 27:d5aaefa252f1 | 35 | #include "RomId.hpp" |
j3 | 1:91e52f8ab8bf | 36 | |
j3 | 1:91e52f8ab8bf | 37 | |
j3 | 1:91e52f8ab8bf | 38 | //********************************************************************* |
j3 | 5:ce108eeb878d | 39 | Ds248x::Ds248x(I2C &i2c_bus, DS248X_I2C_ADRS adrs) |
j3 | 6:1faafa0b3cd7 | 40 | :_p_i2c_bus(&i2c_bus), _i2c_owner(false) |
j3 | 1:91e52f8ab8bf | 41 | { |
j3 | 6:1faafa0b3cd7 | 42 | set_i2c_adrs(adrs); |
j3 | 1:91e52f8ab8bf | 43 | } |
j3 | 1:91e52f8ab8bf | 44 | |
j3 | 1:91e52f8ab8bf | 45 | |
j3 | 1:91e52f8ab8bf | 46 | //********************************************************************* |
j3 | 5:ce108eeb878d | 47 | Ds248x::Ds248x(PinName sda, PinName scl, DS248X_I2C_ADRS adrs) |
j3 | 6:1faafa0b3cd7 | 48 | :_p_i2c_bus(new I2C(sda, scl)), _i2c_owner(true) |
j3 | 1:91e52f8ab8bf | 49 | { |
j3 | 6:1faafa0b3cd7 | 50 | set_i2c_adrs(adrs); |
j3 | 1:91e52f8ab8bf | 51 | } |
j3 | 1:91e52f8ab8bf | 52 | |
j3 | 1:91e52f8ab8bf | 53 | |
j3 | 1:91e52f8ab8bf | 54 | //********************************************************************* |
j3 | 1:91e52f8ab8bf | 55 | Ds248x::~Ds248x() |
j3 | 1:91e52f8ab8bf | 56 | { |
j3 | 5:ce108eeb878d | 57 | if(_i2c_owner) |
j3 | 1:91e52f8ab8bf | 58 | { |
j3 | 1:91e52f8ab8bf | 59 | delete _p_i2c_bus; |
j3 | 1:91e52f8ab8bf | 60 | } |
j3 | 1:91e52f8ab8bf | 61 | } |
j3 | 1:91e52f8ab8bf | 62 | |
j3 | 1:91e52f8ab8bf | 63 | |
j3 | 1:91e52f8ab8bf | 64 | //********************************************************************* |
j3 | 23:e8e403d61359 | 65 | OneWireMaster::CmdResult Ds248x::OWInitMaster(void) |
j3 | 14:7b2886a50321 | 66 | { |
j3 | 14:7b2886a50321 | 67 | return(detect()); |
j3 | 14:7b2886a50321 | 68 | } |
j3 | 14:7b2886a50321 | 69 | |
j3 | 14:7b2886a50321 | 70 | |
j3 | 14:7b2886a50321 | 71 | //********************************************************************* |
j3 | 23:e8e403d61359 | 72 | OneWireMaster::CmdResult Ds248x::detect(void) |
j3 | 2:02d228c25fd4 | 73 | { |
j3 | 23:e8e403d61359 | 74 | OneWireMaster::CmdResult result; |
j3 | 2:02d228c25fd4 | 75 | |
j3 | 2:02d228c25fd4 | 76 | // reset the ds2484 ON selected address |
j3 | 17:b646b1e3970b | 77 | result = reset(); |
j3 | 23:e8e403d61359 | 78 | if(result == OneWireMaster::Success) |
j3 | 2:02d228c25fd4 | 79 | { |
j3 | 2:02d228c25fd4 | 80 | // default configuration |
j3 | 17:b646b1e3970b | 81 | _c1WS = 0; |
j3 | 17:b646b1e3970b | 82 | _cSPU = 0; |
j3 | 17:b646b1e3970b | 83 | _cPDN = 0; |
j3 | 17:b646b1e3970b | 84 | _cAPU = 0; |
j3 | 2:02d228c25fd4 | 85 | |
j3 | 17:b646b1e3970b | 86 | result = write_config(_c1WS | _cSPU | _cPDN | _cAPU); |
j3 | 2:02d228c25fd4 | 87 | } |
j3 | 2:02d228c25fd4 | 88 | |
j3 | 17:b646b1e3970b | 89 | return result; |
j3 | 2:02d228c25fd4 | 90 | } |
j3 | 2:02d228c25fd4 | 91 | |
j3 | 2:02d228c25fd4 | 92 | |
j3 | 2:02d228c25fd4 | 93 | //********************************************************************* |
j3 | 23:e8e403d61359 | 94 | OneWireMaster::CmdResult Ds248x::reset(void) |
j3 | 1:91e52f8ab8bf | 95 | { |
j3 | 23:e8e403d61359 | 96 | OneWireMaster::CmdResult result; |
j3 | 17:b646b1e3970b | 97 | |
j3 | 2:02d228c25fd4 | 98 | char status; |
j3 | 2:02d228c25fd4 | 99 | char packet[] = {CMD_DRST}; |
j3 | 2:02d228c25fd4 | 100 | |
j3 | 2:02d228c25fd4 | 101 | // Device Reset |
j3 | 2:02d228c25fd4 | 102 | // S AD,0 [A] DRST [A] Sr AD,1 [A] [SS] A\ P |
j3 | 2:02d228c25fd4 | 103 | // [] indicates from slave |
j3 | 2:02d228c25fd4 | 104 | // SS status byte to read to verify state |
j3 | 2:02d228c25fd4 | 105 | |
j3 | 17:b646b1e3970b | 106 | if(_p_i2c_bus->write(_w_adrs, packet, 1) != I2C_WRITE_OK) |
j3 | 17:b646b1e3970b | 107 | { |
j3 | 23:e8e403d61359 | 108 | result = OneWireMaster::CommunicationWriteError; |
j3 | 17:b646b1e3970b | 109 | } |
j3 | 17:b646b1e3970b | 110 | else |
j3 | 17:b646b1e3970b | 111 | { |
j3 | 17:b646b1e3970b | 112 | if(_p_i2c_bus->read(_r_adrs, &status, 1) != I2C_READ_OK) |
j3 | 17:b646b1e3970b | 113 | { |
j3 | 23:e8e403d61359 | 114 | result = OneWireMaster::CommunicationReadError; |
j3 | 17:b646b1e3970b | 115 | } |
j3 | 17:b646b1e3970b | 116 | else |
j3 | 17:b646b1e3970b | 117 | { |
j3 | 17:b646b1e3970b | 118 | if((status & 0xF7) == 0x10) |
j3 | 17:b646b1e3970b | 119 | { |
j3 | 23:e8e403d61359 | 120 | result = OneWireMaster::Success; |
j3 | 17:b646b1e3970b | 121 | } |
j3 | 17:b646b1e3970b | 122 | else |
j3 | 17:b646b1e3970b | 123 | { |
j3 | 23:e8e403d61359 | 124 | result = OneWireMaster::OperationFailure; |
j3 | 17:b646b1e3970b | 125 | } |
j3 | 17:b646b1e3970b | 126 | } |
j3 | 17:b646b1e3970b | 127 | } |
j3 | 2:02d228c25fd4 | 128 | |
j3 | 17:b646b1e3970b | 129 | return result; |
j3 | 2:02d228c25fd4 | 130 | } |
j3 | 2:02d228c25fd4 | 131 | |
j3 | 2:02d228c25fd4 | 132 | |
j3 | 2:02d228c25fd4 | 133 | //********************************************************************* |
j3 | 23:e8e403d61359 | 134 | OneWireMaster::CmdResult Ds248x::write_config(uint8_t config) |
j3 | 2:02d228c25fd4 | 135 | { |
j3 | 23:e8e403d61359 | 136 | OneWireMaster::CmdResult result; |
j3 | 17:b646b1e3970b | 137 | |
j3 | 2:02d228c25fd4 | 138 | char read_config; |
j3 | 2:02d228c25fd4 | 139 | char packet [] = {CMD_WCFG, (config | (~config << 4))}; |
j3 | 2:02d228c25fd4 | 140 | |
j3 | 17:b646b1e3970b | 141 | if(_p_i2c_bus->write(_w_adrs, packet, 2) != I2C_WRITE_OK) |
j3 | 2:02d228c25fd4 | 142 | { |
j3 | 23:e8e403d61359 | 143 | result = OneWireMaster::CommunicationWriteError; |
j3 | 2:02d228c25fd4 | 144 | } |
j3 | 2:02d228c25fd4 | 145 | else |
j3 | 2:02d228c25fd4 | 146 | { |
j3 | 17:b646b1e3970b | 147 | if(_p_i2c_bus->read(_r_adrs, &read_config, 1) != I2C_READ_OK) |
j3 | 17:b646b1e3970b | 148 | { |
j3 | 23:e8e403d61359 | 149 | result = OneWireMaster::CommunicationReadError; |
j3 | 17:b646b1e3970b | 150 | } |
j3 | 17:b646b1e3970b | 151 | else |
j3 | 17:b646b1e3970b | 152 | { |
j3 | 17:b646b1e3970b | 153 | // check for failure due to incorrect read back |
j3 | 17:b646b1e3970b | 154 | if (config != read_config) |
j3 | 17:b646b1e3970b | 155 | { |
j3 | 17:b646b1e3970b | 156 | reset(); |
j3 | 23:e8e403d61359 | 157 | result = OneWireMaster::OperationFailure; |
j3 | 17:b646b1e3970b | 158 | } |
j3 | 17:b646b1e3970b | 159 | else |
j3 | 17:b646b1e3970b | 160 | { |
j3 | 23:e8e403d61359 | 161 | result = OneWireMaster::Success; |
j3 | 17:b646b1e3970b | 162 | } |
j3 | 17:b646b1e3970b | 163 | } |
j3 | 2:02d228c25fd4 | 164 | } |
j3 | 2:02d228c25fd4 | 165 | |
j3 | 17:b646b1e3970b | 166 | return result; |
j3 | 1:91e52f8ab8bf | 167 | } |
j3 | 1:91e52f8ab8bf | 168 | |
j3 | 1:91e52f8ab8bf | 169 | |
j3 | 1:91e52f8ab8bf | 170 | //********************************************************************* |
j3 | 23:e8e403d61359 | 171 | OneWireMaster::CmdResult Ds248x::channel_select(uint8_t channel) |
j3 | 1:91e52f8ab8bf | 172 | { |
j3 | 23:e8e403d61359 | 173 | OneWireMaster::CmdResult result; |
j3 | 2:02d228c25fd4 | 174 | |
j3 | 2:02d228c25fd4 | 175 | char ch, ch_read, check; |
j3 | 2:02d228c25fd4 | 176 | char packet [2]; |
j3 | 2:02d228c25fd4 | 177 | |
j3 | 2:02d228c25fd4 | 178 | packet[0] = CMD_CHSL; |
j3 | 2:02d228c25fd4 | 179 | |
j3 | 2:02d228c25fd4 | 180 | // Channel Select (Case A) |
j3 | 2:02d228c25fd4 | 181 | // S AD,0 [A] CHSL [A] CC [A] Sr AD,1 [A] [RR] A\ P |
j3 | 2:02d228c25fd4 | 182 | // [] indicates from slave |
j3 | 2:02d228c25fd4 | 183 | // CC channel value |
j3 | 2:02d228c25fd4 | 184 | // RR channel read back |
j3 | 2:02d228c25fd4 | 185 | |
j3 | 2:02d228c25fd4 | 186 | switch (channel) |
j3 | 2:02d228c25fd4 | 187 | { |
j3 | 2:02d228c25fd4 | 188 | default: case 0: ch = 0xF0; ch_read = 0xB8; break; |
j3 | 2:02d228c25fd4 | 189 | case 1: ch = 0xE1; ch_read = 0xB1; break; |
j3 | 2:02d228c25fd4 | 190 | case 2: ch = 0xD2; ch_read = 0xAA; break; |
j3 | 2:02d228c25fd4 | 191 | case 3: ch = 0xC3; ch_read = 0xA3; break; |
j3 | 2:02d228c25fd4 | 192 | case 4: ch = 0xB4; ch_read = 0x9C; break; |
j3 | 2:02d228c25fd4 | 193 | case 5: ch = 0xA5; ch_read = 0x95; break; |
j3 | 2:02d228c25fd4 | 194 | case 6: ch = 0x96; ch_read = 0x8E; break; |
j3 | 2:02d228c25fd4 | 195 | case 7: ch = 0x87; ch_read = 0x87; break; |
j3 | 2:02d228c25fd4 | 196 | }; |
j3 | 2:02d228c25fd4 | 197 | |
j3 | 2:02d228c25fd4 | 198 | packet[1] = ch; |
j3 | 2:02d228c25fd4 | 199 | |
j3 | 17:b646b1e3970b | 200 | if(_p_i2c_bus->write(_w_adrs, packet, 2) != I2C_WRITE_OK) |
j3 | 17:b646b1e3970b | 201 | { |
j3 | 23:e8e403d61359 | 202 | result = OneWireMaster::CommunicationWriteError; |
j3 | 17:b646b1e3970b | 203 | } |
j3 | 17:b646b1e3970b | 204 | else |
j3 | 17:b646b1e3970b | 205 | { |
j3 | 17:b646b1e3970b | 206 | if(_p_i2c_bus->read(_r_adrs, &check, 1) != I2C_READ_OK) |
j3 | 17:b646b1e3970b | 207 | { |
j3 | 23:e8e403d61359 | 208 | result = OneWireMaster::CommunicationReadError; |
j3 | 17:b646b1e3970b | 209 | } |
j3 | 17:b646b1e3970b | 210 | else |
j3 | 17:b646b1e3970b | 211 | { |
j3 | 17:b646b1e3970b | 212 | // check for failure due to incorrect read back of channel |
j3 | 17:b646b1e3970b | 213 | if (check == ch_read) |
j3 | 17:b646b1e3970b | 214 | { |
j3 | 23:e8e403d61359 | 215 | result = OneWireMaster::Success; |
j3 | 17:b646b1e3970b | 216 | } |
j3 | 17:b646b1e3970b | 217 | else |
j3 | 17:b646b1e3970b | 218 | { |
j3 | 23:e8e403d61359 | 219 | result = OneWireMaster::OperationFailure; |
j3 | 17:b646b1e3970b | 220 | } |
j3 | 17:b646b1e3970b | 221 | } |
j3 | 17:b646b1e3970b | 222 | } |
j3 | 2:02d228c25fd4 | 223 | |
j3 | 17:b646b1e3970b | 224 | return result; |
j3 | 2:02d228c25fd4 | 225 | } |
j3 | 2:02d228c25fd4 | 226 | |
j3 | 2:02d228c25fd4 | 227 | |
j3 | 2:02d228c25fd4 | 228 | //********************************************************************* |
j3 | 23:e8e403d61359 | 229 | OneWireMaster::CmdResult Ds248x::adjust_timing(uint8_t param, uint8_t val) |
j3 | 2:02d228c25fd4 | 230 | { |
j3 | 23:e8e403d61359 | 231 | OneWireMaster::CmdResult result; |
j3 | 17:b646b1e3970b | 232 | |
j3 | 2:02d228c25fd4 | 233 | char read_port_config; |
j3 | 2:02d228c25fd4 | 234 | char control_byte; |
j3 | 2:02d228c25fd4 | 235 | |
j3 | 2:02d228c25fd4 | 236 | control_byte = (((param & 0x0F) << 4) | (val & 0x0F)); |
j3 | 2:02d228c25fd4 | 237 | |
j3 | 2:02d228c25fd4 | 238 | char packet [] = {CMD_A1WP, control_byte}; |
j3 | 2:02d228c25fd4 | 239 | |
j3 | 17:b646b1e3970b | 240 | if(_p_i2c_bus->write(_w_adrs, packet, 2) != I2C_WRITE_OK) |
j3 | 17:b646b1e3970b | 241 | { |
j3 | 23:e8e403d61359 | 242 | result = OneWireMaster::CommunicationWriteError; |
j3 | 17:b646b1e3970b | 243 | } |
j3 | 17:b646b1e3970b | 244 | else |
j3 | 2:02d228c25fd4 | 245 | { |
j3 | 17:b646b1e3970b | 246 | if(_p_i2c_bus->read(_r_adrs, &read_port_config, 1) != I2C_READ_OK) |
j3 | 17:b646b1e3970b | 247 | { |
j3 | 23:e8e403d61359 | 248 | result = OneWireMaster::CommunicationReadError; |
j3 | 17:b646b1e3970b | 249 | } |
j3 | 17:b646b1e3970b | 250 | else |
j3 | 17:b646b1e3970b | 251 | { |
j3 | 17:b646b1e3970b | 252 | // check for failure due to incorrect read back |
j3 | 17:b646b1e3970b | 253 | if ((control_byte & 0x0F) != read_port_config) |
j3 | 17:b646b1e3970b | 254 | { |
j3 | 23:e8e403d61359 | 255 | result = OneWireMaster::OperationFailure; |
j3 | 17:b646b1e3970b | 256 | reset(); |
j3 | 17:b646b1e3970b | 257 | } |
j3 | 17:b646b1e3970b | 258 | else |
j3 | 17:b646b1e3970b | 259 | { |
j3 | 23:e8e403d61359 | 260 | result = OneWireMaster::Success; |
j3 | 17:b646b1e3970b | 261 | } |
j3 | 17:b646b1e3970b | 262 | } |
j3 | 2:02d228c25fd4 | 263 | } |
j3 | 17:b646b1e3970b | 264 | |
j3 | 17:b646b1e3970b | 265 | return result; |
j3 | 1:91e52f8ab8bf | 266 | } |
j3 | 1:91e52f8ab8bf | 267 | |
j3 | 1:91e52f8ab8bf | 268 | |
j3 | 1:91e52f8ab8bf | 269 | //********************************************************************* |
j3 | 23:e8e403d61359 | 270 | OneWireMaster::CmdResult Ds248x::search_triplet(uint8_t search_direction, uint8_t & status) |
j3 | 1:91e52f8ab8bf | 271 | { |
j3 | 23:e8e403d61359 | 272 | OneWireMaster::CmdResult result; |
j3 | 17:b646b1e3970b | 273 | |
j3 | 2:02d228c25fd4 | 274 | uint8_t poll_count = 0; |
j3 | 2:02d228c25fd4 | 275 | char packet [] = {CMD_1WT, search_direction ? 0x80 : 0x00}; |
j3 | 17:b646b1e3970b | 276 | char read_data; |
j3 | 2:02d228c25fd4 | 277 | |
j3 | 2:02d228c25fd4 | 278 | // 1-Wire Triplet (Case B) |
j3 | 2:02d228c25fd4 | 279 | // S AD,0 [A] 1WT [A] SS [A] Sr AD,1 [A] [Status] A [Status] A\ P |
j3 | 2:02d228c25fd4 | 280 | // \--------/ |
j3 | 2:02d228c25fd4 | 281 | // Repeat until 1WB bit has changed to 0 |
j3 | 2:02d228c25fd4 | 282 | // [] indicates from slave |
j3 | 2:02d228c25fd4 | 283 | // SS indicates byte containing search direction bit value in msbit |
j3 | 2:02d228c25fd4 | 284 | |
j3 | 17:b646b1e3970b | 285 | if(_p_i2c_bus->write(_w_adrs, packet, 2) != I2C_WRITE_OK) |
j3 | 2:02d228c25fd4 | 286 | { |
j3 | 23:e8e403d61359 | 287 | result = OneWireMaster::CommunicationWriteError; |
j3 | 2:02d228c25fd4 | 288 | } |
j3 | 2:02d228c25fd4 | 289 | else |
j3 | 2:02d228c25fd4 | 290 | { |
j3 | 17:b646b1e3970b | 291 | // loop checking 1WB bit for completion of 1-Wire operation |
j3 | 17:b646b1e3970b | 292 | // abort if poll limit reached |
j3 | 17:b646b1e3970b | 293 | |
j3 | 17:b646b1e3970b | 294 | //dummy write for loop |
j3 | 23:e8e403d61359 | 295 | result = OneWireMaster::Success; //so far |
j3 | 17:b646b1e3970b | 296 | do |
j3 | 17:b646b1e3970b | 297 | { |
j3 | 17:b646b1e3970b | 298 | if(_p_i2c_bus->read(_r_adrs, &read_data, 1) != I2C_READ_OK) |
j3 | 17:b646b1e3970b | 299 | { |
j3 | 23:e8e403d61359 | 300 | result = OneWireMaster::CommunicationReadError; |
j3 | 17:b646b1e3970b | 301 | } |
j3 | 17:b646b1e3970b | 302 | } |
j3 | 23:e8e403d61359 | 303 | while ((read_data & STATUS_1WB) && (poll_count++ < POLL_LIMIT) && (result != OneWireMaster::CommunicationReadError)); |
j3 | 17:b646b1e3970b | 304 | |
j3 | 23:e8e403d61359 | 305 | if((result == OneWireMaster::CommunicationReadError) || (poll_count >= POLL_LIMIT)) |
j3 | 17:b646b1e3970b | 306 | { |
j3 | 17:b646b1e3970b | 307 | // check for failure due to poll limit reached |
j3 | 17:b646b1e3970b | 308 | if(poll_count >= POLL_LIMIT) |
j3 | 17:b646b1e3970b | 309 | { |
j3 | 17:b646b1e3970b | 310 | // handle error |
j3 | 17:b646b1e3970b | 311 | // ... |
j3 | 17:b646b1e3970b | 312 | reset(); |
j3 | 23:e8e403d61359 | 313 | result = OneWireMaster::TimeoutError; |
j3 | 17:b646b1e3970b | 314 | } |
j3 | 17:b646b1e3970b | 315 | } |
j3 | 17:b646b1e3970b | 316 | else |
j3 | 17:b646b1e3970b | 317 | { |
j3 | 17:b646b1e3970b | 318 | status = read_data; |
j3 | 23:e8e403d61359 | 319 | result = OneWireMaster::Success; |
j3 | 17:b646b1e3970b | 320 | } |
j3 | 2:02d228c25fd4 | 321 | } |
j3 | 17:b646b1e3970b | 322 | |
j3 | 17:b646b1e3970b | 323 | return result; |
j3 | 1:91e52f8ab8bf | 324 | } |
j3 | 1:91e52f8ab8bf | 325 | |
j3 | 1:91e52f8ab8bf | 326 | |
j3 | 1:91e52f8ab8bf | 327 | //********************************************************************* |
j3 | 23:e8e403d61359 | 328 | OneWireMaster::CmdResult Ds248x::OWReset(void) |
j3 | 2:02d228c25fd4 | 329 | { |
j3 | 23:e8e403d61359 | 330 | OneWireMaster::CmdResult result; |
j3 | 2:02d228c25fd4 | 331 | |
j3 | 2:02d228c25fd4 | 332 | uint8_t poll_count = 0; |
j3 | 2:02d228c25fd4 | 333 | char status; |
j3 | 2:02d228c25fd4 | 334 | char packet [] = {CMD_1WRS}; |
j3 | 1:91e52f8ab8bf | 335 | |
j3 | 2:02d228c25fd4 | 336 | // 1-Wire reset (Case B) |
j3 | 2:02d228c25fd4 | 337 | // S AD,0 [A] 1WRS [A] Sr AD,1 [A] [Status] A [Status] A\ P |
j3 | 2:02d228c25fd4 | 338 | // \--------/ |
j3 | 2:02d228c25fd4 | 339 | // Repeat until 1WB bit has changed to 0 |
j3 | 2:02d228c25fd4 | 340 | // [] indicates from slave |
j3 | 2:02d228c25fd4 | 341 | |
j3 | 17:b646b1e3970b | 342 | if(_p_i2c_bus->write(_w_adrs, packet, 1) != I2C_WRITE_OK) |
j3 | 2:02d228c25fd4 | 343 | { |
j3 | 23:e8e403d61359 | 344 | result = OneWireMaster::CommunicationWriteError; |
j3 | 2:02d228c25fd4 | 345 | } |
j3 | 2:02d228c25fd4 | 346 | else |
j3 | 2:02d228c25fd4 | 347 | { |
j3 | 17:b646b1e3970b | 348 | // loop checking 1WB bit for completion of 1-Wire operation |
j3 | 17:b646b1e3970b | 349 | // abort if poll limit reached |
j3 | 17:b646b1e3970b | 350 | //dummy write for loop |
j3 | 23:e8e403d61359 | 351 | result = OneWireMaster::Success; //so far |
j3 | 17:b646b1e3970b | 352 | do |
j3 | 2:02d228c25fd4 | 353 | { |
j3 | 17:b646b1e3970b | 354 | if(_p_i2c_bus->read(_r_adrs, &status, 1) != I2C_READ_OK) |
j3 | 17:b646b1e3970b | 355 | { |
j3 | 23:e8e403d61359 | 356 | result = OneWireMaster::CommunicationReadError; |
j3 | 17:b646b1e3970b | 357 | } |
j3 | 17:b646b1e3970b | 358 | } |
j3 | 23:e8e403d61359 | 359 | while ((status & STATUS_1WB) && (poll_count++ < POLL_LIMIT) && (result != OneWireMaster::CommunicationReadError)); |
j3 | 17:b646b1e3970b | 360 | |
j3 | 23:e8e403d61359 | 361 | if((result == OneWireMaster::CommunicationReadError) || (poll_count >= POLL_LIMIT)) |
j3 | 17:b646b1e3970b | 362 | { |
j3 | 17:b646b1e3970b | 363 | // check for failure due to poll limit reached |
j3 | 17:b646b1e3970b | 364 | if(poll_count >= POLL_LIMIT) |
j3 | 17:b646b1e3970b | 365 | { |
j3 | 17:b646b1e3970b | 366 | // handle error |
j3 | 17:b646b1e3970b | 367 | // ... |
j3 | 17:b646b1e3970b | 368 | reset(); |
j3 | 23:e8e403d61359 | 369 | result = OneWireMaster::TimeoutError; |
j3 | 17:b646b1e3970b | 370 | } |
j3 | 2:02d228c25fd4 | 371 | } |
j3 | 2:02d228c25fd4 | 372 | else |
j3 | 2:02d228c25fd4 | 373 | { |
j3 | 17:b646b1e3970b | 374 | // check for short condition |
j3 | 17:b646b1e3970b | 375 | if (status & STATUS_SD) |
j3 | 17:b646b1e3970b | 376 | { |
j3 | 17:b646b1e3970b | 377 | _short_detected = true; |
j3 | 17:b646b1e3970b | 378 | } |
j3 | 17:b646b1e3970b | 379 | else |
j3 | 17:b646b1e3970b | 380 | { |
j3 | 17:b646b1e3970b | 381 | _short_detected = false; |
j3 | 17:b646b1e3970b | 382 | } |
j3 | 17:b646b1e3970b | 383 | |
j3 | 17:b646b1e3970b | 384 | // check for presence detect |
j3 | 17:b646b1e3970b | 385 | if (status & STATUS_PPD) |
j3 | 17:b646b1e3970b | 386 | { |
j3 | 23:e8e403d61359 | 387 | result = OneWireMaster::Success; |
j3 | 17:b646b1e3970b | 388 | } |
j3 | 17:b646b1e3970b | 389 | else |
j3 | 17:b646b1e3970b | 390 | { |
j3 | 23:e8e403d61359 | 391 | result = OneWireMaster::OperationFailure; |
j3 | 17:b646b1e3970b | 392 | } |
j3 | 2:02d228c25fd4 | 393 | } |
j3 | 2:02d228c25fd4 | 394 | } |
j3 | 17:b646b1e3970b | 395 | |
j3 | 17:b646b1e3970b | 396 | return result; |
j3 | 1:91e52f8ab8bf | 397 | } |
j3 | 1:91e52f8ab8bf | 398 | |
j3 | 1:91e52f8ab8bf | 399 | |
j3 | 1:91e52f8ab8bf | 400 | //********************************************************************* |
IanBenzMaxim | 26:a361e3f42ba5 | 401 | OneWireMaster::CmdResult Ds248x::OWTouchBit(uint8_t & sendrecvbit, OW_LEVEL after_level) |
j3 | 1:91e52f8ab8bf | 402 | { |
j3 | 23:e8e403d61359 | 403 | OneWireMaster::CmdResult result; |
j3 | 17:b646b1e3970b | 404 | |
IanBenzMaxim | 26:a361e3f42ba5 | 405 | result = ConfigureSPU(after_level == LEVEL_STRONG); |
IanBenzMaxim | 26:a361e3f42ba5 | 406 | if (result != OneWireMaster::Success) |
IanBenzMaxim | 26:a361e3f42ba5 | 407 | return result; |
IanBenzMaxim | 26:a361e3f42ba5 | 408 | |
j3 | 2:02d228c25fd4 | 409 | uint8_t poll_count = 0; |
j3 | 2:02d228c25fd4 | 410 | char status; |
j3 | 17:b646b1e3970b | 411 | char packet[] = {CMD_1WSB, sendrecvbit ? 0x80 : 0x00}; |
j3 | 2:02d228c25fd4 | 412 | |
j3 | 2:02d228c25fd4 | 413 | // 1-Wire bit (Case B) |
j3 | 2:02d228c25fd4 | 414 | // S AD,0 [A] 1WSB [A] BB [A] Sr AD,1 [A] [Status] A [Status] A\ P |
j3 | 2:02d228c25fd4 | 415 | // \--------/ |
j3 | 2:02d228c25fd4 | 416 | // Repeat until 1WB bit has changed to 0 |
j3 | 2:02d228c25fd4 | 417 | // [] indicates from slave |
j3 | 2:02d228c25fd4 | 418 | // BB indicates byte containing bit value in msbit |
j3 | 2:02d228c25fd4 | 419 | |
j3 | 17:b646b1e3970b | 420 | if(_p_i2c_bus->write(_w_adrs, packet, 2) != I2C_WRITE_OK) |
j3 | 2:02d228c25fd4 | 421 | { |
j3 | 23:e8e403d61359 | 422 | result = OneWireMaster::CommunicationWriteError; |
j3 | 2:02d228c25fd4 | 423 | } |
j3 | 2:02d228c25fd4 | 424 | else |
j3 | 2:02d228c25fd4 | 425 | { |
j3 | 17:b646b1e3970b | 426 | // loop checking 1WB bit for completion of 1-Wire operation |
j3 | 17:b646b1e3970b | 427 | // abort if poll limit reached |
j3 | 17:b646b1e3970b | 428 | //dummy write for loop |
j3 | 23:e8e403d61359 | 429 | result = OneWireMaster::Success; //so far |
j3 | 17:b646b1e3970b | 430 | do |
j3 | 2:02d228c25fd4 | 431 | { |
j3 | 17:b646b1e3970b | 432 | if(_p_i2c_bus->read(_r_adrs, &status, 1) != I2C_READ_OK) |
j3 | 17:b646b1e3970b | 433 | { |
j3 | 23:e8e403d61359 | 434 | result = OneWireMaster::CommunicationReadError; |
j3 | 17:b646b1e3970b | 435 | } |
j3 | 17:b646b1e3970b | 436 | } |
j3 | 23:e8e403d61359 | 437 | while ((status & STATUS_1WB) && (poll_count++ < POLL_LIMIT) && (result != OneWireMaster::CommunicationReadError)); |
j3 | 17:b646b1e3970b | 438 | |
j3 | 23:e8e403d61359 | 439 | if((result == OneWireMaster::CommunicationReadError) || (poll_count >= POLL_LIMIT)) |
j3 | 17:b646b1e3970b | 440 | { |
j3 | 17:b646b1e3970b | 441 | // check for failure due to poll limit reached |
j3 | 17:b646b1e3970b | 442 | if (poll_count >= POLL_LIMIT) |
j3 | 17:b646b1e3970b | 443 | { |
j3 | 17:b646b1e3970b | 444 | // handle error |
j3 | 17:b646b1e3970b | 445 | // ... |
j3 | 17:b646b1e3970b | 446 | reset(); |
j3 | 23:e8e403d61359 | 447 | result = OneWireMaster::TimeoutError; |
j3 | 17:b646b1e3970b | 448 | } |
j3 | 2:02d228c25fd4 | 449 | } |
j3 | 2:02d228c25fd4 | 450 | else |
j3 | 2:02d228c25fd4 | 451 | { |
j3 | 17:b646b1e3970b | 452 | // return bit state through out param |
j3 | 17:b646b1e3970b | 453 | if (status & STATUS_SBR) |
j3 | 17:b646b1e3970b | 454 | { |
j3 | 17:b646b1e3970b | 455 | sendrecvbit = 1; |
j3 | 17:b646b1e3970b | 456 | |
j3 | 17:b646b1e3970b | 457 | } |
j3 | 17:b646b1e3970b | 458 | else |
j3 | 17:b646b1e3970b | 459 | { |
j3 | 17:b646b1e3970b | 460 | sendrecvbit = 0; |
j3 | 17:b646b1e3970b | 461 | } |
j3 | 23:e8e403d61359 | 462 | result = OneWireMaster::Success; |
j3 | 2:02d228c25fd4 | 463 | } |
j3 | 2:02d228c25fd4 | 464 | } |
j3 | 17:b646b1e3970b | 465 | |
j3 | 17:b646b1e3970b | 466 | return result; |
j3 | 1:91e52f8ab8bf | 467 | } |
j3 | 1:91e52f8ab8bf | 468 | |
j3 | 1:91e52f8ab8bf | 469 | |
j3 | 1:91e52f8ab8bf | 470 | //********************************************************************* |
IanBenzMaxim | 26:a361e3f42ba5 | 471 | OneWireMaster::CmdResult Ds248x::OWWriteByte(uint8_t sendbyte, OW_LEVEL after_level) |
j3 | 1:91e52f8ab8bf | 472 | { |
j3 | 23:e8e403d61359 | 473 | OneWireMaster::CmdResult result; |
j3 | 1:91e52f8ab8bf | 474 | |
IanBenzMaxim | 26:a361e3f42ba5 | 475 | result = ConfigureSPU(after_level == LEVEL_STRONG); |
IanBenzMaxim | 26:a361e3f42ba5 | 476 | if (result != OneWireMaster::Success) |
IanBenzMaxim | 26:a361e3f42ba5 | 477 | return result; |
IanBenzMaxim | 26:a361e3f42ba5 | 478 | |
j3 | 2:02d228c25fd4 | 479 | uint8_t poll_count = 0; |
j3 | 2:02d228c25fd4 | 480 | char status; |
j3 | 2:02d228c25fd4 | 481 | char packet [] = {CMD_1WWB, sendbyte}; |
j3 | 2:02d228c25fd4 | 482 | |
j3 | 2:02d228c25fd4 | 483 | // 1-Wire Write Byte (Case B) |
j3 | 2:02d228c25fd4 | 484 | // S AD,0 [A] 1WWB [A] DD [A] Sr AD,1 [A] [Status] A [Status] A\ P |
j3 | 2:02d228c25fd4 | 485 | // \--------/ |
j3 | 2:02d228c25fd4 | 486 | // Repeat until 1WB bit has changed to 0 |
j3 | 2:02d228c25fd4 | 487 | // [] indicates from slave |
j3 | 2:02d228c25fd4 | 488 | // DD data to write |
j3 | 2:02d228c25fd4 | 489 | |
j3 | 17:b646b1e3970b | 490 | if(_p_i2c_bus->write(_w_adrs, packet, 2) != I2C_WRITE_OK) |
j3 | 2:02d228c25fd4 | 491 | { |
j3 | 23:e8e403d61359 | 492 | result = OneWireMaster::CommunicationWriteError; |
j3 | 2:02d228c25fd4 | 493 | } |
j3 | 2:02d228c25fd4 | 494 | else |
j3 | 2:02d228c25fd4 | 495 | { |
j3 | 17:b646b1e3970b | 496 | // loop checking 1WB bit for completion of 1-Wire operation |
j3 | 17:b646b1e3970b | 497 | // abort if poll limit reached |
j3 | 17:b646b1e3970b | 498 | //dummy write for loop |
j3 | 23:e8e403d61359 | 499 | result = OneWireMaster::Success; //so far |
j3 | 17:b646b1e3970b | 500 | do |
j3 | 17:b646b1e3970b | 501 | { |
j3 | 17:b646b1e3970b | 502 | if(_p_i2c_bus->read(_r_adrs, &status, 1) != I2C_READ_OK) |
j3 | 17:b646b1e3970b | 503 | { |
j3 | 23:e8e403d61359 | 504 | result = OneWireMaster::CommunicationReadError; |
j3 | 17:b646b1e3970b | 505 | } |
j3 | 17:b646b1e3970b | 506 | } |
j3 | 23:e8e403d61359 | 507 | while ((status & STATUS_1WB) && (poll_count++ < POLL_LIMIT) && (result != OneWireMaster::CommunicationReadError)); |
j3 | 17:b646b1e3970b | 508 | |
j3 | 23:e8e403d61359 | 509 | if((result == OneWireMaster::CommunicationReadError) || (poll_count >= POLL_LIMIT)) |
j3 | 17:b646b1e3970b | 510 | { |
j3 | 17:b646b1e3970b | 511 | // check for failure due to poll limit reached |
j3 | 17:b646b1e3970b | 512 | if (poll_count >= POLL_LIMIT) |
j3 | 17:b646b1e3970b | 513 | { |
j3 | 17:b646b1e3970b | 514 | // handle error |
j3 | 17:b646b1e3970b | 515 | // ... |
j3 | 17:b646b1e3970b | 516 | reset(); |
j3 | 23:e8e403d61359 | 517 | result = OneWireMaster::TimeoutError; |
j3 | 17:b646b1e3970b | 518 | } |
j3 | 17:b646b1e3970b | 519 | } |
j3 | 17:b646b1e3970b | 520 | else |
j3 | 17:b646b1e3970b | 521 | { |
j3 | 23:e8e403d61359 | 522 | result = OneWireMaster::Success; |
j3 | 17:b646b1e3970b | 523 | } |
j3 | 2:02d228c25fd4 | 524 | } |
j3 | 2:02d228c25fd4 | 525 | |
j3 | 17:b646b1e3970b | 526 | return result; |
j3 | 1:91e52f8ab8bf | 527 | } |
j3 | 1:91e52f8ab8bf | 528 | |
j3 | 1:91e52f8ab8bf | 529 | |
j3 | 1:91e52f8ab8bf | 530 | //********************************************************************* |
IanBenzMaxim | 26:a361e3f42ba5 | 531 | OneWireMaster::CmdResult Ds248x::OWReadByte(uint8_t & recvbyte, OW_LEVEL after_level) |
j3 | 1:91e52f8ab8bf | 532 | { |
j3 | 23:e8e403d61359 | 533 | OneWireMaster::CmdResult result; |
j3 | 2:02d228c25fd4 | 534 | |
IanBenzMaxim | 26:a361e3f42ba5 | 535 | if (after_level == LEVEL_STRONG) // Enabling strong pull-up after a Read Byte command is not supported natively by the DS248x |
j3 | 2:02d228c25fd4 | 536 | { |
IanBenzMaxim | 26:a361e3f42ba5 | 537 | uint8_t recvbit; |
IanBenzMaxim | 26:a361e3f42ba5 | 538 | recvbyte = 0; |
IanBenzMaxim | 26:a361e3f42ba5 | 539 | |
IanBenzMaxim | 26:a361e3f42ba5 | 540 | for (unsigned int i = 1; i <= 8; i++) |
IanBenzMaxim | 26:a361e3f42ba5 | 541 | { |
IanBenzMaxim | 26:a361e3f42ba5 | 542 | // Set strong pull-up on last bit |
IanBenzMaxim | 26:a361e3f42ba5 | 543 | result = OWReadBit(recvbit, (i == 8 ? LEVEL_STRONG : LEVEL_NORMAL)); |
IanBenzMaxim | 26:a361e3f42ba5 | 544 | if (result != Success) |
IanBenzMaxim | 26:a361e3f42ba5 | 545 | break; |
IanBenzMaxim | 26:a361e3f42ba5 | 546 | recvbyte = (recvbyte << 1) | recvbit; |
IanBenzMaxim | 26:a361e3f42ba5 | 547 | } |
j3 | 2:02d228c25fd4 | 548 | } |
j3 | 2:02d228c25fd4 | 549 | else |
j3 | 2:02d228c25fd4 | 550 | { |
IanBenzMaxim | 26:a361e3f42ba5 | 551 | uint8_t poll_count = 0; |
IanBenzMaxim | 26:a361e3f42ba5 | 552 | char data, status; |
IanBenzMaxim | 26:a361e3f42ba5 | 553 | char packet[2] = {CMD_1WRB, 0}; |
IanBenzMaxim | 26:a361e3f42ba5 | 554 | |
IanBenzMaxim | 26:a361e3f42ba5 | 555 | // 1-Wire Read Bytes (Case C) |
IanBenzMaxim | 26:a361e3f42ba5 | 556 | // S AD,0 [A] 1WRB [A] Sr AD,1 [A] [Status] A [Status] A\ |
IanBenzMaxim | 26:a361e3f42ba5 | 557 | // \--------/ |
IanBenzMaxim | 26:a361e3f42ba5 | 558 | // Repeat until 1WB bit has changed to 0 |
IanBenzMaxim | 26:a361e3f42ba5 | 559 | // Sr AD,0 [A] SRP [A] E1 [A] Sr AD,1 [A] DD A\ P |
IanBenzMaxim | 26:a361e3f42ba5 | 560 | // |
IanBenzMaxim | 26:a361e3f42ba5 | 561 | // [] indicates from slave |
IanBenzMaxim | 26:a361e3f42ba5 | 562 | // DD data read |
IanBenzMaxim | 26:a361e3f42ba5 | 563 | |
IanBenzMaxim | 26:a361e3f42ba5 | 564 | if(_p_i2c_bus->write(_w_adrs, packet, 1) != I2C_WRITE_OK) |
j3 | 17:b646b1e3970b | 565 | { |
IanBenzMaxim | 26:a361e3f42ba5 | 566 | result = OneWireMaster::CommunicationWriteError; |
j3 | 17:b646b1e3970b | 567 | } |
j3 | 17:b646b1e3970b | 568 | else |
j3 | 17:b646b1e3970b | 569 | { |
IanBenzMaxim | 26:a361e3f42ba5 | 570 | // loop checking 1WB bit for completion of 1-Wire operation |
IanBenzMaxim | 26:a361e3f42ba5 | 571 | // abort if poll limit reached |
IanBenzMaxim | 26:a361e3f42ba5 | 572 | //dummy write for loop |
IanBenzMaxim | 26:a361e3f42ba5 | 573 | result = OneWireMaster::Success; //so far |
IanBenzMaxim | 26:a361e3f42ba5 | 574 | do |
j3 | 17:b646b1e3970b | 575 | { |
IanBenzMaxim | 26:a361e3f42ba5 | 576 | if(_p_i2c_bus->read(_r_adrs, &status, 1) != I2C_READ_OK) |
IanBenzMaxim | 26:a361e3f42ba5 | 577 | { |
IanBenzMaxim | 26:a361e3f42ba5 | 578 | result = OneWireMaster::CommunicationReadError; |
IanBenzMaxim | 26:a361e3f42ba5 | 579 | } |
IanBenzMaxim | 26:a361e3f42ba5 | 580 | } |
IanBenzMaxim | 26:a361e3f42ba5 | 581 | while ((status & STATUS_1WB) && (poll_count++ < POLL_LIMIT) && (result != OneWireMaster::CommunicationReadError)); |
IanBenzMaxim | 26:a361e3f42ba5 | 582 | |
IanBenzMaxim | 26:a361e3f42ba5 | 583 | if((result == OneWireMaster::CommunicationReadError) || (poll_count >= POLL_LIMIT)) |
IanBenzMaxim | 26:a361e3f42ba5 | 584 | { |
IanBenzMaxim | 26:a361e3f42ba5 | 585 | // check for failure due to poll limit reached |
IanBenzMaxim | 26:a361e3f42ba5 | 586 | if (poll_count >= POLL_LIMIT) |
IanBenzMaxim | 26:a361e3f42ba5 | 587 | { |
IanBenzMaxim | 26:a361e3f42ba5 | 588 | // handle error |
IanBenzMaxim | 26:a361e3f42ba5 | 589 | // ... |
IanBenzMaxim | 26:a361e3f42ba5 | 590 | reset(); |
IanBenzMaxim | 26:a361e3f42ba5 | 591 | result = OneWireMaster::TimeoutError; |
IanBenzMaxim | 26:a361e3f42ba5 | 592 | } |
j3 | 17:b646b1e3970b | 593 | } |
j3 | 17:b646b1e3970b | 594 | else |
j3 | 17:b646b1e3970b | 595 | { |
IanBenzMaxim | 26:a361e3f42ba5 | 596 | packet[0] = CMD_SRP; |
IanBenzMaxim | 26:a361e3f42ba5 | 597 | packet[1] = 0xE1; |
IanBenzMaxim | 26:a361e3f42ba5 | 598 | |
IanBenzMaxim | 26:a361e3f42ba5 | 599 | if(_p_i2c_bus->write(_w_adrs, packet, 2) != I2C_WRITE_OK) |
j3 | 17:b646b1e3970b | 600 | { |
IanBenzMaxim | 26:a361e3f42ba5 | 601 | result = OneWireMaster::CommunicationWriteError; |
j3 | 17:b646b1e3970b | 602 | } |
j3 | 17:b646b1e3970b | 603 | else |
j3 | 17:b646b1e3970b | 604 | { |
IanBenzMaxim | 26:a361e3f42ba5 | 605 | if(_p_i2c_bus->read(_r_adrs, &data, 1) != I2C_READ_OK) |
IanBenzMaxim | 26:a361e3f42ba5 | 606 | { |
IanBenzMaxim | 26:a361e3f42ba5 | 607 | result = OneWireMaster::CommunicationReadError; |
IanBenzMaxim | 26:a361e3f42ba5 | 608 | } |
IanBenzMaxim | 26:a361e3f42ba5 | 609 | else |
IanBenzMaxim | 26:a361e3f42ba5 | 610 | { |
IanBenzMaxim | 26:a361e3f42ba5 | 611 | recvbyte = data; |
IanBenzMaxim | 26:a361e3f42ba5 | 612 | result = OneWireMaster::Success; |
IanBenzMaxim | 26:a361e3f42ba5 | 613 | } |
j3 | 17:b646b1e3970b | 614 | } |
j3 | 17:b646b1e3970b | 615 | } |
j3 | 17:b646b1e3970b | 616 | } |
j3 | 2:02d228c25fd4 | 617 | } |
j3 | 2:02d228c25fd4 | 618 | |
j3 | 17:b646b1e3970b | 619 | return result; |
j3 | 17:b646b1e3970b | 620 | } |
j3 | 17:b646b1e3970b | 621 | |
j3 | 17:b646b1e3970b | 622 | |
j3 | 17:b646b1e3970b | 623 | //********************************************************************* |
j3 | 23:e8e403d61359 | 624 | OneWireMaster::CmdResult Ds248x::OWWriteBlock(const uint8_t *tran_buf, uint8_t tran_len) |
j3 | 17:b646b1e3970b | 625 | { |
j3 | 23:e8e403d61359 | 626 | OneWireMaster::CmdResult result; |
j3 | 17:b646b1e3970b | 627 | |
j3 | 17:b646b1e3970b | 628 | for(uint8_t idx = 0; idx < tran_len; idx++) |
j3 | 17:b646b1e3970b | 629 | { |
IanBenzMaxim | 26:a361e3f42ba5 | 630 | result = OneWireMaster::OWWriteByte(tran_buf[idx]); |
j3 | 23:e8e403d61359 | 631 | if(result != OneWireMaster::Success) |
j3 | 17:b646b1e3970b | 632 | { |
j3 | 17:b646b1e3970b | 633 | break; |
j3 | 17:b646b1e3970b | 634 | } |
j3 | 17:b646b1e3970b | 635 | } |
j3 | 17:b646b1e3970b | 636 | |
j3 | 17:b646b1e3970b | 637 | return result; |
j3 | 17:b646b1e3970b | 638 | } |
j3 | 17:b646b1e3970b | 639 | |
j3 | 17:b646b1e3970b | 640 | |
j3 | 17:b646b1e3970b | 641 | //********************************************************************* |
j3 | 23:e8e403d61359 | 642 | OneWireMaster::CmdResult Ds248x::OWReadBlock(uint8_t *rx_buf, uint8_t rx_len) |
j3 | 17:b646b1e3970b | 643 | { |
j3 | 23:e8e403d61359 | 644 | OneWireMaster::CmdResult result; |
j3 | 17:b646b1e3970b | 645 | |
j3 | 17:b646b1e3970b | 646 | for(uint8_t idx = 0; idx < rx_len; idx++) |
j3 | 17:b646b1e3970b | 647 | { |
j3 | 17:b646b1e3970b | 648 | //OwReadByte() uses pass by reference |
IanBenzMaxim | 26:a361e3f42ba5 | 649 | result = OneWireMaster::OWReadByte(rx_buf[idx]); |
j3 | 23:e8e403d61359 | 650 | if(result != OneWireMaster::Success) |
j3 | 17:b646b1e3970b | 651 | { |
j3 | 17:b646b1e3970b | 652 | break; |
j3 | 17:b646b1e3970b | 653 | } |
j3 | 17:b646b1e3970b | 654 | } |
j3 | 17:b646b1e3970b | 655 | |
j3 | 17:b646b1e3970b | 656 | return result; |
j3 | 1:91e52f8ab8bf | 657 | } |
j3 | 1:91e52f8ab8bf | 658 | |
j3 | 1:91e52f8ab8bf | 659 | |
j3 | 1:91e52f8ab8bf | 660 | //********************************************************************* |
j3 | 23:e8e403d61359 | 661 | OneWireMaster::CmdResult Ds248x::OWSearch(RomId & romId) |
j3 | 1:91e52f8ab8bf | 662 | { |
j3 | 17:b646b1e3970b | 663 | int id_bit_number; |
j3 | 17:b646b1e3970b | 664 | int last_zero, rom_byte_number; |
j3 | 17:b646b1e3970b | 665 | int id_bit, cmp_id_bit; |
j3 | 17:b646b1e3970b | 666 | unsigned char rom_byte_mask, status; |
j3 | 17:b646b1e3970b | 667 | bool search_result; |
j3 | 17:b646b1e3970b | 668 | unsigned char crc8 = 0; |
j3 | 17:b646b1e3970b | 669 | SEARCH_DIRECTION search_direction; |
j3 | 17:b646b1e3970b | 670 | |
j3 | 17:b646b1e3970b | 671 | // initialize for search |
j3 | 17:b646b1e3970b | 672 | id_bit_number = 1; |
j3 | 17:b646b1e3970b | 673 | last_zero = 0; |
j3 | 17:b646b1e3970b | 674 | rom_byte_number = 0; |
j3 | 17:b646b1e3970b | 675 | rom_byte_mask = 1; |
j3 | 17:b646b1e3970b | 676 | search_result = false; |
j3 | 2:02d228c25fd4 | 677 | |
j3 | 17:b646b1e3970b | 678 | // if the last call was not the last one |
j3 | 17:b646b1e3970b | 679 | if (!_last_device_flag) |
j3 | 17:b646b1e3970b | 680 | { |
j3 | 17:b646b1e3970b | 681 | // 1-Wire reset |
j3 | 23:e8e403d61359 | 682 | OneWireMaster::CmdResult result = OWReset(); |
j3 | 23:e8e403d61359 | 683 | if (result != OneWireMaster::Success) |
j3 | 17:b646b1e3970b | 684 | { |
j3 | 17:b646b1e3970b | 685 | // reset the search |
j3 | 17:b646b1e3970b | 686 | _last_discrepancy = 0; |
j3 | 17:b646b1e3970b | 687 | _last_device_flag = false; |
j3 | 17:b646b1e3970b | 688 | _last_family_discrepancy = 0; |
j3 | 17:b646b1e3970b | 689 | return result; |
j3 | 17:b646b1e3970b | 690 | } |
j3 | 17:b646b1e3970b | 691 | |
j3 | 17:b646b1e3970b | 692 | // issue the search command |
IanBenzMaxim | 26:a361e3f42ba5 | 693 | OneWireMaster::OWWriteByte(0xF0); |
j3 | 2:02d228c25fd4 | 694 | |
j3 | 17:b646b1e3970b | 695 | // loop to do the search |
j3 | 17:b646b1e3970b | 696 | do |
j3 | 17:b646b1e3970b | 697 | { |
j3 | 17:b646b1e3970b | 698 | // if this discrepancy if before the Last Discrepancy |
j3 | 17:b646b1e3970b | 699 | // on a previous next then pick the same as last time |
j3 | 17:b646b1e3970b | 700 | if (id_bit_number < _last_discrepancy) |
j3 | 17:b646b1e3970b | 701 | { |
j3 | 17:b646b1e3970b | 702 | if ((romId[rom_byte_number] & rom_byte_mask) > 0) |
j3 | 17:b646b1e3970b | 703 | search_direction = DIRECTION_WRITE_ONE; |
j3 | 17:b646b1e3970b | 704 | else |
j3 | 17:b646b1e3970b | 705 | search_direction = DIRECTION_WRITE_ZERO; |
j3 | 17:b646b1e3970b | 706 | } |
j3 | 17:b646b1e3970b | 707 | else |
j3 | 17:b646b1e3970b | 708 | { |
j3 | 17:b646b1e3970b | 709 | // if equal to last pick 1, if not then pick 0 |
j3 | 17:b646b1e3970b | 710 | if (id_bit_number == _last_discrepancy) |
j3 | 17:b646b1e3970b | 711 | search_direction = DIRECTION_WRITE_ONE; |
j3 | 17:b646b1e3970b | 712 | else |
j3 | 17:b646b1e3970b | 713 | search_direction = DIRECTION_WRITE_ZERO; |
j3 | 17:b646b1e3970b | 714 | } |
j3 | 2:02d228c25fd4 | 715 | |
j3 | 17:b646b1e3970b | 716 | // Peform a triple operation on the DS2465 which will perform 2 read bits and 1 write bit |
j3 | 17:b646b1e3970b | 717 | search_triplet(search_direction, status); |
j3 | 17:b646b1e3970b | 718 | |
j3 | 17:b646b1e3970b | 719 | // check bit results in status byte |
j3 | 17:b646b1e3970b | 720 | id_bit = ((status & STATUS_SBR) == STATUS_SBR); |
j3 | 17:b646b1e3970b | 721 | cmp_id_bit = ((status & STATUS_TSB) == STATUS_TSB); |
j3 | 17:b646b1e3970b | 722 | search_direction = ((status & STATUS_DIR) == STATUS_DIR) ? DIRECTION_WRITE_ONE : DIRECTION_WRITE_ZERO; |
j3 | 17:b646b1e3970b | 723 | |
j3 | 17:b646b1e3970b | 724 | // check for no devices on 1-wire |
j3 | 17:b646b1e3970b | 725 | if ((id_bit) && (cmp_id_bit)) |
j3 | 17:b646b1e3970b | 726 | break; |
j3 | 17:b646b1e3970b | 727 | else |
j3 | 17:b646b1e3970b | 728 | { |
j3 | 17:b646b1e3970b | 729 | if ((!id_bit) && (!cmp_id_bit) && (search_direction == DIRECTION_WRITE_ZERO)) |
j3 | 2:02d228c25fd4 | 730 | { |
j3 | 17:b646b1e3970b | 731 | last_zero = id_bit_number; |
j3 | 17:b646b1e3970b | 732 | |
j3 | 17:b646b1e3970b | 733 | // check for Last discrepancy in family |
j3 | 17:b646b1e3970b | 734 | if (last_zero < 9) |
j3 | 17:b646b1e3970b | 735 | _last_family_discrepancy = last_zero; |
j3 | 2:02d228c25fd4 | 736 | } |
j3 | 2:02d228c25fd4 | 737 | |
j3 | 17:b646b1e3970b | 738 | // set or clear the bit in the ROM byte rom_byte_number |
j3 | 17:b646b1e3970b | 739 | // with mask rom_byte_mask |
j3 | 17:b646b1e3970b | 740 | if (search_direction == DIRECTION_WRITE_ONE) |
j3 | 17:b646b1e3970b | 741 | romId[rom_byte_number] |= rom_byte_mask; |
j3 | 17:b646b1e3970b | 742 | else |
j3 | 17:b646b1e3970b | 743 | romId[rom_byte_number] &= (unsigned char)~rom_byte_mask; |
j3 | 2:02d228c25fd4 | 744 | |
j3 | 17:b646b1e3970b | 745 | // increment the byte counter id_bit_number |
j3 | 17:b646b1e3970b | 746 | // and shift the mask rom_byte_mask |
j3 | 17:b646b1e3970b | 747 | id_bit_number++; |
j3 | 17:b646b1e3970b | 748 | rom_byte_mask <<= 1; |
j3 | 2:02d228c25fd4 | 749 | |
j3 | 17:b646b1e3970b | 750 | // if the mask is 0 then go to new SerialNum byte rom_byte_number and reset mask |
j3 | 17:b646b1e3970b | 751 | if (rom_byte_mask == 0) |
j3 | 17:b646b1e3970b | 752 | { |
j3 | 17:b646b1e3970b | 753 | crc8 = romId.calculateCRC8(crc8, romId[rom_byte_number]); // accumulate the CRC |
j3 | 17:b646b1e3970b | 754 | rom_byte_number++; |
j3 | 17:b646b1e3970b | 755 | rom_byte_mask = 1; |
j3 | 17:b646b1e3970b | 756 | } |
j3 | 17:b646b1e3970b | 757 | } |
j3 | 17:b646b1e3970b | 758 | } |
j3 | 17:b646b1e3970b | 759 | while(rom_byte_number < RomId::byteLen); // loop until through all ROM bytes 0-7 |
j3 | 2:02d228c25fd4 | 760 | |
j3 | 17:b646b1e3970b | 761 | // if the search was successful then |
j3 | 17:b646b1e3970b | 762 | if (!((id_bit_number <= (RomId::byteLen * 8)) || (crc8 != 0))) |
j3 | 17:b646b1e3970b | 763 | { |
j3 | 17:b646b1e3970b | 764 | // search successful so set m_last_discrepancy,m_last_device_flag,search_result |
j3 | 17:b646b1e3970b | 765 | _last_discrepancy = last_zero; |
j3 | 2:02d228c25fd4 | 766 | |
j3 | 17:b646b1e3970b | 767 | // check for last device |
j3 | 17:b646b1e3970b | 768 | if (_last_discrepancy == 0) |
j3 | 17:b646b1e3970b | 769 | _last_device_flag = true; |
j3 | 2:02d228c25fd4 | 770 | |
j3 | 17:b646b1e3970b | 771 | search_result = true; |
j3 | 17:b646b1e3970b | 772 | } |
j3 | 17:b646b1e3970b | 773 | } |
j3 | 2:02d228c25fd4 | 774 | |
j3 | 17:b646b1e3970b | 775 | // if no device found then reset counters so next 'search' will be like a first |
j3 | 17:b646b1e3970b | 776 | if (!search_result || (romId.familyCode() == 0)) |
j3 | 17:b646b1e3970b | 777 | { |
j3 | 17:b646b1e3970b | 778 | _last_discrepancy = 0; |
j3 | 17:b646b1e3970b | 779 | _last_device_flag = false; |
j3 | 17:b646b1e3970b | 780 | _last_family_discrepancy = 0; |
j3 | 17:b646b1e3970b | 781 | search_result = false; |
j3 | 17:b646b1e3970b | 782 | } |
j3 | 2:02d228c25fd4 | 783 | |
j3 | 23:e8e403d61359 | 784 | return search_result ? OneWireMaster::Success : OneWireMaster::OperationFailure; |
j3 | 1:91e52f8ab8bf | 785 | } |
j3 | 1:91e52f8ab8bf | 786 | |
j3 | 1:91e52f8ab8bf | 787 | |
j3 | 1:91e52f8ab8bf | 788 | //********************************************************************* |
j3 | 23:e8e403d61359 | 789 | OneWireMaster::CmdResult Ds248x::OWSpeed(OW_SPEED new_speed) |
j3 | 1:91e52f8ab8bf | 790 | { |
j3 | 2:02d228c25fd4 | 791 | // set the speed |
j3 | 5:ce108eeb878d | 792 | if (new_speed == SPEED_OVERDRIVE) |
j3 | 2:02d228c25fd4 | 793 | { |
j3 | 2:02d228c25fd4 | 794 | _c1WS = CONFIG_1WS; |
j3 | 2:02d228c25fd4 | 795 | } |
j3 | 2:02d228c25fd4 | 796 | else |
j3 | 2:02d228c25fd4 | 797 | { |
j3 | 17:b646b1e3970b | 798 | _c1WS = 0; |
j3 | 2:02d228c25fd4 | 799 | } |
j3 | 2:02d228c25fd4 | 800 | |
j3 | 17:b646b1e3970b | 801 | // write the new config, and return result of op |
j3 | 17:b646b1e3970b | 802 | return write_config(_c1WS | _cSPU | _cPDN | _cAPU); |
j3 | 1:91e52f8ab8bf | 803 | } |
j3 | 1:91e52f8ab8bf | 804 | |
j3 | 1:91e52f8ab8bf | 805 | |
j3 | 1:91e52f8ab8bf | 806 | //********************************************************************* |
j3 | 23:e8e403d61359 | 807 | OneWireMaster::CmdResult Ds248x::OWLevel(OW_LEVEL new_level) |
j3 | 1:91e52f8ab8bf | 808 | { |
j3 | 23:e8e403d61359 | 809 | OneWireMaster::CmdResult result; |
j3 | 2:02d228c25fd4 | 810 | |
j3 | 2:02d228c25fd4 | 811 | // function only will turn back to non-strong pull-up |
j3 | 5:ce108eeb878d | 812 | if (new_level != LEVEL_NORMAL) |
j3 | 2:02d228c25fd4 | 813 | { |
j3 | 23:e8e403d61359 | 814 | result = OneWireMaster::OperationFailure; |
j3 | 2:02d228c25fd4 | 815 | } |
j3 | 2:02d228c25fd4 | 816 | else |
j3 | 2:02d228c25fd4 | 817 | { |
j3 | 2:02d228c25fd4 | 818 | // clear the strong pull-up bit in the global config state |
j3 | 17:b646b1e3970b | 819 | _cSPU = 0; |
j3 | 17:b646b1e3970b | 820 | |
j3 | 17:b646b1e3970b | 821 | result = write_config(_c1WS | _cSPU | _cPDN | _cAPU); |
j3 | 2:02d228c25fd4 | 822 | } |
j3 | 2:02d228c25fd4 | 823 | |
j3 | 17:b646b1e3970b | 824 | return result; |
j3 | 1:91e52f8ab8bf | 825 | } |
j3 | 1:91e52f8ab8bf | 826 | |
j3 | 1:91e52f8ab8bf | 827 | |
IanBenzMaxim | 26:a361e3f42ba5 | 828 | OneWireMaster::CmdResult Ds248x::ConfigureSPU(bool spu_enable) |
j3 | 1:91e52f8ab8bf | 829 | { |
IanBenzMaxim | 26:a361e3f42ba5 | 830 | OneWireMaster::CmdResult result; |
IanBenzMaxim | 26:a361e3f42ba5 | 831 | if ((_cSPU == CONFIG_SPU) != spu_enable) |
IanBenzMaxim | 26:a361e3f42ba5 | 832 | { |
IanBenzMaxim | 26:a361e3f42ba5 | 833 | _cSPU = spu_enable; |
IanBenzMaxim | 26:a361e3f42ba5 | 834 | result = write_config(_c1WS | _cSPU | _cPDN | _cAPU); |
IanBenzMaxim | 26:a361e3f42ba5 | 835 | } |
IanBenzMaxim | 26:a361e3f42ba5 | 836 | else |
IanBenzMaxim | 26:a361e3f42ba5 | 837 | { |
IanBenzMaxim | 26:a361e3f42ba5 | 838 | result = OneWireMaster::Success; |
IanBenzMaxim | 26:a361e3f42ba5 | 839 | } |
IanBenzMaxim | 26:a361e3f42ba5 | 840 | return result; |
IanBenzMaxim | 21:00c94aeb533e | 841 | } |
IanBenzMaxim | 21:00c94aeb533e | 842 | |
IanBenzMaxim | 21:00c94aeb533e | 843 | |
j3 | 1:91e52f8ab8bf | 844 | //********************************************************************* |
j3 | 6:1faafa0b3cd7 | 845 | void Ds248x::set_i2c_adrs(DS248X_I2C_ADRS adrs) |
j3 | 6:1faafa0b3cd7 | 846 | { |
j3 | 6:1faafa0b3cd7 | 847 | _w_adrs = (adrs << 1); |
j3 | 6:1faafa0b3cd7 | 848 | _r_adrs = (_w_adrs | 1); |
j3 | 6:1faafa0b3cd7 | 849 | } |