Implementation of 1-Wire with added Alarm Search Functionality

Dependents:   Max32630_One_Wire_Interface

Committer:
IanBenzMaxim
Date:
Fri Mar 25 11:11:59 2016 -0500
Revision:
27:d5aaefa252f1
Parent:
22:686273e55cdc
Do not reconfigure DS2465 if requested speed or level is already set. Use forward declarations to speed up compilation.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
j3 4:ca27db159b10 1 /******************************************************************//**
j3 4:ca27db159b10 2 * Copyright (C) 2016 Maxim Integrated Products, Inc., All Rights Reserved.
j3 4:ca27db159b10 3 *
j3 4:ca27db159b10 4 * Permission is hereby granted, free of charge, to any person obtaining a
j3 4:ca27db159b10 5 * copy of this software and associated documentation files (the "Software"),
j3 4:ca27db159b10 6 * to deal in the Software without restriction, including without limitation
j3 4:ca27db159b10 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
j3 4:ca27db159b10 8 * and/or sell copies of the Software, and to permit persons to whom the
j3 4:ca27db159b10 9 * Software is furnished to do so, subject to the following conditions:
j3 4:ca27db159b10 10 *
j3 4:ca27db159b10 11 * The above copyright notice and this permission notice shall be included
j3 4:ca27db159b10 12 * in all copies or substantial portions of the Software.
j3 4:ca27db159b10 13 *
j3 4:ca27db159b10 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
j3 4:ca27db159b10 15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
j3 4:ca27db159b10 16 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
j3 4:ca27db159b10 17 * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
j3 4:ca27db159b10 18 * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
j3 4:ca27db159b10 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
j3 4:ca27db159b10 20 * OTHER DEALINGS IN THE SOFTWARE.
j3 4:ca27db159b10 21 *
j3 4:ca27db159b10 22 * Except as contained in this notice, the name of Maxim Integrated
j3 4:ca27db159b10 23 * Products, Inc. shall not be used except as stated in the Maxim Integrated
j3 4:ca27db159b10 24 * Products, Inc. Branding Policy.
j3 4:ca27db159b10 25 *
j3 4:ca27db159b10 26 * The mere transfer of this software does not imply any licenses
j3 4:ca27db159b10 27 * of trade secrets, proprietary technology, copyrights, patents,
j3 4:ca27db159b10 28 * trademarks, maskwork rights, or any other form of intellectual
j3 4:ca27db159b10 29 * property whatsoever. Maxim Integrated Products, Inc. retains all
j3 4:ca27db159b10 30 * ownership rights.
j3 4:ca27db159b10 31 **********************************************************************/
j3 4:ca27db159b10 32
j3 4:ca27db159b10 33
j3 4:ca27db159b10 34 #ifndef DS28E17_H
j3 4:ca27db159b10 35 #define DS28E17_H
j3 4:ca27db159b10 36
j3 4:ca27db159b10 37
j3 4:ca27db159b10 38 #include "mbed.h"
IanBenzMaxim 21:00c94aeb533e 39 #include "OneWire_Masters/OneWireMasters.h"
IanBenzMaxim 27:d5aaefa252f1 40 #include "RomId.hpp"
j3 4:ca27db159b10 41
j3 4:ca27db159b10 42
j3 4:ca27db159b10 43 class Ds28e17
j3 4:ca27db159b10 44 {
j3 4:ca27db159b10 45 public:
j3 4:ca27db159b10 46
j3 7:78a8857b3810 47 enum DS28E17_CMDS
j3 7:78a8857b3810 48 {
j3 7:78a8857b3810 49 CMD_I2C_WRITE_W_STOP = 0x4B,
j3 7:78a8857b3810 50 CMD_I2C_WRITE_NO_STOP = 0x5A,
j3 7:78a8857b3810 51 CMD_I2C_WRITE_ONLY = 0x69,
j3 7:78a8857b3810 52 CMD_I2C_WRITE_ONLY_W_STOP = 0x78,
j3 7:78a8857b3810 53 CMD_I2C_READ_W_STOP = 0x87,
j3 7:78a8857b3810 54 CMD_I2C_WRITE_READ_W_STOP = 0x2D,
j3 7:78a8857b3810 55 CMD_WRITE_CONFIG_REG = 0xD2,
j3 7:78a8857b3810 56 CMD_READ_CONFIG_REG = 0xE1,
j3 7:78a8857b3810 57 CMD_DISABLE_OW_MODE = 0x96,
j3 7:78a8857b3810 58 CMD_ENABLE_SLEEP_MODE = 0x1E,
j3 7:78a8857b3810 59 CMD_READ_DEVICE_REV = 0xC3
j3 7:78a8857b3810 60 };
j3 7:78a8857b3810 61
j3 17:b646b1e3970b 62 enum CmdResult
j3 17:b646b1e3970b 63 {
j3 17:b646b1e3970b 64 Success,
j3 17:b646b1e3970b 65 CommsReadBitError,
j3 17:b646b1e3970b 66 CommsWriteBitError,
j3 17:b646b1e3970b 67 CommsReadByteError,
j3 17:b646b1e3970b 68 CommsWriteByteError,
j3 17:b646b1e3970b 69 CommsReadBlockError,
j3 17:b646b1e3970b 70 CommsWriteBlockError,
j3 17:b646b1e3970b 71 TimeoutError,
j3 17:b646b1e3970b 72 OperationFailure
j3 17:b646b1e3970b 73 };
j3 17:b646b1e3970b 74
j3 7:78a8857b3810 75 static const size_t POLL_LIMIT = 10000;
j3 7:78a8857b3810 76
j3 4:ca27db159b10 77 /**********************************************************//**
j3 4:ca27db159b10 78 * @brief Ds28e17 constructor
j3 4:ca27db159b10 79 *
j3 4:ca27db159b10 80 * @details
j3 4:ca27db159b10 81 *
j3 4:ca27db159b10 82 * On Entry:
j3 4:ca27db159b10 83 * @param[in] p_owm - pointer to a 1-wire master of the following
j3 4:ca27db159b10 84 * types; Ds248x, Ds2480b, OwGpio which
j3 4:ca27db159b10 85 * inherit the base class 'OneWireInterface'
j3 4:ca27db159b10 86 *
j3 4:ca27db159b10 87 * On Exit:
j3 4:ca27db159b10 88 * @return
j3 4:ca27db159b10 89 **************************************************************/
j3 22:686273e55cdc 90 Ds28e17(OneWireMaster &owm);
j3 4:ca27db159b10 91
j3 17:b646b1e3970b 92 /**********************************************************//**
j3 17:b646b1e3970b 93 * @brief
j3 17:b646b1e3970b 94 *
j3 17:b646b1e3970b 95 * @details
j3 17:b646b1e3970b 96 *
j3 17:b646b1e3970b 97 * On Entry:
j3 17:b646b1e3970b 98 * @param[in] romId - reference to RomId type
j3 17:b646b1e3970b 99 *
j3 17:b646b1e3970b 100 * On Exit:
j3 17:b646b1e3970b 101 *
j3 17:b646b1e3970b 102 * @return
j3 17:b646b1e3970b 103 **************************************************************/
j3 17:b646b1e3970b 104 void set_rom_id(const RomId & romId);
j3 17:b646b1e3970b 105
j3 17:b646b1e3970b 106 /**********************************************************//**
j3 17:b646b1e3970b 107 * @brief
j3 17:b646b1e3970b 108 *
j3 17:b646b1e3970b 109 * @details
j3 17:b646b1e3970b 110 *
j3 17:b646b1e3970b 111 * On Entry:
j3 17:b646b1e3970b 112 *
j3 17:b646b1e3970b 113 * On Exit:
j3 17:b646b1e3970b 114 *
j3 17:b646b1e3970b 115 * @return current RomId held by this object
j3 17:b646b1e3970b 116 **************************************************************/
j3 17:b646b1e3970b 117 RomId get_rom_id(void);
j3 4:ca27db159b10 118
j3 4:ca27db159b10 119 /**********************************************************//**
j3 4:ca27db159b10 120 * @brief Write to selected DS28E17's I2C with Stop.
j3 4:ca27db159b10 121 * Poll until I2C write complete and receive status info.
j3 4:ca27db159b10 122 *
j3 4:ca27db159b10 123 * @details Output on I2C: S, Address + Write, Write Data [1-255], P
j3 4:ca27db159b10 124 *
j3 4:ca27db159b10 125 * On Entry:
j3 4:ca27db159b10 126 * @param[in] I2C_addr -
j3 4:ca27db159b10 127 * Writes I2C address. The least significant bit of the I2C
j3 4:ca27db159b10 128 * address is automatically cleared by the command.
j3 4:ca27db159b10 129 *
j3 4:ca27db159b10 130 * @param[in] length
j3 4:ca27db159b10 131 * The number of data bytes to be written ranging from 01h to FFh.
j3 4:ca27db159b10 132 * A value of zero will assert the Error Detected pin (ED).
j3 4:ca27db159b10 133 *
j3 4:ca27db159b10 134 * @param[in] *data
j3 4:ca27db159b10 135 * User defines write data ranging from 1-255 bytes.
j3 4:ca27db159b10 136 *
j3 4:ca27db159b10 137 * On Exit:
j3 4:ca27db159b10 138 * @param[out] status
j3 4:ca27db159b10 139 * Detects the condition of the Start (bit3), N/A (bit2),
j3 4:ca27db159b10 140 * Address(bit1) and CRC16(bit0) bits.
j3 4:ca27db159b10 141 * b3;0=No Err|1=I2CStart prev-not issued,
j3 4:ca27db159b10 142 * b2;0=No Err|1=I2C N/A Err,
j3 4:ca27db159b10 143 * b1;0=No Err|1=Addr Err,
j3 4:ca27db159b10 144 * b0;0=Valid CRC16|1=Invalid CRC16
j3 4:ca27db159b10 145 *
j3 4:ca27db159b10 146 * @param[out] wr_status
j3 4:ca27db159b10 147 * Indicates which write byte NACK’d. A value of 00h indicates
j3 4:ca27db159b10 148 * all bytes were acknowledged by the slave.
j3 4:ca27db159b10 149 * A non-zero value indicates the byte number that NACK’d.
j3 4:ca27db159b10 150 *
j3 4:ca27db159b10 151 * @return
j3 4:ca27db159b10 152 * true if device selected and written @n
j3 4:ca27db159b10 153 * false if failed device select
j3 4:ca27db159b10 154 **************************************************************/
j3 17:b646b1e3970b 155 CmdResult I2C_WriteDataWithStop(uint8_t I2C_addr, uint8_t length,
j3 7:78a8857b3810 156 uint8_t *data, uint8_t &status,
j3 7:78a8857b3810 157 uint8_t &wr_status);
j3 4:ca27db159b10 158
j3 4:ca27db159b10 159 /**********************************************************//**
j3 4:ca27db159b10 160 * @brief Write to selected DS28E17's I2C No Stop.
j3 4:ca27db159b10 161 * Poll until I2C write complete and receive status info.
j3 4:ca27db159b10 162 *
j3 4:ca27db159b10 163 * @details Output on I2C: S, Address + Write, Write Data [1-255]
j3 4:ca27db159b10 164 *
j3 4:ca27db159b10 165 * On Entry:
j3 4:ca27db159b10 166 * @param[in] I2C_addr
j3 4:ca27db159b10 167 * Writes I2C address. The least significant bit of the I2C address
j3 4:ca27db159b10 168 * is automatically cleared by the command.
j3 4:ca27db159b10 169 *
j3 4:ca27db159b10 170 * @param[in] length
j3 4:ca27db159b10 171 * The number of data bytes to be written ranging from 01h to FFh.
j3 4:ca27db159b10 172 * A value of zero will assert the Error Detected pin (ED).
j3 4:ca27db159b10 173 *
j3 4:ca27db159b10 174 * @param[in] *data
j3 4:ca27db159b10 175 * User defines write data ranging from 1-255 bytes.
j3 4:ca27db159b10 176 *
j3 4:ca27db159b10 177 * On Exit:
j3 4:ca27db159b10 178 * @param[out] status
j3 4:ca27db159b10 179 * Detects the condition of the Start (bit3), N/A (bit2),
j3 4:ca27db159b10 180 * Address(bit1) and CRC16(bit0) bits.
j3 4:ca27db159b10 181 * b3;0=No Err|1=I2CStart prev-not issued,
j3 4:ca27db159b10 182 * b2;0=No Err|1=I2C N/A Err,
j3 4:ca27db159b10 183 * b1;0=No Err|1=Addr Err,
j3 4:ca27db159b10 184 * b0;0=Valid CRC16|1=Invalid CRC16
j3 4:ca27db159b10 185 *
j3 4:ca27db159b10 186 * @param[out] wr_status
j3 4:ca27db159b10 187 * Indicates which write byte NACK’d. A value of 00h indicates
j3 4:ca27db159b10 188 * all bytes were acknowledged by the slave.
j3 4:ca27db159b10 189 * A non-zero value indicates the byte number that NACK’d.
j3 4:ca27db159b10 190 *
j3 4:ca27db159b10 191 * @return
j3 4:ca27db159b10 192 * true if device selected and written @n
j3 4:ca27db159b10 193 * false if failed device select
j3 4:ca27db159b10 194 **************************************************************/
j3 17:b646b1e3970b 195 CmdResult I2C_WriteDataNoStop(uint8_t I2C_addr, uint8_t length,
j3 7:78a8857b3810 196 uint8_t *data, uint8_t &status,
j3 7:78a8857b3810 197 uint8_t &wr_status);
j3 4:ca27db159b10 198
j3 4:ca27db159b10 199
j3 4:ca27db159b10 200 /**********************************************************//**
j3 4:ca27db159b10 201 * @brief Write to selected DS28E17's I2C with Data only.
j3 4:ca27db159b10 202 * Poll until I2C write complete and receive status info.
j3 4:ca27db159b10 203 *
j3 4:ca27db159b10 204 * @details Output on I2C: Write Data [1-255]
j3 4:ca27db159b10 205 *
j3 4:ca27db159b10 206 * On Entry:
j3 4:ca27db159b10 207 * @param[in] length
j3 4:ca27db159b10 208 * The number of data bytes to be written ranging from 01h to FFh.
j3 4:ca27db159b10 209 * A value of zero will assert the Error Detected pin (ED).
j3 4:ca27db159b10 210 *
j3 4:ca27db159b10 211 * @param[in] *data
j3 4:ca27db159b10 212 * User defines write data ranging from 1-255 bytes.
j3 4:ca27db159b10 213 *
j3 4:ca27db159b10 214 * On Exit:
j3 4:ca27db159b10 215 * @param[out] status
j3 4:ca27db159b10 216 * Detects the condition of the Start (bit3), N/A (bit2),
j3 4:ca27db159b10 217 * Address(bit1) and CRC16(bit0) bits.
j3 4:ca27db159b10 218 * b3;0=No Err|1=I2CStart prev-not issued,
j3 4:ca27db159b10 219 * b2;0=No Err|1=I2C N/A Err,
j3 4:ca27db159b10 220 * b1;0=No Err|1=Addr Err,
j3 4:ca27db159b10 221 * b0;0=Valid CRC16|1=Invalid CRC16
j3 4:ca27db159b10 222 *
j3 4:ca27db159b10 223 * @param[out] wr_status
j3 4:ca27db159b10 224 * Indicates which write byte NACK’d. A value of 00h indicates all bytes were acknowledged by the slave.
j3 4:ca27db159b10 225 * A non-zero value indicates the byte number that NACK’d.
j3 4:ca27db159b10 226 *
j3 4:ca27db159b10 227 * @return
j3 4:ca27db159b10 228 * true if device selected and written @n
j3 4:ca27db159b10 229 * false if failed device select
j3 4:ca27db159b10 230 **************************************************************/
j3 17:b646b1e3970b 231 CmdResult I2C_WriteDataOnly(uint8_t length, uint8_t *data,
j3 7:78a8857b3810 232 uint8_t &status, uint8_t &wr_status);
j3 4:ca27db159b10 233
j3 4:ca27db159b10 234
j3 4:ca27db159b10 235 /**********************************************************//**
j3 4:ca27db159b10 236 * @brief Write to selected DS28E17's I2C with Stop.
j3 4:ca27db159b10 237 * Poll until I2C write complete and receive status info.
j3 4:ca27db159b10 238 *
j3 4:ca27db159b10 239 * @details Output on I2C: Write Data [1-255], P
j3 4:ca27db159b10 240 *
j3 4:ca27db159b10 241 * On Entry:
j3 4:ca27db159b10 242 * @param[in] length
j3 4:ca27db159b10 243 * The number of data bytes to be written ranging from 01h to FFh.
j3 4:ca27db159b10 244 * A value of zero will assert the Error Detected pin (ED).
j3 4:ca27db159b10 245 *
j3 4:ca27db159b10 246 * @param[in] *data
j3 4:ca27db159b10 247 * User defines write data ranging from 1-255 bytes.
j3 4:ca27db159b10 248 *
j3 4:ca27db159b10 249 * On Exit:
j3 4:ca27db159b10 250 * @param[out] status
j3 4:ca27db159b10 251 * Detects the condition of the Start (bit3), N/A (bit2),
j3 4:ca27db159b10 252 * Address(bit1) and CRC16(bit0) bits.
j3 4:ca27db159b10 253 * b3;0=No Err|1=I2CStart prev-not issued,
j3 4:ca27db159b10 254 * b2;0=No Err|1=I2C N/A Err,
j3 4:ca27db159b10 255 * b1;0=No Err|1=Addr Err,
j3 4:ca27db159b10 256 * b0;0=Valid CRC16|1=Invalid CRC16
j3 4:ca27db159b10 257 *
j3 4:ca27db159b10 258 * @param[out] wr_status
j3 4:ca27db159b10 259 * Indicates which write byte NACK’d. A value of 00h indicates all bytes were acknowledged by the slave.
j3 4:ca27db159b10 260 * A non-zero value indicates the byte number that NACK’d.
j3 4:ca27db159b10 261 *
j3 4:ca27db159b10 262 * @return
j3 4:ca27db159b10 263 * true if device selected and written @n
j3 4:ca27db159b10 264 * false if failed device select
j3 4:ca27db159b10 265 **************************************************************/
j3 17:b646b1e3970b 266 CmdResult I2C_WriteDataOnlyWithStop(uint8_t length, uint8_t *data,
j3 7:78a8857b3810 267 uint8_t &status, uint8_t &wr_status);
j3 4:ca27db159b10 268
j3 4:ca27db159b10 269
j3 4:ca27db159b10 270 /**********************************************************//**
j3 4:ca27db159b10 271 * @brief Write to selected DS28E17's I2C with Stop and poll until I2C write complete
j3 4:ca27db159b10 272 * receive status info, and read data with a stop at the end.
j3 4:ca27db159b10 273 *
j3 4:ca27db159b10 274 * @details Output on I2C:
j3 4:ca27db159b10 275 * S, Slave Address + Write, Write Data [1-255],
j3 4:ca27db159b10 276 * Sr, Address + Read, Read Data [1-255], P (NACK last read byte)
j3 4:ca27db159b10 277 *
j3 4:ca27db159b10 278 * On Entry:
j3 4:ca27db159b10 279 * @param[in] I2C_addr
j3 4:ca27db159b10 280 * Writes I2C address. The least significant bit of the I2C address
j3 4:ca27db159b10 281 * is automatically cleared by the command.
j3 4:ca27db159b10 282 *
j3 4:ca27db159b10 283 * @param[in] length
j3 4:ca27db159b10 284 * The number of data bytes to be written ranging from 01h to FFh.
j3 4:ca27db159b10 285 * A value of zero will assert the Error Detected pin (ED).
j3 4:ca27db159b10 286 *
j3 4:ca27db159b10 287 * @param[in] *data
j3 4:ca27db159b10 288 * User defines write data ranging from 1-255 bytes.
j3 4:ca27db159b10 289 *
j3 8:7c7a0ea0c568 290 * @param[in] nu_bytes_read
j3 4:ca27db159b10 291 * Number of I2C bytes to read. A value of zero will assert the Error Detected pin (ED).
j3 4:ca27db159b10 292 *
j3 8:7c7a0ea0c568 293 * On Exit:
j3 4:ca27db159b10 294 * @param[out] status
j3 4:ca27db159b10 295 * Detects the condition of the Start (bit3), N/A (bit2),
j3 4:ca27db159b10 296 * Address(bit1) and CRC16(bit0) bits.
j3 4:ca27db159b10 297 * b3;0=No Err|1=I2CStart prev-not issued,
j3 4:ca27db159b10 298 * b2;0=No Err|1=I2C N/A Err,
j3 4:ca27db159b10 299 * b1;0=No Err|1=Addr Err,
j3 4:ca27db159b10 300 * b0;0=Valid CRC16|1=Invalid CRC16
j3 4:ca27db159b10 301 *
j3 4:ca27db159b10 302 * @param[out] wr_status
j3 4:ca27db159b10 303 * Indicates which write byte NACK’d. A value of 00h indicates all bytes were acknowledged by the slave.
j3 4:ca27db159b10 304 * A non-zero value indicates the byte number that NACK’d.
j3 4:ca27db159b10 305 *
j3 4:ca27db159b10 306 * @param[out] *read_data
j3 4:ca27db159b10 307 * Array of read data received from I2C.
j3 4:ca27db159b10 308 *
j3 4:ca27db159b10 309 * @return
j3 4:ca27db159b10 310 * true if device selected, written and read @n
j3 4:ca27db159b10 311 * false if failed device select or timeout occurred or CRC16 error
j3 4:ca27db159b10 312 **************************************************************/
j3 17:b646b1e3970b 313 CmdResult I2C_WriteReadDataWithStop(uint8_t I2C_addr, uint8_t length,
j3 4:ca27db159b10 314 uint8_t *data, uint8_t nu_bytes_read,
j3 7:78a8857b3810 315 uint8_t &status, uint8_t &wr_status,
j3 4:ca27db159b10 316 uint8_t *read_data);
j3 4:ca27db159b10 317
j3 4:ca27db159b10 318
j3 4:ca27db159b10 319 /**********************************************************//**
j3 4:ca27db159b10 320 * @brief Selected DS28E17's and send I2C address and poll until
j3 4:ca27db159b10 321 * I2C read address complete, receive status info, and read data
j3 4:ca27db159b10 322 * with a stop at the end.
j3 4:ca27db159b10 323 *
j3 4:ca27db159b10 324 * @details Output on I2C:
j3 4:ca27db159b10 325 * S, Slave Address + Read, Read Data [1-255], P (NACK last read byte)
j3 4:ca27db159b10 326 *
j3 4:ca27db159b10 327 * On Entry:
j3 4:ca27db159b10 328 * @param[in] I2C_addr
j3 4:ca27db159b10 329 * Writes I2C address. The least significant bit of the I2C address
j3 4:ca27db159b10 330 * is automatically cleared by the command.
j3 4:ca27db159b10 331 *
j3 4:ca27db159b10 332 * On Exit:
j3 4:ca27db159b10 333 * @param[out] nu_bytes_read
j3 4:ca27db159b10 334 * Number of I2C bytes to read. A value of zero will assert the Error Detected pin (ED).
j3 4:ca27db159b10 335 *
j3 4:ca27db159b10 336 * @param[out] status
j3 4:ca27db159b10 337 * Detects the condition of the Start (bit3), N/A (bit2),
j3 4:ca27db159b10 338 * Address(bit1) and CRC16(bit0) bits.
j3 4:ca27db159b10 339 * b3;0=No Err|1=I2CStart prev-not issued,
j3 4:ca27db159b10 340 * b2;0=No Err|1=I2C N/A Err,
j3 4:ca27db159b10 341 * b1;0=No Err|1=Addr Err,
j3 4:ca27db159b10 342 * b0;0=Valid CRC16|1=Invalid CRC16
j3 4:ca27db159b10 343 *
j3 4:ca27db159b10 344 * @param[out] *read_data
j3 4:ca27db159b10 345 * Array of read data received from I2C.
j3 4:ca27db159b10 346 *
j3 4:ca27db159b10 347 * @return
j3 4:ca27db159b10 348 * true if device selected, written and read @n
j3 4:ca27db159b10 349 * false if failed device select or timeout occurred or CRC16 error
j3 4:ca27db159b10 350 **************************************************************/
j3 17:b646b1e3970b 351 CmdResult I2C_ReadDataWithStop(uint8_t I2C_addr, uint8_t nu_bytes_read,
j3 7:78a8857b3810 352 uint8_t &status, uint8_t *read_data);
j3 4:ca27db159b10 353
j3 4:ca27db159b10 354
j3 4:ca27db159b10 355 /**********************************************************//**
j3 4:ca27db159b10 356 * @brief Write to Configuration Register of DS28E17.
j3 4:ca27db159b10 357 *
j3 4:ca27db159b10 358 * @details
j3 4:ca27db159b10 359 *
j3 4:ca27db159b10 360 * On Entry:
j3 4:ca27db159b10 361 * @param[in] data
j3 4:ca27db159b10 362 * sent to configuration register
j3 4:ca27db159b10 363 *
j3 4:ca27db159b10 364 * On Exit:
j3 4:ca27db159b10 365 *
j3 4:ca27db159b10 366 * @return
j3 4:ca27db159b10 367 * true if device selected and written @n
j3 4:ca27db159b10 368 * false if failed device select
j3 4:ca27db159b10 369 **************************************************************/
j3 17:b646b1e3970b 370 CmdResult WriteConfigReg(uint8_t data);
j3 4:ca27db159b10 371
j3 4:ca27db159b10 372
j3 4:ca27db159b10 373 /**********************************************************//**
j3 4:ca27db159b10 374 * @brief Read the Configuration Register of DS28E17.
j3 4:ca27db159b10 375 *
j3 4:ca27db159b10 376 * @details
j3 4:ca27db159b10 377 *
j3 4:ca27db159b10 378 * On Entry:
j3 4:ca27db159b10 379 *
j3 4:ca27db159b10 380 * On Exit:
j3 4:ca27db159b10 381 *
j3 4:ca27db159b10 382 * @return
j3 7:78a8857b3810 383 * true if device selected and read correctly @n
j3 4:ca27db159b10 384 * false if failed device select
j3 4:ca27db159b10 385 **************************************************************/
j3 17:b646b1e3970b 386 CmdResult ReadConfigReg(uint8_t & config);
j3 4:ca27db159b10 387
j3 4:ca27db159b10 388
j3 4:ca27db159b10 389 /**********************************************************//**
j3 4:ca27db159b10 390 * @brief Disable 1-Wire Mode DS28E17 and activates the input detection pin.
j3 4:ca27db159b10 391 * Immediately after the command, all 1-Wire signaling will be ignored
j3 4:ca27db159b10 392 * until the 1W_DET pin is high for more than 3ms.
j3 4:ca27db159b10 393 *
j3 4:ca27db159b10 394 * @details
j3 4:ca27db159b10 395 *
j3 4:ca27db159b10 396 * On Entry:
j3 4:ca27db159b10 397 *
j3 4:ca27db159b10 398 * On Exit:
j3 4:ca27db159b10 399 *
j3 4:ca27db159b10 400 * @return
j3 4:ca27db159b10 401 * true if device selected and written @n
j3 4:ca27db159b10 402 * false if failed device select
j3 4:ca27db159b10 403 **************************************************************/
j3 17:b646b1e3970b 404 CmdResult DisableOWMode();
j3 4:ca27db159b10 405
j3 4:ca27db159b10 406
j3 4:ca27db159b10 407 /**********************************************************//**
j3 4:ca27db159b10 408 * @brief The Enable Sleep Mode command puts the device into a low current mode.
j3 4:ca27db159b10 409 * All 1-Wire communication is ignored until woken up. Immediately after
j3 4:ca27db159b10 410 * the command, the device monitors the WAKEUP input pin and
j3 4:ca27db159b10 411 * exits sleep mode on a rising edge.
j3 4:ca27db159b10 412 *
j3 4:ca27db159b10 413 * @details
j3 4:ca27db159b10 414 *
j3 4:ca27db159b10 415 * On Entry:
j3 4:ca27db159b10 416 *
j3 4:ca27db159b10 417 * On Exit:
j3 4:ca27db159b10 418 *
j3 4:ca27db159b10 419 * @return
j3 4:ca27db159b10 420 * true if device selected and written @n
j3 4:ca27db159b10 421 * false if failed device select*
j3 4:ca27db159b10 422 **************************************************************/
j3 17:b646b1e3970b 423 CmdResult EnableSleepMode();
j3 4:ca27db159b10 424
j3 4:ca27db159b10 425
j3 4:ca27db159b10 426 /**********************************************************//**
j3 4:ca27db159b10 427 * @brief Read the Device Revision of DS28E17. The revision value
j3 4:ca27db159b10 428 * should never be zero. The upper nibble is the major revision
j3 4:ca27db159b10 429 * and the lower nibble is the minor revision.
j3 4:ca27db159b10 430 *
j3 4:ca27db159b10 431 * @details
j3 4:ca27db159b10 432 *
j3 4:ca27db159b10 433 * On Entry:
j3 4:ca27db159b10 434 *
j3 4:ca27db159b10 435 * On Exit:
j3 4:ca27db159b10 436 *
j3 4:ca27db159b10 437 * @return
j3 4:ca27db159b10 438 * revision value if device selected and read correctly @n
j3 4:ca27db159b10 439 * false if failed device select (i.e. 00h)
j3 4:ca27db159b10 440 **************************************************************/
j3 17:b646b1e3970b 441 CmdResult ReadDeviceRevision(uint8_t & rev);
j3 4:ca27db159b10 442
j3 4:ca27db159b10 443 private:
j3 4:ca27db159b10 444
j3 17:b646b1e3970b 445 CmdResult send_packet(const uint8_t * data, uint8_t data_length,
j3 17:b646b1e3970b 446 uint8_t & status, uint8_t & wr_status);
j3 17:b646b1e3970b 447
j3 17:b646b1e3970b 448 //overloaded function for I2C read only command
j3 17:b646b1e3970b 449 CmdResult send_packet(const uint8_t * data, uint8_t data_length,
j3 17:b646b1e3970b 450 uint8_t & status);
j3 17:b646b1e3970b 451
j3 22:686273e55cdc 452 OneWireMaster &_owm;
j3 17:b646b1e3970b 453 RomId _romId;
j3 7:78a8857b3810 454
j3 4:ca27db159b10 455 uint16_t _crc16;
j3 4:ca27db159b10 456 uint8_t _i2c_speed;
j3 4:ca27db159b10 457
j3 7:78a8857b3810 458 static const uint16_t _oddparity[16];
j3 4:ca27db159b10 459
j3 4:ca27db159b10 460 uint16_t docrc16(uint16_t data);
j3 4:ca27db159b10 461 };
j3 4:ca27db159b10 462
j3 17:b646b1e3970b 463 #endif /*DS28E17_H*/
j3 17:b646b1e3970b 464