Mike Fruge / OneWire

Implementation of 1-Wire with added Alarm Search Functionality

Dependents:   Max32630_One_Wire_Interface

OneWire_Masters/DS248x/ds248x.cpp@5:ce108eeb878d, 2016-02-09 (annotated)

Committer:
j3
Date:
Tue Feb 09 03:30:22 2016 +0000
Revision:
5:ce108eeb878d
Parent:
3:644fc630f958
Child:
6:1faafa0b3cd7
added additional rom command functions to interface and moved initialization of members to init list vs constructor body.  Made other modifications suggested by Ian

Who changed what in which revision?

UserRevisionLine numberNew contents of line
j3 1:91e52f8ab8bf 1 /******************************************************************//**
j3 1:91e52f8ab8bf 2 * @file ds248x.cpp
j3 1:91e52f8ab8bf 3 *
j3 1:91e52f8ab8bf 4 * @author Justin Jordan
j3 1:91e52f8ab8bf 5 *
j3 1:91e52f8ab8bf 6 * @version 0.0.0
j3 1:91e52f8ab8bf 7 *
j3 1:91e52f8ab8bf 8 * Started: 30JAN16
j3 1:91e52f8ab8bf 9 *
j3 1:91e52f8ab8bf 10 * Updated:
j3 1:91e52f8ab8bf 11 *
j3 1:91e52f8ab8bf 12 * @brief Source file for Ds248x I2C to 1-wire master
j3 1:91e52f8ab8bf 13 ***********************************************************************
j3 1:91e52f8ab8bf 14 * Copyright (C) 2016 Maxim Integrated Products, Inc., All Rights Reserved.
j3 1:91e52f8ab8bf 15 *
j3 1:91e52f8ab8bf 16 * Permission is hereby granted, free of charge, to any person obtaining a
j3 1:91e52f8ab8bf 17 * copy of this software and associated documentation files (the "Software"),
j3 1:91e52f8ab8bf 18 * to deal in the Software without restriction, including without limitation
j3 1:91e52f8ab8bf 19 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
j3 1:91e52f8ab8bf 20 * and/or sell copies of the Software, and to permit persons to whom the
j3 1:91e52f8ab8bf 21 * Software is furnished to do so, subject to the following conditions:
j3 1:91e52f8ab8bf 22 *
j3 1:91e52f8ab8bf 23 * The above copyright notice and this permission notice shall be included
j3 1:91e52f8ab8bf 24 * in all copies or substantial portions of the Software.
j3 1:91e52f8ab8bf 25 *
j3 1:91e52f8ab8bf 26 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
j3 1:91e52f8ab8bf 27 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
j3 1:91e52f8ab8bf 28 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
j3 1:91e52f8ab8bf 29 * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
j3 1:91e52f8ab8bf 30 * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
j3 1:91e52f8ab8bf 31 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
j3 1:91e52f8ab8bf 32 * OTHER DEALINGS IN THE SOFTWARE.
j3 1:91e52f8ab8bf 33 *
j3 1:91e52f8ab8bf 34 * Except as contained in this notice, the name of Maxim Integrated
j3 1:91e52f8ab8bf 35 * Products, Inc. shall not be used except as stated in the Maxim Integrated
j3 1:91e52f8ab8bf 36 * Products, Inc. Branding Policy.
j3 1:91e52f8ab8bf 37 *
j3 1:91e52f8ab8bf 38 * The mere transfer of this software does not imply any licenses
j3 1:91e52f8ab8bf 39 * of trade secrets, proprietary technology, copyrights, patents,
j3 1:91e52f8ab8bf 40 * trademarks, maskwork rights, or any other form of intellectual
j3 1:91e52f8ab8bf 41 * property whatsoever. Maxim Integrated Products, Inc. retains all
j3 1:91e52f8ab8bf 42 * ownership rights.
j3 1:91e52f8ab8bf 43 **********************************************************************/
j3 1:91e52f8ab8bf 44
j3 1:91e52f8ab8bf 45
j3 1:91e52f8ab8bf 46 #include "ds248x.h"
j3 1:91e52f8ab8bf 47
j3 1:91e52f8ab8bf 48
j3 1:91e52f8ab8bf 49 //*********************************************************************
j3 5:ce108eeb878d 50 Ds248x::Ds248x(I2C &i2c_bus, DS248X_I2C_ADRS adrs)
j3 5:ce108eeb878d 51 :_p_i2c_bus(&i2c_bus), _w_adrs(adrs << 1), _r_adrs((adrs << 1) | 1), _i2c_owner(false)
j3 1:91e52f8ab8bf 52 {
j3 5:ce108eeb878d 53 //empty body
j3 1:91e52f8ab8bf 54 }
j3 1:91e52f8ab8bf 55
j3 1:91e52f8ab8bf 56
j3 1:91e52f8ab8bf 57 //*********************************************************************
j3 5:ce108eeb878d 58 Ds248x::Ds248x(PinName sda, PinName scl, DS248X_I2C_ADRS adrs)
j3 5:ce108eeb878d 59 :_p_i2c_bus(new I2C(sda, scl)), _w_adrs(adrs << 1), _r_adrs((adrs << 1) | 1), _i2c_owner(true)
j3 1:91e52f8ab8bf 60 {
j3 5:ce108eeb878d 61 //empty body
j3 5:ce108eeb878d 62 }
j3 5:ce108eeb878d 63
j3 5:ce108eeb878d 64
j3 5:ce108eeb878d 65 //*********************************************************************
j3 5:ce108eeb878d 66 Ds248x::Ds248x(DS248X_I2C_ADRS adrs)
j3 5:ce108eeb878d 67 :_w_adrs(adrs << 1), _r_adrs((adrs << 1) | 1)
j3 5:ce108eeb878d 68 {
j3 5:ce108eeb878d 69 //empty body
j3 1:91e52f8ab8bf 70 }
j3 1:91e52f8ab8bf 71
j3 1:91e52f8ab8bf 72
j3 1:91e52f8ab8bf 73 //*********************************************************************
j3 1:91e52f8ab8bf 74 Ds248x::~Ds248x()
j3 1:91e52f8ab8bf 75 {
j3 5:ce108eeb878d 76 if(_i2c_owner)
j3 1:91e52f8ab8bf 77 {
j3 1:91e52f8ab8bf 78 delete _p_i2c_bus;
j3 1:91e52f8ab8bf 79 }
j3 1:91e52f8ab8bf 80 }
j3 1:91e52f8ab8bf 81
j3 1:91e52f8ab8bf 82
j3 1:91e52f8ab8bf 83 //*********************************************************************
j3 2:02d228c25fd4 84 bool Ds248x::detect(void)
j3 2:02d228c25fd4 85 {
j3 2:02d228c25fd4 86 bool rtn_val = false;
j3 2:02d228c25fd4 87
j3 2:02d228c25fd4 88 // reset the ds2484 ON selected address
j3 2:02d228c25fd4 89 if (!reset())
j3 2:02d228c25fd4 90 {
j3 2:02d228c25fd4 91 rtn_val = false;
j3 2:02d228c25fd4 92 }
j3 2:02d228c25fd4 93 else
j3 2:02d228c25fd4 94 {
j3 2:02d228c25fd4 95 // default configuration
j3 5:ce108eeb878d 96 _c1WS = false;
j3 5:ce108eeb878d 97 _cSPU = false;
j3 5:ce108eeb878d 98 _cPDN = false;
j3 5:ce108eeb878d 99 _cAPU = false;
j3 2:02d228c25fd4 100
j3 2:02d228c25fd4 101 // write the default configuration setup
j3 2:02d228c25fd4 102 if (!write_config(_c1WS | _cSPU | _cPDN | _cAPU))
j3 2:02d228c25fd4 103 {
j3 2:02d228c25fd4 104 rtn_val = false;
j3 2:02d228c25fd4 105 }
j3 2:02d228c25fd4 106 else
j3 2:02d228c25fd4 107 {
j3 2:02d228c25fd4 108 rtn_val = true;
j3 2:02d228c25fd4 109 }
j3 2:02d228c25fd4 110 }
j3 2:02d228c25fd4 111
j3 2:02d228c25fd4 112 return(rtn_val);
j3 2:02d228c25fd4 113 }
j3 2:02d228c25fd4 114
j3 2:02d228c25fd4 115
j3 2:02d228c25fd4 116 //*********************************************************************
j3 2:02d228c25fd4 117 bool Ds248x::reset(void)
j3 1:91e52f8ab8bf 118 {
j3 2:02d228c25fd4 119 char status;
j3 2:02d228c25fd4 120 char packet[] = {CMD_DRST};
j3 2:02d228c25fd4 121
j3 2:02d228c25fd4 122 // Device Reset
j3 2:02d228c25fd4 123 // S AD,0 [A] DRST [A] Sr AD,1 [A] [SS] A\ P
j3 2:02d228c25fd4 124 // [] indicates from slave
j3 2:02d228c25fd4 125 // SS status byte to read to verify state
j3 2:02d228c25fd4 126
j3 2:02d228c25fd4 127 _p_i2c_bus->write(_w_adrs, packet, 1);
j3 2:02d228c25fd4 128 _p_i2c_bus->read(_r_adrs, &status, 1);
j3 2:02d228c25fd4 129
j3 2:02d228c25fd4 130 return((status & 0xF7) == 0x10);
j3 2:02d228c25fd4 131 }
j3 2:02d228c25fd4 132
j3 2:02d228c25fd4 133
j3 2:02d228c25fd4 134 //*********************************************************************
j3 2:02d228c25fd4 135 bool Ds248x::write_config(uint8_t config)
j3 2:02d228c25fd4 136 {
j3 2:02d228c25fd4 137 bool rtn_val = false;
j3 2:02d228c25fd4 138 char read_config;
j3 2:02d228c25fd4 139 char packet [] = {CMD_WCFG, (config | (~config << 4))};
j3 2:02d228c25fd4 140
j3 2:02d228c25fd4 141 _p_i2c_bus->write(_w_adrs, packet, 2);
j3 2:02d228c25fd4 142 _p_i2c_bus->read(_r_adrs, &read_config, 1);
j3 2:02d228c25fd4 143
j3 2:02d228c25fd4 144 // check for failure due to incorrect read back
j3 2:02d228c25fd4 145 if (config != read_config)
j3 2:02d228c25fd4 146 {
j3 2:02d228c25fd4 147 // handle error
j3 2:02d228c25fd4 148 // ...
j3 2:02d228c25fd4 149 reset();
j3 2:02d228c25fd4 150 rtn_val = false;
j3 2:02d228c25fd4 151 }
j3 2:02d228c25fd4 152 else
j3 2:02d228c25fd4 153 {
j3 2:02d228c25fd4 154 rtn_val = true;
j3 2:02d228c25fd4 155 }
j3 2:02d228c25fd4 156
j3 1:91e52f8ab8bf 157 return(rtn_val);
j3 1:91e52f8ab8bf 158 }
j3 1:91e52f8ab8bf 159
j3 1:91e52f8ab8bf 160
j3 1:91e52f8ab8bf 161 //*********************************************************************
j3 2:02d228c25fd4 162 bool Ds248x::channel_select(uint8_t channel)
j3 1:91e52f8ab8bf 163 {
j3 2:02d228c25fd4 164
j3 2:02d228c25fd4 165 char ch, ch_read, check;
j3 2:02d228c25fd4 166 char packet [2];
j3 2:02d228c25fd4 167
j3 2:02d228c25fd4 168 packet[0] = CMD_CHSL;
j3 2:02d228c25fd4 169
j3 2:02d228c25fd4 170 // Channel Select (Case A)
j3 2:02d228c25fd4 171 // S AD,0 [A] CHSL [A] CC [A] Sr AD,1 [A] [RR] A\ P
j3 2:02d228c25fd4 172 // [] indicates from slave
j3 2:02d228c25fd4 173 // CC channel value
j3 2:02d228c25fd4 174 // RR channel read back
j3 2:02d228c25fd4 175
j3 2:02d228c25fd4 176 switch (channel)
j3 2:02d228c25fd4 177 {
j3 2:02d228c25fd4 178 default: case 0: ch = 0xF0; ch_read = 0xB8; break;
j3 2:02d228c25fd4 179 case 1: ch = 0xE1; ch_read = 0xB1; break;
j3 2:02d228c25fd4 180 case 2: ch = 0xD2; ch_read = 0xAA; break;
j3 2:02d228c25fd4 181 case 3: ch = 0xC3; ch_read = 0xA3; break;
j3 2:02d228c25fd4 182 case 4: ch = 0xB4; ch_read = 0x9C; break;
j3 2:02d228c25fd4 183 case 5: ch = 0xA5; ch_read = 0x95; break;
j3 2:02d228c25fd4 184 case 6: ch = 0x96; ch_read = 0x8E; break;
j3 2:02d228c25fd4 185 case 7: ch = 0x87; ch_read = 0x87; break;
j3 2:02d228c25fd4 186 };
j3 2:02d228c25fd4 187
j3 2:02d228c25fd4 188 packet[1] = ch;
j3 2:02d228c25fd4 189
j3 2:02d228c25fd4 190 _p_i2c_bus->write(_w_adrs, packet, 2);
j3 2:02d228c25fd4 191 _p_i2c_bus->read(_r_adrs, &check, 1);
j3 2:02d228c25fd4 192
j3 2:02d228c25fd4 193 // check for failure due to incorrect read back of channel
j3 2:02d228c25fd4 194 return (check == ch_read);
j3 2:02d228c25fd4 195 }
j3 2:02d228c25fd4 196
j3 2:02d228c25fd4 197
j3 2:02d228c25fd4 198 //*********************************************************************
j3 2:02d228c25fd4 199 bool Ds248x::adjust_timing(uint8_t param, uint8_t val)
j3 2:02d228c25fd4 200 {
j3 2:02d228c25fd4 201 bool rtn_val = false;
j3 2:02d228c25fd4 202 char read_port_config;
j3 2:02d228c25fd4 203 char control_byte;
j3 2:02d228c25fd4 204
j3 2:02d228c25fd4 205 control_byte = (((param & 0x0F) << 4) | (val & 0x0F));
j3 2:02d228c25fd4 206
j3 2:02d228c25fd4 207 char packet [] = {CMD_A1WP, control_byte};
j3 2:02d228c25fd4 208
j3 2:02d228c25fd4 209 _p_i2c_bus->write(_w_adrs, packet, 2);
j3 2:02d228c25fd4 210 _p_i2c_bus->read(_r_adrs, &read_port_config, 1);
j3 2:02d228c25fd4 211
j3 2:02d228c25fd4 212 // check for failure due to incorrect read back
j3 2:02d228c25fd4 213 if ((control_byte & 0x0F) != read_port_config)
j3 2:02d228c25fd4 214 {
j3 2:02d228c25fd4 215 // handle error
j3 2:02d228c25fd4 216 // ...
j3 2:02d228c25fd4 217 reset();
j3 2:02d228c25fd4 218
j3 2:02d228c25fd4 219 rtn_val = false;
j3 2:02d228c25fd4 220 }
j3 2:02d228c25fd4 221 else
j3 2:02d228c25fd4 222 {
j3 2:02d228c25fd4 223 rtn_val = true;
j3 2:02d228c25fd4 224 }
j3 2:02d228c25fd4 225
j3 2:02d228c25fd4 226 return(rtn_val);
j3 1:91e52f8ab8bf 227 }
j3 1:91e52f8ab8bf 228
j3 1:91e52f8ab8bf 229
j3 1:91e52f8ab8bf 230 //*********************************************************************
j3 2:02d228c25fd4 231 uint8_t Ds248x::search_triplet(uint8_t search_direction)
j3 1:91e52f8ab8bf 232 {
j3 2:02d228c25fd4 233 uint8_t rtn_val = 0;
j3 2:02d228c25fd4 234 uint8_t poll_count = 0;
j3 2:02d228c25fd4 235 char status;
j3 2:02d228c25fd4 236 char packet [] = {CMD_1WT, search_direction ? 0x80 : 0x00};
j3 2:02d228c25fd4 237
j3 2:02d228c25fd4 238 // 1-Wire Triplet (Case B)
j3 2:02d228c25fd4 239 // S AD,0 [A] 1WT [A] SS [A] Sr AD,1 [A] [Status] A [Status] A\ P
j3 2:02d228c25fd4 240 // \--------/
j3 2:02d228c25fd4 241 // Repeat until 1WB bit has changed to 0
j3 2:02d228c25fd4 242 // [] indicates from slave
j3 2:02d228c25fd4 243 // SS indicates byte containing search direction bit value in msbit
j3 2:02d228c25fd4 244
j3 2:02d228c25fd4 245 _p_i2c_bus->write(_w_adrs, packet, 2);
j3 2:02d228c25fd4 246
j3 2:02d228c25fd4 247 // loop checking 1WB bit for completion of 1-Wire operation
j3 2:02d228c25fd4 248 // abort if poll limit reached
j3 2:02d228c25fd4 249 do
j3 2:02d228c25fd4 250 {
j3 2:02d228c25fd4 251 _p_i2c_bus->read(_r_adrs, &status, 1);
j3 2:02d228c25fd4 252 }
j3 2:02d228c25fd4 253 while ((status & STATUS_1WB) && (poll_count++ < POLL_LIMIT));
j3 2:02d228c25fd4 254
j3 2:02d228c25fd4 255 // check for failure due to poll limit reached
j3 2:02d228c25fd4 256 if (poll_count >= POLL_LIMIT)
j3 2:02d228c25fd4 257 {
j3 2:02d228c25fd4 258 // handle error
j3 2:02d228c25fd4 259 // ...
j3 2:02d228c25fd4 260 reset();
j3 5:ce108eeb878d 261 rtn_val = false;
j3 2:02d228c25fd4 262 }
j3 2:02d228c25fd4 263 else
j3 2:02d228c25fd4 264 {
j3 2:02d228c25fd4 265 rtn_val = status;
j3 2:02d228c25fd4 266 }
j3 2:02d228c25fd4 267
j3 2:02d228c25fd4 268 return(rtn_val);
j3 1:91e52f8ab8bf 269 }
j3 1:91e52f8ab8bf 270
j3 1:91e52f8ab8bf 271
j3 1:91e52f8ab8bf 272 //*********************************************************************
j3 2:02d228c25fd4 273 bool Ds248x::OWReset()
j3 2:02d228c25fd4 274 {
j3 2:02d228c25fd4 275 bool rtn_val = false;
j3 2:02d228c25fd4 276
j3 2:02d228c25fd4 277 uint8_t poll_count = 0;
j3 2:02d228c25fd4 278 char status;
j3 2:02d228c25fd4 279 char packet [] = {CMD_1WRS};
j3 1:91e52f8ab8bf 280
j3 2:02d228c25fd4 281 // 1-Wire reset (Case B)
j3 2:02d228c25fd4 282 // S AD,0 [A] 1WRS [A] Sr AD,1 [A] [Status] A [Status] A\ P
j3 2:02d228c25fd4 283 // \--------/
j3 2:02d228c25fd4 284 // Repeat until 1WB bit has changed to 0
j3 2:02d228c25fd4 285 // [] indicates from slave
j3 2:02d228c25fd4 286
j3 2:02d228c25fd4 287 _p_i2c_bus->write(_w_adrs, packet, 1);
j3 2:02d228c25fd4 288
j3 2:02d228c25fd4 289 // loop checking 1WB bit for completion of 1-Wire operation
j3 2:02d228c25fd4 290 // abort if poll limit reached
j3 2:02d228c25fd4 291 do
j3 2:02d228c25fd4 292 {
j3 2:02d228c25fd4 293 _p_i2c_bus->read(_r_adrs, &status, 1);
j3 2:02d228c25fd4 294 }
j3 2:02d228c25fd4 295 while ((status & STATUS_1WB) && (poll_count++ < POLL_LIMIT));
j3 1:91e52f8ab8bf 296
j3 2:02d228c25fd4 297 // check for failure due to poll limit reached
j3 2:02d228c25fd4 298 if (poll_count >= POLL_LIMIT)
j3 2:02d228c25fd4 299 {
j3 2:02d228c25fd4 300 // handle error
j3 2:02d228c25fd4 301 // ...
j3 2:02d228c25fd4 302 reset();
j3 2:02d228c25fd4 303 rtn_val = false;
j3 2:02d228c25fd4 304 }
j3 2:02d228c25fd4 305 else
j3 2:02d228c25fd4 306 {
j3 2:02d228c25fd4 307 // check for short condition
j3 2:02d228c25fd4 308 if (status & STATUS_SD)
j3 2:02d228c25fd4 309 {
j3 5:ce108eeb878d 310 _short_detected = true;
j3 2:02d228c25fd4 311 }
j3 2:02d228c25fd4 312 else
j3 2:02d228c25fd4 313 {
j3 5:ce108eeb878d 314 _short_detected = false;
j3 2:02d228c25fd4 315 }
j3 2:02d228c25fd4 316
j3 2:02d228c25fd4 317 // check for presence detect
j3 2:02d228c25fd4 318 if (status & STATUS_PPD)
j3 2:02d228c25fd4 319 {
j3 2:02d228c25fd4 320 rtn_val = true;
j3 2:02d228c25fd4 321 }
j3 2:02d228c25fd4 322 else
j3 2:02d228c25fd4 323 {
j3 2:02d228c25fd4 324 rtn_val = false;
j3 2:02d228c25fd4 325 }
j3 2:02d228c25fd4 326 }
j3 2:02d228c25fd4 327
j3 1:91e52f8ab8bf 328 return(rtn_val);
j3 1:91e52f8ab8bf 329 }
j3 1:91e52f8ab8bf 330
j3 1:91e52f8ab8bf 331
j3 1:91e52f8ab8bf 332 //*********************************************************************
j3 1:91e52f8ab8bf 333 void Ds248x::OWWriteBit(uint8_t sendbit)
j3 1:91e52f8ab8bf 334 {
j3 2:02d228c25fd4 335 OWTouchBit(sendbit);
j3 1:91e52f8ab8bf 336 }
j3 1:91e52f8ab8bf 337
j3 1:91e52f8ab8bf 338
j3 1:91e52f8ab8bf 339 //*********************************************************************
j3 1:91e52f8ab8bf 340 uint8_t Ds248x::OWReadBit()
j3 1:91e52f8ab8bf 341 {
j3 2:02d228c25fd4 342 return(OWTouchBit(0x01));
j3 1:91e52f8ab8bf 343 }
j3 1:91e52f8ab8bf 344
j3 1:91e52f8ab8bf 345
j3 1:91e52f8ab8bf 346 //*********************************************************************
j3 1:91e52f8ab8bf 347 uint8_t Ds248x::OWTouchBit(uint8_t sendbit)
j3 1:91e52f8ab8bf 348 {
j3 1:91e52f8ab8bf 349 uint8_t rtn_val;
j3 2:02d228c25fd4 350 uint8_t poll_count = 0;
j3 2:02d228c25fd4 351 char status;
j3 2:02d228c25fd4 352 char packet[] = {CMD_1WSB, sendbit ? 0x80 : 0x00};
j3 2:02d228c25fd4 353
j3 2:02d228c25fd4 354 // 1-Wire bit (Case B)
j3 2:02d228c25fd4 355 // S AD,0 [A] 1WSB [A] BB [A] Sr AD,1 [A] [Status] A [Status] A\ P
j3 2:02d228c25fd4 356 // \--------/
j3 2:02d228c25fd4 357 // Repeat until 1WB bit has changed to 0
j3 2:02d228c25fd4 358 // [] indicates from slave
j3 2:02d228c25fd4 359 // BB indicates byte containing bit value in msbit
j3 2:02d228c25fd4 360
j3 2:02d228c25fd4 361 _p_i2c_bus->write(_w_adrs, packet, 2);
j3 2:02d228c25fd4 362
j3 2:02d228c25fd4 363 // loop checking 1WB bit for completion of 1-Wire operation
j3 2:02d228c25fd4 364 // abort if poll limit reached
j3 2:02d228c25fd4 365 do
j3 2:02d228c25fd4 366 {
j3 2:02d228c25fd4 367 _p_i2c_bus->read(_r_adrs, &status, 1);
j3 2:02d228c25fd4 368 }
j3 2:02d228c25fd4 369 while ((status & STATUS_1WB) && (poll_count++ < POLL_LIMIT));
j3 2:02d228c25fd4 370
j3 2:02d228c25fd4 371 // check for failure due to poll limit reached
j3 2:02d228c25fd4 372 if (poll_count >= POLL_LIMIT)
j3 2:02d228c25fd4 373 {
j3 2:02d228c25fd4 374 // handle error
j3 2:02d228c25fd4 375 // ...
j3 2:02d228c25fd4 376 reset();
j3 2:02d228c25fd4 377 rtn_val = 0;
j3 2:02d228c25fd4 378 }
j3 2:02d228c25fd4 379 else
j3 2:02d228c25fd4 380 {
j3 2:02d228c25fd4 381 // return bit state
j3 2:02d228c25fd4 382 if (status & STATUS_SBR)
j3 2:02d228c25fd4 383 {
j3 2:02d228c25fd4 384 rtn_val = 1;
j3 2:02d228c25fd4 385 }
j3 2:02d228c25fd4 386 else
j3 2:02d228c25fd4 387 {
j3 2:02d228c25fd4 388 rtn_val = 0;
j3 2:02d228c25fd4 389 }
j3 2:02d228c25fd4 390 }
j3 2:02d228c25fd4 391
j3 2:02d228c25fd4 392 return(rtn_val);
j3 1:91e52f8ab8bf 393 }
j3 1:91e52f8ab8bf 394
j3 1:91e52f8ab8bf 395
j3 1:91e52f8ab8bf 396 //*********************************************************************
j3 2:02d228c25fd4 397 bool Ds248x::OWWriteByte(uint8_t sendbyte)
j3 1:91e52f8ab8bf 398 {
j3 2:02d228c25fd4 399 bool rtn_val = false;
j3 1:91e52f8ab8bf 400
j3 2:02d228c25fd4 401 uint8_t poll_count = 0;
j3 2:02d228c25fd4 402 char status;
j3 2:02d228c25fd4 403 char packet [] = {CMD_1WWB, sendbyte};
j3 2:02d228c25fd4 404
j3 2:02d228c25fd4 405 // 1-Wire Write Byte (Case B)
j3 2:02d228c25fd4 406 // S AD,0 [A] 1WWB [A] DD [A] Sr AD,1 [A] [Status] A [Status] A\ P
j3 2:02d228c25fd4 407 // \--------/
j3 2:02d228c25fd4 408 // Repeat until 1WB bit has changed to 0
j3 2:02d228c25fd4 409 // [] indicates from slave
j3 2:02d228c25fd4 410 // DD data to write
j3 2:02d228c25fd4 411
j3 2:02d228c25fd4 412 _p_i2c_bus->write(_w_adrs, packet, 2);
j3 2:02d228c25fd4 413
j3 2:02d228c25fd4 414 // loop checking 1WB bit for completion of 1-Wire operation
j3 2:02d228c25fd4 415 // abort if poll limit reached
j3 2:02d228c25fd4 416 do
j3 2:02d228c25fd4 417 {
j3 2:02d228c25fd4 418 _p_i2c_bus->read(_r_adrs, &status, 1);
j3 2:02d228c25fd4 419 }
j3 2:02d228c25fd4 420 while ((status & STATUS_1WB) && (poll_count++ < POLL_LIMIT));
j3 2:02d228c25fd4 421
j3 2:02d228c25fd4 422 // check for failure due to poll limit reached
j3 2:02d228c25fd4 423 if (poll_count >= POLL_LIMIT)
j3 2:02d228c25fd4 424 {
j3 2:02d228c25fd4 425 // handle error
j3 2:02d228c25fd4 426 // ...
j3 2:02d228c25fd4 427 reset();
j3 2:02d228c25fd4 428 rtn_val = false;
j3 2:02d228c25fd4 429 }
j3 2:02d228c25fd4 430 else
j3 2:02d228c25fd4 431 {
j3 2:02d228c25fd4 432 rtn_val = true;
j3 2:02d228c25fd4 433 }
j3 2:02d228c25fd4 434
j3 2:02d228c25fd4 435 return(rtn_val);
j3 1:91e52f8ab8bf 436 }
j3 1:91e52f8ab8bf 437
j3 1:91e52f8ab8bf 438
j3 1:91e52f8ab8bf 439 //*********************************************************************
j3 1:91e52f8ab8bf 440 uint8_t Ds248x::OWReadByte(void)
j3 1:91e52f8ab8bf 441 {
j3 1:91e52f8ab8bf 442 uint8_t rtn_val;
j3 2:02d228c25fd4 443
j3 2:02d228c25fd4 444 uint8_t poll_count = 0;
j3 2:02d228c25fd4 445 char data, status;
j3 2:02d228c25fd4 446 char packet[2] = {CMD_1WRB, 0};
j3 2:02d228c25fd4 447
j3 2:02d228c25fd4 448 // 1-Wire Read Bytes (Case C)
j3 2:02d228c25fd4 449 // S AD,0 [A] 1WRB [A] Sr AD,1 [A] [Status] A [Status] A\
j3 2:02d228c25fd4 450 // \--------/
j3 2:02d228c25fd4 451 // Repeat until 1WB bit has changed to 0
j3 2:02d228c25fd4 452 // Sr AD,0 [A] SRP [A] E1 [A] Sr AD,1 [A] DD A\ P
j3 2:02d228c25fd4 453 //
j3 2:02d228c25fd4 454 // [] indicates from slave
j3 2:02d228c25fd4 455 // DD data read
j3 2:02d228c25fd4 456
j3 2:02d228c25fd4 457 _p_i2c_bus->write(_w_adrs, packet, 1);
j3 2:02d228c25fd4 458
j3 2:02d228c25fd4 459 // loop checking 1WB bit for completion of 1-Wire operation
j3 2:02d228c25fd4 460 // abort if poll limit reached
j3 2:02d228c25fd4 461 do
j3 2:02d228c25fd4 462 {
j3 2:02d228c25fd4 463 _p_i2c_bus->read(_r_adrs, &status, 1);
j3 2:02d228c25fd4 464 }
j3 2:02d228c25fd4 465 while ((status & STATUS_1WB) && (poll_count++ < POLL_LIMIT));
j3 2:02d228c25fd4 466
j3 2:02d228c25fd4 467 // check for failure due to poll limit reached
j3 2:02d228c25fd4 468 if (poll_count >= POLL_LIMIT)
j3 2:02d228c25fd4 469 {
j3 2:02d228c25fd4 470 // handle error
j3 2:02d228c25fd4 471 // ...
j3 2:02d228c25fd4 472 reset();
j3 2:02d228c25fd4 473 rtn_val = 0;
j3 2:02d228c25fd4 474 }
j3 2:02d228c25fd4 475 else
j3 2:02d228c25fd4 476 {
j3 2:02d228c25fd4 477 packet[0] = CMD_SRP;
j3 2:02d228c25fd4 478 packet[1] = 0xE1;
j3 2:02d228c25fd4 479
j3 2:02d228c25fd4 480 _p_i2c_bus->write(_w_adrs, packet, 2);
j3 2:02d228c25fd4 481 _p_i2c_bus->read(_r_adrs, &data, 1);
j3 2:02d228c25fd4 482
j3 2:02d228c25fd4 483 rtn_val = data;
j3 2:02d228c25fd4 484 }
j3 2:02d228c25fd4 485
j3 1:91e52f8ab8bf 486 return(rtn_val);
j3 1:91e52f8ab8bf 487 }
j3 1:91e52f8ab8bf 488
j3 1:91e52f8ab8bf 489
j3 1:91e52f8ab8bf 490 //*********************************************************************
j3 1:91e52f8ab8bf 491 uint8_t Ds248x::OWTouchByte(uint8_t sendbyte)
j3 1:91e52f8ab8bf 492 {
j3 1:91e52f8ab8bf 493 uint8_t rtn_val;
j3 2:02d228c25fd4 494
j3 2:02d228c25fd4 495 if (sendbyte == 0xFF)
j3 2:02d228c25fd4 496 {
j3 2:02d228c25fd4 497 rtn_val = OWReadByte();
j3 2:02d228c25fd4 498 }
j3 2:02d228c25fd4 499 else
j3 2:02d228c25fd4 500 {
j3 2:02d228c25fd4 501 OWWriteByte(sendbyte);
j3 2:02d228c25fd4 502 rtn_val = sendbyte;
j3 2:02d228c25fd4 503 }
j3 2:02d228c25fd4 504
j3 1:91e52f8ab8bf 505 return(rtn_val);
j3 1:91e52f8ab8bf 506 }
j3 1:91e52f8ab8bf 507
j3 1:91e52f8ab8bf 508
j3 1:91e52f8ab8bf 509 //*********************************************************************
j3 1:91e52f8ab8bf 510 void Ds248x::OWBlock(uint8_t *tran_buf, uint8_t tran_len)
j3 1:91e52f8ab8bf 511 {
j3 2:02d228c25fd4 512 uint8_t i;
j3 2:02d228c25fd4 513
j3 2:02d228c25fd4 514 for (i = 0; i < tran_len; i++)
j3 2:02d228c25fd4 515 {
j3 2:02d228c25fd4 516 tran_buf[i] = OWTouchByte(tran_buf[i]);
j3 2:02d228c25fd4 517 }
j3 1:91e52f8ab8bf 518 }
j3 1:91e52f8ab8bf 519
j3 1:91e52f8ab8bf 520
j3 1:91e52f8ab8bf 521 //*********************************************************************
j3 5:ce108eeb878d 522 void Ds248x::OWWriteBlock(const uint8_t *tran_buf, uint8_t tran_len)
j3 5:ce108eeb878d 523 {
j3 5:ce108eeb878d 524 uint8_t idx;
j3 5:ce108eeb878d 525
j3 5:ce108eeb878d 526 for(idx = 0; idx < tran_len; idx++)
j3 5:ce108eeb878d 527 {
j3 5:ce108eeb878d 528 OWWriteByte(tran_buf[idx]);
j3 5:ce108eeb878d 529 }
j3 5:ce108eeb878d 530 }
j3 5:ce108eeb878d 531
j3 5:ce108eeb878d 532
j3 5:ce108eeb878d 533 //*********************************************************************
j3 5:ce108eeb878d 534 void Ds248x::OWReadBlock(uint8_t *recv_buf, uint8_t recv_len)
j3 5:ce108eeb878d 535 {
j3 5:ce108eeb878d 536 uint8_t idx;
j3 5:ce108eeb878d 537
j3 5:ce108eeb878d 538 for(idx = 0; idx < recv_len; idx++)
j3 5:ce108eeb878d 539 {
j3 5:ce108eeb878d 540 recv_buf[idx] = OWReadByte();
j3 5:ce108eeb878d 541 }
j3 5:ce108eeb878d 542 }
j3 5:ce108eeb878d 543
j3 5:ce108eeb878d 544
j3 5:ce108eeb878d 545 //*********************************************************************
j3 2:02d228c25fd4 546 bool Ds248x::OWFirst(void)
j3 1:91e52f8ab8bf 547 {
j3 2:02d228c25fd4 548 // reset the search state
j3 2:02d228c25fd4 549 _last_discrepancy = 0;
j3 5:ce108eeb878d 550 _last_device_flag = false;
j3 2:02d228c25fd4 551 _last_family_discrepancy = 0;
j3 2:02d228c25fd4 552
j3 2:02d228c25fd4 553 return OWSearch();
j3 2:02d228c25fd4 554 }
j3 2:02d228c25fd4 555
j3 2:02d228c25fd4 556
j3 2:02d228c25fd4 557 //*********************************************************************
j3 2:02d228c25fd4 558 bool Ds248x::OWNext(void)
j3 2:02d228c25fd4 559 {
j3 2:02d228c25fd4 560 // leave the search state alone
j3 2:02d228c25fd4 561 return OWSearch();
j3 1:91e52f8ab8bf 562 }
j3 1:91e52f8ab8bf 563
j3 1:91e52f8ab8bf 564
j3 1:91e52f8ab8bf 565 //*********************************************************************
j3 2:02d228c25fd4 566 bool Ds248x::OWVerify(void)
j3 1:91e52f8ab8bf 567 {
j3 2:02d228c25fd4 568 bool rtn_val = false;
j3 2:02d228c25fd4 569
j3 2:02d228c25fd4 570 uint8_t rom_backup[8];
j3 2:02d228c25fd4 571 uint8_t i,rslt,ld_backup,ldf_backup,lfd_backup;
j3 2:02d228c25fd4 572
j3 2:02d228c25fd4 573 // keep a backup copy of the current state
j3 2:02d228c25fd4 574 for (i = 0; i < 8; i++)
j3 2:02d228c25fd4 575 {
j3 2:02d228c25fd4 576 rom_backup[i] = _rom_number[i];
j3 2:02d228c25fd4 577 }
j3 2:02d228c25fd4 578
j3 2:02d228c25fd4 579 ld_backup = _last_discrepancy;
j3 2:02d228c25fd4 580 ldf_backup = _last_device_flag;
j3 2:02d228c25fd4 581 lfd_backup = _last_family_discrepancy;
j3 2:02d228c25fd4 582
j3 2:02d228c25fd4 583 // set search to find the same device
j3 2:02d228c25fd4 584 _last_discrepancy = 64;
j3 5:ce108eeb878d 585 _last_device_flag = false;
j3 1:91e52f8ab8bf 586
j3 2:02d228c25fd4 587 if (OWSearch())
j3 2:02d228c25fd4 588 {
j3 2:02d228c25fd4 589 // check if same device found
j3 5:ce108eeb878d 590 rslt = true;
j3 2:02d228c25fd4 591 for (i = 0; i < 8; i++)
j3 2:02d228c25fd4 592 {
j3 2:02d228c25fd4 593 if (rom_backup[i] != _rom_number[i])
j3 2:02d228c25fd4 594 {
j3 5:ce108eeb878d 595 rslt = false;
j3 2:02d228c25fd4 596 break;
j3 2:02d228c25fd4 597 }
j3 2:02d228c25fd4 598 }
j3 2:02d228c25fd4 599 }
j3 2:02d228c25fd4 600 else
j3 2:02d228c25fd4 601 {
j3 5:ce108eeb878d 602 rslt = false;
j3 2:02d228c25fd4 603 }
j3 1:91e52f8ab8bf 604
j3 2:02d228c25fd4 605 // restore the search state
j3 2:02d228c25fd4 606 for (i = 0; i < 8; i++)
j3 2:02d228c25fd4 607 {
j3 2:02d228c25fd4 608 _rom_number[i] = rom_backup[i];
j3 2:02d228c25fd4 609 }
j3 2:02d228c25fd4 610
j3 2:02d228c25fd4 611 _last_discrepancy = ld_backup;
j3 2:02d228c25fd4 612 _last_device_flag = ldf_backup;
j3 2:02d228c25fd4 613 _last_family_discrepancy = lfd_backup;
j3 2:02d228c25fd4 614
j3 2:02d228c25fd4 615 // return the result of the verify
j3 2:02d228c25fd4 616 rtn_val = rslt;
j3 2:02d228c25fd4 617
j3 1:91e52f8ab8bf 618 return(rtn_val);
j3 1:91e52f8ab8bf 619 }
j3 1:91e52f8ab8bf 620
j3 1:91e52f8ab8bf 621
j3 1:91e52f8ab8bf 622 //*********************************************************************
j3 1:91e52f8ab8bf 623 void Ds248x::OWTargetSetup(uint8_t family_code)
j3 1:91e52f8ab8bf 624 {
j3 2:02d228c25fd4 625 uint8_t i;
j3 2:02d228c25fd4 626
j3 2:02d228c25fd4 627 // set the search state to find SearchFamily type devices
j3 2:02d228c25fd4 628 _rom_number[0] = family_code;
j3 2:02d228c25fd4 629 for (i = 1; i < 8; i++)
j3 2:02d228c25fd4 630 {
j3 2:02d228c25fd4 631 _rom_number[i] = 0;
j3 2:02d228c25fd4 632 }
j3 1:91e52f8ab8bf 633
j3 2:02d228c25fd4 634 _last_discrepancy = 64;
j3 2:02d228c25fd4 635 _last_family_discrepancy = 0;
j3 5:ce108eeb878d 636 _last_device_flag = false;
j3 1:91e52f8ab8bf 637 }
j3 1:91e52f8ab8bf 638
j3 1:91e52f8ab8bf 639
j3 1:91e52f8ab8bf 640 //*********************************************************************
j3 1:91e52f8ab8bf 641 void Ds248x::OWFamilySkipSetup(void)
j3 1:91e52f8ab8bf 642 {
j3 2:02d228c25fd4 643 // set the Last discrepancy to last family discrepancy
j3 2:02d228c25fd4 644 _last_discrepancy = _last_family_discrepancy;
j3 1:91e52f8ab8bf 645
j3 2:02d228c25fd4 646 // clear the last family discrpepancy
j3 2:02d228c25fd4 647 _last_family_discrepancy = 0;
j3 2:02d228c25fd4 648
j3 2:02d228c25fd4 649 // check for end of list
j3 2:02d228c25fd4 650 if (_last_discrepancy == 0)
j3 2:02d228c25fd4 651 {
j3 5:ce108eeb878d 652 _last_device_flag = true;
j3 2:02d228c25fd4 653 }
j3 1:91e52f8ab8bf 654 }
j3 1:91e52f8ab8bf 655
j3 1:91e52f8ab8bf 656
j3 1:91e52f8ab8bf 657 //*********************************************************************
j3 2:02d228c25fd4 658 bool Ds248x::OWSearch(void)
j3 1:91e52f8ab8bf 659 {
j3 2:02d228c25fd4 660 uint8_t id_bit_number;
j3 2:02d228c25fd4 661 uint8_t last_zero, rom_byte_number, search_result;
j3 2:02d228c25fd4 662 uint8_t id_bit, cmp_id_bit;
j3 2:02d228c25fd4 663 uint8_t rom_byte_mask, search_direction, status;
j3 2:02d228c25fd4 664
j3 2:02d228c25fd4 665 // initialize for search
j3 2:02d228c25fd4 666 id_bit_number = 1;
j3 2:02d228c25fd4 667 last_zero = 0;
j3 2:02d228c25fd4 668 rom_byte_number = 0;
j3 2:02d228c25fd4 669 rom_byte_mask = 1;
j3 5:ce108eeb878d 670 search_result = false;
j3 2:02d228c25fd4 671 _crc8 = 0;
j3 2:02d228c25fd4 672
j3 2:02d228c25fd4 673 // if the last call was not the last one
j3 2:02d228c25fd4 674 if (!_last_device_flag)
j3 2:02d228c25fd4 675 {
j3 2:02d228c25fd4 676 // 1-Wire reset
j3 2:02d228c25fd4 677 if (!OWReset())
j3 2:02d228c25fd4 678 {
j3 2:02d228c25fd4 679 // reset the search
j3 2:02d228c25fd4 680 _last_discrepancy = 0;
j3 5:ce108eeb878d 681 _last_device_flag = false;
j3 2:02d228c25fd4 682 _last_family_discrepancy = 0;
j3 5:ce108eeb878d 683 return false;
j3 2:02d228c25fd4 684 }
j3 2:02d228c25fd4 685
j3 2:02d228c25fd4 686 // issue the search command
j3 2:02d228c25fd4 687 OWWriteByte(SEARCH_ROM);
j3 2:02d228c25fd4 688
j3 2:02d228c25fd4 689 // loop to do the search
j3 2:02d228c25fd4 690 do
j3 2:02d228c25fd4 691 {
j3 2:02d228c25fd4 692 // if this discrepancy if before the Last Discrepancy
j3 2:02d228c25fd4 693 // on a previous next then pick the same as last time
j3 2:02d228c25fd4 694 if (id_bit_number < _last_discrepancy)
j3 2:02d228c25fd4 695 {
j3 2:02d228c25fd4 696 if ((_rom_number[rom_byte_number] & rom_byte_mask) > 0)
j3 2:02d228c25fd4 697 search_direction = 1;
j3 2:02d228c25fd4 698 else
j3 2:02d228c25fd4 699 search_direction = 0;
j3 2:02d228c25fd4 700 }
j3 2:02d228c25fd4 701 else
j3 2:02d228c25fd4 702 {
j3 2:02d228c25fd4 703 // if equal to last pick 1, if not then pick 0
j3 2:02d228c25fd4 704 if (id_bit_number == _last_discrepancy)
j3 2:02d228c25fd4 705 search_direction = 1;
j3 2:02d228c25fd4 706 else
j3 2:02d228c25fd4 707 search_direction = 0;
j3 2:02d228c25fd4 708 }
j3 2:02d228c25fd4 709
j3 2:02d228c25fd4 710 // Perform a triple operation on the ds2484 which will perform 2 read bits and 1 write bit
j3 2:02d228c25fd4 711 status = search_triplet(search_direction);
j3 2:02d228c25fd4 712
j3 2:02d228c25fd4 713 // check bit results in status byte
j3 2:02d228c25fd4 714 id_bit = ((status & STATUS_SBR) == STATUS_SBR);
j3 2:02d228c25fd4 715 cmp_id_bit = ((status & STATUS_TSB) == STATUS_TSB);
j3 2:02d228c25fd4 716 search_direction = ((status & STATUS_DIR) == STATUS_DIR) ? (unsigned char)1 : (unsigned char)0;
j3 2:02d228c25fd4 717
j3 2:02d228c25fd4 718 // check for no devices on 1-Wire
j3 2:02d228c25fd4 719 if ((id_bit) && (cmp_id_bit))
j3 2:02d228c25fd4 720 break;
j3 2:02d228c25fd4 721 else
j3 2:02d228c25fd4 722 {
j3 2:02d228c25fd4 723 if ((!id_bit) && (!cmp_id_bit) && (search_direction == 0))
j3 2:02d228c25fd4 724 {
j3 2:02d228c25fd4 725 last_zero = id_bit_number;
j3 2:02d228c25fd4 726
j3 2:02d228c25fd4 727 // check for Last discrepancy in family
j3 2:02d228c25fd4 728 if (last_zero < 9)
j3 2:02d228c25fd4 729 _last_family_discrepancy = last_zero;
j3 2:02d228c25fd4 730 }
j3 2:02d228c25fd4 731
j3 2:02d228c25fd4 732 // set or clear the bit in the ROM byte rom_byte_number
j3 2:02d228c25fd4 733 // with mask rom_byte_mask
j3 2:02d228c25fd4 734 if (search_direction == 1)
j3 2:02d228c25fd4 735 _rom_number[rom_byte_number] |= rom_byte_mask;
j3 2:02d228c25fd4 736 else
j3 2:02d228c25fd4 737 _rom_number[rom_byte_number] &= (unsigned char)~rom_byte_mask;
j3 2:02d228c25fd4 738
j3 2:02d228c25fd4 739 // increment the byte counter id_bit_number
j3 2:02d228c25fd4 740 // and shift the mask rom_byte_mask
j3 2:02d228c25fd4 741 id_bit_number++;
j3 2:02d228c25fd4 742 rom_byte_mask <<= 1;
j3 2:02d228c25fd4 743
j3 2:02d228c25fd4 744 // if the mask is 0 then go to new SerialNum byte rom_byte_number and reset mask
j3 2:02d228c25fd4 745 if (rom_byte_mask == 0)
j3 2:02d228c25fd4 746 {
j3 5:ce108eeb878d 747 _crc8 = OWCalc_crc8(_rom_number[rom_byte_number], _crc8); // accumulate the CRC
j3 2:02d228c25fd4 748 rom_byte_number++;
j3 2:02d228c25fd4 749 rom_byte_mask = 1;
j3 2:02d228c25fd4 750 }
j3 2:02d228c25fd4 751 }
j3 2:02d228c25fd4 752 }
j3 2:02d228c25fd4 753 while(rom_byte_number < 8); // loop until through all ROM bytes 0-7
j3 2:02d228c25fd4 754
j3 2:02d228c25fd4 755 // if the search was successful then
j3 2:02d228c25fd4 756 if (!((id_bit_number < 65) || (_crc8 != 0)))
j3 2:02d228c25fd4 757 {
j3 2:02d228c25fd4 758 // search successful so set LastDiscrepancy,LastDeviceFlag,search_result
j3 2:02d228c25fd4 759 _last_discrepancy = last_zero;
j3 2:02d228c25fd4 760
j3 2:02d228c25fd4 761 // check for last device
j3 2:02d228c25fd4 762 if (_last_discrepancy == 0)
j3 5:ce108eeb878d 763 _last_device_flag = true;
j3 2:02d228c25fd4 764
j3 5:ce108eeb878d 765 search_result = true;
j3 2:02d228c25fd4 766 }
j3 2:02d228c25fd4 767 }
j3 2:02d228c25fd4 768
j3 2:02d228c25fd4 769 // if no device found then reset counters so next 'search' will be like a first
j3 2:02d228c25fd4 770 if (!search_result || (_rom_number[0] == 0))
j3 2:02d228c25fd4 771 {
j3 2:02d228c25fd4 772 _last_discrepancy = 0;
j3 5:ce108eeb878d 773 _last_device_flag = false;
j3 2:02d228c25fd4 774 _last_family_discrepancy = 0;
j3 5:ce108eeb878d 775 search_result = false;
j3 2:02d228c25fd4 776 }
j3 2:02d228c25fd4 777
j3 2:02d228c25fd4 778 return search_result;
j3 1:91e52f8ab8bf 779 }
j3 1:91e52f8ab8bf 780
j3 1:91e52f8ab8bf 781
j3 1:91e52f8ab8bf 782 //*********************************************************************
j3 5:ce108eeb878d 783 bool Ds248x::OWReadROM(void)
j3 5:ce108eeb878d 784 {
j3 5:ce108eeb878d 785 bool rtn_val = false;
j3 5:ce108eeb878d 786
j3 5:ce108eeb878d 787 if(!OWReset())
j3 5:ce108eeb878d 788 {
j3 5:ce108eeb878d 789 rtn_val = false;
j3 5:ce108eeb878d 790 }
j3 5:ce108eeb878d 791 else
j3 5:ce108eeb878d 792 {
j3 5:ce108eeb878d 793 if(!OWWriteByte(READ_ROM))
j3 5:ce108eeb878d 794 {
j3 5:ce108eeb878d 795 rtn_val = false;
j3 5:ce108eeb878d 796 }
j3 5:ce108eeb878d 797 else
j3 5:ce108eeb878d 798 {
j3 5:ce108eeb878d 799 OWReadBlock(_rom_number, ROMnumberLen);
j3 5:ce108eeb878d 800 rtn_val = true;
j3 5:ce108eeb878d 801 }
j3 5:ce108eeb878d 802 }
j3 5:ce108eeb878d 803
j3 5:ce108eeb878d 804 return rtn_val;
j3 5:ce108eeb878d 805 }
j3 5:ce108eeb878d 806
j3 5:ce108eeb878d 807
j3 5:ce108eeb878d 808 //*********************************************************************
j3 5:ce108eeb878d 809 bool Ds248x::OWSkipROM(void)
j3 5:ce108eeb878d 810 {
j3 5:ce108eeb878d 811 bool rtn_val = false;
j3 5:ce108eeb878d 812
j3 5:ce108eeb878d 813 if(!OWReset())
j3 5:ce108eeb878d 814 {
j3 5:ce108eeb878d 815 rtn_val = false;
j3 5:ce108eeb878d 816 }
j3 5:ce108eeb878d 817 else
j3 5:ce108eeb878d 818 {
j3 5:ce108eeb878d 819 if(!OWWriteByte(SKIP_ROM))
j3 5:ce108eeb878d 820 {
j3 5:ce108eeb878d 821 rtn_val = false;
j3 5:ce108eeb878d 822 }
j3 5:ce108eeb878d 823 else
j3 5:ce108eeb878d 824 {
j3 5:ce108eeb878d 825 rtn_val = true;
j3 5:ce108eeb878d 826 }
j3 5:ce108eeb878d 827 }
j3 5:ce108eeb878d 828
j3 5:ce108eeb878d 829 return rtn_val;
j3 5:ce108eeb878d 830 }
j3 5:ce108eeb878d 831
j3 5:ce108eeb878d 832
j3 5:ce108eeb878d 833 //*********************************************************************
j3 5:ce108eeb878d 834 bool Ds248x::OWMatchROM(void)
j3 5:ce108eeb878d 835 {
j3 5:ce108eeb878d 836 bool rtn_val = false;
j3 5:ce108eeb878d 837 uint8_t idx;
j3 5:ce108eeb878d 838
j3 5:ce108eeb878d 839 if(!OWReset())
j3 5:ce108eeb878d 840 {
j3 5:ce108eeb878d 841 rtn_val = false;
j3 5:ce108eeb878d 842 }
j3 5:ce108eeb878d 843 else
j3 5:ce108eeb878d 844 {
j3 5:ce108eeb878d 845 if(!OWWriteByte(MATCH_ROM))
j3 5:ce108eeb878d 846 {
j3 5:ce108eeb878d 847 rtn_val = false;
j3 5:ce108eeb878d 848 }
j3 5:ce108eeb878d 849 else
j3 5:ce108eeb878d 850 {
j3 5:ce108eeb878d 851 for(idx = 0; idx < ROMnumberLen; idx++)
j3 5:ce108eeb878d 852 {
j3 5:ce108eeb878d 853 OWWriteByte(_rom_number[idx]);
j3 5:ce108eeb878d 854 }
j3 5:ce108eeb878d 855 rtn_val = true;
j3 5:ce108eeb878d 856 }
j3 5:ce108eeb878d 857 }
j3 5:ce108eeb878d 858
j3 5:ce108eeb878d 859 return rtn_val;
j3 5:ce108eeb878d 860 }
j3 5:ce108eeb878d 861
j3 5:ce108eeb878d 862
j3 5:ce108eeb878d 863 //*********************************************************************
j3 5:ce108eeb878d 864 bool Ds248x::OWOverdriveSkipROM(void)
j3 5:ce108eeb878d 865 {
j3 5:ce108eeb878d 866 bool rtn_val = false;
j3 5:ce108eeb878d 867
j3 5:ce108eeb878d 868 if(!OWReset())
j3 5:ce108eeb878d 869 {
j3 5:ce108eeb878d 870 rtn_val = false;
j3 5:ce108eeb878d 871 }
j3 5:ce108eeb878d 872 else
j3 5:ce108eeb878d 873 {
j3 5:ce108eeb878d 874 if(!OWWriteByte(OVERDRIVE_SKIP))
j3 5:ce108eeb878d 875 {
j3 5:ce108eeb878d 876 rtn_val = false;
j3 5:ce108eeb878d 877 }
j3 5:ce108eeb878d 878 else
j3 5:ce108eeb878d 879 {
j3 5:ce108eeb878d 880 //change speed for subsequent comands
j3 5:ce108eeb878d 881 OWSpeed(SPEED_OVERDRIVE);
j3 5:ce108eeb878d 882 rtn_val = true;
j3 5:ce108eeb878d 883 }
j3 5:ce108eeb878d 884 }
j3 5:ce108eeb878d 885
j3 5:ce108eeb878d 886 return rtn_val;
j3 5:ce108eeb878d 887 }
j3 5:ce108eeb878d 888
j3 5:ce108eeb878d 889
j3 5:ce108eeb878d 890 //*********************************************************************
j3 5:ce108eeb878d 891 bool Ds248x::OWOverdriveMatchROM(void)
j3 5:ce108eeb878d 892 {
j3 5:ce108eeb878d 893 bool rtn_val = false;
j3 5:ce108eeb878d 894 uint8_t idx;
j3 5:ce108eeb878d 895
j3 5:ce108eeb878d 896 if(!OWReset())
j3 5:ce108eeb878d 897 {
j3 5:ce108eeb878d 898 rtn_val = false;
j3 5:ce108eeb878d 899 }
j3 5:ce108eeb878d 900 else
j3 5:ce108eeb878d 901 {
j3 5:ce108eeb878d 902 if(!OWWriteByte(OVERDRIVE_MATCH))
j3 5:ce108eeb878d 903 {
j3 5:ce108eeb878d 904 rtn_val = false;
j3 5:ce108eeb878d 905 }
j3 5:ce108eeb878d 906 else
j3 5:ce108eeb878d 907 {
j3 5:ce108eeb878d 908 //change speed before sending ROM number
j3 5:ce108eeb878d 909 OWSpeed(SPEED_OVERDRIVE);
j3 5:ce108eeb878d 910
j3 5:ce108eeb878d 911 for(idx = 0; idx < ROMnumberLen; idx++)
j3 5:ce108eeb878d 912 {
j3 5:ce108eeb878d 913 OWWriteByte(_rom_number[idx]);
j3 5:ce108eeb878d 914 }
j3 5:ce108eeb878d 915 rtn_val = true;
j3 5:ce108eeb878d 916 }
j3 5:ce108eeb878d 917 }
j3 5:ce108eeb878d 918
j3 5:ce108eeb878d 919 return rtn_val;
j3 5:ce108eeb878d 920 }
j3 5:ce108eeb878d 921
j3 5:ce108eeb878d 922
j3 5:ce108eeb878d 923 //*********************************************************************
j3 5:ce108eeb878d 924 bool Ds248x::OWResume(void)
j3 5:ce108eeb878d 925 {
j3 5:ce108eeb878d 926 bool rtn_val = false;
j3 5:ce108eeb878d 927
j3 5:ce108eeb878d 928 if(!OWReset())
j3 5:ce108eeb878d 929 {
j3 5:ce108eeb878d 930 rtn_val = false;
j3 5:ce108eeb878d 931 }
j3 5:ce108eeb878d 932 else
j3 5:ce108eeb878d 933 {
j3 5:ce108eeb878d 934 if(!OWWriteByte(RESUME))
j3 5:ce108eeb878d 935 {
j3 5:ce108eeb878d 936 rtn_val = false;
j3 5:ce108eeb878d 937 }
j3 5:ce108eeb878d 938 else
j3 5:ce108eeb878d 939 {
j3 5:ce108eeb878d 940 rtn_val = true;
j3 5:ce108eeb878d 941 }
j3 5:ce108eeb878d 942 }
j3 5:ce108eeb878d 943
j3 5:ce108eeb878d 944 return rtn_val;
j3 5:ce108eeb878d 945 }
j3 5:ce108eeb878d 946
j3 5:ce108eeb878d 947
j3 5:ce108eeb878d 948 //*********************************************************************
j3 5:ce108eeb878d 949 uint8_t Ds248x::OWSpeed(OW_SPEED new_speed)
j3 1:91e52f8ab8bf 950 {
j3 2:02d228c25fd4 951 // set the speed
j3 5:ce108eeb878d 952 if (new_speed == SPEED_OVERDRIVE)
j3 2:02d228c25fd4 953 {
j3 2:02d228c25fd4 954 _c1WS = CONFIG_1WS;
j3 2:02d228c25fd4 955 }
j3 2:02d228c25fd4 956 else
j3 2:02d228c25fd4 957 {
j3 5:ce108eeb878d 958 _c1WS = false;
j3 2:02d228c25fd4 959 }
j3 2:02d228c25fd4 960
j3 2:02d228c25fd4 961 // write the new config
j3 2:02d228c25fd4 962 write_config(_c1WS | _cSPU | _cPDN | _cAPU);
j3 2:02d228c25fd4 963
j3 2:02d228c25fd4 964 return(new_speed);
j3 1:91e52f8ab8bf 965 }
j3 1:91e52f8ab8bf 966
j3 1:91e52f8ab8bf 967
j3 1:91e52f8ab8bf 968 //*********************************************************************
j3 5:ce108eeb878d 969 uint8_t Ds248x::OWLevel(OW_LEVEL new_level)
j3 1:91e52f8ab8bf 970 {
j3 1:91e52f8ab8bf 971 uint8_t rtn_val;
j3 2:02d228c25fd4 972
j3 2:02d228c25fd4 973 // function only will turn back to non-strong pull-up
j3 5:ce108eeb878d 974 if (new_level != LEVEL_NORMAL)
j3 2:02d228c25fd4 975 {
j3 5:ce108eeb878d 976 rtn_val = LEVEL_STRONG;
j3 2:02d228c25fd4 977 }
j3 2:02d228c25fd4 978 else
j3 2:02d228c25fd4 979 {
j3 2:02d228c25fd4 980 // clear the strong pull-up bit in the global config state
j3 5:ce108eeb878d 981 _cSPU = false;
j3 2:02d228c25fd4 982 // write the new config
j3 2:02d228c25fd4 983 write_config(_c1WS | _cSPU | _cPDN | _cAPU);
j3 5:ce108eeb878d 984 rtn_val = LEVEL_NORMAL;
j3 2:02d228c25fd4 985 }
j3 2:02d228c25fd4 986
j3 1:91e52f8ab8bf 987 return(rtn_val);
j3 1:91e52f8ab8bf 988 }
j3 1:91e52f8ab8bf 989
j3 1:91e52f8ab8bf 990
j3 1:91e52f8ab8bf 991 //*********************************************************************
j3 2:02d228c25fd4 992 bool Ds248x::OWWriteBytePower(uint8_t sendbyte)
j3 1:91e52f8ab8bf 993 {
j3 2:02d228c25fd4 994 bool rtn_val = false;
j3 2:02d228c25fd4 995
j3 2:02d228c25fd4 996 // set strong pull-up enable
j3 2:02d228c25fd4 997 _cSPU = CONFIG_SPU;
j3 2:02d228c25fd4 998
j3 2:02d228c25fd4 999 // write the new config
j3 2:02d228c25fd4 1000 if (!write_config(_c1WS | _cSPU | _cPDN | _cAPU))
j3 2:02d228c25fd4 1001 {
j3 2:02d228c25fd4 1002 rtn_val = false;
j3 2:02d228c25fd4 1003 }
j3 2:02d228c25fd4 1004 else
j3 2:02d228c25fd4 1005 {
j3 2:02d228c25fd4 1006 // perform write byte
j3 2:02d228c25fd4 1007 OWWriteByte(sendbyte);
j3 2:02d228c25fd4 1008 rtn_val = true;
j3 2:02d228c25fd4 1009 }
j3 2:02d228c25fd4 1010
j3 1:91e52f8ab8bf 1011 return(rtn_val);
j3 1:91e52f8ab8bf 1012 }
j3 1:91e52f8ab8bf 1013
j3 1:91e52f8ab8bf 1014
j3 1:91e52f8ab8bf 1015 //*********************************************************************
j3 2:02d228c25fd4 1016 bool Ds248x::OWReadBitPower(uint8_t applyPowerResponse)
j3 1:91e52f8ab8bf 1017 {
j3 2:02d228c25fd4 1018 bool rtn_val = false;
j3 2:02d228c25fd4 1019
j3 2:02d228c25fd4 1020 uint8_t rdbit;
j3 2:02d228c25fd4 1021
j3 2:02d228c25fd4 1022 // set strong pull-up enable
j3 2:02d228c25fd4 1023 _cSPU = CONFIG_SPU;
j3 2:02d228c25fd4 1024
j3 2:02d228c25fd4 1025 // write the new config
j3 2:02d228c25fd4 1026 if (!write_config(_c1WS | _cSPU | _cPDN | _cAPU))
j3 2:02d228c25fd4 1027 {
j3 2:02d228c25fd4 1028 rtn_val = false;
j3 2:02d228c25fd4 1029 }
j3 2:02d228c25fd4 1030 else
j3 2:02d228c25fd4 1031 {
j3 2:02d228c25fd4 1032 // perform read bit
j3 2:02d228c25fd4 1033 rdbit = OWReadBit();
j3 2:02d228c25fd4 1034
j3 2:02d228c25fd4 1035 // check if response was correct, if not then turn off strong pull-up
j3 2:02d228c25fd4 1036 if (rdbit != applyPowerResponse)
j3 2:02d228c25fd4 1037 {
j3 5:ce108eeb878d 1038 OWLevel(LEVEL_NORMAL);
j3 2:02d228c25fd4 1039 rtn_val = false;
j3 2:02d228c25fd4 1040 }
j3 2:02d228c25fd4 1041
j3 2:02d228c25fd4 1042 rtn_val = true;
j3 2:02d228c25fd4 1043 }
j3 2:02d228c25fd4 1044
j3 1:91e52f8ab8bf 1045 return(rtn_val);
j3 1:91e52f8ab8bf 1046 }
j3 1:91e52f8ab8bf 1047
j3 1:91e52f8ab8bf 1048
j3 1:91e52f8ab8bf 1049 //*********************************************************************
j3 5:ce108eeb878d 1050 const uint8_t (&Ds248x::OWgetROMnumber() const)[ROMnumberLen]
j3 1:91e52f8ab8bf 1051 {
j3 5:ce108eeb878d 1052 return _rom_number;
j3 2:02d228c25fd4 1053 }