Mike Fruge / OneWire

Implementation of 1-Wire with added Alarm Search Functionality

Dependents:   Max32630_One_Wire_Interface

OneWire_Masters/DS248x/ds248x.cpp@32:bce180b544ed, 2016-03-30 (annotated)

Committer:
IanBenzMaxim
Date:
Wed Mar 30 16:50:29 2016 -0500
Revision:
32:bce180b544ed
Parent:
27:d5aaefa252f1
Child:
69:f915c4c59a69
1. Move the implementation of OWSearch() into OneWireMaster since it is a fairly complex algorithm that shouldn?t be implemented over and over. It will also match all other ROM function that are implemented there.

2. Create a new member function, OWTriplet(), in OneWireMaster to handle the virtual section of OWSearch(). Create a default implementation of OWTriplet() that uses OWReadByte() and OWWriteByte(). Masters only need to implement this function if they have a search accelerator of some sort.

3. Create type SearchState that will encapsulate all persistent data used by the search ROM functions. This will also make it easy to not have the search state part of the permanent OneWireMaster class data.

4. Rename OWSpeed() to OWSetSpeed() and OWLevel() to OWSetLevel() for naming consistency.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
j3 1:91e52f8ab8bf 1 /******************************************************************//**
j3 1:91e52f8ab8bf 2 * Copyright (C) 2016 Maxim Integrated Products, Inc., All Rights Reserved.
j3 1:91e52f8ab8bf 3 *
j3 1:91e52f8ab8bf 4 * Permission is hereby granted, free of charge, to any person obtaining a
j3 1:91e52f8ab8bf 5 * copy of this software and associated documentation files (the "Software"),
j3 1:91e52f8ab8bf 6 * to deal in the Software without restriction, including without limitation
j3 1:91e52f8ab8bf 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
j3 1:91e52f8ab8bf 8 * and/or sell copies of the Software, and to permit persons to whom the
j3 1:91e52f8ab8bf 9 * Software is furnished to do so, subject to the following conditions:
j3 1:91e52f8ab8bf 10 *
j3 1:91e52f8ab8bf 11 * The above copyright notice and this permission notice shall be included
j3 1:91e52f8ab8bf 12 * in all copies or substantial portions of the Software.
j3 1:91e52f8ab8bf 13 *
j3 1:91e52f8ab8bf 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
j3 1:91e52f8ab8bf 15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
j3 1:91e52f8ab8bf 16 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
j3 1:91e52f8ab8bf 17 * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
j3 1:91e52f8ab8bf 18 * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
j3 1:91e52f8ab8bf 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
j3 1:91e52f8ab8bf 20 * OTHER DEALINGS IN THE SOFTWARE.
j3 1:91e52f8ab8bf 21 *
j3 1:91e52f8ab8bf 22 * Except as contained in this notice, the name of Maxim Integrated
j3 1:91e52f8ab8bf 23 * Products, Inc. shall not be used except as stated in the Maxim Integrated
j3 1:91e52f8ab8bf 24 * Products, Inc. Branding Policy.
j3 1:91e52f8ab8bf 25 *
j3 1:91e52f8ab8bf 26 * The mere transfer of this software does not imply any licenses
j3 1:91e52f8ab8bf 27 * of trade secrets, proprietary technology, copyrights, patents,
j3 1:91e52f8ab8bf 28 * trademarks, maskwork rights, or any other form of intellectual
j3 1:91e52f8ab8bf 29 * property whatsoever. Maxim Integrated Products, Inc. retains all
j3 1:91e52f8ab8bf 30 * ownership rights.
j3 1:91e52f8ab8bf 31 **********************************************************************/
j3 1:91e52f8ab8bf 32
j3 1:91e52f8ab8bf 33
j3 1:91e52f8ab8bf 34 #include "ds248x.h"
IanBenzMaxim 27:d5aaefa252f1 35 #include "RomId.hpp"
j3 1:91e52f8ab8bf 36
j3 1:91e52f8ab8bf 37
j3 1:91e52f8ab8bf 38 //*********************************************************************
j3 5:ce108eeb878d 39 Ds248x::Ds248x(I2C &i2c_bus, DS248X_I2C_ADRS adrs)
j3 6:1faafa0b3cd7 40 :_p_i2c_bus(&i2c_bus), _i2c_owner(false)
j3 1:91e52f8ab8bf 41 {
j3 6:1faafa0b3cd7 42 set_i2c_adrs(adrs);
j3 1:91e52f8ab8bf 43 }
j3 1:91e52f8ab8bf 44
j3 1:91e52f8ab8bf 45
j3 1:91e52f8ab8bf 46 //*********************************************************************
j3 5:ce108eeb878d 47 Ds248x::Ds248x(PinName sda, PinName scl, DS248X_I2C_ADRS adrs)
j3 6:1faafa0b3cd7 48 :_p_i2c_bus(new I2C(sda, scl)), _i2c_owner(true)
j3 1:91e52f8ab8bf 49 {
j3 6:1faafa0b3cd7 50 set_i2c_adrs(adrs);
j3 1:91e52f8ab8bf 51 }
j3 1:91e52f8ab8bf 52
j3 1:91e52f8ab8bf 53
j3 1:91e52f8ab8bf 54 //*********************************************************************
j3 1:91e52f8ab8bf 55 Ds248x::~Ds248x()
j3 1:91e52f8ab8bf 56 {
j3 5:ce108eeb878d 57 if(_i2c_owner)
j3 1:91e52f8ab8bf 58 {
j3 1:91e52f8ab8bf 59 delete _p_i2c_bus;
j3 1:91e52f8ab8bf 60 }
j3 1:91e52f8ab8bf 61 }
j3 1:91e52f8ab8bf 62
j3 1:91e52f8ab8bf 63
j3 1:91e52f8ab8bf 64 //*********************************************************************
j3 23:e8e403d61359 65 OneWireMaster::CmdResult Ds248x::OWInitMaster(void)
j3 14:7b2886a50321 66 {
j3 14:7b2886a50321 67 return(detect());
j3 14:7b2886a50321 68 }
j3 14:7b2886a50321 69
j3 14:7b2886a50321 70
j3 14:7b2886a50321 71 //*********************************************************************
j3 23:e8e403d61359 72 OneWireMaster::CmdResult Ds248x::detect(void)
j3 2:02d228c25fd4 73 {
j3 23:e8e403d61359 74 OneWireMaster::CmdResult result;
j3 2:02d228c25fd4 75
j3 2:02d228c25fd4 76 // reset the ds2484 ON selected address
j3 17:b646b1e3970b 77 result = reset();
j3 23:e8e403d61359 78 if(result == OneWireMaster::Success)
j3 2:02d228c25fd4 79 {
j3 2:02d228c25fd4 80 // default configuration
j3 17:b646b1e3970b 81 _c1WS = 0;
j3 17:b646b1e3970b 82 _cSPU = 0;
j3 17:b646b1e3970b 83 _cPDN = 0;
j3 17:b646b1e3970b 84 _cAPU = 0;
j3 2:02d228c25fd4 85
j3 17:b646b1e3970b 86 result = write_config(_c1WS | _cSPU | _cPDN | _cAPU);
j3 2:02d228c25fd4 87 }
j3 2:02d228c25fd4 88
j3 17:b646b1e3970b 89 return result;
j3 2:02d228c25fd4 90 }
j3 2:02d228c25fd4 91
j3 2:02d228c25fd4 92
j3 2:02d228c25fd4 93 //*********************************************************************
j3 23:e8e403d61359 94 OneWireMaster::CmdResult Ds248x::reset(void)
j3 1:91e52f8ab8bf 95 {
j3 23:e8e403d61359 96 OneWireMaster::CmdResult result;
j3 17:b646b1e3970b 97
j3 2:02d228c25fd4 98 char status;
j3 2:02d228c25fd4 99 char packet[] = {CMD_DRST};
j3 2:02d228c25fd4 100
j3 2:02d228c25fd4 101 // Device Reset
j3 2:02d228c25fd4 102 // S AD,0 [A] DRST [A] Sr AD,1 [A] [SS] A\ P
j3 2:02d228c25fd4 103 // [] indicates from slave
j3 2:02d228c25fd4 104 // SS status byte to read to verify state
j3 2:02d228c25fd4 105
j3 17:b646b1e3970b 106 if(_p_i2c_bus->write(_w_adrs, packet, 1) != I2C_WRITE_OK)
j3 17:b646b1e3970b 107 {
j3 23:e8e403d61359 108 result = OneWireMaster::CommunicationWriteError;
j3 17:b646b1e3970b 109 }
j3 17:b646b1e3970b 110 else
j3 17:b646b1e3970b 111 {
j3 17:b646b1e3970b 112 if(_p_i2c_bus->read(_r_adrs, &status, 1) != I2C_READ_OK)
j3 17:b646b1e3970b 113 {
j3 23:e8e403d61359 114 result = OneWireMaster::CommunicationReadError;
j3 17:b646b1e3970b 115 }
j3 17:b646b1e3970b 116 else
j3 17:b646b1e3970b 117 {
j3 17:b646b1e3970b 118 if((status & 0xF7) == 0x10)
j3 17:b646b1e3970b 119 {
j3 23:e8e403d61359 120 result = OneWireMaster::Success;
j3 17:b646b1e3970b 121 }
j3 17:b646b1e3970b 122 else
j3 17:b646b1e3970b 123 {
j3 23:e8e403d61359 124 result = OneWireMaster::OperationFailure;
j3 17:b646b1e3970b 125 }
j3 17:b646b1e3970b 126 }
j3 17:b646b1e3970b 127 }
j3 2:02d228c25fd4 128
j3 17:b646b1e3970b 129 return result;
j3 2:02d228c25fd4 130 }
j3 2:02d228c25fd4 131
j3 2:02d228c25fd4 132
j3 2:02d228c25fd4 133 //*********************************************************************
j3 23:e8e403d61359 134 OneWireMaster::CmdResult Ds248x::write_config(uint8_t config)
j3 2:02d228c25fd4 135 {
j3 23:e8e403d61359 136 OneWireMaster::CmdResult result;
j3 17:b646b1e3970b 137
j3 2:02d228c25fd4 138 char read_config;
j3 2:02d228c25fd4 139 char packet [] = {CMD_WCFG, (config | (~config << 4))};
j3 2:02d228c25fd4 140
j3 17:b646b1e3970b 141 if(_p_i2c_bus->write(_w_adrs, packet, 2) != I2C_WRITE_OK)
j3 2:02d228c25fd4 142 {
j3 23:e8e403d61359 143 result = OneWireMaster::CommunicationWriteError;
j3 2:02d228c25fd4 144 }
j3 2:02d228c25fd4 145 else
j3 2:02d228c25fd4 146 {
j3 17:b646b1e3970b 147 if(_p_i2c_bus->read(_r_adrs, &read_config, 1) != I2C_READ_OK)
j3 17:b646b1e3970b 148 {
j3 23:e8e403d61359 149 result = OneWireMaster::CommunicationReadError;
j3 17:b646b1e3970b 150 }
j3 17:b646b1e3970b 151 else
j3 17:b646b1e3970b 152 {
j3 17:b646b1e3970b 153 // check for failure due to incorrect read back
j3 17:b646b1e3970b 154 if (config != read_config)
j3 17:b646b1e3970b 155 {
j3 17:b646b1e3970b 156 reset();
j3 23:e8e403d61359 157 result = OneWireMaster::OperationFailure;
j3 17:b646b1e3970b 158 }
j3 17:b646b1e3970b 159 else
j3 17:b646b1e3970b 160 {
j3 23:e8e403d61359 161 result = OneWireMaster::Success;
j3 17:b646b1e3970b 162 }
j3 17:b646b1e3970b 163 }
j3 2:02d228c25fd4 164 }
j3 2:02d228c25fd4 165
j3 17:b646b1e3970b 166 return result;
j3 1:91e52f8ab8bf 167 }
j3 1:91e52f8ab8bf 168
j3 1:91e52f8ab8bf 169
j3 1:91e52f8ab8bf 170 //*********************************************************************
j3 23:e8e403d61359 171 OneWireMaster::CmdResult Ds248x::channel_select(uint8_t channel)
j3 1:91e52f8ab8bf 172 {
j3 23:e8e403d61359 173 OneWireMaster::CmdResult result;
j3 2:02d228c25fd4 174
j3 2:02d228c25fd4 175 char ch, ch_read, check;
j3 2:02d228c25fd4 176 char packet [2];
j3 2:02d228c25fd4 177
j3 2:02d228c25fd4 178 packet[0] = CMD_CHSL;
j3 2:02d228c25fd4 179
j3 2:02d228c25fd4 180 // Channel Select (Case A)
j3 2:02d228c25fd4 181 // S AD,0 [A] CHSL [A] CC [A] Sr AD,1 [A] [RR] A\ P
j3 2:02d228c25fd4 182 // [] indicates from slave
j3 2:02d228c25fd4 183 // CC channel value
j3 2:02d228c25fd4 184 // RR channel read back
j3 2:02d228c25fd4 185
j3 2:02d228c25fd4 186 switch (channel)
j3 2:02d228c25fd4 187 {
j3 2:02d228c25fd4 188 default: case 0: ch = 0xF0; ch_read = 0xB8; break;
j3 2:02d228c25fd4 189 case 1: ch = 0xE1; ch_read = 0xB1; break;
j3 2:02d228c25fd4 190 case 2: ch = 0xD2; ch_read = 0xAA; break;
j3 2:02d228c25fd4 191 case 3: ch = 0xC3; ch_read = 0xA3; break;
j3 2:02d228c25fd4 192 case 4: ch = 0xB4; ch_read = 0x9C; break;
j3 2:02d228c25fd4 193 case 5: ch = 0xA5; ch_read = 0x95; break;
j3 2:02d228c25fd4 194 case 6: ch = 0x96; ch_read = 0x8E; break;
j3 2:02d228c25fd4 195 case 7: ch = 0x87; ch_read = 0x87; break;
j3 2:02d228c25fd4 196 };
j3 2:02d228c25fd4 197
j3 2:02d228c25fd4 198 packet[1] = ch;
j3 2:02d228c25fd4 199
j3 17:b646b1e3970b 200 if(_p_i2c_bus->write(_w_adrs, packet, 2) != I2C_WRITE_OK)
j3 17:b646b1e3970b 201 {
j3 23:e8e403d61359 202 result = OneWireMaster::CommunicationWriteError;
j3 17:b646b1e3970b 203 }
j3 17:b646b1e3970b 204 else
j3 17:b646b1e3970b 205 {
j3 17:b646b1e3970b 206 if(_p_i2c_bus->read(_r_adrs, &check, 1) != I2C_READ_OK)
j3 17:b646b1e3970b 207 {
j3 23:e8e403d61359 208 result = OneWireMaster::CommunicationReadError;
j3 17:b646b1e3970b 209 }
j3 17:b646b1e3970b 210 else
j3 17:b646b1e3970b 211 {
j3 17:b646b1e3970b 212 // check for failure due to incorrect read back of channel
j3 17:b646b1e3970b 213 if (check == ch_read)
j3 17:b646b1e3970b 214 {
j3 23:e8e403d61359 215 result = OneWireMaster::Success;
j3 17:b646b1e3970b 216 }
j3 17:b646b1e3970b 217 else
j3 17:b646b1e3970b 218 {
j3 23:e8e403d61359 219 result = OneWireMaster::OperationFailure;
j3 17:b646b1e3970b 220 }
j3 17:b646b1e3970b 221 }
j3 17:b646b1e3970b 222 }
j3 2:02d228c25fd4 223
j3 17:b646b1e3970b 224 return result;
j3 2:02d228c25fd4 225 }
j3 2:02d228c25fd4 226
j3 2:02d228c25fd4 227
j3 2:02d228c25fd4 228 //*********************************************************************
j3 23:e8e403d61359 229 OneWireMaster::CmdResult Ds248x::adjust_timing(uint8_t param, uint8_t val)
j3 2:02d228c25fd4 230 {
j3 23:e8e403d61359 231 OneWireMaster::CmdResult result;
j3 17:b646b1e3970b 232
j3 2:02d228c25fd4 233 char read_port_config;
j3 2:02d228c25fd4 234 char control_byte;
j3 2:02d228c25fd4 235
j3 2:02d228c25fd4 236 control_byte = (((param & 0x0F) << 4) | (val & 0x0F));
j3 2:02d228c25fd4 237
j3 2:02d228c25fd4 238 char packet [] = {CMD_A1WP, control_byte};
j3 2:02d228c25fd4 239
j3 17:b646b1e3970b 240 if(_p_i2c_bus->write(_w_adrs, packet, 2) != I2C_WRITE_OK)
j3 17:b646b1e3970b 241 {
j3 23:e8e403d61359 242 result = OneWireMaster::CommunicationWriteError;
j3 17:b646b1e3970b 243 }
j3 17:b646b1e3970b 244 else
j3 2:02d228c25fd4 245 {
j3 17:b646b1e3970b 246 if(_p_i2c_bus->read(_r_adrs, &read_port_config, 1) != I2C_READ_OK)
j3 17:b646b1e3970b 247 {
j3 23:e8e403d61359 248 result = OneWireMaster::CommunicationReadError;
j3 17:b646b1e3970b 249 }
j3 17:b646b1e3970b 250 else
j3 17:b646b1e3970b 251 {
j3 17:b646b1e3970b 252 // check for failure due to incorrect read back
j3 17:b646b1e3970b 253 if ((control_byte & 0x0F) != read_port_config)
j3 17:b646b1e3970b 254 {
j3 23:e8e403d61359 255 result = OneWireMaster::OperationFailure;
j3 17:b646b1e3970b 256 reset();
j3 17:b646b1e3970b 257 }
j3 17:b646b1e3970b 258 else
j3 17:b646b1e3970b 259 {
j3 23:e8e403d61359 260 result = OneWireMaster::Success;
j3 17:b646b1e3970b 261 }
j3 17:b646b1e3970b 262 }
j3 2:02d228c25fd4 263 }
j3 17:b646b1e3970b 264
j3 17:b646b1e3970b 265 return result;
j3 1:91e52f8ab8bf 266 }
j3 1:91e52f8ab8bf 267
j3 1:91e52f8ab8bf 268
j3 1:91e52f8ab8bf 269 //*********************************************************************
IanBenzMaxim 32:bce180b544ed 270 OneWireMaster::CmdResult Ds248x::OWTriplet(SearchDirection & search_direction, std::uint8_t & sbr, std::uint8_t & tsb)
j3 1:91e52f8ab8bf 271 {
j3 23:e8e403d61359 272 OneWireMaster::CmdResult result;
j3 17:b646b1e3970b 273
j3 2:02d228c25fd4 274 uint8_t poll_count = 0;
j3 2:02d228c25fd4 275 char packet [] = {CMD_1WT, search_direction ? 0x80 : 0x00};
j3 17:b646b1e3970b 276 char read_data;
j3 2:02d228c25fd4 277
j3 2:02d228c25fd4 278 // 1-Wire Triplet (Case B)
j3 2:02d228c25fd4 279 // S AD,0 [A] 1WT [A] SS [A] Sr AD,1 [A] [Status] A [Status] A\ P
j3 2:02d228c25fd4 280 // \--------/
j3 2:02d228c25fd4 281 // Repeat until 1WB bit has changed to 0
j3 2:02d228c25fd4 282 // [] indicates from slave
j3 2:02d228c25fd4 283 // SS indicates byte containing search direction bit value in msbit
j3 2:02d228c25fd4 284
j3 17:b646b1e3970b 285 if(_p_i2c_bus->write(_w_adrs, packet, 2) != I2C_WRITE_OK)
j3 2:02d228c25fd4 286 {
j3 23:e8e403d61359 287 result = OneWireMaster::CommunicationWriteError;
j3 2:02d228c25fd4 288 }
j3 2:02d228c25fd4 289 else
j3 2:02d228c25fd4 290 {
j3 17:b646b1e3970b 291 // loop checking 1WB bit for completion of 1-Wire operation
j3 17:b646b1e3970b 292 // abort if poll limit reached
j3 17:b646b1e3970b 293
j3 17:b646b1e3970b 294 //dummy write for loop
j3 23:e8e403d61359 295 result = OneWireMaster::Success; //so far
j3 17:b646b1e3970b 296 do
j3 17:b646b1e3970b 297 {
j3 17:b646b1e3970b 298 if(_p_i2c_bus->read(_r_adrs, &read_data, 1) != I2C_READ_OK)
j3 17:b646b1e3970b 299 {
j3 23:e8e403d61359 300 result = OneWireMaster::CommunicationReadError;
j3 17:b646b1e3970b 301 }
j3 17:b646b1e3970b 302 }
j3 23:e8e403d61359 303 while ((read_data & STATUS_1WB) && (poll_count++ < POLL_LIMIT) && (result != OneWireMaster::CommunicationReadError));
j3 17:b646b1e3970b 304
j3 23:e8e403d61359 305 if((result == OneWireMaster::CommunicationReadError) || (poll_count >= POLL_LIMIT))
j3 17:b646b1e3970b 306 {
j3 17:b646b1e3970b 307 // check for failure due to poll limit reached
j3 17:b646b1e3970b 308 if(poll_count >= POLL_LIMIT)
j3 17:b646b1e3970b 309 {
j3 17:b646b1e3970b 310 // handle error
j3 17:b646b1e3970b 311 // ...
j3 17:b646b1e3970b 312 reset();
j3 23:e8e403d61359 313 result = OneWireMaster::TimeoutError;
j3 17:b646b1e3970b 314 }
j3 17:b646b1e3970b 315 }
j3 17:b646b1e3970b 316 else
j3 17:b646b1e3970b 317 {
IanBenzMaxim 32:bce180b544ed 318 // check bit results in status byte
IanBenzMaxim 32:bce180b544ed 319 sbr = ((read_data & STATUS_SBR) == STATUS_SBR);
IanBenzMaxim 32:bce180b544ed 320 tsb = ((read_data & STATUS_TSB) == STATUS_TSB);
IanBenzMaxim 32:bce180b544ed 321 search_direction = ((read_data & STATUS_DIR) == STATUS_DIR) ? DIRECTION_WRITE_ONE : DIRECTION_WRITE_ZERO;
IanBenzMaxim 32:bce180b544ed 322
j3 23:e8e403d61359 323 result = OneWireMaster::Success;
j3 17:b646b1e3970b 324 }
j3 2:02d228c25fd4 325 }
j3 17:b646b1e3970b 326
j3 17:b646b1e3970b 327 return result;
j3 1:91e52f8ab8bf 328 }
j3 1:91e52f8ab8bf 329
j3 1:91e52f8ab8bf 330
j3 1:91e52f8ab8bf 331 //*********************************************************************
j3 23:e8e403d61359 332 OneWireMaster::CmdResult Ds248x::OWReset(void)
j3 2:02d228c25fd4 333 {
j3 23:e8e403d61359 334 OneWireMaster::CmdResult result;
j3 2:02d228c25fd4 335
j3 2:02d228c25fd4 336 uint8_t poll_count = 0;
j3 2:02d228c25fd4 337 char status;
j3 2:02d228c25fd4 338 char packet [] = {CMD_1WRS};
j3 1:91e52f8ab8bf 339
j3 2:02d228c25fd4 340 // 1-Wire reset (Case B)
j3 2:02d228c25fd4 341 // S AD,0 [A] 1WRS [A] Sr AD,1 [A] [Status] A [Status] A\ P
j3 2:02d228c25fd4 342 // \--------/
j3 2:02d228c25fd4 343 // Repeat until 1WB bit has changed to 0
j3 2:02d228c25fd4 344 // [] indicates from slave
j3 2:02d228c25fd4 345
j3 17:b646b1e3970b 346 if(_p_i2c_bus->write(_w_adrs, packet, 1) != I2C_WRITE_OK)
j3 2:02d228c25fd4 347 {
j3 23:e8e403d61359 348 result = OneWireMaster::CommunicationWriteError;
j3 2:02d228c25fd4 349 }
j3 2:02d228c25fd4 350 else
j3 2:02d228c25fd4 351 {
j3 17:b646b1e3970b 352 // loop checking 1WB bit for completion of 1-Wire operation
j3 17:b646b1e3970b 353 // abort if poll limit reached
j3 17:b646b1e3970b 354 //dummy write for loop
j3 23:e8e403d61359 355 result = OneWireMaster::Success; //so far
j3 17:b646b1e3970b 356 do
j3 2:02d228c25fd4 357 {
j3 17:b646b1e3970b 358 if(_p_i2c_bus->read(_r_adrs, &status, 1) != I2C_READ_OK)
j3 17:b646b1e3970b 359 {
j3 23:e8e403d61359 360 result = OneWireMaster::CommunicationReadError;
j3 17:b646b1e3970b 361 }
j3 17:b646b1e3970b 362 }
j3 23:e8e403d61359 363 while ((status & STATUS_1WB) && (poll_count++ < POLL_LIMIT) && (result != OneWireMaster::CommunicationReadError));
j3 17:b646b1e3970b 364
j3 23:e8e403d61359 365 if((result == OneWireMaster::CommunicationReadError) || (poll_count >= POLL_LIMIT))
j3 17:b646b1e3970b 366 {
j3 17:b646b1e3970b 367 // check for failure due to poll limit reached
j3 17:b646b1e3970b 368 if(poll_count >= POLL_LIMIT)
j3 17:b646b1e3970b 369 {
j3 17:b646b1e3970b 370 // handle error
j3 17:b646b1e3970b 371 // ...
j3 17:b646b1e3970b 372 reset();
j3 23:e8e403d61359 373 result = OneWireMaster::TimeoutError;
j3 17:b646b1e3970b 374 }
j3 2:02d228c25fd4 375 }
j3 2:02d228c25fd4 376 else
j3 2:02d228c25fd4 377 {
j3 17:b646b1e3970b 378 // check for short condition
j3 17:b646b1e3970b 379 if (status & STATUS_SD)
j3 17:b646b1e3970b 380 {
j3 17:b646b1e3970b 381 _short_detected = true;
j3 17:b646b1e3970b 382 }
j3 17:b646b1e3970b 383 else
j3 17:b646b1e3970b 384 {
j3 17:b646b1e3970b 385 _short_detected = false;
j3 17:b646b1e3970b 386 }
j3 17:b646b1e3970b 387
j3 17:b646b1e3970b 388 // check for presence detect
j3 17:b646b1e3970b 389 if (status & STATUS_PPD)
j3 17:b646b1e3970b 390 {
j3 23:e8e403d61359 391 result = OneWireMaster::Success;
j3 17:b646b1e3970b 392 }
j3 17:b646b1e3970b 393 else
j3 17:b646b1e3970b 394 {
j3 23:e8e403d61359 395 result = OneWireMaster::OperationFailure;
j3 17:b646b1e3970b 396 }
j3 2:02d228c25fd4 397 }
j3 2:02d228c25fd4 398 }
j3 17:b646b1e3970b 399
j3 17:b646b1e3970b 400 return result;
j3 1:91e52f8ab8bf 401 }
j3 1:91e52f8ab8bf 402
j3 1:91e52f8ab8bf 403
j3 1:91e52f8ab8bf 404 //*********************************************************************
IanBenzMaxim 32:bce180b544ed 405 OneWireMaster::CmdResult Ds248x::OWTouchBit(uint8_t & sendrecvbit, OWLevel after_level)
j3 1:91e52f8ab8bf 406 {
j3 23:e8e403d61359 407 OneWireMaster::CmdResult result;
j3 17:b646b1e3970b 408
IanBenzMaxim 26:a361e3f42ba5 409 result = ConfigureSPU(after_level == LEVEL_STRONG);
IanBenzMaxim 26:a361e3f42ba5 410 if (result != OneWireMaster::Success)
IanBenzMaxim 26:a361e3f42ba5 411 return result;
IanBenzMaxim 26:a361e3f42ba5 412
j3 2:02d228c25fd4 413 uint8_t poll_count = 0;
j3 2:02d228c25fd4 414 char status;
j3 17:b646b1e3970b 415 char packet[] = {CMD_1WSB, sendrecvbit ? 0x80 : 0x00};
j3 2:02d228c25fd4 416
j3 2:02d228c25fd4 417 // 1-Wire bit (Case B)
j3 2:02d228c25fd4 418 // S AD,0 [A] 1WSB [A] BB [A] Sr AD,1 [A] [Status] A [Status] A\ P
j3 2:02d228c25fd4 419 // \--------/
j3 2:02d228c25fd4 420 // Repeat until 1WB bit has changed to 0
j3 2:02d228c25fd4 421 // [] indicates from slave
j3 2:02d228c25fd4 422 // BB indicates byte containing bit value in msbit
j3 2:02d228c25fd4 423
j3 17:b646b1e3970b 424 if(_p_i2c_bus->write(_w_adrs, packet, 2) != I2C_WRITE_OK)
j3 2:02d228c25fd4 425 {
j3 23:e8e403d61359 426 result = OneWireMaster::CommunicationWriteError;
j3 2:02d228c25fd4 427 }
j3 2:02d228c25fd4 428 else
j3 2:02d228c25fd4 429 {
j3 17:b646b1e3970b 430 // loop checking 1WB bit for completion of 1-Wire operation
j3 17:b646b1e3970b 431 // abort if poll limit reached
j3 17:b646b1e3970b 432 //dummy write for loop
j3 23:e8e403d61359 433 result = OneWireMaster::Success; //so far
j3 17:b646b1e3970b 434 do
j3 2:02d228c25fd4 435 {
j3 17:b646b1e3970b 436 if(_p_i2c_bus->read(_r_adrs, &status, 1) != I2C_READ_OK)
j3 17:b646b1e3970b 437 {
j3 23:e8e403d61359 438 result = OneWireMaster::CommunicationReadError;
j3 17:b646b1e3970b 439 }
j3 17:b646b1e3970b 440 }
j3 23:e8e403d61359 441 while ((status & STATUS_1WB) && (poll_count++ < POLL_LIMIT) && (result != OneWireMaster::CommunicationReadError));
j3 17:b646b1e3970b 442
j3 23:e8e403d61359 443 if((result == OneWireMaster::CommunicationReadError) || (poll_count >= POLL_LIMIT))
j3 17:b646b1e3970b 444 {
j3 17:b646b1e3970b 445 // check for failure due to poll limit reached
j3 17:b646b1e3970b 446 if (poll_count >= POLL_LIMIT)
j3 17:b646b1e3970b 447 {
j3 17:b646b1e3970b 448 // handle error
j3 17:b646b1e3970b 449 // ...
j3 17:b646b1e3970b 450 reset();
j3 23:e8e403d61359 451 result = OneWireMaster::TimeoutError;
j3 17:b646b1e3970b 452 }
j3 2:02d228c25fd4 453 }
j3 2:02d228c25fd4 454 else
j3 2:02d228c25fd4 455 {
j3 17:b646b1e3970b 456 // return bit state through out param
j3 17:b646b1e3970b 457 if (status & STATUS_SBR)
j3 17:b646b1e3970b 458 {
j3 17:b646b1e3970b 459 sendrecvbit = 1;
j3 17:b646b1e3970b 460
j3 17:b646b1e3970b 461 }
j3 17:b646b1e3970b 462 else
j3 17:b646b1e3970b 463 {
j3 17:b646b1e3970b 464 sendrecvbit = 0;
j3 17:b646b1e3970b 465 }
j3 23:e8e403d61359 466 result = OneWireMaster::Success;
j3 2:02d228c25fd4 467 }
j3 2:02d228c25fd4 468 }
j3 17:b646b1e3970b 469
j3 17:b646b1e3970b 470 return result;
j3 1:91e52f8ab8bf 471 }
j3 1:91e52f8ab8bf 472
j3 1:91e52f8ab8bf 473
j3 1:91e52f8ab8bf 474 //*********************************************************************
IanBenzMaxim 32:bce180b544ed 475 OneWireMaster::CmdResult Ds248x::OWWriteByte(uint8_t sendbyte, OWLevel after_level)
j3 1:91e52f8ab8bf 476 {
j3 23:e8e403d61359 477 OneWireMaster::CmdResult result;
j3 1:91e52f8ab8bf 478
IanBenzMaxim 26:a361e3f42ba5 479 result = ConfigureSPU(after_level == LEVEL_STRONG);
IanBenzMaxim 26:a361e3f42ba5 480 if (result != OneWireMaster::Success)
IanBenzMaxim 26:a361e3f42ba5 481 return result;
IanBenzMaxim 26:a361e3f42ba5 482
j3 2:02d228c25fd4 483 uint8_t poll_count = 0;
j3 2:02d228c25fd4 484 char status;
j3 2:02d228c25fd4 485 char packet [] = {CMD_1WWB, sendbyte};
j3 2:02d228c25fd4 486
j3 2:02d228c25fd4 487 // 1-Wire Write Byte (Case B)
j3 2:02d228c25fd4 488 // S AD,0 [A] 1WWB [A] DD [A] Sr AD,1 [A] [Status] A [Status] A\ P
j3 2:02d228c25fd4 489 // \--------/
j3 2:02d228c25fd4 490 // Repeat until 1WB bit has changed to 0
j3 2:02d228c25fd4 491 // [] indicates from slave
j3 2:02d228c25fd4 492 // DD data to write
j3 2:02d228c25fd4 493
j3 17:b646b1e3970b 494 if(_p_i2c_bus->write(_w_adrs, packet, 2) != I2C_WRITE_OK)
j3 2:02d228c25fd4 495 {
j3 23:e8e403d61359 496 result = OneWireMaster::CommunicationWriteError;
j3 2:02d228c25fd4 497 }
j3 2:02d228c25fd4 498 else
j3 2:02d228c25fd4 499 {
j3 17:b646b1e3970b 500 // loop checking 1WB bit for completion of 1-Wire operation
j3 17:b646b1e3970b 501 // abort if poll limit reached
j3 17:b646b1e3970b 502 //dummy write for loop
j3 23:e8e403d61359 503 result = OneWireMaster::Success; //so far
j3 17:b646b1e3970b 504 do
j3 17:b646b1e3970b 505 {
j3 17:b646b1e3970b 506 if(_p_i2c_bus->read(_r_adrs, &status, 1) != I2C_READ_OK)
j3 17:b646b1e3970b 507 {
j3 23:e8e403d61359 508 result = OneWireMaster::CommunicationReadError;
j3 17:b646b1e3970b 509 }
j3 17:b646b1e3970b 510 }
j3 23:e8e403d61359 511 while ((status & STATUS_1WB) && (poll_count++ < POLL_LIMIT) && (result != OneWireMaster::CommunicationReadError));
j3 17:b646b1e3970b 512
j3 23:e8e403d61359 513 if((result == OneWireMaster::CommunicationReadError) || (poll_count >= POLL_LIMIT))
j3 17:b646b1e3970b 514 {
j3 17:b646b1e3970b 515 // check for failure due to poll limit reached
j3 17:b646b1e3970b 516 if (poll_count >= POLL_LIMIT)
j3 17:b646b1e3970b 517 {
j3 17:b646b1e3970b 518 // handle error
j3 17:b646b1e3970b 519 // ...
j3 17:b646b1e3970b 520 reset();
j3 23:e8e403d61359 521 result = OneWireMaster::TimeoutError;
j3 17:b646b1e3970b 522 }
j3 17:b646b1e3970b 523 }
j3 17:b646b1e3970b 524 else
j3 17:b646b1e3970b 525 {
j3 23:e8e403d61359 526 result = OneWireMaster::Success;
j3 17:b646b1e3970b 527 }
j3 2:02d228c25fd4 528 }
j3 2:02d228c25fd4 529
j3 17:b646b1e3970b 530 return result;
j3 1:91e52f8ab8bf 531 }
j3 1:91e52f8ab8bf 532
j3 1:91e52f8ab8bf 533
j3 1:91e52f8ab8bf 534 //*********************************************************************
IanBenzMaxim 32:bce180b544ed 535 OneWireMaster::CmdResult Ds248x::OWReadByte(uint8_t & recvbyte, OWLevel after_level)
j3 1:91e52f8ab8bf 536 {
j3 23:e8e403d61359 537 OneWireMaster::CmdResult result;
j3 2:02d228c25fd4 538
IanBenzMaxim 26:a361e3f42ba5 539 if (after_level == LEVEL_STRONG) // Enabling strong pull-up after a Read Byte command is not supported natively by the DS248x
j3 2:02d228c25fd4 540 {
IanBenzMaxim 26:a361e3f42ba5 541 uint8_t recvbit;
IanBenzMaxim 26:a361e3f42ba5 542 recvbyte = 0;
IanBenzMaxim 26:a361e3f42ba5 543
IanBenzMaxim 26:a361e3f42ba5 544 for (unsigned int i = 1; i <= 8; i++)
IanBenzMaxim 26:a361e3f42ba5 545 {
IanBenzMaxim 26:a361e3f42ba5 546 // Set strong pull-up on last bit
IanBenzMaxim 26:a361e3f42ba5 547 result = OWReadBit(recvbit, (i == 8 ? LEVEL_STRONG : LEVEL_NORMAL));
IanBenzMaxim 26:a361e3f42ba5 548 if (result != Success)
IanBenzMaxim 26:a361e3f42ba5 549 break;
IanBenzMaxim 26:a361e3f42ba5 550 recvbyte = (recvbyte << 1) | recvbit;
IanBenzMaxim 26:a361e3f42ba5 551 }
j3 2:02d228c25fd4 552 }
j3 2:02d228c25fd4 553 else
j3 2:02d228c25fd4 554 {
IanBenzMaxim 26:a361e3f42ba5 555 uint8_t poll_count = 0;
IanBenzMaxim 26:a361e3f42ba5 556 char data, status;
IanBenzMaxim 26:a361e3f42ba5 557 char packet[2] = {CMD_1WRB, 0};
IanBenzMaxim 26:a361e3f42ba5 558
IanBenzMaxim 26:a361e3f42ba5 559 // 1-Wire Read Bytes (Case C)
IanBenzMaxim 26:a361e3f42ba5 560 // S AD,0 [A] 1WRB [A] Sr AD,1 [A] [Status] A [Status] A\
IanBenzMaxim 26:a361e3f42ba5 561 // \--------/
IanBenzMaxim 26:a361e3f42ba5 562 // Repeat until 1WB bit has changed to 0
IanBenzMaxim 26:a361e3f42ba5 563 // Sr AD,0 [A] SRP [A] E1 [A] Sr AD,1 [A] DD A\ P
IanBenzMaxim 26:a361e3f42ba5 564 //
IanBenzMaxim 26:a361e3f42ba5 565 // [] indicates from slave
IanBenzMaxim 26:a361e3f42ba5 566 // DD data read
IanBenzMaxim 26:a361e3f42ba5 567
IanBenzMaxim 26:a361e3f42ba5 568 if(_p_i2c_bus->write(_w_adrs, packet, 1) != I2C_WRITE_OK)
j3 17:b646b1e3970b 569 {
IanBenzMaxim 26:a361e3f42ba5 570 result = OneWireMaster::CommunicationWriteError;
j3 17:b646b1e3970b 571 }
j3 17:b646b1e3970b 572 else
j3 17:b646b1e3970b 573 {
IanBenzMaxim 26:a361e3f42ba5 574 // loop checking 1WB bit for completion of 1-Wire operation
IanBenzMaxim 26:a361e3f42ba5 575 // abort if poll limit reached
IanBenzMaxim 26:a361e3f42ba5 576 //dummy write for loop
IanBenzMaxim 26:a361e3f42ba5 577 result = OneWireMaster::Success; //so far
IanBenzMaxim 26:a361e3f42ba5 578 do
j3 17:b646b1e3970b 579 {
IanBenzMaxim 26:a361e3f42ba5 580 if(_p_i2c_bus->read(_r_adrs, &status, 1) != I2C_READ_OK)
IanBenzMaxim 26:a361e3f42ba5 581 {
IanBenzMaxim 26:a361e3f42ba5 582 result = OneWireMaster::CommunicationReadError;
IanBenzMaxim 26:a361e3f42ba5 583 }
IanBenzMaxim 26:a361e3f42ba5 584 }
IanBenzMaxim 26:a361e3f42ba5 585 while ((status & STATUS_1WB) && (poll_count++ < POLL_LIMIT) && (result != OneWireMaster::CommunicationReadError));
IanBenzMaxim 26:a361e3f42ba5 586
IanBenzMaxim 26:a361e3f42ba5 587 if((result == OneWireMaster::CommunicationReadError) || (poll_count >= POLL_LIMIT))
IanBenzMaxim 26:a361e3f42ba5 588 {
IanBenzMaxim 26:a361e3f42ba5 589 // check for failure due to poll limit reached
IanBenzMaxim 26:a361e3f42ba5 590 if (poll_count >= POLL_LIMIT)
IanBenzMaxim 26:a361e3f42ba5 591 {
IanBenzMaxim 26:a361e3f42ba5 592 // handle error
IanBenzMaxim 26:a361e3f42ba5 593 // ...
IanBenzMaxim 26:a361e3f42ba5 594 reset();
IanBenzMaxim 26:a361e3f42ba5 595 result = OneWireMaster::TimeoutError;
IanBenzMaxim 26:a361e3f42ba5 596 }
j3 17:b646b1e3970b 597 }
j3 17:b646b1e3970b 598 else
j3 17:b646b1e3970b 599 {
IanBenzMaxim 26:a361e3f42ba5 600 packet[0] = CMD_SRP;
IanBenzMaxim 26:a361e3f42ba5 601 packet[1] = 0xE1;
IanBenzMaxim 26:a361e3f42ba5 602
IanBenzMaxim 26:a361e3f42ba5 603 if(_p_i2c_bus->write(_w_adrs, packet, 2) != I2C_WRITE_OK)
j3 17:b646b1e3970b 604 {
IanBenzMaxim 26:a361e3f42ba5 605 result = OneWireMaster::CommunicationWriteError;
j3 17:b646b1e3970b 606 }
j3 17:b646b1e3970b 607 else
j3 17:b646b1e3970b 608 {
IanBenzMaxim 26:a361e3f42ba5 609 if(_p_i2c_bus->read(_r_adrs, &data, 1) != I2C_READ_OK)
IanBenzMaxim 26:a361e3f42ba5 610 {
IanBenzMaxim 26:a361e3f42ba5 611 result = OneWireMaster::CommunicationReadError;
IanBenzMaxim 26:a361e3f42ba5 612 }
IanBenzMaxim 26:a361e3f42ba5 613 else
IanBenzMaxim 26:a361e3f42ba5 614 {
IanBenzMaxim 26:a361e3f42ba5 615 recvbyte = data;
IanBenzMaxim 26:a361e3f42ba5 616 result = OneWireMaster::Success;
IanBenzMaxim 26:a361e3f42ba5 617 }
j3 17:b646b1e3970b 618 }
j3 17:b646b1e3970b 619 }
j3 17:b646b1e3970b 620 }
j3 2:02d228c25fd4 621 }
j3 2:02d228c25fd4 622
j3 17:b646b1e3970b 623 return result;
j3 17:b646b1e3970b 624 }
j3 17:b646b1e3970b 625
j3 17:b646b1e3970b 626
j3 17:b646b1e3970b 627 //*********************************************************************
j3 23:e8e403d61359 628 OneWireMaster::CmdResult Ds248x::OWWriteBlock(const uint8_t *tran_buf, uint8_t tran_len)
j3 17:b646b1e3970b 629 {
j3 23:e8e403d61359 630 OneWireMaster::CmdResult result;
j3 17:b646b1e3970b 631
j3 17:b646b1e3970b 632 for(uint8_t idx = 0; idx < tran_len; idx++)
j3 17:b646b1e3970b 633 {
IanBenzMaxim 26:a361e3f42ba5 634 result = OneWireMaster::OWWriteByte(tran_buf[idx]);
j3 23:e8e403d61359 635 if(result != OneWireMaster::Success)
j3 17:b646b1e3970b 636 {
j3 17:b646b1e3970b 637 break;
j3 17:b646b1e3970b 638 }
j3 17:b646b1e3970b 639 }
j3 17:b646b1e3970b 640
j3 17:b646b1e3970b 641 return result;
j3 17:b646b1e3970b 642 }
j3 17:b646b1e3970b 643
j3 17:b646b1e3970b 644
j3 17:b646b1e3970b 645 //*********************************************************************
j3 23:e8e403d61359 646 OneWireMaster::CmdResult Ds248x::OWReadBlock(uint8_t *rx_buf, uint8_t rx_len)
j3 17:b646b1e3970b 647 {
j3 23:e8e403d61359 648 OneWireMaster::CmdResult result;
j3 17:b646b1e3970b 649
j3 17:b646b1e3970b 650 for(uint8_t idx = 0; idx < rx_len; idx++)
j3 17:b646b1e3970b 651 {
j3 17:b646b1e3970b 652 //OwReadByte() uses pass by reference
IanBenzMaxim 26:a361e3f42ba5 653 result = OneWireMaster::OWReadByte(rx_buf[idx]);
j3 23:e8e403d61359 654 if(result != OneWireMaster::Success)
j3 17:b646b1e3970b 655 {
j3 17:b646b1e3970b 656 break;
j3 17:b646b1e3970b 657 }
j3 17:b646b1e3970b 658 }
j3 17:b646b1e3970b 659
j3 17:b646b1e3970b 660 return result;
j3 1:91e52f8ab8bf 661 }
j3 1:91e52f8ab8bf 662
j3 1:91e52f8ab8bf 663
j3 1:91e52f8ab8bf 664 //*********************************************************************
IanBenzMaxim 32:bce180b544ed 665 OneWireMaster::CmdResult Ds248x::OWSetSpeed(OWSpeed new_speed)
j3 1:91e52f8ab8bf 666 {
j3 2:02d228c25fd4 667 // set the speed
j3 5:ce108eeb878d 668 if (new_speed == SPEED_OVERDRIVE)
j3 2:02d228c25fd4 669 {
j3 2:02d228c25fd4 670 _c1WS = CONFIG_1WS;
j3 2:02d228c25fd4 671 }
j3 2:02d228c25fd4 672 else
j3 2:02d228c25fd4 673 {
j3 17:b646b1e3970b 674 _c1WS = 0;
j3 2:02d228c25fd4 675 }
j3 2:02d228c25fd4 676
j3 17:b646b1e3970b 677 // write the new config, and return result of op
j3 17:b646b1e3970b 678 return write_config(_c1WS | _cSPU | _cPDN | _cAPU);
j3 1:91e52f8ab8bf 679 }
j3 1:91e52f8ab8bf 680
j3 1:91e52f8ab8bf 681
j3 1:91e52f8ab8bf 682 //*********************************************************************
IanBenzMaxim 32:bce180b544ed 683 OneWireMaster::CmdResult Ds248x::OWSetLevel(OWLevel new_level)
j3 1:91e52f8ab8bf 684 {
j3 23:e8e403d61359 685 OneWireMaster::CmdResult result;
j3 2:02d228c25fd4 686
j3 2:02d228c25fd4 687 // function only will turn back to non-strong pull-up
j3 5:ce108eeb878d 688 if (new_level != LEVEL_NORMAL)
j3 2:02d228c25fd4 689 {
j3 23:e8e403d61359 690 result = OneWireMaster::OperationFailure;
j3 2:02d228c25fd4 691 }
j3 2:02d228c25fd4 692 else
j3 2:02d228c25fd4 693 {
j3 2:02d228c25fd4 694 // clear the strong pull-up bit in the global config state
j3 17:b646b1e3970b 695 _cSPU = 0;
j3 17:b646b1e3970b 696
j3 17:b646b1e3970b 697 result = write_config(_c1WS | _cSPU | _cPDN | _cAPU);
j3 2:02d228c25fd4 698 }
j3 2:02d228c25fd4 699
j3 17:b646b1e3970b 700 return result;
j3 1:91e52f8ab8bf 701 }
j3 1:91e52f8ab8bf 702
j3 1:91e52f8ab8bf 703
IanBenzMaxim 26:a361e3f42ba5 704 OneWireMaster::CmdResult Ds248x::ConfigureSPU(bool spu_enable)
j3 1:91e52f8ab8bf 705 {
IanBenzMaxim 26:a361e3f42ba5 706 OneWireMaster::CmdResult result;
IanBenzMaxim 26:a361e3f42ba5 707 if ((_cSPU == CONFIG_SPU) != spu_enable)
IanBenzMaxim 26:a361e3f42ba5 708 {
IanBenzMaxim 26:a361e3f42ba5 709 _cSPU = spu_enable;
IanBenzMaxim 26:a361e3f42ba5 710 result = write_config(_c1WS | _cSPU | _cPDN | _cAPU);
IanBenzMaxim 26:a361e3f42ba5 711 }
IanBenzMaxim 26:a361e3f42ba5 712 else
IanBenzMaxim 26:a361e3f42ba5 713 {
IanBenzMaxim 26:a361e3f42ba5 714 result = OneWireMaster::Success;
IanBenzMaxim 26:a361e3f42ba5 715 }
IanBenzMaxim 26:a361e3f42ba5 716 return result;
IanBenzMaxim 21:00c94aeb533e 717 }
IanBenzMaxim 21:00c94aeb533e 718
IanBenzMaxim 21:00c94aeb533e 719
j3 1:91e52f8ab8bf 720 //*********************************************************************
j3 6:1faafa0b3cd7 721 void Ds248x::set_i2c_adrs(DS248X_I2C_ADRS adrs)
j3 6:1faafa0b3cd7 722 {
j3 6:1faafa0b3cd7 723 _w_adrs = (adrs << 1);
j3 6:1faafa0b3cd7 724 _r_adrs = (_w_adrs | 1);
j3 6:1faafa0b3cd7 725 }