Mike Fruge / OneWire

Implementation of 1-Wire with added Alarm Search Functionality

Dependents:   Max32630_One_Wire_Interface

OneWire_Bridge/DS28E17/ds28e17.h@7:78a8857b3810, 2016-02-12 (annotated)

Committer:
j3
Date:
Fri Feb 12 22:56:13 2016 +0000
Revision:
7:78a8857b3810
Parent:
4:ca27db159b10
Child:
8:7c7a0ea0c568
Finished porting DS28E17 code, haven't tested yet.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
j3 4:ca27db159b10 1 /******************************************************************//**
j3 4:ca27db159b10 2 * @file ds28e17.h
j3 4:ca27db159b10 3 *
j3 4:ca27db159b10 4 * @author Justin Jordan
j3 4:ca27db159b10 5 *
j3 4:ca27db159b10 6 * @version 0.0.0
j3 4:ca27db159b10 7 *
j3 4:ca27db159b10 8 * Started: 31JAN16
j3 4:ca27db159b10 9 *
j3 4:ca27db159b10 10 * Updated:
j3 4:ca27db159b10 11 *
j3 4:ca27db159b10 12 * @brief Header file for DS28E17 1-wire to I2C bridge
j3 4:ca27db159b10 13 ***********************************************************************
j3 4:ca27db159b10 14 * Copyright (C) 2016 Maxim Integrated Products, Inc., All Rights Reserved.
j3 4:ca27db159b10 15 *
j3 4:ca27db159b10 16 * Permission is hereby granted, free of charge, to any person obtaining a
j3 4:ca27db159b10 17 * copy of this software and associated documentation files (the "Software"),
j3 4:ca27db159b10 18 * to deal in the Software without restriction, including without limitation
j3 4:ca27db159b10 19 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
j3 4:ca27db159b10 20 * and/or sell copies of the Software, and to permit persons to whom the
j3 4:ca27db159b10 21 * Software is furnished to do so, subject to the following conditions:
j3 4:ca27db159b10 22 *
j3 4:ca27db159b10 23 * The above copyright notice and this permission notice shall be included
j3 4:ca27db159b10 24 * in all copies or substantial portions of the Software.
j3 4:ca27db159b10 25 *
j3 4:ca27db159b10 26 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
j3 4:ca27db159b10 27 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
j3 4:ca27db159b10 28 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
j3 4:ca27db159b10 29 * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
j3 4:ca27db159b10 30 * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
j3 4:ca27db159b10 31 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
j3 4:ca27db159b10 32 * OTHER DEALINGS IN THE SOFTWARE.
j3 4:ca27db159b10 33 *
j3 4:ca27db159b10 34 * Except as contained in this notice, the name of Maxim Integrated
j3 4:ca27db159b10 35 * Products, Inc. shall not be used except as stated in the Maxim Integrated
j3 4:ca27db159b10 36 * Products, Inc. Branding Policy.
j3 4:ca27db159b10 37 *
j3 4:ca27db159b10 38 * The mere transfer of this software does not imply any licenses
j3 4:ca27db159b10 39 * of trade secrets, proprietary technology, copyrights, patents,
j3 4:ca27db159b10 40 * trademarks, maskwork rights, or any other form of intellectual
j3 4:ca27db159b10 41 * property whatsoever. Maxim Integrated Products, Inc. retains all
j3 4:ca27db159b10 42 * ownership rights.
j3 4:ca27db159b10 43 **********************************************************************/
j3 4:ca27db159b10 44
j3 4:ca27db159b10 45
j3 4:ca27db159b10 46 #ifndef DS28E17_H
j3 4:ca27db159b10 47 #define DS28E17_H
j3 4:ca27db159b10 48
j3 4:ca27db159b10 49
j3 4:ca27db159b10 50 #include "mbed.h"
j3 4:ca27db159b10 51 #include "OneWireMasters.h"
j3 4:ca27db159b10 52
j3 4:ca27db159b10 53
j3 4:ca27db159b10 54 class Ds28e17
j3 4:ca27db159b10 55 {
j3 4:ca27db159b10 56 public:
j3 4:ca27db159b10 57
j3 7:78a8857b3810 58 enum DS28E17_CMDS
j3 7:78a8857b3810 59 {
j3 7:78a8857b3810 60 CMD_I2C_WRITE_W_STOP = 0x4B,
j3 7:78a8857b3810 61 CMD_I2C_WRITE_NO_STOP = 0x5A,
j3 7:78a8857b3810 62 CMD_I2C_WRITE_ONLY = 0x69,
j3 7:78a8857b3810 63 CMD_I2C_WRITE_ONLY_W_STOP = 0x78,
j3 7:78a8857b3810 64 CMD_I2C_READ_W_STOP = 0x87,
j3 7:78a8857b3810 65 CMD_I2C_WRITE_READ_W_STOP = 0x2D,
j3 7:78a8857b3810 66 CMD_WRITE_CONFIG_REG = 0xD2,
j3 7:78a8857b3810 67 CMD_READ_CONFIG_REG = 0xE1,
j3 7:78a8857b3810 68 CMD_DISABLE_OW_MODE = 0x96,
j3 7:78a8857b3810 69 CMD_ENABLE_SLEEP_MODE = 0x1E,
j3 7:78a8857b3810 70 CMD_READ_DEVICE_REV = 0xC3
j3 7:78a8857b3810 71 };
j3 7:78a8857b3810 72
j3 7:78a8857b3810 73 static const size_t POLL_LIMIT = 10000;
j3 7:78a8857b3810 74
j3 4:ca27db159b10 75 /**********************************************************//**
j3 4:ca27db159b10 76 * @brief Ds28e17 constructor
j3 4:ca27db159b10 77 *
j3 4:ca27db159b10 78 * @details
j3 4:ca27db159b10 79 *
j3 4:ca27db159b10 80 * On Entry:
j3 4:ca27db159b10 81 * @param[in] p_owm - pointer to a 1-wire master of the following
j3 4:ca27db159b10 82 * types; Ds248x, Ds2480b, OwGpio which
j3 4:ca27db159b10 83 * inherit the base class 'OneWireInterface'
j3 4:ca27db159b10 84 *
j3 4:ca27db159b10 85 * On Exit:
j3 4:ca27db159b10 86 * @return
j3 4:ca27db159b10 87 **************************************************************/
j3 7:78a8857b3810 88 Ds28e17(OneWireInterface &owm);
j3 4:ca27db159b10 89
j3 4:ca27db159b10 90
j3 4:ca27db159b10 91 /**********************************************************//**
j3 4:ca27db159b10 92 * @brief Ds28e17 destructor
j3 4:ca27db159b10 93 *
j3 4:ca27db159b10 94 * @details releases resources used by object
j3 4:ca27db159b10 95 *
j3 4:ca27db159b10 96 * On Entry:
j3 4:ca27db159b10 97 *
j3 4:ca27db159b10 98 * On Exit:
j3 4:ca27db159b10 99 * @return
j3 4:ca27db159b10 100 **************************************************************/
j3 4:ca27db159b10 101 ~Ds28e17();
j3 4:ca27db159b10 102
j3 4:ca27db159b10 103
j3 4:ca27db159b10 104 /**********************************************************//**
j3 4:ca27db159b10 105 * @brief Write to selected DS28E17's I2C with Stop.
j3 4:ca27db159b10 106 * Poll until I2C write complete and receive status info.
j3 4:ca27db159b10 107 *
j3 4:ca27db159b10 108 * @details Output on I2C: S, Address + Write, Write Data [1-255], P
j3 4:ca27db159b10 109 *
j3 4:ca27db159b10 110 * On Entry:
j3 4:ca27db159b10 111 * @param[in] I2C_addr -
j3 4:ca27db159b10 112 * Writes I2C address. The least significant bit of the I2C
j3 4:ca27db159b10 113 * address is automatically cleared by the command.
j3 4:ca27db159b10 114 *
j3 4:ca27db159b10 115 * @param[in] length
j3 4:ca27db159b10 116 * The number of data bytes to be written ranging from 01h to FFh.
j3 4:ca27db159b10 117 * A value of zero will assert the Error Detected pin (ED).
j3 4:ca27db159b10 118 *
j3 4:ca27db159b10 119 * @param[in] *data
j3 4:ca27db159b10 120 * User defines write data ranging from 1-255 bytes.
j3 4:ca27db159b10 121 *
j3 4:ca27db159b10 122 * On Exit:
j3 4:ca27db159b10 123 * @param[out] status
j3 4:ca27db159b10 124 * Detects the condition of the Start (bit3), N/A (bit2),
j3 4:ca27db159b10 125 * Address(bit1) and CRC16(bit0) bits.
j3 4:ca27db159b10 126 * b3;0=No Err|1=I2CStart prev-not issued,
j3 4:ca27db159b10 127 * b2;0=No Err|1=I2C N/A Err,
j3 4:ca27db159b10 128 * b1;0=No Err|1=Addr Err,
j3 4:ca27db159b10 129 * b0;0=Valid CRC16|1=Invalid CRC16
j3 4:ca27db159b10 130 *
j3 4:ca27db159b10 131 * @param[out] wr_status
j3 4:ca27db159b10 132 * Indicates which write byte NACK’d. A value of 00h indicates
j3 4:ca27db159b10 133 * all bytes were acknowledged by the slave.
j3 4:ca27db159b10 134 * A non-zero value indicates the byte number that NACK’d.
j3 4:ca27db159b10 135 *
j3 4:ca27db159b10 136 * @return
j3 4:ca27db159b10 137 * true if device selected and written @n
j3 4:ca27db159b10 138 * false if failed device select
j3 4:ca27db159b10 139 **************************************************************/
j3 4:ca27db159b10 140 bool I2C_WriteDataWithStop(uint8_t I2C_addr, uint8_t length,
j3 7:78a8857b3810 141 uint8_t *data, uint8_t &status,
j3 7:78a8857b3810 142 uint8_t &wr_status);
j3 4:ca27db159b10 143
j3 4:ca27db159b10 144 /**********************************************************//**
j3 4:ca27db159b10 145 * @brief Write to selected DS28E17's I2C No Stop.
j3 4:ca27db159b10 146 * Poll until I2C write complete and receive status info.
j3 4:ca27db159b10 147 *
j3 4:ca27db159b10 148 * @details Output on I2C: S, Address + Write, Write Data [1-255]
j3 4:ca27db159b10 149 *
j3 4:ca27db159b10 150 * On Entry:
j3 4:ca27db159b10 151 * @param[in] I2C_addr
j3 4:ca27db159b10 152 * Writes I2C address. The least significant bit of the I2C address
j3 4:ca27db159b10 153 * is automatically cleared by the command.
j3 4:ca27db159b10 154 *
j3 4:ca27db159b10 155 * @param[in] length
j3 4:ca27db159b10 156 * The number of data bytes to be written ranging from 01h to FFh.
j3 4:ca27db159b10 157 * A value of zero will assert the Error Detected pin (ED).
j3 4:ca27db159b10 158 *
j3 4:ca27db159b10 159 * @param[in] *data
j3 4:ca27db159b10 160 * User defines write data ranging from 1-255 bytes.
j3 4:ca27db159b10 161 *
j3 4:ca27db159b10 162 * On Exit:
j3 4:ca27db159b10 163 * @param[out] status
j3 4:ca27db159b10 164 * Detects the condition of the Start (bit3), N/A (bit2),
j3 4:ca27db159b10 165 * Address(bit1) and CRC16(bit0) bits.
j3 4:ca27db159b10 166 * b3;0=No Err|1=I2CStart prev-not issued,
j3 4:ca27db159b10 167 * b2;0=No Err|1=I2C N/A Err,
j3 4:ca27db159b10 168 * b1;0=No Err|1=Addr Err,
j3 4:ca27db159b10 169 * b0;0=Valid CRC16|1=Invalid CRC16
j3 4:ca27db159b10 170 *
j3 4:ca27db159b10 171 * @param[out] wr_status
j3 4:ca27db159b10 172 * Indicates which write byte NACK’d. A value of 00h indicates
j3 4:ca27db159b10 173 * all bytes were acknowledged by the slave.
j3 4:ca27db159b10 174 * A non-zero value indicates the byte number that NACK’d.
j3 4:ca27db159b10 175 *
j3 4:ca27db159b10 176 * @return
j3 4:ca27db159b10 177 * true if device selected and written @n
j3 4:ca27db159b10 178 * false if failed device select
j3 4:ca27db159b10 179 **************************************************************/
j3 4:ca27db159b10 180 bool I2C_WriteDataNoStop(uint8_t I2C_addr, uint8_t length,
j3 7:78a8857b3810 181 uint8_t *data, uint8_t &status,
j3 7:78a8857b3810 182 uint8_t &wr_status);
j3 4:ca27db159b10 183
j3 4:ca27db159b10 184
j3 4:ca27db159b10 185 /**********************************************************//**
j3 4:ca27db159b10 186 * @brief Write to selected DS28E17's I2C with Data only.
j3 4:ca27db159b10 187 * Poll until I2C write complete and receive status info.
j3 4:ca27db159b10 188 *
j3 4:ca27db159b10 189 * @details Output on I2C: Write Data [1-255]
j3 4:ca27db159b10 190 *
j3 4:ca27db159b10 191 * On Entry:
j3 4:ca27db159b10 192 * @param[in] length
j3 4:ca27db159b10 193 * The number of data bytes to be written ranging from 01h to FFh.
j3 4:ca27db159b10 194 * A value of zero will assert the Error Detected pin (ED).
j3 4:ca27db159b10 195 *
j3 4:ca27db159b10 196 * @param[in] *data
j3 4:ca27db159b10 197 * User defines write data ranging from 1-255 bytes.
j3 4:ca27db159b10 198 *
j3 4:ca27db159b10 199 * On Exit:
j3 4:ca27db159b10 200 * @param[out] status
j3 4:ca27db159b10 201 * Detects the condition of the Start (bit3), N/A (bit2),
j3 4:ca27db159b10 202 * Address(bit1) and CRC16(bit0) bits.
j3 4:ca27db159b10 203 * b3;0=No Err|1=I2CStart prev-not issued,
j3 4:ca27db159b10 204 * b2;0=No Err|1=I2C N/A Err,
j3 4:ca27db159b10 205 * b1;0=No Err|1=Addr Err,
j3 4:ca27db159b10 206 * b0;0=Valid CRC16|1=Invalid CRC16
j3 4:ca27db159b10 207 *
j3 4:ca27db159b10 208 * @param[out] wr_status
j3 4:ca27db159b10 209 * Indicates which write byte NACK’d. A value of 00h indicates all bytes were acknowledged by the slave.
j3 4:ca27db159b10 210 * A non-zero value indicates the byte number that NACK’d.
j3 4:ca27db159b10 211 *
j3 4:ca27db159b10 212 * @return
j3 4:ca27db159b10 213 * true if device selected and written @n
j3 4:ca27db159b10 214 * false if failed device select
j3 4:ca27db159b10 215 **************************************************************/
j3 4:ca27db159b10 216 bool I2C_WriteDataOnly(uint8_t length, uint8_t *data,
j3 7:78a8857b3810 217 uint8_t &status, uint8_t &wr_status);
j3 4:ca27db159b10 218
j3 4:ca27db159b10 219
j3 4:ca27db159b10 220 /**********************************************************//**
j3 4:ca27db159b10 221 * @brief Write to selected DS28E17's I2C with Stop.
j3 4:ca27db159b10 222 * Poll until I2C write complete and receive status info.
j3 4:ca27db159b10 223 *
j3 4:ca27db159b10 224 * @details Output on I2C: Write Data [1-255], P
j3 4:ca27db159b10 225 *
j3 4:ca27db159b10 226 * On Entry:
j3 4:ca27db159b10 227 * @param[in] length
j3 4:ca27db159b10 228 * The number of data bytes to be written ranging from 01h to FFh.
j3 4:ca27db159b10 229 * A value of zero will assert the Error Detected pin (ED).
j3 4:ca27db159b10 230 *
j3 4:ca27db159b10 231 * @param[in] *data
j3 4:ca27db159b10 232 * User defines write data ranging from 1-255 bytes.
j3 4:ca27db159b10 233 *
j3 4:ca27db159b10 234 * On Exit:
j3 4:ca27db159b10 235 * @param[out] status
j3 4:ca27db159b10 236 * Detects the condition of the Start (bit3), N/A (bit2),
j3 4:ca27db159b10 237 * Address(bit1) and CRC16(bit0) bits.
j3 4:ca27db159b10 238 * b3;0=No Err|1=I2CStart prev-not issued,
j3 4:ca27db159b10 239 * b2;0=No Err|1=I2C N/A Err,
j3 4:ca27db159b10 240 * b1;0=No Err|1=Addr Err,
j3 4:ca27db159b10 241 * b0;0=Valid CRC16|1=Invalid CRC16
j3 4:ca27db159b10 242 *
j3 4:ca27db159b10 243 * @param[out] wr_status
j3 4:ca27db159b10 244 * Indicates which write byte NACK’d. A value of 00h indicates all bytes were acknowledged by the slave.
j3 4:ca27db159b10 245 * A non-zero value indicates the byte number that NACK’d.
j3 4:ca27db159b10 246 *
j3 4:ca27db159b10 247 * @return
j3 4:ca27db159b10 248 * true if device selected and written @n
j3 4:ca27db159b10 249 * false if failed device select
j3 4:ca27db159b10 250 **************************************************************/
j3 4:ca27db159b10 251 bool I2C_WriteDataOnlyWithStop(uint8_t length, uint8_t *data,
j3 7:78a8857b3810 252 uint8_t &status, uint8_t &wr_status);
j3 4:ca27db159b10 253
j3 4:ca27db159b10 254
j3 4:ca27db159b10 255 /**********************************************************//**
j3 4:ca27db159b10 256 * @brief Write to selected DS28E17's I2C with Stop and poll until I2C write complete
j3 4:ca27db159b10 257 * receive status info, and read data with a stop at the end.
j3 4:ca27db159b10 258 *
j3 4:ca27db159b10 259 * @details Output on I2C:
j3 4:ca27db159b10 260 * S, Slave Address + Write, Write Data [1-255],
j3 4:ca27db159b10 261 * Sr, Address + Read, Read Data [1-255], P (NACK last read byte)
j3 4:ca27db159b10 262 *
j3 4:ca27db159b10 263 * On Entry:
j3 4:ca27db159b10 264 * @param[in] I2C_addr
j3 4:ca27db159b10 265 * Writes I2C address. The least significant bit of the I2C address
j3 4:ca27db159b10 266 * is automatically cleared by the command.
j3 4:ca27db159b10 267 *
j3 4:ca27db159b10 268 * @param[in] length
j3 4:ca27db159b10 269 * The number of data bytes to be written ranging from 01h to FFh.
j3 4:ca27db159b10 270 * A value of zero will assert the Error Detected pin (ED).
j3 4:ca27db159b10 271 *
j3 4:ca27db159b10 272 * @param[in] *data
j3 4:ca27db159b10 273 * User defines write data ranging from 1-255 bytes.
j3 4:ca27db159b10 274 *
j3 4:ca27db159b10 275 * On Exit:
j3 4:ca27db159b10 276 * @param[out] nu_bytes_read
j3 4:ca27db159b10 277 * Number of I2C bytes to read. A value of zero will assert the Error Detected pin (ED).
j3 4:ca27db159b10 278 *
j3 4:ca27db159b10 279 * @param[out] status
j3 4:ca27db159b10 280 * Detects the condition of the Start (bit3), N/A (bit2),
j3 4:ca27db159b10 281 * Address(bit1) and CRC16(bit0) bits.
j3 4:ca27db159b10 282 * b3;0=No Err|1=I2CStart prev-not issued,
j3 4:ca27db159b10 283 * b2;0=No Err|1=I2C N/A Err,
j3 4:ca27db159b10 284 * b1;0=No Err|1=Addr Err,
j3 4:ca27db159b10 285 * b0;0=Valid CRC16|1=Invalid CRC16
j3 4:ca27db159b10 286 *
j3 4:ca27db159b10 287 * @param[out] wr_status
j3 4:ca27db159b10 288 * Indicates which write byte NACK’d. A value of 00h indicates all bytes were acknowledged by the slave.
j3 4:ca27db159b10 289 * A non-zero value indicates the byte number that NACK’d.
j3 4:ca27db159b10 290 *
j3 4:ca27db159b10 291 * @param[out] *read_data
j3 4:ca27db159b10 292 * Array of read data received from I2C.
j3 4:ca27db159b10 293 *
j3 4:ca27db159b10 294 * @return
j3 4:ca27db159b10 295 * true if device selected, written and read @n
j3 4:ca27db159b10 296 * false if failed device select or timeout occurred or CRC16 error
j3 4:ca27db159b10 297 **************************************************************/
j3 4:ca27db159b10 298 bool I2C_WriteReadDataWithStop(uint8_t I2C_addr, uint8_t length,
j3 4:ca27db159b10 299 uint8_t *data, uint8_t nu_bytes_read,
j3 7:78a8857b3810 300 uint8_t &status, uint8_t &wr_status,
j3 4:ca27db159b10 301 uint8_t *read_data);
j3 4:ca27db159b10 302
j3 4:ca27db159b10 303
j3 4:ca27db159b10 304 /**********************************************************//**
j3 4:ca27db159b10 305 * @brief Selected DS28E17's and send I2C address and poll until
j3 4:ca27db159b10 306 * I2C read address complete, receive status info, and read data
j3 4:ca27db159b10 307 * with a stop at the end.
j3 4:ca27db159b10 308 *
j3 4:ca27db159b10 309 * @details Output on I2C:
j3 4:ca27db159b10 310 * S, Slave Address + Read, Read Data [1-255], P (NACK last read byte)
j3 4:ca27db159b10 311 *
j3 4:ca27db159b10 312 * On Entry:
j3 4:ca27db159b10 313 * @param[in] I2C_addr
j3 4:ca27db159b10 314 * Writes I2C address. The least significant bit of the I2C address
j3 4:ca27db159b10 315 * is automatically cleared by the command.
j3 4:ca27db159b10 316 *
j3 4:ca27db159b10 317 * On Exit:
j3 4:ca27db159b10 318 * @param[out] nu_bytes_read
j3 4:ca27db159b10 319 * Number of I2C bytes to read. A value of zero will assert the Error Detected pin (ED).
j3 4:ca27db159b10 320 *
j3 4:ca27db159b10 321 * @param[out] status
j3 4:ca27db159b10 322 * Detects the condition of the Start (bit3), N/A (bit2),
j3 4:ca27db159b10 323 * Address(bit1) and CRC16(bit0) bits.
j3 4:ca27db159b10 324 * b3;0=No Err|1=I2CStart prev-not issued,
j3 4:ca27db159b10 325 * b2;0=No Err|1=I2C N/A Err,
j3 4:ca27db159b10 326 * b1;0=No Err|1=Addr Err,
j3 4:ca27db159b10 327 * b0;0=Valid CRC16|1=Invalid CRC16
j3 4:ca27db159b10 328 *
j3 4:ca27db159b10 329 * @param[out] *read_data
j3 4:ca27db159b10 330 * Array of read data received from I2C.
j3 4:ca27db159b10 331 *
j3 4:ca27db159b10 332 * @return
j3 4:ca27db159b10 333 * true if device selected, written and read @n
j3 4:ca27db159b10 334 * false if failed device select or timeout occurred or CRC16 error
j3 4:ca27db159b10 335 **************************************************************/
j3 4:ca27db159b10 336 bool I2C_ReadDataWithStop(uint8_t I2C_addr, uint8_t nu_bytes_read,
j3 7:78a8857b3810 337 uint8_t &status, uint8_t *read_data);
j3 4:ca27db159b10 338
j3 4:ca27db159b10 339
j3 4:ca27db159b10 340 /**********************************************************//**
j3 4:ca27db159b10 341 * @brief Write to Configuration Register of DS28E17.
j3 4:ca27db159b10 342 *
j3 4:ca27db159b10 343 * @details
j3 4:ca27db159b10 344 *
j3 4:ca27db159b10 345 * On Entry:
j3 4:ca27db159b10 346 * @param[in] data
j3 4:ca27db159b10 347 * sent to configuration register
j3 4:ca27db159b10 348 *
j3 4:ca27db159b10 349 * On Exit:
j3 4:ca27db159b10 350 *
j3 4:ca27db159b10 351 * @return
j3 4:ca27db159b10 352 * true if device selected and written @n
j3 4:ca27db159b10 353 * false if failed device select
j3 4:ca27db159b10 354 **************************************************************/
j3 4:ca27db159b10 355 bool WriteConfigReg(uint8_t data);
j3 4:ca27db159b10 356
j3 4:ca27db159b10 357
j3 4:ca27db159b10 358 /**********************************************************//**
j3 4:ca27db159b10 359 * @brief Read the Configuration Register of DS28E17.
j3 4:ca27db159b10 360 *
j3 4:ca27db159b10 361 * @details
j3 4:ca27db159b10 362 *
j3 4:ca27db159b10 363 * On Entry:
j3 4:ca27db159b10 364 *
j3 4:ca27db159b10 365 * On Exit:
j3 4:ca27db159b10 366 *
j3 4:ca27db159b10 367 * @return
j3 7:78a8857b3810 368 * true if device selected and read correctly @n
j3 4:ca27db159b10 369 * false if failed device select
j3 4:ca27db159b10 370 **************************************************************/
j3 4:ca27db159b10 371 uint8_t ReadConfigReg(void);
j3 4:ca27db159b10 372
j3 4:ca27db159b10 373
j3 4:ca27db159b10 374 /**********************************************************//**
j3 4:ca27db159b10 375 * @brief Disable 1-Wire Mode DS28E17 and activates the input detection pin.
j3 4:ca27db159b10 376 * Immediately after the command, all 1-Wire signaling will be ignored
j3 4:ca27db159b10 377 * until the 1W_DET pin is high for more than 3ms.
j3 4:ca27db159b10 378 *
j3 4:ca27db159b10 379 * @details
j3 4:ca27db159b10 380 *
j3 4:ca27db159b10 381 * On Entry:
j3 4:ca27db159b10 382 *
j3 4:ca27db159b10 383 * On Exit:
j3 4:ca27db159b10 384 *
j3 4:ca27db159b10 385 * @return
j3 4:ca27db159b10 386 * true if device selected and written @n
j3 4:ca27db159b10 387 * false if failed device select
j3 4:ca27db159b10 388 **************************************************************/
j3 4:ca27db159b10 389 bool DisableOWMode();
j3 4:ca27db159b10 390
j3 4:ca27db159b10 391
j3 4:ca27db159b10 392 /**********************************************************//**
j3 4:ca27db159b10 393 * @brief The Enable Sleep Mode command puts the device into a low current mode.
j3 4:ca27db159b10 394 * All 1-Wire communication is ignored until woken up. Immediately after
j3 4:ca27db159b10 395 * the command, the device monitors the WAKEUP input pin and
j3 4:ca27db159b10 396 * exits sleep mode on a rising edge.
j3 4:ca27db159b10 397 *
j3 4:ca27db159b10 398 * @details
j3 4:ca27db159b10 399 *
j3 4:ca27db159b10 400 * On Entry:
j3 4:ca27db159b10 401 *
j3 4:ca27db159b10 402 * On Exit:
j3 4:ca27db159b10 403 *
j3 4:ca27db159b10 404 * @return
j3 4:ca27db159b10 405 * true if device selected and written @n
j3 4:ca27db159b10 406 * false if failed device select*
j3 4:ca27db159b10 407 **************************************************************/
j3 4:ca27db159b10 408 bool EnableSleepMode();
j3 4:ca27db159b10 409
j3 4:ca27db159b10 410
j3 4:ca27db159b10 411 /**********************************************************//**
j3 4:ca27db159b10 412 * @brief Read the Device Revision of DS28E17. The revision value
j3 4:ca27db159b10 413 * should never be zero. The upper nibble is the major revision
j3 4:ca27db159b10 414 * and the lower nibble is the minor revision.
j3 4:ca27db159b10 415 *
j3 4:ca27db159b10 416 * @details
j3 4:ca27db159b10 417 *
j3 4:ca27db159b10 418 * On Entry:
j3 4:ca27db159b10 419 *
j3 4:ca27db159b10 420 * On Exit:
j3 4:ca27db159b10 421 *
j3 4:ca27db159b10 422 * @return
j3 4:ca27db159b10 423 * revision value if device selected and read correctly @n
j3 4:ca27db159b10 424 * false if failed device select (i.e. 00h)
j3 4:ca27db159b10 425 **************************************************************/
j3 4:ca27db159b10 426 uint8_t ReadDeviceRevision(void);
j3 4:ca27db159b10 427
j3 4:ca27db159b10 428 private:
j3 4:ca27db159b10 429
j3 4:ca27db159b10 430 OneWireInterface *_p_owm;
j3 7:78a8857b3810 431
j3 4:ca27db159b10 432 bool _owm_owner;
j3 4:ca27db159b10 433 uint16_t _crc16;
j3 4:ca27db159b10 434 uint8_t _i2c_speed;
j3 4:ca27db159b10 435
j3 7:78a8857b3810 436 static const uint16_t _oddparity[16];
j3 4:ca27db159b10 437
j3 4:ca27db159b10 438 uint16_t docrc16(uint16_t data);
j3 4:ca27db159b10 439 };
j3 4:ca27db159b10 440
j3 4:ca27db159b10 441 #endif /*DS28E17_H*/