Mike Fruge / OneWire

Implementation of 1-Wire with added Alarm Search Functionality

Dependents:   Max32630_One_Wire_Interface

OneWire_Masters/DS2465/DS2465.cpp@48:6f9208ae280e, 2016-04-07 (annotated)

Committer:
IanBenzMaxim
Date:
Thu Apr 07 11:26:20 2016 -0500
Revision:
48:6f9208ae280e
Parent:
47:307dc45952db
Child:
69:f915c4c59a69
Fix narrowing warning. Add comments to ISha256MacCoprocessor.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
IanBenzMaxim 21:00c94aeb533e 1 #include "DS2465.hpp"
IanBenzMaxim 27:d5aaefa252f1 2 #include "RomId.hpp"
IanBenzMaxim 27:d5aaefa252f1 3 #include "mbed.h"
IanBenzMaxim 21:00c94aeb533e 4
IanBenzMaxim 21:00c94aeb533e 5 #define I2C_WRITE 0
IanBenzMaxim 21:00c94aeb533e 6 #define I2C_READ 1
IanBenzMaxim 21:00c94aeb533e 7
IanBenzMaxim 21:00c94aeb533e 8 // DS2465 commands
IanBenzMaxim 21:00c94aeb533e 9 #define CMD_1WMR 0xF0
IanBenzMaxim 21:00c94aeb533e 10 #define CMD_WCFG 0xD2
IanBenzMaxim 21:00c94aeb533e 11 #define CMD_CHSL 0xC3
IanBenzMaxim 21:00c94aeb533e 12 #define CMD_SRP 0xE1
IanBenzMaxim 21:00c94aeb533e 13
IanBenzMaxim 21:00c94aeb533e 14 #define CMD_1WRS 0xB4
IanBenzMaxim 21:00c94aeb533e 15 #define CMD_1WWB 0xA5
IanBenzMaxim 21:00c94aeb533e 16 #define CMD_1WRB 0x96
IanBenzMaxim 21:00c94aeb533e 17 #define CMD_1WSB 0x87
IanBenzMaxim 21:00c94aeb533e 18 #define CMD_1WT 0x78
IanBenzMaxim 21:00c94aeb533e 19 #define CMD_1WTB 0x69
IanBenzMaxim 21:00c94aeb533e 20 #define CMD_1WRF 0xE1
IanBenzMaxim 21:00c94aeb533e 21 #define CMD_CPS 0x5A
IanBenzMaxim 21:00c94aeb533e 22 #define CMD_CSS 0x4B
IanBenzMaxim 21:00c94aeb533e 23 #define CMD_CSAM 0x3C
IanBenzMaxim 21:00c94aeb533e 24 #define CMD_CSWM 0x2D
IanBenzMaxim 21:00c94aeb533e 25 #define CMD_CNMS 0x1E
IanBenzMaxim 21:00c94aeb533e 26 #define CMD_SPR 0x0F
IanBenzMaxim 21:00c94aeb533e 27
IanBenzMaxim 21:00c94aeb533e 28 // DS2465 status bits
IanBenzMaxim 21:00c94aeb533e 29 #define STATUS_1WB 0x01
IanBenzMaxim 21:00c94aeb533e 30 #define STATUS_PPD 0x02
IanBenzMaxim 21:00c94aeb533e 31 #define STATUS_SD 0x04
IanBenzMaxim 21:00c94aeb533e 32 #define STATUS_LL 0x08
IanBenzMaxim 21:00c94aeb533e 33 #define STATUS_RST 0x10
IanBenzMaxim 21:00c94aeb533e 34 #define STATUS_SBR 0x20
IanBenzMaxim 21:00c94aeb533e 35 #define STATUS_TSB 0x40
IanBenzMaxim 21:00c94aeb533e 36 #define STATUS_DIR 0x80
IanBenzMaxim 21:00c94aeb533e 37
IanBenzMaxim 21:00c94aeb533e 38 static const int I2C_WRITE_OK = 0;
IanBenzMaxim 21:00c94aeb533e 39
IanBenzMaxim 24:8942d8478d68 40 std::uint8_t DS2465::Config::readByte() const
IanBenzMaxim 24:8942d8478d68 41 {
IanBenzMaxim 24:8942d8478d68 42 std::uint8_t config = 0;
IanBenzMaxim 24:8942d8478d68 43 if (c1WS)
IanBenzMaxim 24:8942d8478d68 44 config |= 0x08;
IanBenzMaxim 24:8942d8478d68 45 if (cSPU)
IanBenzMaxim 24:8942d8478d68 46 config |= 0x04;
IanBenzMaxim 24:8942d8478d68 47 if (cPDN)
IanBenzMaxim 24:8942d8478d68 48 config |= 0x02;
IanBenzMaxim 24:8942d8478d68 49 if (cAPU)
IanBenzMaxim 24:8942d8478d68 50 config |= 0x01;
IanBenzMaxim 24:8942d8478d68 51 return config;
IanBenzMaxim 24:8942d8478d68 52 }
IanBenzMaxim 24:8942d8478d68 53
IanBenzMaxim 24:8942d8478d68 54 std::uint8_t DS2465::Config::writeByte() const
IanBenzMaxim 24:8942d8478d68 55 {
IanBenzMaxim 24:8942d8478d68 56 std::uint8_t config = readByte();
IanBenzMaxim 24:8942d8478d68 57 return ((~config << 4) | config);
IanBenzMaxim 24:8942d8478d68 58 }
IanBenzMaxim 24:8942d8478d68 59
IanBenzMaxim 24:8942d8478d68 60 void DS2465::Config::reset()
IanBenzMaxim 24:8942d8478d68 61 {
IanBenzMaxim 24:8942d8478d68 62 c1WS = cSPU = cPDN = false;
IanBenzMaxim 24:8942d8478d68 63 cAPU = true;
IanBenzMaxim 24:8942d8478d68 64 }
IanBenzMaxim 24:8942d8478d68 65
IanBenzMaxim 32:bce180b544ed 66 DS2465::DS2465(I2C & I2C_interface, std::uint8_t I2C_address)
IanBenzMaxim 21:00c94aeb533e 67 : m_I2C_interface(I2C_interface), m_I2C_address(I2C_address)
IanBenzMaxim 21:00c94aeb533e 68 {
IanBenzMaxim 21:00c94aeb533e 69
IanBenzMaxim 21:00c94aeb533e 70 }
IanBenzMaxim 21:00c94aeb533e 71
IanBenzMaxim 21:00c94aeb533e 72 OneWireMaster::CmdResult DS2465::OWInitMaster()
IanBenzMaxim 21:00c94aeb533e 73 {
IanBenzMaxim 47:307dc45952db 74 OneWireMaster::CmdResult result;
IanBenzMaxim 47:307dc45952db 75
IanBenzMaxim 47:307dc45952db 76 // reset DS2465
IanBenzMaxim 47:307dc45952db 77 result = reset();
IanBenzMaxim 47:307dc45952db 78 if (result != OneWireMaster::Success)
IanBenzMaxim 47:307dc45952db 79 return result;
IanBenzMaxim 47:307dc45952db 80
IanBenzMaxim 47:307dc45952db 81 // write the default configuration setup
IanBenzMaxim 47:307dc45952db 82 Config defaultConfig;
IanBenzMaxim 47:307dc45952db 83 result = writeConfig(defaultConfig, true);
IanBenzMaxim 47:307dc45952db 84 return result;
IanBenzMaxim 21:00c94aeb533e 85 }
IanBenzMaxim 21:00c94aeb533e 86
IanBenzMaxim 33:a4c015046956 87 OneWireMaster::CmdResult DS2465::computeNextMasterSecret(bool swap, unsigned int pageNum, PageRegion region)
IanBenzMaxim 21:00c94aeb533e 88 {
IanBenzMaxim 48:6f9208ae280e 89 std::uint8_t command[2] = { CMD_CNMS, (std::uint8_t)(swap ? (0xC8 | (pageNum << 4) | region) : 0xBF) };
IanBenzMaxim 34:11fffbe98ef9 90 return writeMemory(ADDR_CMD_REG, command, 2);
IanBenzMaxim 21:00c94aeb533e 91 }
IanBenzMaxim 21:00c94aeb533e 92
IanBenzMaxim 33:a4c015046956 93 OneWireMaster::CmdResult DS2465::computeWriteMac(bool regwrite, bool swap, unsigned int pageNum, unsigned int segmentNum) const
IanBenzMaxim 21:00c94aeb533e 94 {
IanBenzMaxim 48:6f9208ae280e 95 std::uint8_t command[2] = { CMD_CSWM, (std::uint8_t)((regwrite << 7) | (swap << 6) | (pageNum << 4) | segmentNum) };
IanBenzMaxim 34:11fffbe98ef9 96 return cWriteMemory(ADDR_CMD_REG, command, 2);
IanBenzMaxim 21:00c94aeb533e 97 }
IanBenzMaxim 21:00c94aeb533e 98
IanBenzMaxim 33:a4c015046956 99 OneWireMaster::CmdResult DS2465::computeAuthMac(bool swap, unsigned int pageNum, PageRegion region) const
IanBenzMaxim 21:00c94aeb533e 100 {
IanBenzMaxim 48:6f9208ae280e 101 std::uint8_t command[2] = { CMD_CSAM, (std::uint8_t)(swap ? (0xC8 | (pageNum << 4) | region) : 0xBF) };
IanBenzMaxim 34:11fffbe98ef9 102 return cWriteMemory(ADDR_CMD_REG, command, 2);
IanBenzMaxim 21:00c94aeb533e 103 }
IanBenzMaxim 21:00c94aeb533e 104
IanBenzMaxim 33:a4c015046956 105 OneWireMaster::CmdResult DS2465::computeSlaveSecret(bool swap, unsigned int pageNum, PageRegion region)
IanBenzMaxim 21:00c94aeb533e 106 {
IanBenzMaxim 48:6f9208ae280e 107 std::uint8_t command[2] = { CMD_CSS, (std::uint8_t)(swap ? (0xC8 | (pageNum << 4) | region) : 0xBF) };
IanBenzMaxim 34:11fffbe98ef9 108 return writeMemory(ADDR_CMD_REG, command, 2);
IanBenzMaxim 21:00c94aeb533e 109 }
IanBenzMaxim 21:00c94aeb533e 110
IanBenzMaxim 48:6f9208ae280e 111 ISha256MacCoprocessor::CmdResult DS2465::setMasterSecret(const Secret & masterSecret)
IanBenzMaxim 21:00c94aeb533e 112 {
IanBenzMaxim 21:00c94aeb533e 113 OneWireMaster::CmdResult result;
IanBenzMaxim 48:6f9208ae280e 114 result = writeMemory(ADDR_SPAD, masterSecret, masterSecret.length);
IanBenzMaxim 21:00c94aeb533e 115 if (result == OneWireMaster::Success)
IanBenzMaxim 47:307dc45952db 116 result = copyScratchpadToSecret();
IanBenzMaxim 21:00c94aeb533e 117 if (result == OneWireMaster::Success)
IanBenzMaxim 47:307dc45952db 118 wait_ms(eepromPageWriteDelayMs);
IanBenzMaxim 21:00c94aeb533e 119 return (result == OneWireMaster::Success ? ISha256MacCoprocessor::Success : ISha256MacCoprocessor::OperationFailure);
IanBenzMaxim 21:00c94aeb533e 120 }
IanBenzMaxim 21:00c94aeb533e 121
IanBenzMaxim 33:a4c015046956 122 ISha256MacCoprocessor::CmdResult DS2465::computeWriteMac(const WriteMacData & writeMacData, Mac & mac) const
IanBenzMaxim 21:00c94aeb533e 123 {
IanBenzMaxim 21:00c94aeb533e 124 OneWireMaster::CmdResult result;
IanBenzMaxim 21:00c94aeb533e 125 // Write input data to scratchpad
IanBenzMaxim 34:11fffbe98ef9 126 result = writeScratchpad(writeMacData, writeMacData.length);
IanBenzMaxim 21:00c94aeb533e 127 // Compute MAC
IanBenzMaxim 21:00c94aeb533e 128 if (result == OneWireMaster::Success)
IanBenzMaxim 47:307dc45952db 129 result = computeWriteMac(false);
IanBenzMaxim 21:00c94aeb533e 130 if (result == OneWireMaster::Success)
IanBenzMaxim 21:00c94aeb533e 131 {
IanBenzMaxim 34:11fffbe98ef9 132 wait_ms(shaComputationDelayMs);
IanBenzMaxim 21:00c94aeb533e 133 // Read MAC from register
IanBenzMaxim 34:11fffbe98ef9 134 result = readMemory(ADDR_MAC_READ, mac, mac.length, true);
IanBenzMaxim 21:00c94aeb533e 135 }
IanBenzMaxim 21:00c94aeb533e 136 return (result == OneWireMaster::Success ? ISha256MacCoprocessor::Success : ISha256MacCoprocessor::OperationFailure);
IanBenzMaxim 21:00c94aeb533e 137 }
IanBenzMaxim 21:00c94aeb533e 138
IanBenzMaxim 33:a4c015046956 139 ISha256MacCoprocessor::CmdResult DS2465::computeAuthMac(const DevicePage & devicePage, const DeviceScratchpad & challenge, const AuthMacData & authMacData, Mac & mac) const
IanBenzMaxim 21:00c94aeb533e 140 {
IanBenzMaxim 21:00c94aeb533e 141 OneWireMaster::CmdResult result;
IanBenzMaxim 21:00c94aeb533e 142 int addr = ADDR_SPAD;
IanBenzMaxim 21:00c94aeb533e 143 // Write input data to scratchpad
IanBenzMaxim 34:11fffbe98ef9 144 result = cWriteMemory(addr, devicePage, devicePage.length);
IanBenzMaxim 21:00c94aeb533e 145 if (result == OneWireMaster::Success)
IanBenzMaxim 21:00c94aeb533e 146 {
IanBenzMaxim 33:a4c015046956 147 addr += devicePage.length;
IanBenzMaxim 34:11fffbe98ef9 148 result = cWriteMemory(addr, challenge, challenge.length);
IanBenzMaxim 21:00c94aeb533e 149 }
IanBenzMaxim 21:00c94aeb533e 150 if (result == OneWireMaster::Success)
IanBenzMaxim 21:00c94aeb533e 151 {
IanBenzMaxim 33:a4c015046956 152 addr += challenge.length;
IanBenzMaxim 34:11fffbe98ef9 153 result = cWriteMemory(addr, authMacData, authMacData.length);
IanBenzMaxim 21:00c94aeb533e 154 }
IanBenzMaxim 21:00c94aeb533e 155 // Compute MAC
IanBenzMaxim 21:00c94aeb533e 156 if (result == OneWireMaster::Success)
IanBenzMaxim 47:307dc45952db 157 result = computeAuthMac();
IanBenzMaxim 21:00c94aeb533e 158 if (result == OneWireMaster::Success)
IanBenzMaxim 21:00c94aeb533e 159 {
IanBenzMaxim 34:11fffbe98ef9 160 wait_ms(shaComputationDelayMs * 2);
IanBenzMaxim 21:00c94aeb533e 161 // Read MAC from register
IanBenzMaxim 34:11fffbe98ef9 162 result = readMemory(ADDR_MAC_READ, mac, mac.length, true);
IanBenzMaxim 21:00c94aeb533e 163 }
IanBenzMaxim 21:00c94aeb533e 164 return (result == OneWireMaster::Success ? ISha256MacCoprocessor::Success : ISha256MacCoprocessor::OperationFailure);
IanBenzMaxim 21:00c94aeb533e 165 }
IanBenzMaxim 21:00c94aeb533e 166
IanBenzMaxim 33:a4c015046956 167 ISha256MacCoprocessor::CmdResult DS2465::computeSlaveSecret(const DevicePage & devicePage, const DeviceScratchpad & deviceScratchpad, const SlaveSecretData & slaveSecretData)
IanBenzMaxim 21:00c94aeb533e 168 {
IanBenzMaxim 21:00c94aeb533e 169 OneWireMaster::CmdResult result;
IanBenzMaxim 21:00c94aeb533e 170 int addr = ADDR_SPAD;
IanBenzMaxim 21:00c94aeb533e 171 // Write input data to scratchpad
IanBenzMaxim 34:11fffbe98ef9 172 result = writeMemory(addr, devicePage, devicePage.length);
IanBenzMaxim 21:00c94aeb533e 173 if (result == OneWireMaster::Success)
IanBenzMaxim 21:00c94aeb533e 174 {
IanBenzMaxim 33:a4c015046956 175 addr += devicePage.length;
IanBenzMaxim 34:11fffbe98ef9 176 result = writeMemory(addr, deviceScratchpad, deviceScratchpad.length);
IanBenzMaxim 21:00c94aeb533e 177 }
IanBenzMaxim 21:00c94aeb533e 178 if (result == OneWireMaster::Success)
IanBenzMaxim 21:00c94aeb533e 179 {
IanBenzMaxim 33:a4c015046956 180 addr += deviceScratchpad.length;
IanBenzMaxim 34:11fffbe98ef9 181 result = writeMemory(addr, slaveSecretData, slaveSecretData.length);
IanBenzMaxim 21:00c94aeb533e 182 }
IanBenzMaxim 21:00c94aeb533e 183 // Compute secret
IanBenzMaxim 21:00c94aeb533e 184 if (result == OneWireMaster::Success)
IanBenzMaxim 47:307dc45952db 185 result = computeSlaveSecret();
IanBenzMaxim 21:00c94aeb533e 186 if (result == OneWireMaster::Success)
IanBenzMaxim 34:11fffbe98ef9 187 wait_ms(shaComputationDelayMs * 2);
IanBenzMaxim 21:00c94aeb533e 188 return (result == OneWireMaster::Success ? ISha256MacCoprocessor::Success : ISha256MacCoprocessor::OperationFailure);
IanBenzMaxim 21:00c94aeb533e 189 }
IanBenzMaxim 21:00c94aeb533e 190
IanBenzMaxim 34:11fffbe98ef9 191 OneWireMaster::CmdResult DS2465::copyScratchpad(bool destSecret, unsigned int pageNum, bool notFull, unsigned int segmentNum)
IanBenzMaxim 21:00c94aeb533e 192 {
IanBenzMaxim 48:6f9208ae280e 193 std::uint8_t command[2] = { CMD_CPS, (std::uint8_t)(destSecret ? 0 : (0x80 | (pageNum << 4) | (notFull << 3) | segmentNum)) };
IanBenzMaxim 34:11fffbe98ef9 194 return writeMemory(ADDR_CMD_REG, command, 2);
IanBenzMaxim 21:00c94aeb533e 195 }
IanBenzMaxim 21:00c94aeb533e 196
IanBenzMaxim 34:11fffbe98ef9 197 OneWireMaster::CmdResult DS2465::configureLevel(OWLevel level)
IanBenzMaxim 26:a361e3f42ba5 198 {
IanBenzMaxim 26:a361e3f42ba5 199 OneWireMaster::CmdResult result;
IanBenzMaxim 32:bce180b544ed 200 if (m_curConfig.cSPU != (level == LEVEL_STRONG))
IanBenzMaxim 26:a361e3f42ba5 201 {
IanBenzMaxim 35:5d23395628f6 202 Config newConfig = m_curConfig;
IanBenzMaxim 35:5d23395628f6 203 newConfig.cSPU = (level == LEVEL_STRONG);
IanBenzMaxim 35:5d23395628f6 204 result = writeConfig(newConfig, true);
IanBenzMaxim 21:00c94aeb533e 205 }
IanBenzMaxim 26:a361e3f42ba5 206 else
IanBenzMaxim 26:a361e3f42ba5 207 {
IanBenzMaxim 26:a361e3f42ba5 208 result = OneWireMaster::Success;
IanBenzMaxim 26:a361e3f42ba5 209 }
IanBenzMaxim 21:00c94aeb533e 210 return result;
IanBenzMaxim 21:00c94aeb533e 211 }
IanBenzMaxim 21:00c94aeb533e 212
IanBenzMaxim 32:bce180b544ed 213 OneWireMaster::CmdResult DS2465::OWSetLevel(OWLevel new_level)
IanBenzMaxim 21:00c94aeb533e 214 {
IanBenzMaxim 32:bce180b544ed 215 if (new_level == LEVEL_STRONG)
IanBenzMaxim 27:d5aaefa252f1 216 return OneWireMaster::OperationFailure;
IanBenzMaxim 27:d5aaefa252f1 217
IanBenzMaxim 34:11fffbe98ef9 218 return configureLevel(new_level);
IanBenzMaxim 21:00c94aeb533e 219 }
IanBenzMaxim 21:00c94aeb533e 220
IanBenzMaxim 32:bce180b544ed 221 OneWireMaster::CmdResult DS2465::OWSetSpeed(OWSpeed new_speed)
IanBenzMaxim 21:00c94aeb533e 222 {
IanBenzMaxim 27:d5aaefa252f1 223 // Requested speed is already set
IanBenzMaxim 27:d5aaefa252f1 224 if (m_curConfig.c1WS == (new_speed == SPEED_OVERDRIVE))
IanBenzMaxim 27:d5aaefa252f1 225 return OneWireMaster::Success;
IanBenzMaxim 27:d5aaefa252f1 226
IanBenzMaxim 27:d5aaefa252f1 227 // set the speed
IanBenzMaxim 35:5d23395628f6 228 Config newConfig = m_curConfig;
IanBenzMaxim 35:5d23395628f6 229 newConfig.c1WS = (new_speed == SPEED_OVERDRIVE);
IanBenzMaxim 21:00c94aeb533e 230
IanBenzMaxim 27:d5aaefa252f1 231 // write the new config
IanBenzMaxim 35:5d23395628f6 232 return writeConfig(newConfig, true);
IanBenzMaxim 21:00c94aeb533e 233 }
IanBenzMaxim 21:00c94aeb533e 234
IanBenzMaxim 32:bce180b544ed 235 OneWireMaster::CmdResult DS2465::OWTriplet(SearchDirection & search_direction, std::uint8_t & sbr, std::uint8_t & tsb)
IanBenzMaxim 21:00c94aeb533e 236 {
IanBenzMaxim 21:00c94aeb533e 237 // 1-Wire Triplet (Case B)
IanBenzMaxim 21:00c94aeb533e 238 // S AD,0 [A] 1WT [A] SS [A] Sr AD,1 [A] [Status] A [Status] A\ P
IanBenzMaxim 21:00c94aeb533e 239 // \--------/
IanBenzMaxim 21:00c94aeb533e 240 // Repeat until 1WB bit has changed to 0
IanBenzMaxim 21:00c94aeb533e 241 // [] indicates from slave
IanBenzMaxim 21:00c94aeb533e 242 // SS indicates byte containing search direction bit value in msbit
IanBenzMaxim 24:8942d8478d68 243
IanBenzMaxim 24:8942d8478d68 244 OneWireMaster::CmdResult result;
IanBenzMaxim 48:6f9208ae280e 245 std::uint8_t command[2] = { CMD_1WT, (std::uint8_t)((search_direction == DIRECTION_WRITE_ONE) ? 0x80 : 0x00) };
IanBenzMaxim 34:11fffbe98ef9 246 result = writeMemory(ADDR_CMD_REG, command, 2);
IanBenzMaxim 24:8942d8478d68 247 if (result == OneWireMaster::Success)
IanBenzMaxim 32:bce180b544ed 248 {
IanBenzMaxim 32:bce180b544ed 249 std::uint8_t status;
IanBenzMaxim 34:11fffbe98ef9 250 result = pollBusy(&status);
IanBenzMaxim 32:bce180b544ed 251 if (result == OneWireMaster::Success)
IanBenzMaxim 32:bce180b544ed 252 {
IanBenzMaxim 32:bce180b544ed 253 // check bit results in status byte
IanBenzMaxim 32:bce180b544ed 254 sbr = ((status & STATUS_SBR) == STATUS_SBR);
IanBenzMaxim 32:bce180b544ed 255 tsb = ((status & STATUS_TSB) == STATUS_TSB);
IanBenzMaxim 32:bce180b544ed 256 search_direction = ((status & STATUS_DIR) == STATUS_DIR) ? DIRECTION_WRITE_ONE : DIRECTION_WRITE_ZERO;
IanBenzMaxim 32:bce180b544ed 257 }
IanBenzMaxim 32:bce180b544ed 258 }
IanBenzMaxim 24:8942d8478d68 259 return result;
IanBenzMaxim 21:00c94aeb533e 260 }
IanBenzMaxim 21:00c94aeb533e 261
IanBenzMaxim 27:d5aaefa252f1 262 OneWireMaster::CmdResult DS2465::OWReadBlock(std::uint8_t *rx_buf, std::uint8_t rx_len)
IanBenzMaxim 21:00c94aeb533e 263 {
IanBenzMaxim 21:00c94aeb533e 264 // 1-Wire Receive Block (Case A)
IanBenzMaxim 21:00c94aeb533e 265 // S AD,0 [A] ADDR_CMD_REG [A] 1WRF [A] PR [A] P
IanBenzMaxim 21:00c94aeb533e 266 // [] indicates from slave
IanBenzMaxim 21:00c94aeb533e 267 // PR indicates byte containing parameter
IanBenzMaxim 21:00c94aeb533e 268
IanBenzMaxim 24:8942d8478d68 269 OneWireMaster::CmdResult result;
IanBenzMaxim 27:d5aaefa252f1 270 std::uint8_t command[2] = { CMD_1WRF, rx_len };
IanBenzMaxim 24:8942d8478d68 271
IanBenzMaxim 34:11fffbe98ef9 272 result = writeMemory(ADDR_CMD_REG, command, 2);
IanBenzMaxim 24:8942d8478d68 273 if (result == OneWireMaster::Success)
IanBenzMaxim 34:11fffbe98ef9 274 result = pollBusy();
IanBenzMaxim 24:8942d8478d68 275 if (result == OneWireMaster::Success)
IanBenzMaxim 34:11fffbe98ef9 276 result = readMemory(ADDR_SPAD, rx_buf, rx_len, false);
IanBenzMaxim 21:00c94aeb533e 277
IanBenzMaxim 24:8942d8478d68 278 return result;
IanBenzMaxim 21:00c94aeb533e 279 }
IanBenzMaxim 21:00c94aeb533e 280
IanBenzMaxim 27:d5aaefa252f1 281 OneWireMaster::CmdResult DS2465::OWWriteBlock(const std::uint8_t *tran_buf, std::uint8_t tran_len)
IanBenzMaxim 21:00c94aeb533e 282 {
IanBenzMaxim 21:00c94aeb533e 283 return OWWriteBlock(false, tran_buf, tran_len);
IanBenzMaxim 21:00c94aeb533e 284 }
IanBenzMaxim 21:00c94aeb533e 285
IanBenzMaxim 47:307dc45952db 286 OneWireMaster::CmdResult DS2465::OWWriteBlockMac()
IanBenzMaxim 47:307dc45952db 287 {
IanBenzMaxim 47:307dc45952db 288 return OWWriteBlock(true, NULL, 0);
IanBenzMaxim 47:307dc45952db 289 }
IanBenzMaxim 47:307dc45952db 290
IanBenzMaxim 27:d5aaefa252f1 291 OneWireMaster::CmdResult DS2465::OWWriteBlock(bool tx_mac, const std::uint8_t *tran_buf, std::uint8_t tran_len)
IanBenzMaxim 21:00c94aeb533e 292 {
IanBenzMaxim 21:00c94aeb533e 293 OneWireMaster::CmdResult result;
IanBenzMaxim 48:6f9208ae280e 294 std::uint8_t command[2] = { CMD_1WTB, (std::uint8_t)(tx_mac ? 0xFF : tran_len) };
IanBenzMaxim 21:00c94aeb533e 295
IanBenzMaxim 24:8942d8478d68 296 if (!tx_mac)
IanBenzMaxim 21:00c94aeb533e 297 {
IanBenzMaxim 21:00c94aeb533e 298 // prefill scratchpad with required data
IanBenzMaxim 34:11fffbe98ef9 299 result = writeMemory(ADDR_SPAD, tran_buf, tran_len);
IanBenzMaxim 21:00c94aeb533e 300 if (result != OneWireMaster::Success)
IanBenzMaxim 21:00c94aeb533e 301 return result;
IanBenzMaxim 21:00c94aeb533e 302 }
IanBenzMaxim 21:00c94aeb533e 303
IanBenzMaxim 21:00c94aeb533e 304 // 1-Wire Transmit Block (Case A)
IanBenzMaxim 21:00c94aeb533e 305 // S AD,0 [A] ADDR_CMD_REG [A] 1WTB [A] PR [A] P
IanBenzMaxim 21:00c94aeb533e 306 // [] indicates from slave
IanBenzMaxim 21:00c94aeb533e 307 // PR indicates byte containing parameter
IanBenzMaxim 24:8942d8478d68 308
IanBenzMaxim 34:11fffbe98ef9 309 result = writeMemory(ADDR_CMD_REG, command, 2);
IanBenzMaxim 24:8942d8478d68 310
IanBenzMaxim 24:8942d8478d68 311 if (result == OneWireMaster::Success)
IanBenzMaxim 34:11fffbe98ef9 312 result = pollBusy();
IanBenzMaxim 21:00c94aeb533e 313
IanBenzMaxim 24:8942d8478d68 314 return result;
IanBenzMaxim 21:00c94aeb533e 315 }
IanBenzMaxim 21:00c94aeb533e 316
IanBenzMaxim 32:bce180b544ed 317 OneWireMaster::CmdResult DS2465::OWReadByte(std::uint8_t & recvbyte, OWLevel after_level)
IanBenzMaxim 21:00c94aeb533e 318 {
IanBenzMaxim 24:8942d8478d68 319 OneWireMaster::CmdResult result;
IanBenzMaxim 27:d5aaefa252f1 320 std::uint8_t buf;
IanBenzMaxim 21:00c94aeb533e 321
IanBenzMaxim 24:8942d8478d68 322 // 1-Wire Read Bytes (Case C)
IanBenzMaxim 24:8942d8478d68 323 // S AD,0 [A] ADDR_CMD_REG [A] 1WRB [A] Sr AD,1 [A] [Status] A [Status] A
IanBenzMaxim 24:8942d8478d68 324 // \--------/
IanBenzMaxim 24:8942d8478d68 325 // Repeat until 1WB bit has changed to 0
IanBenzMaxim 24:8942d8478d68 326 // Sr AD,0 [A] SRP [A] E1 [A] Sr AD,1 [A] DD A\ P
IanBenzMaxim 24:8942d8478d68 327 //
IanBenzMaxim 24:8942d8478d68 328 // [] indicates from slave
IanBenzMaxim 24:8942d8478d68 329 // DD data read
IanBenzMaxim 26:a361e3f42ba5 330
IanBenzMaxim 34:11fffbe98ef9 331 result = configureLevel(after_level);
IanBenzMaxim 26:a361e3f42ba5 332 if (result != OneWireMaster::Success)
IanBenzMaxim 26:a361e3f42ba5 333 return result;
IanBenzMaxim 24:8942d8478d68 334
IanBenzMaxim 24:8942d8478d68 335 buf = CMD_1WRB;
IanBenzMaxim 34:11fffbe98ef9 336 result = writeMemory(ADDR_CMD_REG, &buf, 1);
IanBenzMaxim 21:00c94aeb533e 337
IanBenzMaxim 24:8942d8478d68 338 if (result == OneWireMaster::Success)
IanBenzMaxim 34:11fffbe98ef9 339 result = pollBusy();
IanBenzMaxim 24:8942d8478d68 340
IanBenzMaxim 24:8942d8478d68 341 if (result == OneWireMaster::Success)
IanBenzMaxim 34:11fffbe98ef9 342 result = readMemory(ADDR_DATA_REG, &buf, 1);
IanBenzMaxim 21:00c94aeb533e 343
IanBenzMaxim 24:8942d8478d68 344 if (result == OneWireMaster::Success)
IanBenzMaxim 24:8942d8478d68 345 recvbyte = buf;
IanBenzMaxim 21:00c94aeb533e 346
IanBenzMaxim 24:8942d8478d68 347 return result;
IanBenzMaxim 21:00c94aeb533e 348 }
IanBenzMaxim 21:00c94aeb533e 349
IanBenzMaxim 32:bce180b544ed 350 OneWireMaster::CmdResult DS2465::OWWriteByte(std::uint8_t sendbyte, OWLevel after_level)
IanBenzMaxim 24:8942d8478d68 351 {
IanBenzMaxim 21:00c94aeb533e 352 // 1-Wire Write Byte (Case B)
IanBenzMaxim 21:00c94aeb533e 353 // S AD,0 [A] ADDR_CMD_REG [A] 1WWB [A] DD [A] Sr AD,1 [A] [Status] A [Status] A\ P
IanBenzMaxim 21:00c94aeb533e 354 // \--------/
IanBenzMaxim 21:00c94aeb533e 355 // Repeat until 1WB bit has changed to 0
IanBenzMaxim 21:00c94aeb533e 356 // [] indicates from slave
IanBenzMaxim 21:00c94aeb533e 357 // DD data to write
IanBenzMaxim 24:8942d8478d68 358
IanBenzMaxim 24:8942d8478d68 359 OneWireMaster::CmdResult result;
IanBenzMaxim 26:a361e3f42ba5 360
IanBenzMaxim 34:11fffbe98ef9 361 result = configureLevel(after_level);
IanBenzMaxim 26:a361e3f42ba5 362 if (result != OneWireMaster::Success)
IanBenzMaxim 26:a361e3f42ba5 363 return result;
IanBenzMaxim 26:a361e3f42ba5 364
IanBenzMaxim 27:d5aaefa252f1 365 std::uint8_t command[2] = { CMD_1WWB, sendbyte };
IanBenzMaxim 24:8942d8478d68 366
IanBenzMaxim 34:11fffbe98ef9 367 result = writeMemory(ADDR_CMD_REG, command, 2);
IanBenzMaxim 24:8942d8478d68 368 if (result == OneWireMaster::Success)
IanBenzMaxim 34:11fffbe98ef9 369 result = pollBusy();
IanBenzMaxim 21:00c94aeb533e 370
IanBenzMaxim 24:8942d8478d68 371 return result;
IanBenzMaxim 21:00c94aeb533e 372 }
IanBenzMaxim 21:00c94aeb533e 373
IanBenzMaxim 32:bce180b544ed 374 OneWireMaster::CmdResult DS2465::OWTouchBit(std::uint8_t & sendrecvbit, OWLevel after_level)
IanBenzMaxim 21:00c94aeb533e 375 {
IanBenzMaxim 21:00c94aeb533e 376 // 1-Wire bit (Case B)
IanBenzMaxim 21:00c94aeb533e 377 // S AD,0 [A] ADDR_CMD_REG [A] 1WSB [A] BB [A] Sr AD,1 [A] [Status] A [Status] A\ P
IanBenzMaxim 21:00c94aeb533e 378 // \--------/
IanBenzMaxim 21:00c94aeb533e 379 // Repeat until 1WB bit has changed to 0
IanBenzMaxim 21:00c94aeb533e 380 // [] indicates from slave
IanBenzMaxim 21:00c94aeb533e 381 // BB indicates byte containing bit value in msbit
IanBenzMaxim 21:00c94aeb533e 382
IanBenzMaxim 24:8942d8478d68 383 OneWireMaster::CmdResult result;
IanBenzMaxim 26:a361e3f42ba5 384
IanBenzMaxim 34:11fffbe98ef9 385 result = configureLevel(after_level);
IanBenzMaxim 26:a361e3f42ba5 386 if (result != OneWireMaster::Success)
IanBenzMaxim 26:a361e3f42ba5 387 return result;
IanBenzMaxim 26:a361e3f42ba5 388
IanBenzMaxim 48:6f9208ae280e 389 std::uint8_t command[2] = { CMD_1WSB, (std::uint8_t)(sendrecvbit ? 0x80 : 0x00) };
IanBenzMaxim 27:d5aaefa252f1 390 std::uint8_t status;
IanBenzMaxim 24:8942d8478d68 391
IanBenzMaxim 34:11fffbe98ef9 392 result = writeMemory(ADDR_CMD_REG, command, 2);
IanBenzMaxim 21:00c94aeb533e 393
IanBenzMaxim 24:8942d8478d68 394 if (result == OneWireMaster::Success)
IanBenzMaxim 34:11fffbe98ef9 395 result = pollBusy(&status);
IanBenzMaxim 21:00c94aeb533e 396
IanBenzMaxim 24:8942d8478d68 397 if (result == OneWireMaster::Success)
IanBenzMaxim 24:8942d8478d68 398 sendrecvbit = (status & STATUS_SBR);
IanBenzMaxim 24:8942d8478d68 399
IanBenzMaxim 24:8942d8478d68 400 return result;
IanBenzMaxim 21:00c94aeb533e 401 }
IanBenzMaxim 21:00c94aeb533e 402
IanBenzMaxim 34:11fffbe98ef9 403 OneWireMaster::CmdResult DS2465::cWriteMemory(std::uint8_t addr, const std::uint8_t * buf, std::size_t bufLen) const
IanBenzMaxim 21:00c94aeb533e 404 {
IanBenzMaxim 21:00c94aeb533e 405 int i;
IanBenzMaxim 21:00c94aeb533e 406
IanBenzMaxim 21:00c94aeb533e 407 // Write SRAM (Case A)
IanBenzMaxim 21:00c94aeb533e 408 // S AD,0 [A] VSA [A] DD [A] P
IanBenzMaxim 21:00c94aeb533e 409 // \-----/
IanBenzMaxim 21:00c94aeb533e 410 // Repeat for each data byte
IanBenzMaxim 21:00c94aeb533e 411 // [] indicates from slave
IanBenzMaxim 21:00c94aeb533e 412 // VSA valid SRAM memory address
IanBenzMaxim 21:00c94aeb533e 413 // DD memory data to write
IanBenzMaxim 21:00c94aeb533e 414
IanBenzMaxim 21:00c94aeb533e 415 m_I2C_interface.start();
IanBenzMaxim 32:bce180b544ed 416 if (m_I2C_interface.write((m_I2C_address | I2C_WRITE)) != I2C_WRITE_OK)
IanBenzMaxim 21:00c94aeb533e 417 {
IanBenzMaxim 21:00c94aeb533e 418 m_I2C_interface.stop();
IanBenzMaxim 21:00c94aeb533e 419 return OneWireMaster::CommunicationWriteError;
IanBenzMaxim 21:00c94aeb533e 420 }
IanBenzMaxim 32:bce180b544ed 421 if (m_I2C_interface.write(addr) != I2C_WRITE_OK)
IanBenzMaxim 21:00c94aeb533e 422 {
IanBenzMaxim 21:00c94aeb533e 423 m_I2C_interface.stop();
IanBenzMaxim 21:00c94aeb533e 424 return OneWireMaster::CommunicationWriteError;
IanBenzMaxim 21:00c94aeb533e 425 }
IanBenzMaxim 21:00c94aeb533e 426 // loop to write each byte
IanBenzMaxim 21:00c94aeb533e 427 for (i = 0; i < bufLen; i++)
IanBenzMaxim 21:00c94aeb533e 428 {
IanBenzMaxim 21:00c94aeb533e 429 if (m_I2C_interface.write(buf[i]) != I2C_WRITE_OK)
IanBenzMaxim 21:00c94aeb533e 430 {
IanBenzMaxim 21:00c94aeb533e 431 m_I2C_interface.stop();
IanBenzMaxim 21:00c94aeb533e 432 return OneWireMaster::CommunicationWriteError;
IanBenzMaxim 21:00c94aeb533e 433 }
IanBenzMaxim 21:00c94aeb533e 434 }
IanBenzMaxim 21:00c94aeb533e 435 m_I2C_interface.stop();
IanBenzMaxim 21:00c94aeb533e 436
IanBenzMaxim 47:307dc45952db 437 return OneWireMaster::Success;
IanBenzMaxim 21:00c94aeb533e 438 }
IanBenzMaxim 21:00c94aeb533e 439
IanBenzMaxim 34:11fffbe98ef9 440 OneWireMaster::CmdResult DS2465::readMemory(std::uint8_t addr, std::uint8_t * buf, std::size_t bufLen, bool skipSetPointer) const
IanBenzMaxim 21:00c94aeb533e 441 {
IanBenzMaxim 47:307dc45952db 442 int i;
IanBenzMaxim 21:00c94aeb533e 443
IanBenzMaxim 47:307dc45952db 444 // Read (Case A)
IanBenzMaxim 47:307dc45952db 445 // S AD,0 [A] MA [A] Sr AD,1 [A] [DD] A [DD] A\ P
IanBenzMaxim 47:307dc45952db 446 // \-----/
IanBenzMaxim 47:307dc45952db 447 // Repeat for each data byte, NAK last byte
IanBenzMaxim 47:307dc45952db 448 // [] indicates from slave
IanBenzMaxim 47:307dc45952db 449 // MA memory address
IanBenzMaxim 47:307dc45952db 450 // DD memory data read
IanBenzMaxim 21:00c94aeb533e 451
IanBenzMaxim 47:307dc45952db 452 m_I2C_interface.start();
IanBenzMaxim 47:307dc45952db 453 if (!skipSetPointer)
IanBenzMaxim 47:307dc45952db 454 {
IanBenzMaxim 47:307dc45952db 455 if (m_I2C_interface.write((m_I2C_address | I2C_WRITE)) != I2C_WRITE_OK)
IanBenzMaxim 47:307dc45952db 456 {
IanBenzMaxim 47:307dc45952db 457 m_I2C_interface.stop();
IanBenzMaxim 47:307dc45952db 458 return OneWireMaster::CommunicationWriteError;
IanBenzMaxim 47:307dc45952db 459 }
IanBenzMaxim 47:307dc45952db 460 if (m_I2C_interface.write(addr) != I2C_WRITE_OK)
IanBenzMaxim 47:307dc45952db 461 {
IanBenzMaxim 47:307dc45952db 462 m_I2C_interface.stop();
IanBenzMaxim 47:307dc45952db 463 return OneWireMaster::CommunicationWriteError;
IanBenzMaxim 47:307dc45952db 464 }
IanBenzMaxim 47:307dc45952db 465 m_I2C_interface.start();
IanBenzMaxim 47:307dc45952db 466 }
IanBenzMaxim 21:00c94aeb533e 467
IanBenzMaxim 47:307dc45952db 468 if (m_I2C_interface.write((m_I2C_address | I2C_READ)) != I2C_WRITE_OK)
IanBenzMaxim 47:307dc45952db 469 {
IanBenzMaxim 47:307dc45952db 470 m_I2C_interface.stop();
IanBenzMaxim 47:307dc45952db 471 return OneWireMaster::CommunicationWriteError;
IanBenzMaxim 47:307dc45952db 472 }
IanBenzMaxim 47:307dc45952db 473 // loop to read each byte, NAK last byte
IanBenzMaxim 47:307dc45952db 474 for (i = 0; i < bufLen; i++)
IanBenzMaxim 47:307dc45952db 475 {
IanBenzMaxim 47:307dc45952db 476 buf[i] = m_I2C_interface.read((i == (bufLen - 1)) ? m_I2C_interface.NoACK : m_I2C_interface.ACK);
IanBenzMaxim 47:307dc45952db 477 }
IanBenzMaxim 47:307dc45952db 478 m_I2C_interface.stop();
IanBenzMaxim 21:00c94aeb533e 479
IanBenzMaxim 47:307dc45952db 480 return OneWireMaster::Success;
IanBenzMaxim 21:00c94aeb533e 481 }
IanBenzMaxim 21:00c94aeb533e 482
IanBenzMaxim 34:11fffbe98ef9 483 OneWireMaster::CmdResult DS2465::writeConfig(const Config & config, bool verify)
IanBenzMaxim 21:00c94aeb533e 484 {
IanBenzMaxim 35:5d23395628f6 485 std::uint8_t configBuf;
IanBenzMaxim 35:5d23395628f6 486 OneWireMaster::CmdResult result;
IanBenzMaxim 21:00c94aeb533e 487
IanBenzMaxim 35:5d23395628f6 488 configBuf = config.writeByte();
IanBenzMaxim 35:5d23395628f6 489 result = writeMemory(ADDR_WCFG_REG, &configBuf, 1);
IanBenzMaxim 35:5d23395628f6 490 if (verify)
IanBenzMaxim 35:5d23395628f6 491 {
IanBenzMaxim 35:5d23395628f6 492 if (result == OneWireMaster::Success)
IanBenzMaxim 35:5d23395628f6 493 {
IanBenzMaxim 35:5d23395628f6 494 result = readMemory(ADDR_WCFG_REG, &configBuf, 1);
IanBenzMaxim 35:5d23395628f6 495 }
IanBenzMaxim 35:5d23395628f6 496 if (result == OneWireMaster::Success)
IanBenzMaxim 35:5d23395628f6 497 {
IanBenzMaxim 35:5d23395628f6 498 if (configBuf != config.readByte())
IanBenzMaxim 35:5d23395628f6 499 result = OneWireMaster::OperationFailure;
IanBenzMaxim 35:5d23395628f6 500 }
IanBenzMaxim 35:5d23395628f6 501 }
IanBenzMaxim 35:5d23395628f6 502
IanBenzMaxim 35:5d23395628f6 503 if (result == OneWireMaster::Success)
IanBenzMaxim 35:5d23395628f6 504 m_curConfig = config;
IanBenzMaxim 35:5d23395628f6 505
IanBenzMaxim 35:5d23395628f6 506 return result;
IanBenzMaxim 24:8942d8478d68 507 }
IanBenzMaxim 24:8942d8478d68 508
IanBenzMaxim 34:11fffbe98ef9 509 DS2465::Config DS2465::currentConfig() const
IanBenzMaxim 32:bce180b544ed 510 {
IanBenzMaxim 32:bce180b544ed 511 return m_curConfig;
IanBenzMaxim 32:bce180b544ed 512 }
IanBenzMaxim 32:bce180b544ed 513
IanBenzMaxim 34:11fffbe98ef9 514 OneWireMaster::CmdResult DS2465::pollBusy(std::uint8_t * pStatus)
IanBenzMaxim 24:8942d8478d68 515 {
IanBenzMaxim 47:307dc45952db 516 const unsigned int pollLimit = 200;
IanBenzMaxim 47:307dc45952db 517
IanBenzMaxim 47:307dc45952db 518 OneWireMaster::CmdResult result;
IanBenzMaxim 47:307dc45952db 519 std::uint8_t status;
IanBenzMaxim 47:307dc45952db 520 unsigned int pollCount = 0;
IanBenzMaxim 24:8942d8478d68 521
IanBenzMaxim 47:307dc45952db 522 do
IanBenzMaxim 47:307dc45952db 523 {
IanBenzMaxim 47:307dc45952db 524 result = readMemory(ADDR_STATUS_REG, &status, 1, true);
IanBenzMaxim 47:307dc45952db 525 if (result != OneWireMaster::Success)
IanBenzMaxim 47:307dc45952db 526 return result;
IanBenzMaxim 47:307dc45952db 527 if (pStatus != NULL)
IanBenzMaxim 47:307dc45952db 528 *pStatus = status;
IanBenzMaxim 47:307dc45952db 529 if (pollCount++ >= pollLimit)
IanBenzMaxim 47:307dc45952db 530 return OneWireMaster::TimeoutError;
IanBenzMaxim 47:307dc45952db 531 } while (status & STATUS_1WB);
IanBenzMaxim 24:8942d8478d68 532
IanBenzMaxim 47:307dc45952db 533 return OneWireMaster::Success;
IanBenzMaxim 21:00c94aeb533e 534 }
IanBenzMaxim 21:00c94aeb533e 535
IanBenzMaxim 21:00c94aeb533e 536 OneWireMaster::CmdResult DS2465::OWReset(void)
IanBenzMaxim 24:8942d8478d68 537 {
IanBenzMaxim 24:8942d8478d68 538 // 1-Wire reset (Case B)
IanBenzMaxim 24:8942d8478d68 539 // S AD,0 [A] ADDR_CMD_REG [A] 1WRS [A] Sr AD,1 [A] [Status] A [Status] A\ P
IanBenzMaxim 24:8942d8478d68 540 // \--------/
IanBenzMaxim 24:8942d8478d68 541 // Repeat until 1WB bit has changed to 0
IanBenzMaxim 24:8942d8478d68 542 // [] indicates from slave
IanBenzMaxim 21:00c94aeb533e 543
IanBenzMaxim 24:8942d8478d68 544 OneWireMaster::CmdResult result;
IanBenzMaxim 27:d5aaefa252f1 545 std::uint8_t buf;
IanBenzMaxim 21:00c94aeb533e 546
IanBenzMaxim 24:8942d8478d68 547 buf = CMD_1WRS;
IanBenzMaxim 34:11fffbe98ef9 548 result = writeMemory(ADDR_CMD_REG, &buf, 1);
IanBenzMaxim 21:00c94aeb533e 549
IanBenzMaxim 24:8942d8478d68 550 if (result == OneWireMaster::Success)
IanBenzMaxim 34:11fffbe98ef9 551 result = pollBusy(&buf);
IanBenzMaxim 24:8942d8478d68 552
IanBenzMaxim 24:8942d8478d68 553 if (result == OneWireMaster::Success)
IanBenzMaxim 24:8942d8478d68 554 {
IanBenzMaxim 24:8942d8478d68 555 // check for presence detect
IanBenzMaxim 24:8942d8478d68 556 if ((buf & STATUS_PPD) != STATUS_PPD)
IanBenzMaxim 24:8942d8478d68 557 result = OneWireMaster::OperationFailure;
IanBenzMaxim 24:8942d8478d68 558 }
IanBenzMaxim 21:00c94aeb533e 559
IanBenzMaxim 24:8942d8478d68 560 return result;
IanBenzMaxim 21:00c94aeb533e 561 }
IanBenzMaxim 21:00c94aeb533e 562
IanBenzMaxim 34:11fffbe98ef9 563 OneWireMaster::CmdResult DS2465::reset(void)
IanBenzMaxim 24:8942d8478d68 564 {
IanBenzMaxim 21:00c94aeb533e 565 // Device Reset
IanBenzMaxim 21:00c94aeb533e 566 // S AD,0 [A] ADDR_CMD_REG [A] 1WMR [A] Sr AD,1 [A] [SS] A\ P
IanBenzMaxim 21:00c94aeb533e 567 // [] indicates from slave
IanBenzMaxim 21:00c94aeb533e 568 // SS status byte to read to verify state
IanBenzMaxim 21:00c94aeb533e 569
IanBenzMaxim 24:8942d8478d68 570 OneWireMaster::CmdResult result;
IanBenzMaxim 27:d5aaefa252f1 571 std::uint8_t buf;
IanBenzMaxim 21:00c94aeb533e 572
IanBenzMaxim 24:8942d8478d68 573 buf = CMD_1WMR;
IanBenzMaxim 34:11fffbe98ef9 574 result = writeMemory(ADDR_CMD_REG, &buf, 1);
IanBenzMaxim 21:00c94aeb533e 575
IanBenzMaxim 24:8942d8478d68 576 if (result == OneWireMaster::Success)
IanBenzMaxim 34:11fffbe98ef9 577 result = readMemory(ADDR_STATUS_REG, &buf, 1, true);
IanBenzMaxim 24:8942d8478d68 578
IanBenzMaxim 24:8942d8478d68 579 if (result == OneWireMaster::Success)
IanBenzMaxim 21:00c94aeb533e 580 {
IanBenzMaxim 24:8942d8478d68 581 if ((buf & 0xF7) != 0x10)
IanBenzMaxim 24:8942d8478d68 582 result = OneWireMaster::OperationFailure;
IanBenzMaxim 21:00c94aeb533e 583 }
IanBenzMaxim 24:8942d8478d68 584
IanBenzMaxim 24:8942d8478d68 585 if (result == OneWireMaster::Success)
IanBenzMaxim 24:8942d8478d68 586 OWReset(); // do a command to get 1-Wire master reset out of holding state
IanBenzMaxim 21:00c94aeb533e 587
IanBenzMaxim 24:8942d8478d68 588 return result;
IanBenzMaxim 21:00c94aeb533e 589 }