Implementation of 1-Wire with added Alarm Search Functionality
Dependents: Max32630_One_Wire_Interface
Bridge/DS28E17/DS28E17.h@73:2cecc1372acc, 2016-05-12 (annotated)
- Committer:
- IanBenzMaxim
- Date:
- Thu May 12 14:38:16 2016 -0500
- Revision:
- 73:2cecc1372acc
- Parent:
- OneWire_Bridge/DS28E17/ds28e17.h@27:d5aaefa252f1
- Child:
- 74:23be10c32fa3
Added namespaces. Renamed files and directories for consistency. Use <stdint.h> instead of <cstdint> since it is not supported by C++98.
Who changed what in which revision?
User | Revision | Line number | New contents of line |
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j3 | 4:ca27db159b10 | 1 | /******************************************************************//** |
j3 | 4:ca27db159b10 | 2 | * Copyright (C) 2016 Maxim Integrated Products, Inc., All Rights Reserved. |
j3 | 4:ca27db159b10 | 3 | * |
j3 | 4:ca27db159b10 | 4 | * Permission is hereby granted, free of charge, to any person obtaining a |
j3 | 4:ca27db159b10 | 5 | * copy of this software and associated documentation files (the "Software"), |
j3 | 4:ca27db159b10 | 6 | * to deal in the Software without restriction, including without limitation |
j3 | 4:ca27db159b10 | 7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
j3 | 4:ca27db159b10 | 8 | * and/or sell copies of the Software, and to permit persons to whom the |
j3 | 4:ca27db159b10 | 9 | * Software is furnished to do so, subject to the following conditions: |
j3 | 4:ca27db159b10 | 10 | * |
j3 | 4:ca27db159b10 | 11 | * The above copyright notice and this permission notice shall be included |
j3 | 4:ca27db159b10 | 12 | * in all copies or substantial portions of the Software. |
j3 | 4:ca27db159b10 | 13 | * |
j3 | 4:ca27db159b10 | 14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS |
j3 | 4:ca27db159b10 | 15 | * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF |
j3 | 4:ca27db159b10 | 16 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. |
j3 | 4:ca27db159b10 | 17 | * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES |
j3 | 4:ca27db159b10 | 18 | * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, |
j3 | 4:ca27db159b10 | 19 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR |
j3 | 4:ca27db159b10 | 20 | * OTHER DEALINGS IN THE SOFTWARE. |
j3 | 4:ca27db159b10 | 21 | * |
j3 | 4:ca27db159b10 | 22 | * Except as contained in this notice, the name of Maxim Integrated |
j3 | 4:ca27db159b10 | 23 | * Products, Inc. shall not be used except as stated in the Maxim Integrated |
j3 | 4:ca27db159b10 | 24 | * Products, Inc. Branding Policy. |
j3 | 4:ca27db159b10 | 25 | * |
j3 | 4:ca27db159b10 | 26 | * The mere transfer of this software does not imply any licenses |
j3 | 4:ca27db159b10 | 27 | * of trade secrets, proprietary technology, copyrights, patents, |
j3 | 4:ca27db159b10 | 28 | * trademarks, maskwork rights, or any other form of intellectual |
j3 | 4:ca27db159b10 | 29 | * property whatsoever. Maxim Integrated Products, Inc. retains all |
j3 | 4:ca27db159b10 | 30 | * ownership rights. |
j3 | 4:ca27db159b10 | 31 | **********************************************************************/ |
j3 | 4:ca27db159b10 | 32 | |
IanBenzMaxim | 73:2cecc1372acc | 33 | #ifndef OneWire_Bridge_DS28E17 |
IanBenzMaxim | 73:2cecc1372acc | 34 | #define OneWire_Bridge_DS28E17 |
j3 | 4:ca27db159b10 | 35 | |
IanBenzMaxim | 73:2cecc1372acc | 36 | #include <stdint.h> |
IanBenzMaxim | 73:2cecc1372acc | 37 | #include <stddef.h> |
IanBenzMaxim | 73:2cecc1372acc | 38 | #include "OneWireSlave.h" |
j3 | 4:ca27db159b10 | 39 | |
IanBenzMaxim | 73:2cecc1372acc | 40 | namespace OneWire |
j3 | 4:ca27db159b10 | 41 | { |
IanBenzMaxim | 73:2cecc1372acc | 42 | namespace Masters { class OneWireMaster; } |
j3 | 4:ca27db159b10 | 43 | |
IanBenzMaxim | 73:2cecc1372acc | 44 | namespace Bridge |
IanBenzMaxim | 73:2cecc1372acc | 45 | { |
IanBenzMaxim | 73:2cecc1372acc | 46 | class DS28E17 : public OneWireSlave |
IanBenzMaxim | 73:2cecc1372acc | 47 | { |
IanBenzMaxim | 73:2cecc1372acc | 48 | public: |
IanBenzMaxim | 73:2cecc1372acc | 49 | |
IanBenzMaxim | 73:2cecc1372acc | 50 | enum DS28E17_CMDS |
IanBenzMaxim | 73:2cecc1372acc | 51 | { |
IanBenzMaxim | 73:2cecc1372acc | 52 | CMD_I2C_WRITE_W_STOP = 0x4B, |
IanBenzMaxim | 73:2cecc1372acc | 53 | CMD_I2C_WRITE_NO_STOP = 0x5A, |
IanBenzMaxim | 73:2cecc1372acc | 54 | CMD_I2C_WRITE_ONLY = 0x69, |
IanBenzMaxim | 73:2cecc1372acc | 55 | CMD_I2C_WRITE_ONLY_W_STOP = 0x78, |
IanBenzMaxim | 73:2cecc1372acc | 56 | CMD_I2C_READ_W_STOP = 0x87, |
IanBenzMaxim | 73:2cecc1372acc | 57 | CMD_I2C_WRITE_READ_W_STOP = 0x2D, |
IanBenzMaxim | 73:2cecc1372acc | 58 | CMD_WRITE_CONFIG_REG = 0xD2, |
IanBenzMaxim | 73:2cecc1372acc | 59 | CMD_READ_CONFIG_REG = 0xE1, |
IanBenzMaxim | 73:2cecc1372acc | 60 | CMD_DISABLE_OW_MODE = 0x96, |
IanBenzMaxim | 73:2cecc1372acc | 61 | CMD_ENABLE_SLEEP_MODE = 0x1E, |
IanBenzMaxim | 73:2cecc1372acc | 62 | CMD_READ_DEVICE_REV = 0xC3 |
IanBenzMaxim | 73:2cecc1372acc | 63 | }; |
IanBenzMaxim | 73:2cecc1372acc | 64 | |
IanBenzMaxim | 73:2cecc1372acc | 65 | enum CmdResult |
IanBenzMaxim | 73:2cecc1372acc | 66 | { |
IanBenzMaxim | 73:2cecc1372acc | 67 | Success, |
IanBenzMaxim | 73:2cecc1372acc | 68 | CommsReadBitError, |
IanBenzMaxim | 73:2cecc1372acc | 69 | CommsWriteBitError, |
IanBenzMaxim | 73:2cecc1372acc | 70 | CommsReadByteError, |
IanBenzMaxim | 73:2cecc1372acc | 71 | CommsWriteByteError, |
IanBenzMaxim | 73:2cecc1372acc | 72 | CommsReadBlockError, |
IanBenzMaxim | 73:2cecc1372acc | 73 | CommsWriteBlockError, |
IanBenzMaxim | 73:2cecc1372acc | 74 | TimeoutError, |
IanBenzMaxim | 73:2cecc1372acc | 75 | OperationFailure |
IanBenzMaxim | 73:2cecc1372acc | 76 | }; |
IanBenzMaxim | 73:2cecc1372acc | 77 | |
IanBenzMaxim | 73:2cecc1372acc | 78 | static const size_t POLL_LIMIT = 10000; |
IanBenzMaxim | 73:2cecc1372acc | 79 | |
IanBenzMaxim | 73:2cecc1372acc | 80 | /**********************************************************//** |
IanBenzMaxim | 73:2cecc1372acc | 81 | * @brief DS28E17 constructor |
IanBenzMaxim | 73:2cecc1372acc | 82 | * |
IanBenzMaxim | 73:2cecc1372acc | 83 | * @details |
IanBenzMaxim | 73:2cecc1372acc | 84 | * |
IanBenzMaxim | 73:2cecc1372acc | 85 | * On Entry: |
IanBenzMaxim | 73:2cecc1372acc | 86 | * @param[in] p_owm - pointer to a 1-wire master of the following |
IanBenzMaxim | 73:2cecc1372acc | 87 | * types; Ds248x, Ds2480b, OwGpio which |
IanBenzMaxim | 73:2cecc1372acc | 88 | * inherit the base class 'OneWireInterface' |
IanBenzMaxim | 73:2cecc1372acc | 89 | * |
IanBenzMaxim | 73:2cecc1372acc | 90 | * On Exit: |
IanBenzMaxim | 73:2cecc1372acc | 91 | * @return |
IanBenzMaxim | 73:2cecc1372acc | 92 | **************************************************************/ |
IanBenzMaxim | 73:2cecc1372acc | 93 | DS28E17(Masters::OneWireMaster &owm); |
IanBenzMaxim | 73:2cecc1372acc | 94 | |
IanBenzMaxim | 73:2cecc1372acc | 95 | /**********************************************************//** |
IanBenzMaxim | 73:2cecc1372acc | 96 | * @brief Write to selected DS28E17's I2C with Stop. |
IanBenzMaxim | 73:2cecc1372acc | 97 | * Poll until I2C write complete and receive status info. |
IanBenzMaxim | 73:2cecc1372acc | 98 | * |
IanBenzMaxim | 73:2cecc1372acc | 99 | * @details Output on I2C: S, Address + Write, Write Data [1-255], P |
IanBenzMaxim | 73:2cecc1372acc | 100 | * |
IanBenzMaxim | 73:2cecc1372acc | 101 | * On Entry: |
IanBenzMaxim | 73:2cecc1372acc | 102 | * @param[in] I2C_addr - |
IanBenzMaxim | 73:2cecc1372acc | 103 | * Writes I2C address. The least significant bit of the I2C |
IanBenzMaxim | 73:2cecc1372acc | 104 | * address is automatically cleared by the command. |
IanBenzMaxim | 73:2cecc1372acc | 105 | * |
IanBenzMaxim | 73:2cecc1372acc | 106 | * @param[in] length |
IanBenzMaxim | 73:2cecc1372acc | 107 | * The number of data bytes to be written ranging from 01h to FFh. |
IanBenzMaxim | 73:2cecc1372acc | 108 | * A value of zero will assert the Error Detected pin (ED). |
IanBenzMaxim | 73:2cecc1372acc | 109 | * |
IanBenzMaxim | 73:2cecc1372acc | 110 | * @param[in] *data |
IanBenzMaxim | 73:2cecc1372acc | 111 | * User defines write data ranging from 1-255 bytes. |
IanBenzMaxim | 73:2cecc1372acc | 112 | * |
IanBenzMaxim | 73:2cecc1372acc | 113 | * On Exit: |
IanBenzMaxim | 73:2cecc1372acc | 114 | * @param[out] status |
IanBenzMaxim | 73:2cecc1372acc | 115 | * Detects the condition of the Start (bit3), N/A (bit2), |
IanBenzMaxim | 73:2cecc1372acc | 116 | * Address(bit1) and CRC16(bit0) bits. |
IanBenzMaxim | 73:2cecc1372acc | 117 | * b3;0=No Err|1=I2CStart prev-not issued, |
IanBenzMaxim | 73:2cecc1372acc | 118 | * b2;0=No Err|1=I2C N/A Err, |
IanBenzMaxim | 73:2cecc1372acc | 119 | * b1;0=No Err|1=Addr Err, |
IanBenzMaxim | 73:2cecc1372acc | 120 | * b0;0=Valid CRC16|1=Invalid CRC16 |
IanBenzMaxim | 73:2cecc1372acc | 121 | * |
IanBenzMaxim | 73:2cecc1372acc | 122 | * @param[out] wr_status |
IanBenzMaxim | 73:2cecc1372acc | 123 | * Indicates which write byte NACK’d. A value of 00h indicates |
IanBenzMaxim | 73:2cecc1372acc | 124 | * all bytes were acknowledged by the slave. |
IanBenzMaxim | 73:2cecc1372acc | 125 | * A non-zero value indicates the byte number that NACK’d. |
IanBenzMaxim | 73:2cecc1372acc | 126 | * |
IanBenzMaxim | 73:2cecc1372acc | 127 | * @return |
IanBenzMaxim | 73:2cecc1372acc | 128 | * true if device selected and written @n |
IanBenzMaxim | 73:2cecc1372acc | 129 | * false if failed device select |
IanBenzMaxim | 73:2cecc1372acc | 130 | **************************************************************/ |
IanBenzMaxim | 73:2cecc1372acc | 131 | CmdResult I2C_WriteDataWithStop(uint8_t I2C_addr, uint8_t length, |
IanBenzMaxim | 73:2cecc1372acc | 132 | uint8_t *data, uint8_t &status, |
IanBenzMaxim | 73:2cecc1372acc | 133 | uint8_t &wr_status); |
IanBenzMaxim | 73:2cecc1372acc | 134 | |
IanBenzMaxim | 73:2cecc1372acc | 135 | /**********************************************************//** |
IanBenzMaxim | 73:2cecc1372acc | 136 | * @brief Write to selected DS28E17's I2C No Stop. |
IanBenzMaxim | 73:2cecc1372acc | 137 | * Poll until I2C write complete and receive status info. |
IanBenzMaxim | 73:2cecc1372acc | 138 | * |
IanBenzMaxim | 73:2cecc1372acc | 139 | * @details Output on I2C: S, Address + Write, Write Data [1-255] |
IanBenzMaxim | 73:2cecc1372acc | 140 | * |
IanBenzMaxim | 73:2cecc1372acc | 141 | * On Entry: |
IanBenzMaxim | 73:2cecc1372acc | 142 | * @param[in] I2C_addr |
IanBenzMaxim | 73:2cecc1372acc | 143 | * Writes I2C address. The least significant bit of the I2C address |
IanBenzMaxim | 73:2cecc1372acc | 144 | * is automatically cleared by the command. |
IanBenzMaxim | 73:2cecc1372acc | 145 | * |
IanBenzMaxim | 73:2cecc1372acc | 146 | * @param[in] length |
IanBenzMaxim | 73:2cecc1372acc | 147 | * The number of data bytes to be written ranging from 01h to FFh. |
IanBenzMaxim | 73:2cecc1372acc | 148 | * A value of zero will assert the Error Detected pin (ED). |
IanBenzMaxim | 73:2cecc1372acc | 149 | * |
IanBenzMaxim | 73:2cecc1372acc | 150 | * @param[in] *data |
IanBenzMaxim | 73:2cecc1372acc | 151 | * User defines write data ranging from 1-255 bytes. |
IanBenzMaxim | 73:2cecc1372acc | 152 | * |
IanBenzMaxim | 73:2cecc1372acc | 153 | * On Exit: |
IanBenzMaxim | 73:2cecc1372acc | 154 | * @param[out] status |
IanBenzMaxim | 73:2cecc1372acc | 155 | * Detects the condition of the Start (bit3), N/A (bit2), |
IanBenzMaxim | 73:2cecc1372acc | 156 | * Address(bit1) and CRC16(bit0) bits. |
IanBenzMaxim | 73:2cecc1372acc | 157 | * b3;0=No Err|1=I2CStart prev-not issued, |
IanBenzMaxim | 73:2cecc1372acc | 158 | * b2;0=No Err|1=I2C N/A Err, |
IanBenzMaxim | 73:2cecc1372acc | 159 | * b1;0=No Err|1=Addr Err, |
IanBenzMaxim | 73:2cecc1372acc | 160 | * b0;0=Valid CRC16|1=Invalid CRC16 |
IanBenzMaxim | 73:2cecc1372acc | 161 | * |
IanBenzMaxim | 73:2cecc1372acc | 162 | * @param[out] wr_status |
IanBenzMaxim | 73:2cecc1372acc | 163 | * Indicates which write byte NACK’d. A value of 00h indicates |
IanBenzMaxim | 73:2cecc1372acc | 164 | * all bytes were acknowledged by the slave. |
IanBenzMaxim | 73:2cecc1372acc | 165 | * A non-zero value indicates the byte number that NACK’d. |
IanBenzMaxim | 73:2cecc1372acc | 166 | * |
IanBenzMaxim | 73:2cecc1372acc | 167 | * @return |
IanBenzMaxim | 73:2cecc1372acc | 168 | * true if device selected and written @n |
IanBenzMaxim | 73:2cecc1372acc | 169 | * false if failed device select |
IanBenzMaxim | 73:2cecc1372acc | 170 | **************************************************************/ |
IanBenzMaxim | 73:2cecc1372acc | 171 | CmdResult I2C_WriteDataNoStop(uint8_t I2C_addr, uint8_t length, |
IanBenzMaxim | 73:2cecc1372acc | 172 | uint8_t *data, uint8_t &status, |
IanBenzMaxim | 73:2cecc1372acc | 173 | uint8_t &wr_status); |
IanBenzMaxim | 73:2cecc1372acc | 174 | |
IanBenzMaxim | 73:2cecc1372acc | 175 | |
IanBenzMaxim | 73:2cecc1372acc | 176 | /**********************************************************//** |
IanBenzMaxim | 73:2cecc1372acc | 177 | * @brief Write to selected DS28E17's I2C with Data only. |
IanBenzMaxim | 73:2cecc1372acc | 178 | * Poll until I2C write complete and receive status info. |
IanBenzMaxim | 73:2cecc1372acc | 179 | * |
IanBenzMaxim | 73:2cecc1372acc | 180 | * @details Output on I2C: Write Data [1-255] |
IanBenzMaxim | 73:2cecc1372acc | 181 | * |
IanBenzMaxim | 73:2cecc1372acc | 182 | * On Entry: |
IanBenzMaxim | 73:2cecc1372acc | 183 | * @param[in] length |
IanBenzMaxim | 73:2cecc1372acc | 184 | * The number of data bytes to be written ranging from 01h to FFh. |
IanBenzMaxim | 73:2cecc1372acc | 185 | * A value of zero will assert the Error Detected pin (ED). |
IanBenzMaxim | 73:2cecc1372acc | 186 | * |
IanBenzMaxim | 73:2cecc1372acc | 187 | * @param[in] *data |
IanBenzMaxim | 73:2cecc1372acc | 188 | * User defines write data ranging from 1-255 bytes. |
IanBenzMaxim | 73:2cecc1372acc | 189 | * |
IanBenzMaxim | 73:2cecc1372acc | 190 | * On Exit: |
IanBenzMaxim | 73:2cecc1372acc | 191 | * @param[out] status |
IanBenzMaxim | 73:2cecc1372acc | 192 | * Detects the condition of the Start (bit3), N/A (bit2), |
IanBenzMaxim | 73:2cecc1372acc | 193 | * Address(bit1) and CRC16(bit0) bits. |
IanBenzMaxim | 73:2cecc1372acc | 194 | * b3;0=No Err|1=I2CStart prev-not issued, |
IanBenzMaxim | 73:2cecc1372acc | 195 | * b2;0=No Err|1=I2C N/A Err, |
IanBenzMaxim | 73:2cecc1372acc | 196 | * b1;0=No Err|1=Addr Err, |
IanBenzMaxim | 73:2cecc1372acc | 197 | * b0;0=Valid CRC16|1=Invalid CRC16 |
IanBenzMaxim | 73:2cecc1372acc | 198 | * |
IanBenzMaxim | 73:2cecc1372acc | 199 | * @param[out] wr_status |
IanBenzMaxim | 73:2cecc1372acc | 200 | * Indicates which write byte NACK’d. A value of 00h indicates all bytes were acknowledged by the slave. |
IanBenzMaxim | 73:2cecc1372acc | 201 | * A non-zero value indicates the byte number that NACK’d. |
IanBenzMaxim | 73:2cecc1372acc | 202 | * |
IanBenzMaxim | 73:2cecc1372acc | 203 | * @return |
IanBenzMaxim | 73:2cecc1372acc | 204 | * true if device selected and written @n |
IanBenzMaxim | 73:2cecc1372acc | 205 | * false if failed device select |
IanBenzMaxim | 73:2cecc1372acc | 206 | **************************************************************/ |
IanBenzMaxim | 73:2cecc1372acc | 207 | CmdResult I2C_WriteDataOnly(uint8_t length, uint8_t *data, |
j3 | 7:78a8857b3810 | 208 | uint8_t &status, uint8_t &wr_status); |
IanBenzMaxim | 73:2cecc1372acc | 209 | |
IanBenzMaxim | 73:2cecc1372acc | 210 | |
IanBenzMaxim | 73:2cecc1372acc | 211 | /**********************************************************//** |
IanBenzMaxim | 73:2cecc1372acc | 212 | * @brief Write to selected DS28E17's I2C with Stop. |
IanBenzMaxim | 73:2cecc1372acc | 213 | * Poll until I2C write complete and receive status info. |
IanBenzMaxim | 73:2cecc1372acc | 214 | * |
IanBenzMaxim | 73:2cecc1372acc | 215 | * @details Output on I2C: Write Data [1-255], P |
IanBenzMaxim | 73:2cecc1372acc | 216 | * |
IanBenzMaxim | 73:2cecc1372acc | 217 | * On Entry: |
IanBenzMaxim | 73:2cecc1372acc | 218 | * @param[in] length |
IanBenzMaxim | 73:2cecc1372acc | 219 | * The number of data bytes to be written ranging from 01h to FFh. |
IanBenzMaxim | 73:2cecc1372acc | 220 | * A value of zero will assert the Error Detected pin (ED). |
IanBenzMaxim | 73:2cecc1372acc | 221 | * |
IanBenzMaxim | 73:2cecc1372acc | 222 | * @param[in] *data |
IanBenzMaxim | 73:2cecc1372acc | 223 | * User defines write data ranging from 1-255 bytes. |
IanBenzMaxim | 73:2cecc1372acc | 224 | * |
IanBenzMaxim | 73:2cecc1372acc | 225 | * On Exit: |
IanBenzMaxim | 73:2cecc1372acc | 226 | * @param[out] status |
IanBenzMaxim | 73:2cecc1372acc | 227 | * Detects the condition of the Start (bit3), N/A (bit2), |
IanBenzMaxim | 73:2cecc1372acc | 228 | * Address(bit1) and CRC16(bit0) bits. |
IanBenzMaxim | 73:2cecc1372acc | 229 | * b3;0=No Err|1=I2CStart prev-not issued, |
IanBenzMaxim | 73:2cecc1372acc | 230 | * b2;0=No Err|1=I2C N/A Err, |
IanBenzMaxim | 73:2cecc1372acc | 231 | * b1;0=No Err|1=Addr Err, |
IanBenzMaxim | 73:2cecc1372acc | 232 | * b0;0=Valid CRC16|1=Invalid CRC16 |
IanBenzMaxim | 73:2cecc1372acc | 233 | * |
IanBenzMaxim | 73:2cecc1372acc | 234 | * @param[out] wr_status |
IanBenzMaxim | 73:2cecc1372acc | 235 | * Indicates which write byte NACK’d. A value of 00h indicates all bytes were acknowledged by the slave. |
IanBenzMaxim | 73:2cecc1372acc | 236 | * A non-zero value indicates the byte number that NACK’d. |
IanBenzMaxim | 73:2cecc1372acc | 237 | * |
IanBenzMaxim | 73:2cecc1372acc | 238 | * @return |
IanBenzMaxim | 73:2cecc1372acc | 239 | * true if device selected and written @n |
IanBenzMaxim | 73:2cecc1372acc | 240 | * false if failed device select |
IanBenzMaxim | 73:2cecc1372acc | 241 | **************************************************************/ |
IanBenzMaxim | 73:2cecc1372acc | 242 | CmdResult I2C_WriteDataOnlyWithStop(uint8_t length, uint8_t *data, |
IanBenzMaxim | 73:2cecc1372acc | 243 | uint8_t &status, uint8_t &wr_status); |
IanBenzMaxim | 73:2cecc1372acc | 244 | |
IanBenzMaxim | 73:2cecc1372acc | 245 | |
IanBenzMaxim | 73:2cecc1372acc | 246 | /**********************************************************//** |
IanBenzMaxim | 73:2cecc1372acc | 247 | * @brief Write to selected DS28E17's I2C with Stop and poll until I2C write complete |
IanBenzMaxim | 73:2cecc1372acc | 248 | * receive status info, and read data with a stop at the end. |
IanBenzMaxim | 73:2cecc1372acc | 249 | * |
IanBenzMaxim | 73:2cecc1372acc | 250 | * @details Output on I2C: |
IanBenzMaxim | 73:2cecc1372acc | 251 | * S, Slave Address + Write, Write Data [1-255], |
IanBenzMaxim | 73:2cecc1372acc | 252 | * Sr, Address + Read, Read Data [1-255], P (NACK last read byte) |
IanBenzMaxim | 73:2cecc1372acc | 253 | * |
IanBenzMaxim | 73:2cecc1372acc | 254 | * On Entry: |
IanBenzMaxim | 73:2cecc1372acc | 255 | * @param[in] I2C_addr |
IanBenzMaxim | 73:2cecc1372acc | 256 | * Writes I2C address. The least significant bit of the I2C address |
IanBenzMaxim | 73:2cecc1372acc | 257 | * is automatically cleared by the command. |
IanBenzMaxim | 73:2cecc1372acc | 258 | * |
IanBenzMaxim | 73:2cecc1372acc | 259 | * @param[in] length |
IanBenzMaxim | 73:2cecc1372acc | 260 | * The number of data bytes to be written ranging from 01h to FFh. |
IanBenzMaxim | 73:2cecc1372acc | 261 | * A value of zero will assert the Error Detected pin (ED). |
IanBenzMaxim | 73:2cecc1372acc | 262 | * |
IanBenzMaxim | 73:2cecc1372acc | 263 | * @param[in] *data |
IanBenzMaxim | 73:2cecc1372acc | 264 | * User defines write data ranging from 1-255 bytes. |
IanBenzMaxim | 73:2cecc1372acc | 265 | * |
IanBenzMaxim | 73:2cecc1372acc | 266 | * @param[in] nu_bytes_read |
IanBenzMaxim | 73:2cecc1372acc | 267 | * Number of I2C bytes to read. A value of zero will assert the Error Detected pin (ED). |
IanBenzMaxim | 73:2cecc1372acc | 268 | * |
IanBenzMaxim | 73:2cecc1372acc | 269 | * On Exit: |
IanBenzMaxim | 73:2cecc1372acc | 270 | * @param[out] status |
IanBenzMaxim | 73:2cecc1372acc | 271 | * Detects the condition of the Start (bit3), N/A (bit2), |
IanBenzMaxim | 73:2cecc1372acc | 272 | * Address(bit1) and CRC16(bit0) bits. |
IanBenzMaxim | 73:2cecc1372acc | 273 | * b3;0=No Err|1=I2CStart prev-not issued, |
IanBenzMaxim | 73:2cecc1372acc | 274 | * b2;0=No Err|1=I2C N/A Err, |
IanBenzMaxim | 73:2cecc1372acc | 275 | * b1;0=No Err|1=Addr Err, |
IanBenzMaxim | 73:2cecc1372acc | 276 | * b0;0=Valid CRC16|1=Invalid CRC16 |
IanBenzMaxim | 73:2cecc1372acc | 277 | * |
IanBenzMaxim | 73:2cecc1372acc | 278 | * @param[out] wr_status |
IanBenzMaxim | 73:2cecc1372acc | 279 | * Indicates which write byte NACK’d. A value of 00h indicates all bytes were acknowledged by the slave. |
IanBenzMaxim | 73:2cecc1372acc | 280 | * A non-zero value indicates the byte number that NACK’d. |
IanBenzMaxim | 73:2cecc1372acc | 281 | * |
IanBenzMaxim | 73:2cecc1372acc | 282 | * @param[out] *read_data |
IanBenzMaxim | 73:2cecc1372acc | 283 | * Array of read data received from I2C. |
IanBenzMaxim | 73:2cecc1372acc | 284 | * |
IanBenzMaxim | 73:2cecc1372acc | 285 | * @return |
IanBenzMaxim | 73:2cecc1372acc | 286 | * true if device selected, written and read @n |
IanBenzMaxim | 73:2cecc1372acc | 287 | * false if failed device select or timeout occurred or CRC16 error |
IanBenzMaxim | 73:2cecc1372acc | 288 | **************************************************************/ |
IanBenzMaxim | 73:2cecc1372acc | 289 | CmdResult I2C_WriteReadDataWithStop(uint8_t I2C_addr, uint8_t length, |
IanBenzMaxim | 73:2cecc1372acc | 290 | uint8_t *data, uint8_t nu_bytes_read, |
IanBenzMaxim | 73:2cecc1372acc | 291 | uint8_t &status, uint8_t &wr_status, |
IanBenzMaxim | 73:2cecc1372acc | 292 | uint8_t *read_data); |
IanBenzMaxim | 73:2cecc1372acc | 293 | |
IanBenzMaxim | 73:2cecc1372acc | 294 | |
IanBenzMaxim | 73:2cecc1372acc | 295 | /**********************************************************//** |
IanBenzMaxim | 73:2cecc1372acc | 296 | * @brief Selected DS28E17's and send I2C address and poll until |
IanBenzMaxim | 73:2cecc1372acc | 297 | * I2C read address complete, receive status info, and read data |
IanBenzMaxim | 73:2cecc1372acc | 298 | * with a stop at the end. |
IanBenzMaxim | 73:2cecc1372acc | 299 | * |
IanBenzMaxim | 73:2cecc1372acc | 300 | * @details Output on I2C: |
IanBenzMaxim | 73:2cecc1372acc | 301 | * S, Slave Address + Read, Read Data [1-255], P (NACK last read byte) |
IanBenzMaxim | 73:2cecc1372acc | 302 | * |
IanBenzMaxim | 73:2cecc1372acc | 303 | * On Entry: |
IanBenzMaxim | 73:2cecc1372acc | 304 | * @param[in] I2C_addr |
IanBenzMaxim | 73:2cecc1372acc | 305 | * Writes I2C address. The least significant bit of the I2C address |
IanBenzMaxim | 73:2cecc1372acc | 306 | * is automatically cleared by the command. |
IanBenzMaxim | 73:2cecc1372acc | 307 | * |
IanBenzMaxim | 73:2cecc1372acc | 308 | * On Exit: |
IanBenzMaxim | 73:2cecc1372acc | 309 | * @param[out] nu_bytes_read |
IanBenzMaxim | 73:2cecc1372acc | 310 | * Number of I2C bytes to read. A value of zero will assert the Error Detected pin (ED). |
IanBenzMaxim | 73:2cecc1372acc | 311 | * |
IanBenzMaxim | 73:2cecc1372acc | 312 | * @param[out] status |
IanBenzMaxim | 73:2cecc1372acc | 313 | * Detects the condition of the Start (bit3), N/A (bit2), |
IanBenzMaxim | 73:2cecc1372acc | 314 | * Address(bit1) and CRC16(bit0) bits. |
IanBenzMaxim | 73:2cecc1372acc | 315 | * b3;0=No Err|1=I2CStart prev-not issued, |
IanBenzMaxim | 73:2cecc1372acc | 316 | * b2;0=No Err|1=I2C N/A Err, |
IanBenzMaxim | 73:2cecc1372acc | 317 | * b1;0=No Err|1=Addr Err, |
IanBenzMaxim | 73:2cecc1372acc | 318 | * b0;0=Valid CRC16|1=Invalid CRC16 |
IanBenzMaxim | 73:2cecc1372acc | 319 | * |
IanBenzMaxim | 73:2cecc1372acc | 320 | * @param[out] *read_data |
IanBenzMaxim | 73:2cecc1372acc | 321 | * Array of read data received from I2C. |
IanBenzMaxim | 73:2cecc1372acc | 322 | * |
IanBenzMaxim | 73:2cecc1372acc | 323 | * @return |
IanBenzMaxim | 73:2cecc1372acc | 324 | * true if device selected, written and read @n |
IanBenzMaxim | 73:2cecc1372acc | 325 | * false if failed device select or timeout occurred or CRC16 error |
IanBenzMaxim | 73:2cecc1372acc | 326 | **************************************************************/ |
IanBenzMaxim | 73:2cecc1372acc | 327 | CmdResult I2C_ReadDataWithStop(uint8_t I2C_addr, uint8_t nu_bytes_read, |
IanBenzMaxim | 73:2cecc1372acc | 328 | uint8_t &status, uint8_t *read_data); |
IanBenzMaxim | 73:2cecc1372acc | 329 | |
IanBenzMaxim | 73:2cecc1372acc | 330 | |
IanBenzMaxim | 73:2cecc1372acc | 331 | /**********************************************************//** |
IanBenzMaxim | 73:2cecc1372acc | 332 | * @brief Write to Configuration Register of DS28E17. |
IanBenzMaxim | 73:2cecc1372acc | 333 | * |
IanBenzMaxim | 73:2cecc1372acc | 334 | * @details |
IanBenzMaxim | 73:2cecc1372acc | 335 | * |
IanBenzMaxim | 73:2cecc1372acc | 336 | * On Entry: |
IanBenzMaxim | 73:2cecc1372acc | 337 | * @param[in] data |
IanBenzMaxim | 73:2cecc1372acc | 338 | * sent to configuration register |
IanBenzMaxim | 73:2cecc1372acc | 339 | * |
IanBenzMaxim | 73:2cecc1372acc | 340 | * On Exit: |
IanBenzMaxim | 73:2cecc1372acc | 341 | * |
IanBenzMaxim | 73:2cecc1372acc | 342 | * @return |
IanBenzMaxim | 73:2cecc1372acc | 343 | * true if device selected and written @n |
IanBenzMaxim | 73:2cecc1372acc | 344 | * false if failed device select |
IanBenzMaxim | 73:2cecc1372acc | 345 | **************************************************************/ |
IanBenzMaxim | 73:2cecc1372acc | 346 | CmdResult WriteConfigReg(uint8_t data); |
IanBenzMaxim | 73:2cecc1372acc | 347 | |
IanBenzMaxim | 73:2cecc1372acc | 348 | |
IanBenzMaxim | 73:2cecc1372acc | 349 | /**********************************************************//** |
IanBenzMaxim | 73:2cecc1372acc | 350 | * @brief Read the Configuration Register of DS28E17. |
IanBenzMaxim | 73:2cecc1372acc | 351 | * |
IanBenzMaxim | 73:2cecc1372acc | 352 | * @details |
IanBenzMaxim | 73:2cecc1372acc | 353 | * |
IanBenzMaxim | 73:2cecc1372acc | 354 | * On Entry: |
IanBenzMaxim | 73:2cecc1372acc | 355 | * |
IanBenzMaxim | 73:2cecc1372acc | 356 | * On Exit: |
IanBenzMaxim | 73:2cecc1372acc | 357 | * |
IanBenzMaxim | 73:2cecc1372acc | 358 | * @return |
IanBenzMaxim | 73:2cecc1372acc | 359 | * true if device selected and read correctly @n |
IanBenzMaxim | 73:2cecc1372acc | 360 | * false if failed device select |
IanBenzMaxim | 73:2cecc1372acc | 361 | **************************************************************/ |
IanBenzMaxim | 73:2cecc1372acc | 362 | CmdResult ReadConfigReg(uint8_t & config); |
IanBenzMaxim | 73:2cecc1372acc | 363 | |
IanBenzMaxim | 73:2cecc1372acc | 364 | |
IanBenzMaxim | 73:2cecc1372acc | 365 | /**********************************************************//** |
IanBenzMaxim | 73:2cecc1372acc | 366 | * @brief Disable 1-Wire Mode DS28E17 and activates the input detection pin. |
IanBenzMaxim | 73:2cecc1372acc | 367 | * Immediately after the command, all 1-Wire signaling will be ignored |
IanBenzMaxim | 73:2cecc1372acc | 368 | * until the 1W_DET pin is high for more than 3ms. |
IanBenzMaxim | 73:2cecc1372acc | 369 | * |
IanBenzMaxim | 73:2cecc1372acc | 370 | * @details |
IanBenzMaxim | 73:2cecc1372acc | 371 | * |
IanBenzMaxim | 73:2cecc1372acc | 372 | * On Entry: |
IanBenzMaxim | 73:2cecc1372acc | 373 | * |
IanBenzMaxim | 73:2cecc1372acc | 374 | * On Exit: |
IanBenzMaxim | 73:2cecc1372acc | 375 | * |
IanBenzMaxim | 73:2cecc1372acc | 376 | * @return |
IanBenzMaxim | 73:2cecc1372acc | 377 | * true if device selected and written @n |
IanBenzMaxim | 73:2cecc1372acc | 378 | * false if failed device select |
IanBenzMaxim | 73:2cecc1372acc | 379 | **************************************************************/ |
IanBenzMaxim | 73:2cecc1372acc | 380 | CmdResult DisableOWMode(); |
IanBenzMaxim | 73:2cecc1372acc | 381 | |
IanBenzMaxim | 73:2cecc1372acc | 382 | |
IanBenzMaxim | 73:2cecc1372acc | 383 | /**********************************************************//** |
IanBenzMaxim | 73:2cecc1372acc | 384 | * @brief The Enable Sleep Mode command puts the device into a low current mode. |
IanBenzMaxim | 73:2cecc1372acc | 385 | * All 1-Wire communication is ignored until woken up. Immediately after |
IanBenzMaxim | 73:2cecc1372acc | 386 | * the command, the device monitors the WAKEUP input pin and |
IanBenzMaxim | 73:2cecc1372acc | 387 | * exits sleep mode on a rising edge. |
IanBenzMaxim | 73:2cecc1372acc | 388 | * |
IanBenzMaxim | 73:2cecc1372acc | 389 | * @details |
IanBenzMaxim | 73:2cecc1372acc | 390 | * |
IanBenzMaxim | 73:2cecc1372acc | 391 | * On Entry: |
IanBenzMaxim | 73:2cecc1372acc | 392 | * |
IanBenzMaxim | 73:2cecc1372acc | 393 | * On Exit: |
IanBenzMaxim | 73:2cecc1372acc | 394 | * |
IanBenzMaxim | 73:2cecc1372acc | 395 | * @return |
IanBenzMaxim | 73:2cecc1372acc | 396 | * true if device selected and written @n |
IanBenzMaxim | 73:2cecc1372acc | 397 | * false if failed device select* |
IanBenzMaxim | 73:2cecc1372acc | 398 | **************************************************************/ |
IanBenzMaxim | 73:2cecc1372acc | 399 | CmdResult EnableSleepMode(); |
IanBenzMaxim | 73:2cecc1372acc | 400 | |
IanBenzMaxim | 73:2cecc1372acc | 401 | |
IanBenzMaxim | 73:2cecc1372acc | 402 | /**********************************************************//** |
IanBenzMaxim | 73:2cecc1372acc | 403 | * @brief Read the Device Revision of DS28E17. The revision value |
IanBenzMaxim | 73:2cecc1372acc | 404 | * should never be zero. The upper nibble is the major revision |
IanBenzMaxim | 73:2cecc1372acc | 405 | * and the lower nibble is the minor revision. |
IanBenzMaxim | 73:2cecc1372acc | 406 | * |
IanBenzMaxim | 73:2cecc1372acc | 407 | * @details |
IanBenzMaxim | 73:2cecc1372acc | 408 | * |
IanBenzMaxim | 73:2cecc1372acc | 409 | * On Entry: |
IanBenzMaxim | 73:2cecc1372acc | 410 | * |
IanBenzMaxim | 73:2cecc1372acc | 411 | * On Exit: |
IanBenzMaxim | 73:2cecc1372acc | 412 | * |
IanBenzMaxim | 73:2cecc1372acc | 413 | * @return |
IanBenzMaxim | 73:2cecc1372acc | 414 | * revision value if device selected and read correctly @n |
IanBenzMaxim | 73:2cecc1372acc | 415 | * false if failed device select (i.e. 00h) |
IanBenzMaxim | 73:2cecc1372acc | 416 | **************************************************************/ |
IanBenzMaxim | 73:2cecc1372acc | 417 | CmdResult ReadDeviceRevision(uint8_t & rev); |
IanBenzMaxim | 73:2cecc1372acc | 418 | |
IanBenzMaxim | 73:2cecc1372acc | 419 | private: |
IanBenzMaxim | 73:2cecc1372acc | 420 | |
IanBenzMaxim | 73:2cecc1372acc | 421 | CmdResult send_packet(const uint8_t * data, uint8_t data_length, |
IanBenzMaxim | 73:2cecc1372acc | 422 | uint8_t & status, uint8_t & wr_status); |
IanBenzMaxim | 73:2cecc1372acc | 423 | |
IanBenzMaxim | 73:2cecc1372acc | 424 | //overloaded function for I2C read only command |
IanBenzMaxim | 73:2cecc1372acc | 425 | CmdResult send_packet(const uint8_t * data, uint8_t data_length, |
IanBenzMaxim | 73:2cecc1372acc | 426 | uint8_t & status); |
IanBenzMaxim | 73:2cecc1372acc | 427 | |
IanBenzMaxim | 73:2cecc1372acc | 428 | Masters::OneWireMaster &_owm; |
IanBenzMaxim | 73:2cecc1372acc | 429 | |
IanBenzMaxim | 73:2cecc1372acc | 430 | uint16_t _crc16; |
IanBenzMaxim | 73:2cecc1372acc | 431 | uint8_t _i2c_speed; |
IanBenzMaxim | 73:2cecc1372acc | 432 | |
IanBenzMaxim | 73:2cecc1372acc | 433 | static const uint16_t _oddparity[16]; |
IanBenzMaxim | 73:2cecc1372acc | 434 | |
IanBenzMaxim | 73:2cecc1372acc | 435 | uint16_t docrc16(uint16_t data); |
IanBenzMaxim | 73:2cecc1372acc | 436 | }; |
IanBenzMaxim | 73:2cecc1372acc | 437 | } |
IanBenzMaxim | 73:2cecc1372acc | 438 | } |
j3 | 4:ca27db159b10 | 439 | |
j3 | 17:b646b1e3970b | 440 | #endif /*DS28E17_H*/ |
j3 | 17:b646b1e3970b | 441 |