Implementation of 1-Wire with added Alarm Search Functionality
Dependents: Max32630_One_Wire_Interface
OneWire_Masters/DS248x/ds248x.cpp@2:02d228c25fd4, 2016-01-31 (annotated)
- Committer:
- j3
- Date:
- Sun Jan 31 06:15:24 2016 +0000
- Revision:
- 2:02d228c25fd4
- Parent:
- 1:91e52f8ab8bf
- Child:
- 3:644fc630f958
Finished porting DS248X code
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
j3 | 1:91e52f8ab8bf | 1 | /******************************************************************//** |
j3 | 1:91e52f8ab8bf | 2 | * @file ds248x.cpp |
j3 | 1:91e52f8ab8bf | 3 | * |
j3 | 1:91e52f8ab8bf | 4 | * @author Justin Jordan |
j3 | 1:91e52f8ab8bf | 5 | * |
j3 | 1:91e52f8ab8bf | 6 | * @version 0.0.0 |
j3 | 1:91e52f8ab8bf | 7 | * |
j3 | 1:91e52f8ab8bf | 8 | * Started: 30JAN16 |
j3 | 1:91e52f8ab8bf | 9 | * |
j3 | 1:91e52f8ab8bf | 10 | * Updated: |
j3 | 1:91e52f8ab8bf | 11 | * |
j3 | 1:91e52f8ab8bf | 12 | * @brief Source file for Ds248x I2C to 1-wire master |
j3 | 1:91e52f8ab8bf | 13 | *********************************************************************** |
j3 | 1:91e52f8ab8bf | 14 | * Copyright (C) 2016 Maxim Integrated Products, Inc., All Rights Reserved. |
j3 | 1:91e52f8ab8bf | 15 | * |
j3 | 1:91e52f8ab8bf | 16 | * Permission is hereby granted, free of charge, to any person obtaining a |
j3 | 1:91e52f8ab8bf | 17 | * copy of this software and associated documentation files (the "Software"), |
j3 | 1:91e52f8ab8bf | 18 | * to deal in the Software without restriction, including without limitation |
j3 | 1:91e52f8ab8bf | 19 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
j3 | 1:91e52f8ab8bf | 20 | * and/or sell copies of the Software, and to permit persons to whom the |
j3 | 1:91e52f8ab8bf | 21 | * Software is furnished to do so, subject to the following conditions: |
j3 | 1:91e52f8ab8bf | 22 | * |
j3 | 1:91e52f8ab8bf | 23 | * The above copyright notice and this permission notice shall be included |
j3 | 1:91e52f8ab8bf | 24 | * in all copies or substantial portions of the Software. |
j3 | 1:91e52f8ab8bf | 25 | * |
j3 | 1:91e52f8ab8bf | 26 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS |
j3 | 1:91e52f8ab8bf | 27 | * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF |
j3 | 1:91e52f8ab8bf | 28 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. |
j3 | 1:91e52f8ab8bf | 29 | * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES |
j3 | 1:91e52f8ab8bf | 30 | * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, |
j3 | 1:91e52f8ab8bf | 31 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR |
j3 | 1:91e52f8ab8bf | 32 | * OTHER DEALINGS IN THE SOFTWARE. |
j3 | 1:91e52f8ab8bf | 33 | * |
j3 | 1:91e52f8ab8bf | 34 | * Except as contained in this notice, the name of Maxim Integrated |
j3 | 1:91e52f8ab8bf | 35 | * Products, Inc. shall not be used except as stated in the Maxim Integrated |
j3 | 1:91e52f8ab8bf | 36 | * Products, Inc. Branding Policy. |
j3 | 1:91e52f8ab8bf | 37 | * |
j3 | 1:91e52f8ab8bf | 38 | * The mere transfer of this software does not imply any licenses |
j3 | 1:91e52f8ab8bf | 39 | * of trade secrets, proprietary technology, copyrights, patents, |
j3 | 1:91e52f8ab8bf | 40 | * trademarks, maskwork rights, or any other form of intellectual |
j3 | 1:91e52f8ab8bf | 41 | * property whatsoever. Maxim Integrated Products, Inc. retains all |
j3 | 1:91e52f8ab8bf | 42 | * ownership rights. |
j3 | 1:91e52f8ab8bf | 43 | **********************************************************************/ |
j3 | 1:91e52f8ab8bf | 44 | |
j3 | 1:91e52f8ab8bf | 45 | |
j3 | 1:91e52f8ab8bf | 46 | #include "ds248x.h" |
j3 | 1:91e52f8ab8bf | 47 | |
j3 | 1:91e52f8ab8bf | 48 | |
j3 | 2:02d228c25fd4 | 49 | //OW ROM Commands |
j3 | 2:02d228c25fd4 | 50 | #define READ_ROM 0x33 |
j3 | 2:02d228c25fd4 | 51 | #define MATCH_ROM 0x55 |
j3 | 2:02d228c25fd4 | 52 | #define SEARCH_ROM 0xF0 |
j3 | 2:02d228c25fd4 | 53 | #define SKIP_ROM 0xCC |
j3 | 2:02d228c25fd4 | 54 | |
j3 | 2:02d228c25fd4 | 55 | // ds248x commands |
j3 | 2:02d228c25fd4 | 56 | #define CMD_DRST 0xF0 |
j3 | 2:02d228c25fd4 | 57 | #define CMD_WCFG 0xD2 |
j3 | 2:02d228c25fd4 | 58 | #define CMD_A1WP 0xC3 //DS2484 only |
j3 | 2:02d228c25fd4 | 59 | #define CMD_CHSL 0xC3 //DS2482-800 only |
j3 | 2:02d228c25fd4 | 60 | #define CMD_SRP 0xE1 |
j3 | 2:02d228c25fd4 | 61 | #define CMD_1WRS 0xB4 |
j3 | 2:02d228c25fd4 | 62 | #define CMD_1WWB 0xA5 |
j3 | 2:02d228c25fd4 | 63 | #define CMD_1WRB 0x96 |
j3 | 2:02d228c25fd4 | 64 | #define CMD_1WSB 0x87 |
j3 | 2:02d228c25fd4 | 65 | #define CMD_1WT 0x78 |
j3 | 2:02d228c25fd4 | 66 | |
j3 | 2:02d228c25fd4 | 67 | // ds248x config bits |
j3 | 2:02d228c25fd4 | 68 | #define CONFIG_APU 0x01 |
j3 | 2:02d228c25fd4 | 69 | #define CONFIG_PDN 0x02 |
j3 | 2:02d228c25fd4 | 70 | #define CONFIG_SPU 0x04 |
j3 | 2:02d228c25fd4 | 71 | #define CONFIG_1WS 0x08 |
j3 | 2:02d228c25fd4 | 72 | |
j3 | 2:02d228c25fd4 | 73 | // ds248x status bits |
j3 | 2:02d228c25fd4 | 74 | #define STATUS_1WB 0x01 |
j3 | 2:02d228c25fd4 | 75 | #define STATUS_PPD 0x02 |
j3 | 2:02d228c25fd4 | 76 | #define STATUS_SD 0x04 |
j3 | 2:02d228c25fd4 | 77 | #define STATUS_LL 0x08 |
j3 | 2:02d228c25fd4 | 78 | #define STATUS_RST 0x10 |
j3 | 2:02d228c25fd4 | 79 | #define STATUS_SBR 0x20 |
j3 | 2:02d228c25fd4 | 80 | #define STATUS_TSB 0x40 |
j3 | 2:02d228c25fd4 | 81 | #define STATUS_DIR 0x80 |
j3 | 2:02d228c25fd4 | 82 | |
j3 | 2:02d228c25fd4 | 83 | // ds2484 adjustable parameters |
j3 | 2:02d228c25fd4 | 84 | #define TRSTL 0 |
j3 | 2:02d228c25fd4 | 85 | #define TRSTL_OD 1 |
j3 | 2:02d228c25fd4 | 86 | #define TMSP 2 |
j3 | 2:02d228c25fd4 | 87 | #define TMSP_OD 3 |
j3 | 2:02d228c25fd4 | 88 | #define TW0L 4 |
j3 | 2:02d228c25fd4 | 89 | #define TW0L_OD 5 |
j3 | 2:02d228c25fd4 | 90 | #define TREC0 6 //OD NA |
j3 | 2:02d228c25fd4 | 91 | #define RWPU 8 //OD NA |
j3 | 2:02d228c25fd4 | 92 | |
j3 | 2:02d228c25fd4 | 93 | |
j3 | 2:02d228c25fd4 | 94 | // misc constants |
j3 | 2:02d228c25fd4 | 95 | #define POLL_LIMIT 200 |
j3 | 2:02d228c25fd4 | 96 | #define TRUE 1 |
j3 | 2:02d228c25fd4 | 97 | #define FALSE 0 |
j3 | 2:02d228c25fd4 | 98 | |
j3 | 2:02d228c25fd4 | 99 | // API mode bit flags |
j3 | 2:02d228c25fd4 | 100 | #define MODE_STANDARD 0x00 |
j3 | 2:02d228c25fd4 | 101 | #define MODE_OVERDRIVE 0x01 |
j3 | 2:02d228c25fd4 | 102 | #define MODE_STRONG 0x02 |
j3 | 2:02d228c25fd4 | 103 | |
j3 | 2:02d228c25fd4 | 104 | |
j3 | 1:91e52f8ab8bf | 105 | //********************************************************************* |
j3 | 1:91e52f8ab8bf | 106 | Ds248x::Ds248x(I2C *p_i2c_bus, ds248x_i2c_adrs_t adrs) |
j3 | 1:91e52f8ab8bf | 107 | { |
j3 | 1:91e52f8ab8bf | 108 | _p_i2c_bus = p_i2c_bus; |
j3 | 1:91e52f8ab8bf | 109 | _w_adrs = (adrs << 1); |
j3 | 1:91e52f8ab8bf | 110 | _r_adrs = (_w_adrs | 1); |
j3 | 1:91e52f8ab8bf | 111 | i2c_owner = false; |
j3 | 1:91e52f8ab8bf | 112 | } |
j3 | 1:91e52f8ab8bf | 113 | |
j3 | 1:91e52f8ab8bf | 114 | |
j3 | 1:91e52f8ab8bf | 115 | //********************************************************************* |
j3 | 1:91e52f8ab8bf | 116 | Ds248x::Ds248x(PinName sda, PinName scl, ds248x_i2c_adrs_t adrs) |
j3 | 1:91e52f8ab8bf | 117 | { |
j3 | 1:91e52f8ab8bf | 118 | _p_i2c_bus = new I2C(sda, scl); |
j3 | 1:91e52f8ab8bf | 119 | _w_adrs = (adrs << 1); |
j3 | 1:91e52f8ab8bf | 120 | _r_adrs = (_w_adrs | 1); |
j3 | 1:91e52f8ab8bf | 121 | i2c_owner = true; |
j3 | 1:91e52f8ab8bf | 122 | } |
j3 | 1:91e52f8ab8bf | 123 | |
j3 | 1:91e52f8ab8bf | 124 | |
j3 | 1:91e52f8ab8bf | 125 | //********************************************************************* |
j3 | 1:91e52f8ab8bf | 126 | Ds248x::~Ds248x() |
j3 | 1:91e52f8ab8bf | 127 | { |
j3 | 1:91e52f8ab8bf | 128 | if(i2c_owner) |
j3 | 1:91e52f8ab8bf | 129 | { |
j3 | 1:91e52f8ab8bf | 130 | delete _p_i2c_bus; |
j3 | 1:91e52f8ab8bf | 131 | } |
j3 | 1:91e52f8ab8bf | 132 | } |
j3 | 1:91e52f8ab8bf | 133 | |
j3 | 1:91e52f8ab8bf | 134 | |
j3 | 1:91e52f8ab8bf | 135 | //********************************************************************* |
j3 | 2:02d228c25fd4 | 136 | bool Ds248x::detect(void) |
j3 | 2:02d228c25fd4 | 137 | { |
j3 | 2:02d228c25fd4 | 138 | bool rtn_val = false; |
j3 | 2:02d228c25fd4 | 139 | |
j3 | 2:02d228c25fd4 | 140 | // reset the ds2484 ON selected address |
j3 | 2:02d228c25fd4 | 141 | if (!reset()) |
j3 | 2:02d228c25fd4 | 142 | { |
j3 | 2:02d228c25fd4 | 143 | rtn_val = false; |
j3 | 2:02d228c25fd4 | 144 | } |
j3 | 2:02d228c25fd4 | 145 | else |
j3 | 2:02d228c25fd4 | 146 | { |
j3 | 2:02d228c25fd4 | 147 | // default configuration |
j3 | 2:02d228c25fd4 | 148 | _c1WS = FALSE; |
j3 | 2:02d228c25fd4 | 149 | _cSPU = FALSE; |
j3 | 2:02d228c25fd4 | 150 | _cPDN = FALSE; |
j3 | 2:02d228c25fd4 | 151 | _cAPU = FALSE; |
j3 | 2:02d228c25fd4 | 152 | |
j3 | 2:02d228c25fd4 | 153 | // write the default configuration setup |
j3 | 2:02d228c25fd4 | 154 | if (!write_config(_c1WS | _cSPU | _cPDN | _cAPU)) |
j3 | 2:02d228c25fd4 | 155 | { |
j3 | 2:02d228c25fd4 | 156 | rtn_val = false; |
j3 | 2:02d228c25fd4 | 157 | } |
j3 | 2:02d228c25fd4 | 158 | else |
j3 | 2:02d228c25fd4 | 159 | { |
j3 | 2:02d228c25fd4 | 160 | rtn_val = true; |
j3 | 2:02d228c25fd4 | 161 | } |
j3 | 2:02d228c25fd4 | 162 | } |
j3 | 2:02d228c25fd4 | 163 | |
j3 | 2:02d228c25fd4 | 164 | return(rtn_val); |
j3 | 2:02d228c25fd4 | 165 | } |
j3 | 2:02d228c25fd4 | 166 | |
j3 | 2:02d228c25fd4 | 167 | |
j3 | 2:02d228c25fd4 | 168 | //********************************************************************* |
j3 | 2:02d228c25fd4 | 169 | bool Ds248x::reset(void) |
j3 | 1:91e52f8ab8bf | 170 | { |
j3 | 2:02d228c25fd4 | 171 | char status; |
j3 | 2:02d228c25fd4 | 172 | char packet[] = {CMD_DRST}; |
j3 | 2:02d228c25fd4 | 173 | |
j3 | 2:02d228c25fd4 | 174 | // Device Reset |
j3 | 2:02d228c25fd4 | 175 | // S AD,0 [A] DRST [A] Sr AD,1 [A] [SS] A\ P |
j3 | 2:02d228c25fd4 | 176 | // [] indicates from slave |
j3 | 2:02d228c25fd4 | 177 | // SS status byte to read to verify state |
j3 | 2:02d228c25fd4 | 178 | |
j3 | 2:02d228c25fd4 | 179 | _p_i2c_bus->write(_w_adrs, packet, 1); |
j3 | 2:02d228c25fd4 | 180 | _p_i2c_bus->read(_r_adrs, &status, 1); |
j3 | 2:02d228c25fd4 | 181 | |
j3 | 2:02d228c25fd4 | 182 | return((status & 0xF7) == 0x10); |
j3 | 2:02d228c25fd4 | 183 | } |
j3 | 2:02d228c25fd4 | 184 | |
j3 | 2:02d228c25fd4 | 185 | |
j3 | 2:02d228c25fd4 | 186 | //********************************************************************* |
j3 | 2:02d228c25fd4 | 187 | bool Ds248x::write_config(uint8_t config) |
j3 | 2:02d228c25fd4 | 188 | { |
j3 | 2:02d228c25fd4 | 189 | bool rtn_val = false; |
j3 | 2:02d228c25fd4 | 190 | char read_config; |
j3 | 2:02d228c25fd4 | 191 | char packet [] = {CMD_WCFG, (config | (~config << 4))}; |
j3 | 2:02d228c25fd4 | 192 | |
j3 | 2:02d228c25fd4 | 193 | _p_i2c_bus->write(_w_adrs, packet, 2); |
j3 | 2:02d228c25fd4 | 194 | _p_i2c_bus->read(_r_adrs, &read_config, 1); |
j3 | 2:02d228c25fd4 | 195 | |
j3 | 2:02d228c25fd4 | 196 | // check for failure due to incorrect read back |
j3 | 2:02d228c25fd4 | 197 | if (config != read_config) |
j3 | 2:02d228c25fd4 | 198 | { |
j3 | 2:02d228c25fd4 | 199 | // handle error |
j3 | 2:02d228c25fd4 | 200 | // ... |
j3 | 2:02d228c25fd4 | 201 | reset(); |
j3 | 2:02d228c25fd4 | 202 | rtn_val = false; |
j3 | 2:02d228c25fd4 | 203 | } |
j3 | 2:02d228c25fd4 | 204 | else |
j3 | 2:02d228c25fd4 | 205 | { |
j3 | 2:02d228c25fd4 | 206 | rtn_val = true; |
j3 | 2:02d228c25fd4 | 207 | } |
j3 | 2:02d228c25fd4 | 208 | |
j3 | 1:91e52f8ab8bf | 209 | return(rtn_val); |
j3 | 1:91e52f8ab8bf | 210 | } |
j3 | 1:91e52f8ab8bf | 211 | |
j3 | 1:91e52f8ab8bf | 212 | |
j3 | 1:91e52f8ab8bf | 213 | //********************************************************************* |
j3 | 2:02d228c25fd4 | 214 | bool Ds248x::channel_select(uint8_t channel) |
j3 | 1:91e52f8ab8bf | 215 | { |
j3 | 2:02d228c25fd4 | 216 | |
j3 | 2:02d228c25fd4 | 217 | char ch, ch_read, check; |
j3 | 2:02d228c25fd4 | 218 | char packet [2]; |
j3 | 2:02d228c25fd4 | 219 | |
j3 | 2:02d228c25fd4 | 220 | packet[0] = CMD_CHSL; |
j3 | 2:02d228c25fd4 | 221 | |
j3 | 2:02d228c25fd4 | 222 | // Channel Select (Case A) |
j3 | 2:02d228c25fd4 | 223 | // S AD,0 [A] CHSL [A] CC [A] Sr AD,1 [A] [RR] A\ P |
j3 | 2:02d228c25fd4 | 224 | // [] indicates from slave |
j3 | 2:02d228c25fd4 | 225 | // CC channel value |
j3 | 2:02d228c25fd4 | 226 | // RR channel read back |
j3 | 2:02d228c25fd4 | 227 | |
j3 | 2:02d228c25fd4 | 228 | switch (channel) |
j3 | 2:02d228c25fd4 | 229 | { |
j3 | 2:02d228c25fd4 | 230 | default: case 0: ch = 0xF0; ch_read = 0xB8; break; |
j3 | 2:02d228c25fd4 | 231 | case 1: ch = 0xE1; ch_read = 0xB1; break; |
j3 | 2:02d228c25fd4 | 232 | case 2: ch = 0xD2; ch_read = 0xAA; break; |
j3 | 2:02d228c25fd4 | 233 | case 3: ch = 0xC3; ch_read = 0xA3; break; |
j3 | 2:02d228c25fd4 | 234 | case 4: ch = 0xB4; ch_read = 0x9C; break; |
j3 | 2:02d228c25fd4 | 235 | case 5: ch = 0xA5; ch_read = 0x95; break; |
j3 | 2:02d228c25fd4 | 236 | case 6: ch = 0x96; ch_read = 0x8E; break; |
j3 | 2:02d228c25fd4 | 237 | case 7: ch = 0x87; ch_read = 0x87; break; |
j3 | 2:02d228c25fd4 | 238 | }; |
j3 | 2:02d228c25fd4 | 239 | |
j3 | 2:02d228c25fd4 | 240 | packet[1] = ch; |
j3 | 2:02d228c25fd4 | 241 | |
j3 | 2:02d228c25fd4 | 242 | _p_i2c_bus->write(_w_adrs, packet, 2); |
j3 | 2:02d228c25fd4 | 243 | _p_i2c_bus->read(_r_adrs, &check, 1); |
j3 | 2:02d228c25fd4 | 244 | |
j3 | 2:02d228c25fd4 | 245 | // check for failure due to incorrect read back of channel |
j3 | 2:02d228c25fd4 | 246 | return (check == ch_read); |
j3 | 2:02d228c25fd4 | 247 | } |
j3 | 2:02d228c25fd4 | 248 | |
j3 | 2:02d228c25fd4 | 249 | |
j3 | 2:02d228c25fd4 | 250 | //********************************************************************* |
j3 | 2:02d228c25fd4 | 251 | bool Ds248x::adjust_timing(uint8_t param, uint8_t val) |
j3 | 2:02d228c25fd4 | 252 | { |
j3 | 2:02d228c25fd4 | 253 | bool rtn_val = false; |
j3 | 2:02d228c25fd4 | 254 | char read_port_config; |
j3 | 2:02d228c25fd4 | 255 | char control_byte; |
j3 | 2:02d228c25fd4 | 256 | |
j3 | 2:02d228c25fd4 | 257 | control_byte = (((param & 0x0F) << 4) | (val & 0x0F)); |
j3 | 2:02d228c25fd4 | 258 | |
j3 | 2:02d228c25fd4 | 259 | char packet [] = {CMD_A1WP, control_byte}; |
j3 | 2:02d228c25fd4 | 260 | |
j3 | 2:02d228c25fd4 | 261 | _p_i2c_bus->write(_w_adrs, packet, 2); |
j3 | 2:02d228c25fd4 | 262 | _p_i2c_bus->read(_r_adrs, &read_port_config, 1); |
j3 | 2:02d228c25fd4 | 263 | |
j3 | 2:02d228c25fd4 | 264 | // check for failure due to incorrect read back |
j3 | 2:02d228c25fd4 | 265 | if ((control_byte & 0x0F) != read_port_config) |
j3 | 2:02d228c25fd4 | 266 | { |
j3 | 2:02d228c25fd4 | 267 | // handle error |
j3 | 2:02d228c25fd4 | 268 | // ... |
j3 | 2:02d228c25fd4 | 269 | reset(); |
j3 | 2:02d228c25fd4 | 270 | |
j3 | 2:02d228c25fd4 | 271 | rtn_val = false; |
j3 | 2:02d228c25fd4 | 272 | } |
j3 | 2:02d228c25fd4 | 273 | else |
j3 | 2:02d228c25fd4 | 274 | { |
j3 | 2:02d228c25fd4 | 275 | rtn_val = true; |
j3 | 2:02d228c25fd4 | 276 | } |
j3 | 2:02d228c25fd4 | 277 | |
j3 | 2:02d228c25fd4 | 278 | return(rtn_val); |
j3 | 1:91e52f8ab8bf | 279 | } |
j3 | 1:91e52f8ab8bf | 280 | |
j3 | 1:91e52f8ab8bf | 281 | |
j3 | 1:91e52f8ab8bf | 282 | //********************************************************************* |
j3 | 2:02d228c25fd4 | 283 | uint8_t Ds248x::search_triplet(uint8_t search_direction) |
j3 | 1:91e52f8ab8bf | 284 | { |
j3 | 2:02d228c25fd4 | 285 | uint8_t rtn_val = 0; |
j3 | 2:02d228c25fd4 | 286 | uint8_t poll_count = 0; |
j3 | 2:02d228c25fd4 | 287 | char status; |
j3 | 2:02d228c25fd4 | 288 | char packet [] = {CMD_1WT, search_direction ? 0x80 : 0x00}; |
j3 | 2:02d228c25fd4 | 289 | |
j3 | 2:02d228c25fd4 | 290 | // 1-Wire Triplet (Case B) |
j3 | 2:02d228c25fd4 | 291 | // S AD,0 [A] 1WT [A] SS [A] Sr AD,1 [A] [Status] A [Status] A\ P |
j3 | 2:02d228c25fd4 | 292 | // \--------/ |
j3 | 2:02d228c25fd4 | 293 | // Repeat until 1WB bit has changed to 0 |
j3 | 2:02d228c25fd4 | 294 | // [] indicates from slave |
j3 | 2:02d228c25fd4 | 295 | // SS indicates byte containing search direction bit value in msbit |
j3 | 2:02d228c25fd4 | 296 | |
j3 | 2:02d228c25fd4 | 297 | _p_i2c_bus->write(_w_adrs, packet, 2); |
j3 | 2:02d228c25fd4 | 298 | |
j3 | 2:02d228c25fd4 | 299 | // loop checking 1WB bit for completion of 1-Wire operation |
j3 | 2:02d228c25fd4 | 300 | // abort if poll limit reached |
j3 | 2:02d228c25fd4 | 301 | do |
j3 | 2:02d228c25fd4 | 302 | { |
j3 | 2:02d228c25fd4 | 303 | _p_i2c_bus->read(_r_adrs, &status, 1); |
j3 | 2:02d228c25fd4 | 304 | } |
j3 | 2:02d228c25fd4 | 305 | while ((status & STATUS_1WB) && (poll_count++ < POLL_LIMIT)); |
j3 | 2:02d228c25fd4 | 306 | |
j3 | 2:02d228c25fd4 | 307 | // check for failure due to poll limit reached |
j3 | 2:02d228c25fd4 | 308 | if (poll_count >= POLL_LIMIT) |
j3 | 2:02d228c25fd4 | 309 | { |
j3 | 2:02d228c25fd4 | 310 | // handle error |
j3 | 2:02d228c25fd4 | 311 | // ... |
j3 | 2:02d228c25fd4 | 312 | reset(); |
j3 | 2:02d228c25fd4 | 313 | rtn_val = FALSE; |
j3 | 2:02d228c25fd4 | 314 | } |
j3 | 2:02d228c25fd4 | 315 | else |
j3 | 2:02d228c25fd4 | 316 | { |
j3 | 2:02d228c25fd4 | 317 | rtn_val = status; |
j3 | 2:02d228c25fd4 | 318 | } |
j3 | 2:02d228c25fd4 | 319 | |
j3 | 2:02d228c25fd4 | 320 | return(rtn_val); |
j3 | 1:91e52f8ab8bf | 321 | } |
j3 | 1:91e52f8ab8bf | 322 | |
j3 | 1:91e52f8ab8bf | 323 | |
j3 | 1:91e52f8ab8bf | 324 | //********************************************************************* |
j3 | 2:02d228c25fd4 | 325 | bool Ds248x::OWReset() |
j3 | 2:02d228c25fd4 | 326 | { |
j3 | 2:02d228c25fd4 | 327 | bool rtn_val = false; |
j3 | 2:02d228c25fd4 | 328 | |
j3 | 2:02d228c25fd4 | 329 | uint8_t poll_count = 0; |
j3 | 2:02d228c25fd4 | 330 | char status; |
j3 | 2:02d228c25fd4 | 331 | char packet [] = {CMD_1WRS}; |
j3 | 1:91e52f8ab8bf | 332 | |
j3 | 2:02d228c25fd4 | 333 | // 1-Wire reset (Case B) |
j3 | 2:02d228c25fd4 | 334 | // S AD,0 [A] 1WRS [A] Sr AD,1 [A] [Status] A [Status] A\ P |
j3 | 2:02d228c25fd4 | 335 | // \--------/ |
j3 | 2:02d228c25fd4 | 336 | // Repeat until 1WB bit has changed to 0 |
j3 | 2:02d228c25fd4 | 337 | // [] indicates from slave |
j3 | 2:02d228c25fd4 | 338 | |
j3 | 2:02d228c25fd4 | 339 | _p_i2c_bus->write(_w_adrs, packet, 1); |
j3 | 2:02d228c25fd4 | 340 | |
j3 | 2:02d228c25fd4 | 341 | // loop checking 1WB bit for completion of 1-Wire operation |
j3 | 2:02d228c25fd4 | 342 | // abort if poll limit reached |
j3 | 2:02d228c25fd4 | 343 | do |
j3 | 2:02d228c25fd4 | 344 | { |
j3 | 2:02d228c25fd4 | 345 | _p_i2c_bus->read(_r_adrs, &status, 1); |
j3 | 2:02d228c25fd4 | 346 | } |
j3 | 2:02d228c25fd4 | 347 | while ((status & STATUS_1WB) && (poll_count++ < POLL_LIMIT)); |
j3 | 1:91e52f8ab8bf | 348 | |
j3 | 2:02d228c25fd4 | 349 | // check for failure due to poll limit reached |
j3 | 2:02d228c25fd4 | 350 | if (poll_count >= POLL_LIMIT) |
j3 | 2:02d228c25fd4 | 351 | { |
j3 | 2:02d228c25fd4 | 352 | // handle error |
j3 | 2:02d228c25fd4 | 353 | // ... |
j3 | 2:02d228c25fd4 | 354 | reset(); |
j3 | 2:02d228c25fd4 | 355 | rtn_val = false; |
j3 | 2:02d228c25fd4 | 356 | } |
j3 | 2:02d228c25fd4 | 357 | else |
j3 | 2:02d228c25fd4 | 358 | { |
j3 | 2:02d228c25fd4 | 359 | // check for short condition |
j3 | 2:02d228c25fd4 | 360 | if (status & STATUS_SD) |
j3 | 2:02d228c25fd4 | 361 | { |
j3 | 2:02d228c25fd4 | 362 | _short_detected = TRUE; |
j3 | 2:02d228c25fd4 | 363 | } |
j3 | 2:02d228c25fd4 | 364 | else |
j3 | 2:02d228c25fd4 | 365 | { |
j3 | 2:02d228c25fd4 | 366 | _short_detected = FALSE; |
j3 | 2:02d228c25fd4 | 367 | } |
j3 | 2:02d228c25fd4 | 368 | |
j3 | 2:02d228c25fd4 | 369 | // check for presence detect |
j3 | 2:02d228c25fd4 | 370 | if (status & STATUS_PPD) |
j3 | 2:02d228c25fd4 | 371 | { |
j3 | 2:02d228c25fd4 | 372 | rtn_val = true; |
j3 | 2:02d228c25fd4 | 373 | } |
j3 | 2:02d228c25fd4 | 374 | else |
j3 | 2:02d228c25fd4 | 375 | { |
j3 | 2:02d228c25fd4 | 376 | rtn_val = false; |
j3 | 2:02d228c25fd4 | 377 | } |
j3 | 2:02d228c25fd4 | 378 | } |
j3 | 2:02d228c25fd4 | 379 | |
j3 | 1:91e52f8ab8bf | 380 | return(rtn_val); |
j3 | 1:91e52f8ab8bf | 381 | } |
j3 | 1:91e52f8ab8bf | 382 | |
j3 | 1:91e52f8ab8bf | 383 | |
j3 | 1:91e52f8ab8bf | 384 | //********************************************************************* |
j3 | 1:91e52f8ab8bf | 385 | void Ds248x::OWWriteBit(uint8_t sendbit) |
j3 | 1:91e52f8ab8bf | 386 | { |
j3 | 2:02d228c25fd4 | 387 | OWTouchBit(sendbit); |
j3 | 1:91e52f8ab8bf | 388 | } |
j3 | 1:91e52f8ab8bf | 389 | |
j3 | 1:91e52f8ab8bf | 390 | |
j3 | 1:91e52f8ab8bf | 391 | //********************************************************************* |
j3 | 1:91e52f8ab8bf | 392 | uint8_t Ds248x::OWReadBit() |
j3 | 1:91e52f8ab8bf | 393 | { |
j3 | 2:02d228c25fd4 | 394 | return(OWTouchBit(0x01)); |
j3 | 1:91e52f8ab8bf | 395 | } |
j3 | 1:91e52f8ab8bf | 396 | |
j3 | 1:91e52f8ab8bf | 397 | |
j3 | 1:91e52f8ab8bf | 398 | //********************************************************************* |
j3 | 1:91e52f8ab8bf | 399 | uint8_t Ds248x::OWTouchBit(uint8_t sendbit) |
j3 | 1:91e52f8ab8bf | 400 | { |
j3 | 1:91e52f8ab8bf | 401 | uint8_t rtn_val; |
j3 | 2:02d228c25fd4 | 402 | uint8_t poll_count = 0; |
j3 | 2:02d228c25fd4 | 403 | char status; |
j3 | 2:02d228c25fd4 | 404 | char packet[] = {CMD_1WSB, sendbit ? 0x80 : 0x00}; |
j3 | 2:02d228c25fd4 | 405 | |
j3 | 2:02d228c25fd4 | 406 | // 1-Wire bit (Case B) |
j3 | 2:02d228c25fd4 | 407 | // S AD,0 [A] 1WSB [A] BB [A] Sr AD,1 [A] [Status] A [Status] A\ P |
j3 | 2:02d228c25fd4 | 408 | // \--------/ |
j3 | 2:02d228c25fd4 | 409 | // Repeat until 1WB bit has changed to 0 |
j3 | 2:02d228c25fd4 | 410 | // [] indicates from slave |
j3 | 2:02d228c25fd4 | 411 | // BB indicates byte containing bit value in msbit |
j3 | 2:02d228c25fd4 | 412 | |
j3 | 2:02d228c25fd4 | 413 | _p_i2c_bus->write(_w_adrs, packet, 2); |
j3 | 2:02d228c25fd4 | 414 | |
j3 | 2:02d228c25fd4 | 415 | // loop checking 1WB bit for completion of 1-Wire operation |
j3 | 2:02d228c25fd4 | 416 | // abort if poll limit reached |
j3 | 2:02d228c25fd4 | 417 | do |
j3 | 2:02d228c25fd4 | 418 | { |
j3 | 2:02d228c25fd4 | 419 | _p_i2c_bus->read(_r_adrs, &status, 1); |
j3 | 2:02d228c25fd4 | 420 | } |
j3 | 2:02d228c25fd4 | 421 | while ((status & STATUS_1WB) && (poll_count++ < POLL_LIMIT)); |
j3 | 2:02d228c25fd4 | 422 | |
j3 | 2:02d228c25fd4 | 423 | // check for failure due to poll limit reached |
j3 | 2:02d228c25fd4 | 424 | if (poll_count >= POLL_LIMIT) |
j3 | 2:02d228c25fd4 | 425 | { |
j3 | 2:02d228c25fd4 | 426 | // handle error |
j3 | 2:02d228c25fd4 | 427 | // ... |
j3 | 2:02d228c25fd4 | 428 | reset(); |
j3 | 2:02d228c25fd4 | 429 | rtn_val = 0; |
j3 | 2:02d228c25fd4 | 430 | } |
j3 | 2:02d228c25fd4 | 431 | else |
j3 | 2:02d228c25fd4 | 432 | { |
j3 | 2:02d228c25fd4 | 433 | // return bit state |
j3 | 2:02d228c25fd4 | 434 | if (status & STATUS_SBR) |
j3 | 2:02d228c25fd4 | 435 | { |
j3 | 2:02d228c25fd4 | 436 | rtn_val = 1; |
j3 | 2:02d228c25fd4 | 437 | } |
j3 | 2:02d228c25fd4 | 438 | else |
j3 | 2:02d228c25fd4 | 439 | { |
j3 | 2:02d228c25fd4 | 440 | rtn_val = 0; |
j3 | 2:02d228c25fd4 | 441 | } |
j3 | 2:02d228c25fd4 | 442 | } |
j3 | 2:02d228c25fd4 | 443 | |
j3 | 2:02d228c25fd4 | 444 | return(rtn_val); |
j3 | 1:91e52f8ab8bf | 445 | } |
j3 | 1:91e52f8ab8bf | 446 | |
j3 | 1:91e52f8ab8bf | 447 | |
j3 | 1:91e52f8ab8bf | 448 | //********************************************************************* |
j3 | 2:02d228c25fd4 | 449 | bool Ds248x::OWWriteByte(uint8_t sendbyte) |
j3 | 1:91e52f8ab8bf | 450 | { |
j3 | 2:02d228c25fd4 | 451 | bool rtn_val = false; |
j3 | 1:91e52f8ab8bf | 452 | |
j3 | 2:02d228c25fd4 | 453 | uint8_t poll_count = 0; |
j3 | 2:02d228c25fd4 | 454 | char status; |
j3 | 2:02d228c25fd4 | 455 | char packet [] = {CMD_1WWB, sendbyte}; |
j3 | 2:02d228c25fd4 | 456 | |
j3 | 2:02d228c25fd4 | 457 | // 1-Wire Write Byte (Case B) |
j3 | 2:02d228c25fd4 | 458 | // S AD,0 [A] 1WWB [A] DD [A] Sr AD,1 [A] [Status] A [Status] A\ P |
j3 | 2:02d228c25fd4 | 459 | // \--------/ |
j3 | 2:02d228c25fd4 | 460 | // Repeat until 1WB bit has changed to 0 |
j3 | 2:02d228c25fd4 | 461 | // [] indicates from slave |
j3 | 2:02d228c25fd4 | 462 | // DD data to write |
j3 | 2:02d228c25fd4 | 463 | |
j3 | 2:02d228c25fd4 | 464 | _p_i2c_bus->write(_w_adrs, packet, 2); |
j3 | 2:02d228c25fd4 | 465 | |
j3 | 2:02d228c25fd4 | 466 | // loop checking 1WB bit for completion of 1-Wire operation |
j3 | 2:02d228c25fd4 | 467 | // abort if poll limit reached |
j3 | 2:02d228c25fd4 | 468 | do |
j3 | 2:02d228c25fd4 | 469 | { |
j3 | 2:02d228c25fd4 | 470 | _p_i2c_bus->read(_r_adrs, &status, 1); |
j3 | 2:02d228c25fd4 | 471 | } |
j3 | 2:02d228c25fd4 | 472 | while ((status & STATUS_1WB) && (poll_count++ < POLL_LIMIT)); |
j3 | 2:02d228c25fd4 | 473 | |
j3 | 2:02d228c25fd4 | 474 | // check for failure due to poll limit reached |
j3 | 2:02d228c25fd4 | 475 | if (poll_count >= POLL_LIMIT) |
j3 | 2:02d228c25fd4 | 476 | { |
j3 | 2:02d228c25fd4 | 477 | // handle error |
j3 | 2:02d228c25fd4 | 478 | // ... |
j3 | 2:02d228c25fd4 | 479 | reset(); |
j3 | 2:02d228c25fd4 | 480 | rtn_val = false; |
j3 | 2:02d228c25fd4 | 481 | } |
j3 | 2:02d228c25fd4 | 482 | else |
j3 | 2:02d228c25fd4 | 483 | { |
j3 | 2:02d228c25fd4 | 484 | rtn_val = true; |
j3 | 2:02d228c25fd4 | 485 | } |
j3 | 2:02d228c25fd4 | 486 | |
j3 | 2:02d228c25fd4 | 487 | return(rtn_val); |
j3 | 1:91e52f8ab8bf | 488 | } |
j3 | 1:91e52f8ab8bf | 489 | |
j3 | 1:91e52f8ab8bf | 490 | |
j3 | 1:91e52f8ab8bf | 491 | //********************************************************************* |
j3 | 1:91e52f8ab8bf | 492 | uint8_t Ds248x::OWReadByte(void) |
j3 | 1:91e52f8ab8bf | 493 | { |
j3 | 1:91e52f8ab8bf | 494 | uint8_t rtn_val; |
j3 | 2:02d228c25fd4 | 495 | |
j3 | 2:02d228c25fd4 | 496 | uint8_t poll_count = 0; |
j3 | 2:02d228c25fd4 | 497 | char data, status; |
j3 | 2:02d228c25fd4 | 498 | char packet[2] = {CMD_1WRB, 0}; |
j3 | 2:02d228c25fd4 | 499 | |
j3 | 2:02d228c25fd4 | 500 | // 1-Wire Read Bytes (Case C) |
j3 | 2:02d228c25fd4 | 501 | // S AD,0 [A] 1WRB [A] Sr AD,1 [A] [Status] A [Status] A\ |
j3 | 2:02d228c25fd4 | 502 | // \--------/ |
j3 | 2:02d228c25fd4 | 503 | // Repeat until 1WB bit has changed to 0 |
j3 | 2:02d228c25fd4 | 504 | // Sr AD,0 [A] SRP [A] E1 [A] Sr AD,1 [A] DD A\ P |
j3 | 2:02d228c25fd4 | 505 | // |
j3 | 2:02d228c25fd4 | 506 | // [] indicates from slave |
j3 | 2:02d228c25fd4 | 507 | // DD data read |
j3 | 2:02d228c25fd4 | 508 | |
j3 | 2:02d228c25fd4 | 509 | _p_i2c_bus->write(_w_adrs, packet, 1); |
j3 | 2:02d228c25fd4 | 510 | |
j3 | 2:02d228c25fd4 | 511 | // loop checking 1WB bit for completion of 1-Wire operation |
j3 | 2:02d228c25fd4 | 512 | // abort if poll limit reached |
j3 | 2:02d228c25fd4 | 513 | do |
j3 | 2:02d228c25fd4 | 514 | { |
j3 | 2:02d228c25fd4 | 515 | _p_i2c_bus->read(_r_adrs, &status, 1); |
j3 | 2:02d228c25fd4 | 516 | } |
j3 | 2:02d228c25fd4 | 517 | while ((status & STATUS_1WB) && (poll_count++ < POLL_LIMIT)); |
j3 | 2:02d228c25fd4 | 518 | |
j3 | 2:02d228c25fd4 | 519 | // check for failure due to poll limit reached |
j3 | 2:02d228c25fd4 | 520 | if (poll_count >= POLL_LIMIT) |
j3 | 2:02d228c25fd4 | 521 | { |
j3 | 2:02d228c25fd4 | 522 | // handle error |
j3 | 2:02d228c25fd4 | 523 | // ... |
j3 | 2:02d228c25fd4 | 524 | reset(); |
j3 | 2:02d228c25fd4 | 525 | rtn_val = 0; |
j3 | 2:02d228c25fd4 | 526 | } |
j3 | 2:02d228c25fd4 | 527 | else |
j3 | 2:02d228c25fd4 | 528 | { |
j3 | 2:02d228c25fd4 | 529 | packet[0] = CMD_SRP; |
j3 | 2:02d228c25fd4 | 530 | packet[1] = 0xE1; |
j3 | 2:02d228c25fd4 | 531 | |
j3 | 2:02d228c25fd4 | 532 | _p_i2c_bus->write(_w_adrs, packet, 2); |
j3 | 2:02d228c25fd4 | 533 | _p_i2c_bus->read(_r_adrs, &data, 1); |
j3 | 2:02d228c25fd4 | 534 | |
j3 | 2:02d228c25fd4 | 535 | rtn_val = data; |
j3 | 2:02d228c25fd4 | 536 | } |
j3 | 2:02d228c25fd4 | 537 | |
j3 | 1:91e52f8ab8bf | 538 | return(rtn_val); |
j3 | 1:91e52f8ab8bf | 539 | } |
j3 | 1:91e52f8ab8bf | 540 | |
j3 | 1:91e52f8ab8bf | 541 | |
j3 | 1:91e52f8ab8bf | 542 | //********************************************************************* |
j3 | 1:91e52f8ab8bf | 543 | uint8_t Ds248x::OWTouchByte(uint8_t sendbyte) |
j3 | 1:91e52f8ab8bf | 544 | { |
j3 | 1:91e52f8ab8bf | 545 | uint8_t rtn_val; |
j3 | 2:02d228c25fd4 | 546 | |
j3 | 2:02d228c25fd4 | 547 | if (sendbyte == 0xFF) |
j3 | 2:02d228c25fd4 | 548 | { |
j3 | 2:02d228c25fd4 | 549 | rtn_val = OWReadByte(); |
j3 | 2:02d228c25fd4 | 550 | } |
j3 | 2:02d228c25fd4 | 551 | else |
j3 | 2:02d228c25fd4 | 552 | { |
j3 | 2:02d228c25fd4 | 553 | OWWriteByte(sendbyte); |
j3 | 2:02d228c25fd4 | 554 | rtn_val = sendbyte; |
j3 | 2:02d228c25fd4 | 555 | } |
j3 | 2:02d228c25fd4 | 556 | |
j3 | 1:91e52f8ab8bf | 557 | return(rtn_val); |
j3 | 1:91e52f8ab8bf | 558 | } |
j3 | 1:91e52f8ab8bf | 559 | |
j3 | 1:91e52f8ab8bf | 560 | |
j3 | 1:91e52f8ab8bf | 561 | //********************************************************************* |
j3 | 1:91e52f8ab8bf | 562 | void Ds248x::OWBlock(uint8_t *tran_buf, uint8_t tran_len) |
j3 | 1:91e52f8ab8bf | 563 | { |
j3 | 2:02d228c25fd4 | 564 | uint8_t i; |
j3 | 2:02d228c25fd4 | 565 | |
j3 | 2:02d228c25fd4 | 566 | for (i = 0; i < tran_len; i++) |
j3 | 2:02d228c25fd4 | 567 | { |
j3 | 2:02d228c25fd4 | 568 | tran_buf[i] = OWTouchByte(tran_buf[i]); |
j3 | 2:02d228c25fd4 | 569 | } |
j3 | 1:91e52f8ab8bf | 570 | } |
j3 | 1:91e52f8ab8bf | 571 | |
j3 | 1:91e52f8ab8bf | 572 | |
j3 | 1:91e52f8ab8bf | 573 | //********************************************************************* |
j3 | 2:02d228c25fd4 | 574 | bool Ds248x::OWFirst(void) |
j3 | 1:91e52f8ab8bf | 575 | { |
j3 | 2:02d228c25fd4 | 576 | // reset the search state |
j3 | 2:02d228c25fd4 | 577 | _last_discrepancy = 0; |
j3 | 2:02d228c25fd4 | 578 | _last_device_flag = FALSE; |
j3 | 2:02d228c25fd4 | 579 | _last_family_discrepancy = 0; |
j3 | 2:02d228c25fd4 | 580 | |
j3 | 2:02d228c25fd4 | 581 | return OWSearch(); |
j3 | 2:02d228c25fd4 | 582 | } |
j3 | 2:02d228c25fd4 | 583 | |
j3 | 2:02d228c25fd4 | 584 | |
j3 | 2:02d228c25fd4 | 585 | //********************************************************************* |
j3 | 2:02d228c25fd4 | 586 | bool Ds248x::OWNext(void) |
j3 | 2:02d228c25fd4 | 587 | { |
j3 | 2:02d228c25fd4 | 588 | // leave the search state alone |
j3 | 2:02d228c25fd4 | 589 | return OWSearch(); |
j3 | 1:91e52f8ab8bf | 590 | } |
j3 | 1:91e52f8ab8bf | 591 | |
j3 | 1:91e52f8ab8bf | 592 | |
j3 | 1:91e52f8ab8bf | 593 | //********************************************************************* |
j3 | 2:02d228c25fd4 | 594 | bool Ds248x::OWVerify(void) |
j3 | 1:91e52f8ab8bf | 595 | { |
j3 | 2:02d228c25fd4 | 596 | bool rtn_val = false; |
j3 | 2:02d228c25fd4 | 597 | |
j3 | 2:02d228c25fd4 | 598 | uint8_t rom_backup[8]; |
j3 | 2:02d228c25fd4 | 599 | uint8_t i,rslt,ld_backup,ldf_backup,lfd_backup; |
j3 | 2:02d228c25fd4 | 600 | |
j3 | 2:02d228c25fd4 | 601 | // keep a backup copy of the current state |
j3 | 2:02d228c25fd4 | 602 | for (i = 0; i < 8; i++) |
j3 | 2:02d228c25fd4 | 603 | { |
j3 | 2:02d228c25fd4 | 604 | rom_backup[i] = _rom_number[i]; |
j3 | 2:02d228c25fd4 | 605 | } |
j3 | 2:02d228c25fd4 | 606 | |
j3 | 2:02d228c25fd4 | 607 | ld_backup = _last_discrepancy; |
j3 | 2:02d228c25fd4 | 608 | ldf_backup = _last_device_flag; |
j3 | 2:02d228c25fd4 | 609 | lfd_backup = _last_family_discrepancy; |
j3 | 2:02d228c25fd4 | 610 | |
j3 | 2:02d228c25fd4 | 611 | // set search to find the same device |
j3 | 2:02d228c25fd4 | 612 | _last_discrepancy = 64; |
j3 | 2:02d228c25fd4 | 613 | _last_device_flag = FALSE; |
j3 | 1:91e52f8ab8bf | 614 | |
j3 | 2:02d228c25fd4 | 615 | if (OWSearch()) |
j3 | 2:02d228c25fd4 | 616 | { |
j3 | 2:02d228c25fd4 | 617 | // check if same device found |
j3 | 2:02d228c25fd4 | 618 | rslt = TRUE; |
j3 | 2:02d228c25fd4 | 619 | for (i = 0; i < 8; i++) |
j3 | 2:02d228c25fd4 | 620 | { |
j3 | 2:02d228c25fd4 | 621 | if (rom_backup[i] != _rom_number[i]) |
j3 | 2:02d228c25fd4 | 622 | { |
j3 | 2:02d228c25fd4 | 623 | rslt = FALSE; |
j3 | 2:02d228c25fd4 | 624 | break; |
j3 | 2:02d228c25fd4 | 625 | } |
j3 | 2:02d228c25fd4 | 626 | } |
j3 | 2:02d228c25fd4 | 627 | } |
j3 | 2:02d228c25fd4 | 628 | else |
j3 | 2:02d228c25fd4 | 629 | { |
j3 | 2:02d228c25fd4 | 630 | rslt = FALSE; |
j3 | 2:02d228c25fd4 | 631 | } |
j3 | 1:91e52f8ab8bf | 632 | |
j3 | 2:02d228c25fd4 | 633 | // restore the search state |
j3 | 2:02d228c25fd4 | 634 | for (i = 0; i < 8; i++) |
j3 | 2:02d228c25fd4 | 635 | { |
j3 | 2:02d228c25fd4 | 636 | _rom_number[i] = rom_backup[i]; |
j3 | 2:02d228c25fd4 | 637 | } |
j3 | 2:02d228c25fd4 | 638 | |
j3 | 2:02d228c25fd4 | 639 | _last_discrepancy = ld_backup; |
j3 | 2:02d228c25fd4 | 640 | _last_device_flag = ldf_backup; |
j3 | 2:02d228c25fd4 | 641 | _last_family_discrepancy = lfd_backup; |
j3 | 2:02d228c25fd4 | 642 | |
j3 | 2:02d228c25fd4 | 643 | // return the result of the verify |
j3 | 2:02d228c25fd4 | 644 | rtn_val = rslt; |
j3 | 2:02d228c25fd4 | 645 | |
j3 | 1:91e52f8ab8bf | 646 | return(rtn_val); |
j3 | 1:91e52f8ab8bf | 647 | } |
j3 | 1:91e52f8ab8bf | 648 | |
j3 | 1:91e52f8ab8bf | 649 | |
j3 | 1:91e52f8ab8bf | 650 | //********************************************************************* |
j3 | 1:91e52f8ab8bf | 651 | void Ds248x::OWTargetSetup(uint8_t family_code) |
j3 | 1:91e52f8ab8bf | 652 | { |
j3 | 2:02d228c25fd4 | 653 | uint8_t i; |
j3 | 2:02d228c25fd4 | 654 | |
j3 | 2:02d228c25fd4 | 655 | // set the search state to find SearchFamily type devices |
j3 | 2:02d228c25fd4 | 656 | _rom_number[0] = family_code; |
j3 | 2:02d228c25fd4 | 657 | for (i = 1; i < 8; i++) |
j3 | 2:02d228c25fd4 | 658 | { |
j3 | 2:02d228c25fd4 | 659 | _rom_number[i] = 0; |
j3 | 2:02d228c25fd4 | 660 | } |
j3 | 1:91e52f8ab8bf | 661 | |
j3 | 2:02d228c25fd4 | 662 | _last_discrepancy = 64; |
j3 | 2:02d228c25fd4 | 663 | _last_family_discrepancy = 0; |
j3 | 2:02d228c25fd4 | 664 | _last_device_flag = FALSE; |
j3 | 1:91e52f8ab8bf | 665 | } |
j3 | 1:91e52f8ab8bf | 666 | |
j3 | 1:91e52f8ab8bf | 667 | |
j3 | 1:91e52f8ab8bf | 668 | //********************************************************************* |
j3 | 1:91e52f8ab8bf | 669 | void Ds248x::OWFamilySkipSetup(void) |
j3 | 1:91e52f8ab8bf | 670 | { |
j3 | 2:02d228c25fd4 | 671 | // set the Last discrepancy to last family discrepancy |
j3 | 2:02d228c25fd4 | 672 | _last_discrepancy = _last_family_discrepancy; |
j3 | 1:91e52f8ab8bf | 673 | |
j3 | 2:02d228c25fd4 | 674 | // clear the last family discrpepancy |
j3 | 2:02d228c25fd4 | 675 | _last_family_discrepancy = 0; |
j3 | 2:02d228c25fd4 | 676 | |
j3 | 2:02d228c25fd4 | 677 | // check for end of list |
j3 | 2:02d228c25fd4 | 678 | if (_last_discrepancy == 0) |
j3 | 2:02d228c25fd4 | 679 | { |
j3 | 2:02d228c25fd4 | 680 | _last_device_flag = TRUE; |
j3 | 2:02d228c25fd4 | 681 | } |
j3 | 1:91e52f8ab8bf | 682 | } |
j3 | 1:91e52f8ab8bf | 683 | |
j3 | 1:91e52f8ab8bf | 684 | |
j3 | 1:91e52f8ab8bf | 685 | //********************************************************************* |
j3 | 2:02d228c25fd4 | 686 | bool Ds248x::OWSearch(void) |
j3 | 1:91e52f8ab8bf | 687 | { |
j3 | 2:02d228c25fd4 | 688 | uint8_t id_bit_number; |
j3 | 2:02d228c25fd4 | 689 | uint8_t last_zero, rom_byte_number, search_result; |
j3 | 2:02d228c25fd4 | 690 | uint8_t id_bit, cmp_id_bit; |
j3 | 2:02d228c25fd4 | 691 | uint8_t rom_byte_mask, search_direction, status; |
j3 | 2:02d228c25fd4 | 692 | |
j3 | 2:02d228c25fd4 | 693 | // initialize for search |
j3 | 2:02d228c25fd4 | 694 | id_bit_number = 1; |
j3 | 2:02d228c25fd4 | 695 | last_zero = 0; |
j3 | 2:02d228c25fd4 | 696 | rom_byte_number = 0; |
j3 | 2:02d228c25fd4 | 697 | rom_byte_mask = 1; |
j3 | 2:02d228c25fd4 | 698 | search_result = FALSE; |
j3 | 2:02d228c25fd4 | 699 | _crc8 = 0; |
j3 | 2:02d228c25fd4 | 700 | |
j3 | 2:02d228c25fd4 | 701 | // if the last call was not the last one |
j3 | 2:02d228c25fd4 | 702 | if (!_last_device_flag) |
j3 | 2:02d228c25fd4 | 703 | { |
j3 | 2:02d228c25fd4 | 704 | // 1-Wire reset |
j3 | 2:02d228c25fd4 | 705 | if (!OWReset()) |
j3 | 2:02d228c25fd4 | 706 | { |
j3 | 2:02d228c25fd4 | 707 | // reset the search |
j3 | 2:02d228c25fd4 | 708 | _last_discrepancy = 0; |
j3 | 2:02d228c25fd4 | 709 | _last_device_flag = FALSE; |
j3 | 2:02d228c25fd4 | 710 | _last_family_discrepancy = 0; |
j3 | 2:02d228c25fd4 | 711 | return FALSE; |
j3 | 2:02d228c25fd4 | 712 | } |
j3 | 2:02d228c25fd4 | 713 | |
j3 | 2:02d228c25fd4 | 714 | // issue the search command |
j3 | 2:02d228c25fd4 | 715 | OWWriteByte(SEARCH_ROM); |
j3 | 2:02d228c25fd4 | 716 | |
j3 | 2:02d228c25fd4 | 717 | // loop to do the search |
j3 | 2:02d228c25fd4 | 718 | do |
j3 | 2:02d228c25fd4 | 719 | { |
j3 | 2:02d228c25fd4 | 720 | // if this discrepancy if before the Last Discrepancy |
j3 | 2:02d228c25fd4 | 721 | // on a previous next then pick the same as last time |
j3 | 2:02d228c25fd4 | 722 | if (id_bit_number < _last_discrepancy) |
j3 | 2:02d228c25fd4 | 723 | { |
j3 | 2:02d228c25fd4 | 724 | if ((_rom_number[rom_byte_number] & rom_byte_mask) > 0) |
j3 | 2:02d228c25fd4 | 725 | search_direction = 1; |
j3 | 2:02d228c25fd4 | 726 | else |
j3 | 2:02d228c25fd4 | 727 | search_direction = 0; |
j3 | 2:02d228c25fd4 | 728 | } |
j3 | 2:02d228c25fd4 | 729 | else |
j3 | 2:02d228c25fd4 | 730 | { |
j3 | 2:02d228c25fd4 | 731 | // if equal to last pick 1, if not then pick 0 |
j3 | 2:02d228c25fd4 | 732 | if (id_bit_number == _last_discrepancy) |
j3 | 2:02d228c25fd4 | 733 | search_direction = 1; |
j3 | 2:02d228c25fd4 | 734 | else |
j3 | 2:02d228c25fd4 | 735 | search_direction = 0; |
j3 | 2:02d228c25fd4 | 736 | } |
j3 | 2:02d228c25fd4 | 737 | |
j3 | 2:02d228c25fd4 | 738 | // Perform a triple operation on the ds2484 which will perform 2 read bits and 1 write bit |
j3 | 2:02d228c25fd4 | 739 | status = search_triplet(search_direction); |
j3 | 2:02d228c25fd4 | 740 | |
j3 | 2:02d228c25fd4 | 741 | // check bit results in status byte |
j3 | 2:02d228c25fd4 | 742 | id_bit = ((status & STATUS_SBR) == STATUS_SBR); |
j3 | 2:02d228c25fd4 | 743 | cmp_id_bit = ((status & STATUS_TSB) == STATUS_TSB); |
j3 | 2:02d228c25fd4 | 744 | search_direction = ((status & STATUS_DIR) == STATUS_DIR) ? (unsigned char)1 : (unsigned char)0; |
j3 | 2:02d228c25fd4 | 745 | |
j3 | 2:02d228c25fd4 | 746 | // check for no devices on 1-Wire |
j3 | 2:02d228c25fd4 | 747 | if ((id_bit) && (cmp_id_bit)) |
j3 | 2:02d228c25fd4 | 748 | break; |
j3 | 2:02d228c25fd4 | 749 | else |
j3 | 2:02d228c25fd4 | 750 | { |
j3 | 2:02d228c25fd4 | 751 | if ((!id_bit) && (!cmp_id_bit) && (search_direction == 0)) |
j3 | 2:02d228c25fd4 | 752 | { |
j3 | 2:02d228c25fd4 | 753 | last_zero = id_bit_number; |
j3 | 2:02d228c25fd4 | 754 | |
j3 | 2:02d228c25fd4 | 755 | // check for Last discrepancy in family |
j3 | 2:02d228c25fd4 | 756 | if (last_zero < 9) |
j3 | 2:02d228c25fd4 | 757 | _last_family_discrepancy = last_zero; |
j3 | 2:02d228c25fd4 | 758 | } |
j3 | 2:02d228c25fd4 | 759 | |
j3 | 2:02d228c25fd4 | 760 | // set or clear the bit in the ROM byte rom_byte_number |
j3 | 2:02d228c25fd4 | 761 | // with mask rom_byte_mask |
j3 | 2:02d228c25fd4 | 762 | if (search_direction == 1) |
j3 | 2:02d228c25fd4 | 763 | _rom_number[rom_byte_number] |= rom_byte_mask; |
j3 | 2:02d228c25fd4 | 764 | else |
j3 | 2:02d228c25fd4 | 765 | _rom_number[rom_byte_number] &= (unsigned char)~rom_byte_mask; |
j3 | 2:02d228c25fd4 | 766 | |
j3 | 2:02d228c25fd4 | 767 | // increment the byte counter id_bit_number |
j3 | 2:02d228c25fd4 | 768 | // and shift the mask rom_byte_mask |
j3 | 2:02d228c25fd4 | 769 | id_bit_number++; |
j3 | 2:02d228c25fd4 | 770 | rom_byte_mask <<= 1; |
j3 | 2:02d228c25fd4 | 771 | |
j3 | 2:02d228c25fd4 | 772 | // if the mask is 0 then go to new SerialNum byte rom_byte_number and reset mask |
j3 | 2:02d228c25fd4 | 773 | if (rom_byte_mask == 0) |
j3 | 2:02d228c25fd4 | 774 | { |
j3 | 2:02d228c25fd4 | 775 | calc_crc8(_rom_number[rom_byte_number]); // accumulate the CRC |
j3 | 2:02d228c25fd4 | 776 | rom_byte_number++; |
j3 | 2:02d228c25fd4 | 777 | rom_byte_mask = 1; |
j3 | 2:02d228c25fd4 | 778 | } |
j3 | 2:02d228c25fd4 | 779 | } |
j3 | 2:02d228c25fd4 | 780 | } |
j3 | 2:02d228c25fd4 | 781 | while(rom_byte_number < 8); // loop until through all ROM bytes 0-7 |
j3 | 2:02d228c25fd4 | 782 | |
j3 | 2:02d228c25fd4 | 783 | // if the search was successful then |
j3 | 2:02d228c25fd4 | 784 | if (!((id_bit_number < 65) || (_crc8 != 0))) |
j3 | 2:02d228c25fd4 | 785 | { |
j3 | 2:02d228c25fd4 | 786 | // search successful so set LastDiscrepancy,LastDeviceFlag,search_result |
j3 | 2:02d228c25fd4 | 787 | _last_discrepancy = last_zero; |
j3 | 2:02d228c25fd4 | 788 | |
j3 | 2:02d228c25fd4 | 789 | // check for last device |
j3 | 2:02d228c25fd4 | 790 | if (_last_discrepancy == 0) |
j3 | 2:02d228c25fd4 | 791 | _last_device_flag = TRUE; |
j3 | 2:02d228c25fd4 | 792 | |
j3 | 2:02d228c25fd4 | 793 | search_result = TRUE; |
j3 | 2:02d228c25fd4 | 794 | } |
j3 | 2:02d228c25fd4 | 795 | } |
j3 | 2:02d228c25fd4 | 796 | |
j3 | 2:02d228c25fd4 | 797 | // if no device found then reset counters so next 'search' will be like a first |
j3 | 2:02d228c25fd4 | 798 | if (!search_result || (_rom_number[0] == 0)) |
j3 | 2:02d228c25fd4 | 799 | { |
j3 | 2:02d228c25fd4 | 800 | _last_discrepancy = 0; |
j3 | 2:02d228c25fd4 | 801 | _last_device_flag = FALSE; |
j3 | 2:02d228c25fd4 | 802 | _last_family_discrepancy = 0; |
j3 | 2:02d228c25fd4 | 803 | search_result = FALSE; |
j3 | 2:02d228c25fd4 | 804 | } |
j3 | 2:02d228c25fd4 | 805 | |
j3 | 2:02d228c25fd4 | 806 | return search_result; |
j3 | 1:91e52f8ab8bf | 807 | } |
j3 | 1:91e52f8ab8bf | 808 | |
j3 | 1:91e52f8ab8bf | 809 | |
j3 | 1:91e52f8ab8bf | 810 | //********************************************************************* |
j3 | 1:91e52f8ab8bf | 811 | uint8_t Ds248x::OWSpeed(uint8_t new_speed) |
j3 | 1:91e52f8ab8bf | 812 | { |
j3 | 2:02d228c25fd4 | 813 | // set the speed |
j3 | 2:02d228c25fd4 | 814 | if (new_speed == MODE_OVERDRIVE) |
j3 | 2:02d228c25fd4 | 815 | { |
j3 | 2:02d228c25fd4 | 816 | _c1WS = CONFIG_1WS; |
j3 | 2:02d228c25fd4 | 817 | } |
j3 | 2:02d228c25fd4 | 818 | else |
j3 | 2:02d228c25fd4 | 819 | { |
j3 | 2:02d228c25fd4 | 820 | _c1WS = FALSE; |
j3 | 2:02d228c25fd4 | 821 | } |
j3 | 2:02d228c25fd4 | 822 | |
j3 | 2:02d228c25fd4 | 823 | // write the new config |
j3 | 2:02d228c25fd4 | 824 | write_config(_c1WS | _cSPU | _cPDN | _cAPU); |
j3 | 2:02d228c25fd4 | 825 | |
j3 | 2:02d228c25fd4 | 826 | return(new_speed); |
j3 | 1:91e52f8ab8bf | 827 | } |
j3 | 1:91e52f8ab8bf | 828 | |
j3 | 1:91e52f8ab8bf | 829 | |
j3 | 1:91e52f8ab8bf | 830 | //********************************************************************* |
j3 | 1:91e52f8ab8bf | 831 | uint8_t Ds248x::OWLevel(uint8_t new_level) |
j3 | 1:91e52f8ab8bf | 832 | { |
j3 | 1:91e52f8ab8bf | 833 | uint8_t rtn_val; |
j3 | 2:02d228c25fd4 | 834 | |
j3 | 2:02d228c25fd4 | 835 | // function only will turn back to non-strong pull-up |
j3 | 2:02d228c25fd4 | 836 | if (new_level != MODE_STANDARD) |
j3 | 2:02d228c25fd4 | 837 | { |
j3 | 2:02d228c25fd4 | 838 | rtn_val = MODE_STRONG; |
j3 | 2:02d228c25fd4 | 839 | } |
j3 | 2:02d228c25fd4 | 840 | else |
j3 | 2:02d228c25fd4 | 841 | { |
j3 | 2:02d228c25fd4 | 842 | // clear the strong pull-up bit in the global config state |
j3 | 2:02d228c25fd4 | 843 | _cSPU = FALSE; |
j3 | 2:02d228c25fd4 | 844 | // write the new config |
j3 | 2:02d228c25fd4 | 845 | write_config(_c1WS | _cSPU | _cPDN | _cAPU); |
j3 | 2:02d228c25fd4 | 846 | rtn_val = MODE_STANDARD; |
j3 | 2:02d228c25fd4 | 847 | } |
j3 | 2:02d228c25fd4 | 848 | |
j3 | 1:91e52f8ab8bf | 849 | return(rtn_val); |
j3 | 1:91e52f8ab8bf | 850 | } |
j3 | 1:91e52f8ab8bf | 851 | |
j3 | 1:91e52f8ab8bf | 852 | |
j3 | 1:91e52f8ab8bf | 853 | //********************************************************************* |
j3 | 2:02d228c25fd4 | 854 | bool Ds248x::OWWriteBytePower(uint8_t sendbyte) |
j3 | 1:91e52f8ab8bf | 855 | { |
j3 | 2:02d228c25fd4 | 856 | bool rtn_val = false; |
j3 | 2:02d228c25fd4 | 857 | |
j3 | 2:02d228c25fd4 | 858 | // set strong pull-up enable |
j3 | 2:02d228c25fd4 | 859 | _cSPU = CONFIG_SPU; |
j3 | 2:02d228c25fd4 | 860 | |
j3 | 2:02d228c25fd4 | 861 | // write the new config |
j3 | 2:02d228c25fd4 | 862 | if (!write_config(_c1WS | _cSPU | _cPDN | _cAPU)) |
j3 | 2:02d228c25fd4 | 863 | { |
j3 | 2:02d228c25fd4 | 864 | rtn_val = false; |
j3 | 2:02d228c25fd4 | 865 | } |
j3 | 2:02d228c25fd4 | 866 | else |
j3 | 2:02d228c25fd4 | 867 | { |
j3 | 2:02d228c25fd4 | 868 | // perform write byte |
j3 | 2:02d228c25fd4 | 869 | OWWriteByte(sendbyte); |
j3 | 2:02d228c25fd4 | 870 | rtn_val = true; |
j3 | 2:02d228c25fd4 | 871 | } |
j3 | 2:02d228c25fd4 | 872 | |
j3 | 1:91e52f8ab8bf | 873 | return(rtn_val); |
j3 | 1:91e52f8ab8bf | 874 | } |
j3 | 1:91e52f8ab8bf | 875 | |
j3 | 1:91e52f8ab8bf | 876 | |
j3 | 1:91e52f8ab8bf | 877 | //********************************************************************* |
j3 | 2:02d228c25fd4 | 878 | bool Ds248x::OWReadBitPower(uint8_t applyPowerResponse) |
j3 | 1:91e52f8ab8bf | 879 | { |
j3 | 2:02d228c25fd4 | 880 | bool rtn_val = false; |
j3 | 2:02d228c25fd4 | 881 | |
j3 | 2:02d228c25fd4 | 882 | uint8_t rdbit; |
j3 | 2:02d228c25fd4 | 883 | |
j3 | 2:02d228c25fd4 | 884 | // set strong pull-up enable |
j3 | 2:02d228c25fd4 | 885 | _cSPU = CONFIG_SPU; |
j3 | 2:02d228c25fd4 | 886 | |
j3 | 2:02d228c25fd4 | 887 | // write the new config |
j3 | 2:02d228c25fd4 | 888 | if (!write_config(_c1WS | _cSPU | _cPDN | _cAPU)) |
j3 | 2:02d228c25fd4 | 889 | { |
j3 | 2:02d228c25fd4 | 890 | rtn_val = false; |
j3 | 2:02d228c25fd4 | 891 | } |
j3 | 2:02d228c25fd4 | 892 | else |
j3 | 2:02d228c25fd4 | 893 | { |
j3 | 2:02d228c25fd4 | 894 | // perform read bit |
j3 | 2:02d228c25fd4 | 895 | rdbit = OWReadBit(); |
j3 | 2:02d228c25fd4 | 896 | |
j3 | 2:02d228c25fd4 | 897 | // check if response was correct, if not then turn off strong pull-up |
j3 | 2:02d228c25fd4 | 898 | if (rdbit != applyPowerResponse) |
j3 | 2:02d228c25fd4 | 899 | { |
j3 | 2:02d228c25fd4 | 900 | OWLevel(MODE_STANDARD); |
j3 | 2:02d228c25fd4 | 901 | rtn_val = false; |
j3 | 2:02d228c25fd4 | 902 | } |
j3 | 2:02d228c25fd4 | 903 | |
j3 | 2:02d228c25fd4 | 904 | rtn_val = true; |
j3 | 2:02d228c25fd4 | 905 | } |
j3 | 2:02d228c25fd4 | 906 | |
j3 | 1:91e52f8ab8bf | 907 | return(rtn_val); |
j3 | 1:91e52f8ab8bf | 908 | } |
j3 | 1:91e52f8ab8bf | 909 | |
j3 | 1:91e52f8ab8bf | 910 | |
j3 | 1:91e52f8ab8bf | 911 | //********************************************************************* |
j3 | 1:91e52f8ab8bf | 912 | uint8_t Ds248x::calc_crc8(uint8_t data) |
j3 | 1:91e52f8ab8bf | 913 | { |
j3 | 2:02d228c25fd4 | 914 | unsigned char i; |
j3 | 2:02d228c25fd4 | 915 | |
j3 | 2:02d228c25fd4 | 916 | // See Application Note 27 |
j3 | 2:02d228c25fd4 | 917 | _crc8 = _crc8 ^ data; |
j3 | 2:02d228c25fd4 | 918 | for (i = 0; i < 8; ++i) |
j3 | 2:02d228c25fd4 | 919 | { |
j3 | 2:02d228c25fd4 | 920 | if (_crc8 & 1) |
j3 | 2:02d228c25fd4 | 921 | { |
j3 | 2:02d228c25fd4 | 922 | _crc8 = (_crc8 >> 1) ^ 0x8c; |
j3 | 2:02d228c25fd4 | 923 | } |
j3 | 2:02d228c25fd4 | 924 | else |
j3 | 2:02d228c25fd4 | 925 | { |
j3 | 2:02d228c25fd4 | 926 | _crc8 = (_crc8 >> 1); |
j3 | 2:02d228c25fd4 | 927 | } |
j3 | 2:02d228c25fd4 | 928 | } |
j3 | 2:02d228c25fd4 | 929 | |
j3 | 2:02d228c25fd4 | 930 | return _crc8; |
j3 | 2:02d228c25fd4 | 931 | } |
j3 | 2:02d228c25fd4 | 932 | |
j3 | 2:02d228c25fd4 | 933 | |
j3 | 2:02d228c25fd4 | 934 | //********************************************************************* |
j3 | 2:02d228c25fd4 | 935 | void Ds248x::get_rom_number(uint8_t *p_rom_buff) |
j3 | 2:02d228c25fd4 | 936 | { |
j3 | 2:02d228c25fd4 | 937 | for(uint8_t idx = 0; idx < 8; idx++) |
j3 | 2:02d228c25fd4 | 938 | { |
j3 | 2:02d228c25fd4 | 939 | *(p_rom_buff + idx) = _rom_number[idx]; |
j3 | 2:02d228c25fd4 | 940 | } |
j3 | 1:91e52f8ab8bf | 941 | } |