Implementation of 1-Wire with added Alarm Search Functionality
Dependents: Max32630_One_Wire_Interface
OneWire_Masters/DS248x/ds248x.cpp
- Committer:
- j3
- Date:
- 2016-03-16
- Revision:
- 15:f6cb0d906fb6
- Parent:
- 14:7b2886a50321
- Child:
- 17:b646b1e3970b
File content as of revision 15:f6cb0d906fb6:
/******************************************************************//** * @file ds248x.cpp * * @author Justin Jordan * * @version 0.0.0 * * Started: 30JAN16 * * Updated: * * @brief Source file for Ds248x I2C to 1-wire master *********************************************************************** * Copyright (C) 2016 Maxim Integrated Products, Inc., All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be included * in all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR * OTHER DEALINGS IN THE SOFTWARE. * * Except as contained in this notice, the name of Maxim Integrated * Products, Inc. shall not be used except as stated in the Maxim Integrated * Products, Inc. Branding Policy. * * The mere transfer of this software does not imply any licenses * of trade secrets, proprietary technology, copyrights, patents, * trademarks, maskwork rights, or any other form of intellectual * property whatsoever. Maxim Integrated Products, Inc. retains all * ownership rights. **********************************************************************/ #include "ds248x.h" //********************************************************************* Ds248x::Ds248x(I2C &i2c_bus, DS248X_I2C_ADRS adrs) :_p_i2c_bus(&i2c_bus), _i2c_owner(false) { set_i2c_adrs(adrs); } //********************************************************************* Ds248x::Ds248x(PinName sda, PinName scl, DS248X_I2C_ADRS adrs) :_p_i2c_bus(new I2C(sda, scl)), _i2c_owner(true) { set_i2c_adrs(adrs); } //********************************************************************* Ds248x::~Ds248x() { if(_i2c_owner) { delete _p_i2c_bus; } } //********************************************************************* bool Ds248x::OWInitMaster() { return(detect()); } //********************************************************************* bool Ds248x::detect(void) { bool rtn_val = false; // reset the ds2484 ON selected address if (!reset()) { rtn_val = false; } else { // default configuration _c1WS = false; _cSPU = false; _cPDN = false; _cAPU = false; // write the default configuration setup if (!write_config(_c1WS | _cSPU | _cPDN | _cAPU)) { rtn_val = false; } else { rtn_val = true; } } return(rtn_val); } //********************************************************************* bool Ds248x::reset(void) { char status; char packet[] = {CMD_DRST}; // Device Reset // S AD,0 [A] DRST [A] Sr AD,1 [A] [SS] A\ P // [] indicates from slave // SS status byte to read to verify state _p_i2c_bus->write(_w_adrs, packet, 1); _p_i2c_bus->read(_r_adrs, &status, 1); return((status & 0xF7) == 0x10); } //********************************************************************* bool Ds248x::write_config(uint8_t config) { bool rtn_val = false; char read_config; char packet [] = {CMD_WCFG, (config | (~config << 4))}; _p_i2c_bus->write(_w_adrs, packet, 2); _p_i2c_bus->read(_r_adrs, &read_config, 1); // check for failure due to incorrect read back if (config != read_config) { // handle error // ... reset(); rtn_val = false; } else { rtn_val = true; } return(rtn_val); } //********************************************************************* bool Ds248x::channel_select(uint8_t channel) { char ch, ch_read, check; char packet [2]; packet[0] = CMD_CHSL; // Channel Select (Case A) // S AD,0 [A] CHSL [A] CC [A] Sr AD,1 [A] [RR] A\ P // [] indicates from slave // CC channel value // RR channel read back switch (channel) { default: case 0: ch = 0xF0; ch_read = 0xB8; break; case 1: ch = 0xE1; ch_read = 0xB1; break; case 2: ch = 0xD2; ch_read = 0xAA; break; case 3: ch = 0xC3; ch_read = 0xA3; break; case 4: ch = 0xB4; ch_read = 0x9C; break; case 5: ch = 0xA5; ch_read = 0x95; break; case 6: ch = 0x96; ch_read = 0x8E; break; case 7: ch = 0x87; ch_read = 0x87; break; }; packet[1] = ch; _p_i2c_bus->write(_w_adrs, packet, 2); _p_i2c_bus->read(_r_adrs, &check, 1); // check for failure due to incorrect read back of channel return (check == ch_read); } //********************************************************************* bool Ds248x::adjust_timing(uint8_t param, uint8_t val) { bool rtn_val = false; char read_port_config; char control_byte; control_byte = (((param & 0x0F) << 4) | (val & 0x0F)); char packet [] = {CMD_A1WP, control_byte}; _p_i2c_bus->write(_w_adrs, packet, 2); _p_i2c_bus->read(_r_adrs, &read_port_config, 1); // check for failure due to incorrect read back if ((control_byte & 0x0F) != read_port_config) { // handle error // ... reset(); rtn_val = false; } else { rtn_val = true; } return(rtn_val); } //********************************************************************* uint8_t Ds248x::search_triplet(uint8_t search_direction) { uint8_t rtn_val = 0; uint8_t poll_count = 0; char status; char packet [] = {CMD_1WT, search_direction ? 0x80 : 0x00}; // 1-Wire Triplet (Case B) // S AD,0 [A] 1WT [A] SS [A] Sr AD,1 [A] [Status] A [Status] A\ P // \--------/ // Repeat until 1WB bit has changed to 0 // [] indicates from slave // SS indicates byte containing search direction bit value in msbit _p_i2c_bus->write(_w_adrs, packet, 2); // loop checking 1WB bit for completion of 1-Wire operation // abort if poll limit reached do { _p_i2c_bus->read(_r_adrs, &status, 1); } while ((status & STATUS_1WB) && (poll_count++ < POLL_LIMIT)); // check for failure due to poll limit reached if (poll_count >= POLL_LIMIT) { // handle error // ... reset(); rtn_val = false; } else { rtn_val = status; } return(rtn_val); } //********************************************************************* bool Ds248x::OWReset() { bool rtn_val = false; uint8_t poll_count = 0; char status; char packet [] = {CMD_1WRS}; // 1-Wire reset (Case B) // S AD,0 [A] 1WRS [A] Sr AD,1 [A] [Status] A [Status] A\ P // \--------/ // Repeat until 1WB bit has changed to 0 // [] indicates from slave _p_i2c_bus->write(_w_adrs, packet, 1); // loop checking 1WB bit for completion of 1-Wire operation // abort if poll limit reached do { _p_i2c_bus->read(_r_adrs, &status, 1); } while ((status & STATUS_1WB) && (poll_count++ < POLL_LIMIT)); // check for failure due to poll limit reached if (poll_count >= POLL_LIMIT) { // handle error // ... reset(); rtn_val = false; } else { // check for short condition if (status & STATUS_SD) { _short_detected = true; } else { _short_detected = false; } // check for presence detect if (status & STATUS_PPD) { rtn_val = true; } else { rtn_val = false; } } return(rtn_val); } //********************************************************************* uint8_t Ds248x::OWTouchBit(uint8_t sendbit) { uint8_t rtn_val; uint8_t poll_count = 0; char status; char packet[] = {CMD_1WSB, sendbit ? 0x80 : 0x00}; // 1-Wire bit (Case B) // S AD,0 [A] 1WSB [A] BB [A] Sr AD,1 [A] [Status] A [Status] A\ P // \--------/ // Repeat until 1WB bit has changed to 0 // [] indicates from slave // BB indicates byte containing bit value in msbit _p_i2c_bus->write(_w_adrs, packet, 2); // loop checking 1WB bit for completion of 1-Wire operation // abort if poll limit reached do { _p_i2c_bus->read(_r_adrs, &status, 1); } while ((status & STATUS_1WB) && (poll_count++ < POLL_LIMIT)); // check for failure due to poll limit reached if (poll_count >= POLL_LIMIT) { // handle error // ... reset(); rtn_val = 0; } else { // return bit state if (status & STATUS_SBR) { rtn_val = 1; } else { rtn_val = 0; } } return(rtn_val); } //********************************************************************* bool Ds248x::OWWriteByte(uint8_t sendbyte) { bool rtn_val = false; uint8_t poll_count = 0; char status; char packet [] = {CMD_1WWB, sendbyte}; // 1-Wire Write Byte (Case B) // S AD,0 [A] 1WWB [A] DD [A] Sr AD,1 [A] [Status] A [Status] A\ P // \--------/ // Repeat until 1WB bit has changed to 0 // [] indicates from slave // DD data to write _p_i2c_bus->write(_w_adrs, packet, 2); // loop checking 1WB bit for completion of 1-Wire operation // abort if poll limit reached do { _p_i2c_bus->read(_r_adrs, &status, 1); } while ((status & STATUS_1WB) && (poll_count++ < POLL_LIMIT)); // check for failure due to poll limit reached if (poll_count >= POLL_LIMIT) { // handle error // ... reset(); rtn_val = false; } else { rtn_val = true; } return(rtn_val); } //********************************************************************* uint8_t Ds248x::OWReadByte(void) { uint8_t rtn_val; uint8_t poll_count = 0; char data, status; char packet[2] = {CMD_1WRB, 0}; // 1-Wire Read Bytes (Case C) // S AD,0 [A] 1WRB [A] Sr AD,1 [A] [Status] A [Status] A\ // \--------/ // Repeat until 1WB bit has changed to 0 // Sr AD,0 [A] SRP [A] E1 [A] Sr AD,1 [A] DD A\ P // // [] indicates from slave // DD data read _p_i2c_bus->write(_w_adrs, packet, 1); // loop checking 1WB bit for completion of 1-Wire operation // abort if poll limit reached do { _p_i2c_bus->read(_r_adrs, &status, 1); } while ((status & STATUS_1WB) && (poll_count++ < POLL_LIMIT)); // check for failure due to poll limit reached if (poll_count >= POLL_LIMIT) { // handle error // ... reset(); rtn_val = 0; } else { packet[0] = CMD_SRP; packet[1] = 0xE1; _p_i2c_bus->write(_w_adrs, packet, 2); _p_i2c_bus->read(_r_adrs, &data, 1); rtn_val = data; } return(rtn_val); } //********************************************************************* bool Ds248x::OWSearch(void) { uint8_t id_bit_number; uint8_t last_zero, rom_byte_number, search_result; uint8_t id_bit, cmp_id_bit; uint8_t rom_byte_mask, search_direction, status; // initialize for search id_bit_number = 1; last_zero = 0; rom_byte_number = 0; rom_byte_mask = 1; search_result = false; _crc8 = 0; // if the last call was not the last one if (!_last_device_flag) { // 1-Wire reset if (!OWReset()) { // reset the search _last_discrepancy = 0; _last_device_flag = false; _last_family_discrepancy = 0; return false; } // issue the search command OWWriteByte(SEARCH_ROM); // loop to do the search do { // if this discrepancy if before the Last Discrepancy // on a previous next then pick the same as last time if (id_bit_number < _last_discrepancy) { if ((_rom_number[rom_byte_number] & rom_byte_mask) > 0) search_direction = 1; else search_direction = 0; } else { // if equal to last pick 1, if not then pick 0 if (id_bit_number == _last_discrepancy) search_direction = 1; else search_direction = 0; } // Perform a triple operation on the ds2484 which will perform 2 read bits and 1 write bit status = search_triplet(search_direction); // check bit results in status byte id_bit = ((status & STATUS_SBR) == STATUS_SBR); cmp_id_bit = ((status & STATUS_TSB) == STATUS_TSB); search_direction = ((status & STATUS_DIR) == STATUS_DIR) ? (unsigned char)1 : (unsigned char)0; // check for no devices on 1-Wire if ((id_bit) && (cmp_id_bit)) break; else { if ((!id_bit) && (!cmp_id_bit) && (search_direction == 0)) { last_zero = id_bit_number; // check for Last discrepancy in family if (last_zero < 9) _last_family_discrepancy = last_zero; } // set or clear the bit in the ROM byte rom_byte_number // with mask rom_byte_mask if (search_direction == 1) _rom_number[rom_byte_number] |= rom_byte_mask; else _rom_number[rom_byte_number] &= (unsigned char)~rom_byte_mask; // increment the byte counter id_bit_number // and shift the mask rom_byte_mask id_bit_number++; rom_byte_mask <<= 1; // if the mask is 0 then go to new SerialNum byte rom_byte_number and reset mask if (rom_byte_mask == 0) { _crc8 = OWCalc_crc8(_rom_number[rom_byte_number], _crc8); // accumulate the CRC rom_byte_number++; rom_byte_mask = 1; } } } while(rom_byte_number < 8); // loop until through all ROM bytes 0-7 // if the search was successful then if (!((id_bit_number < 65) || (_crc8 != 0))) { // search successful so set LastDiscrepancy,LastDeviceFlag,search_result _last_discrepancy = last_zero; // check for last device if (_last_discrepancy == 0) _last_device_flag = true; search_result = true; } } // if no device found then reset counters so next 'search' will be like a first if (!search_result || (_rom_number[0] == 0)) { _last_discrepancy = 0; _last_device_flag = false; _last_family_discrepancy = 0; search_result = false; } return search_result; } //********************************************************************* uint8_t Ds248x::OWSpeed(OW_SPEED new_speed) { // set the speed if (new_speed == SPEED_OVERDRIVE) { _c1WS = CONFIG_1WS; } else { _c1WS = false; } // write the new config write_config(_c1WS | _cSPU | _cPDN | _cAPU); return(new_speed); } //********************************************************************* uint8_t Ds248x::OWLevel(OW_LEVEL new_level) { uint8_t rtn_val; // function only will turn back to non-strong pull-up if (new_level != LEVEL_NORMAL) { rtn_val = LEVEL_STRONG; } else { // clear the strong pull-up bit in the global config state _cSPU = false; // write the new config write_config(_c1WS | _cSPU | _cPDN | _cAPU); rtn_val = LEVEL_NORMAL; } return(rtn_val); } //********************************************************************* bool Ds248x::OWWriteBytePower(uint8_t sendbyte) { bool rtn_val = false; // set strong pull-up enable _cSPU = CONFIG_SPU; // write the new config if (!write_config(_c1WS | _cSPU | _cPDN | _cAPU)) { rtn_val = false; } else { // perform write byte OWWriteByte(sendbyte); rtn_val = true; } return(rtn_val); } //********************************************************************* bool Ds248x::OWReadBitPower(uint8_t applyPowerResponse) { bool rtn_val = false; uint8_t rdbit; // set strong pull-up enable _cSPU = CONFIG_SPU; // write the new config if (!write_config(_c1WS | _cSPU | _cPDN | _cAPU)) { rtn_val = false; } else { // perform read bit rdbit = OWReadBit(); // check if response was correct, if not then turn off strong pull-up if (rdbit != applyPowerResponse) { OWLevel(LEVEL_NORMAL); rtn_val = false; } rtn_val = true; } return(rtn_val); } //********************************************************************* void Ds248x::set_i2c_adrs(DS248X_I2C_ADRS adrs) { _w_adrs = (adrs << 1); _r_adrs = (_w_adrs | 1); }