Nothing Special / mbed-STM32F103C8

Modification of Mbed-dev library for LQFP48 package microcontrollers: STM32F103C8 (STM32F103C8T6) and STM32F103CB (STM32F103CBT6) (Bluepill boards, Maple mini etc. )

Fork of mbed-STM32F103C8_org by Nothing Special

Library for STM32F103C8 (Bluepill boards etc.).
Use this instead of mbed library.
This library allows the size of the code in the FLASH up to 128kB. Therefore, code also runs on microcontrollers STM32F103CB (eg. Maple mini).
But in the case of STM32F103C8, check the size of the resulting code would not exceed 64kB.

To compile a program with this library, use NUCLEO-F103RB as the target name. !

Changes:

  • Corrected initialization of the HSE + crystal clock (mbed permanent bug), allowing the use of on-board xtal (8MHz).(1)
  • Additionally, it also set USB clock (48Mhz).(2)
  • Definitions of pins and peripherals adjusted to LQFP48 case.
  • Board led LED1 is now PC_13 (3)
  • USER_BUTTON is now PC_14 (4)

    Now the library is complete rebuilt based on mbed-dev v160 (and not yet fully tested).

notes
(1) - In case 8MHz xtal on board, CPU frequency is 72MHz. Without xtal is 64MHz.
(2) - Using the USB interface is only possible if STM32 is clocking by on-board 8MHz xtal or external clock signal 8MHz on the OSC_IN pin.
(3) - On Bluepill board led operation is reversed, i.e. 0 - led on, 1 - led off.
(4) - Bluepill board has no real user button

Information

After export to SW4STM (AC6):

  • add line #include "mbed_config.h" in files Serial.h and RawSerial.h
  • in project properties change Optimisation Level to Optimise for size (-Os)

targets/TARGET_STM/gpio_api.c@148:8b0b02bf146f, 2017-04-27 (annotated)

Committer:
mega64
Date:
Thu Apr 27 23:56:38 2017 +0000
Revision:
148:8b0b02bf146f
Parent:
146:03e976389d16 
Remove unnecessary folders

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mega64 146:03e976389d16 1 /* mbed Microcontroller Library
mega64 146:03e976389d16 2 *******************************************************************************
mega64 146:03e976389d16 3 * Copyright (c) 2015, STMicroelectronics
mega64 146:03e976389d16 4 * All rights reserved.
mega64 146:03e976389d16 5 *
mega64 146:03e976389d16 6 * Redistribution and use in source and binary forms, with or without
mega64 146:03e976389d16 7 * modification, are permitted provided that the following conditions are met:
mega64 146:03e976389d16 8 *
mega64 146:03e976389d16 9 * 1. Redistributions of source code must retain the above copyright notice,
mega64 146:03e976389d16 10 * this list of conditions and the following disclaimer.
mega64 146:03e976389d16 11 * 2. Redistributions in binary form must reproduce the above copyright notice,
mega64 146:03e976389d16 12 * this list of conditions and the following disclaimer in the documentation
mega64 146:03e976389d16 13 * and/or other materials provided with the distribution.
mega64 146:03e976389d16 14 * 3. Neither the name of STMicroelectronics nor the names of its contributors
mega64 146:03e976389d16 15 * may be used to endorse or promote products derived from this software
mega64 146:03e976389d16 16 * without specific prior written permission.
mega64 146:03e976389d16 17 *
mega64 146:03e976389d16 18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
mega64 146:03e976389d16 19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
mega64 146:03e976389d16 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
mega64 146:03e976389d16 21 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
mega64 146:03e976389d16 22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
mega64 146:03e976389d16 23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
mega64 146:03e976389d16 24 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
mega64 146:03e976389d16 25 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
mega64 146:03e976389d16 26 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
mega64 146:03e976389d16 27 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
mega64 146:03e976389d16 28 *******************************************************************************
mega64 146:03e976389d16 29 */
mega64 146:03e976389d16 30 #include "mbed_assert.h"
mega64 146:03e976389d16 31 #include "gpio_api.h"
mega64 146:03e976389d16 32 #include "pinmap.h"
mega64 146:03e976389d16 33 #include "mbed_error.h"
mega64 146:03e976389d16 34 #include "pin_device.h"
mega64 146:03e976389d16 35
mega64 146:03e976389d16 36 extern const uint32_t ll_pin_defines[16];
mega64 146:03e976389d16 37
mega64 146:03e976389d16 38 // Enable GPIO clock and return GPIO base address
mega64 146:03e976389d16 39 GPIO_TypeDef *Set_GPIO_Clock(uint32_t port_idx) {
mega64 146:03e976389d16 40 uint32_t gpio_add = 0;
mega64 146:03e976389d16 41 switch (port_idx) {
mega64 146:03e976389d16 42 case PortA:
mega64 146:03e976389d16 43 gpio_add = GPIOA_BASE;
mega64 146:03e976389d16 44 __GPIOA_CLK_ENABLE();
mega64 146:03e976389d16 45 break;
mega64 146:03e976389d16 46 case PortB:
mega64 146:03e976389d16 47 gpio_add = GPIOB_BASE;
mega64 146:03e976389d16 48 __GPIOB_CLK_ENABLE();
mega64 146:03e976389d16 49 break;
mega64 146:03e976389d16 50 #if defined(GPIOC_BASE)
mega64 146:03e976389d16 51 case PortC:
mega64 146:03e976389d16 52 gpio_add = GPIOC_BASE;
mega64 146:03e976389d16 53 __GPIOC_CLK_ENABLE();
mega64 146:03e976389d16 54 break;
mega64 146:03e976389d16 55 #endif
mega64 146:03e976389d16 56 #if defined GPIOD_BASE
mega64 146:03e976389d16 57 case PortD:
mega64 146:03e976389d16 58 gpio_add = GPIOD_BASE;
mega64 146:03e976389d16 59 __GPIOD_CLK_ENABLE();
mega64 146:03e976389d16 60 break;
mega64 146:03e976389d16 61 #endif
mega64 146:03e976389d16 62 #if defined GPIOE_BASE
mega64 146:03e976389d16 63 case PortE:
mega64 146:03e976389d16 64 gpio_add = GPIOE_BASE;
mega64 146:03e976389d16 65 __GPIOE_CLK_ENABLE();
mega64 146:03e976389d16 66 break;
mega64 146:03e976389d16 67 #endif
mega64 146:03e976389d16 68 #if defined GPIOF_BASE
mega64 146:03e976389d16 69 case PortF:
mega64 146:03e976389d16 70 gpio_add = GPIOF_BASE;
mega64 146:03e976389d16 71 __GPIOF_CLK_ENABLE();
mega64 146:03e976389d16 72 break;
mega64 146:03e976389d16 73 #endif
mega64 146:03e976389d16 74 #if defined GPIOG_BASE
mega64 146:03e976389d16 75 case PortG:
mega64 146:03e976389d16 76 #if defined TARGET_STM32L4
mega64 146:03e976389d16 77 __HAL_RCC_PWR_CLK_ENABLE();
mega64 146:03e976389d16 78 HAL_PWREx_EnableVddIO2();
mega64 146:03e976389d16 79 #endif
mega64 146:03e976389d16 80 gpio_add = GPIOG_BASE;
mega64 146:03e976389d16 81 __GPIOG_CLK_ENABLE();
mega64 146:03e976389d16 82 break;
mega64 146:03e976389d16 83 #endif
mega64 146:03e976389d16 84 #if defined GPIOH_BASE
mega64 146:03e976389d16 85 case PortH:
mega64 146:03e976389d16 86 gpio_add = GPIOH_BASE;
mega64 146:03e976389d16 87 __GPIOH_CLK_ENABLE();
mega64 146:03e976389d16 88 break;
mega64 146:03e976389d16 89 #endif
mega64 146:03e976389d16 90 #if defined GPIOI_BASE
mega64 146:03e976389d16 91 case PortI:
mega64 146:03e976389d16 92 gpio_add = GPIOI_BASE;
mega64 146:03e976389d16 93 __GPIOI_CLK_ENABLE();
mega64 146:03e976389d16 94 break;
mega64 146:03e976389d16 95 #endif
mega64 146:03e976389d16 96 #if defined GPIOJ_BASE
mega64 146:03e976389d16 97 case PortJ:
mega64 146:03e976389d16 98 gpio_add = GPIOJ_BASE;
mega64 146:03e976389d16 99 __GPIOJ_CLK_ENABLE();
mega64 146:03e976389d16 100 break;
mega64 146:03e976389d16 101 #endif
mega64 146:03e976389d16 102 #if defined GPIOK_BASE
mega64 146:03e976389d16 103 case PortK:
mega64 146:03e976389d16 104 gpio_add = GPIOK_BASE;
mega64 146:03e976389d16 105 __GPIOK_CLK_ENABLE();
mega64 146:03e976389d16 106 break;
mega64 146:03e976389d16 107 #endif
mega64 146:03e976389d16 108 default:
mega64 146:03e976389d16 109 error("Pinmap error: wrong port number.");
mega64 146:03e976389d16 110 break;
mega64 146:03e976389d16 111 }
mega64 146:03e976389d16 112 return (GPIO_TypeDef *) gpio_add;
mega64 146:03e976389d16 113 }
mega64 146:03e976389d16 114
mega64 146:03e976389d16 115 uint32_t gpio_set(PinName pin) {
mega64 146:03e976389d16 116 MBED_ASSERT(pin != (PinName)NC);
mega64 146:03e976389d16 117
mega64 146:03e976389d16 118 pin_function(pin, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, 0));
mega64 146:03e976389d16 119
mega64 146:03e976389d16 120 return (uint32_t)(1 << ((uint32_t)pin & 0xF)); // Return the pin mask
mega64 146:03e976389d16 121 }
mega64 146:03e976389d16 122
mega64 146:03e976389d16 123
mega64 146:03e976389d16 124 void gpio_init(gpio_t *obj, PinName pin) {
mega64 146:03e976389d16 125 obj->pin = pin;
mega64 146:03e976389d16 126 if (pin == (PinName)NC) {
mega64 146:03e976389d16 127 return;
mega64 146:03e976389d16 128 }
mega64 146:03e976389d16 129
mega64 146:03e976389d16 130 uint32_t port_index = STM_PORT(pin);
mega64 146:03e976389d16 131
mega64 146:03e976389d16 132 // Enable GPIO clock
mega64 146:03e976389d16 133 GPIO_TypeDef *gpio = Set_GPIO_Clock(port_index);
mega64 146:03e976389d16 134
mega64 146:03e976389d16 135 // Fill GPIO object structure for future use
mega64 146:03e976389d16 136 obj->mask = gpio_set(pin);
mega64 146:03e976389d16 137 obj->gpio = gpio;
mega64 146:03e976389d16 138 obj->ll_pin = ll_pin_defines[STM_PIN(obj->pin)];
mega64 146:03e976389d16 139 obj->reg_in = &gpio->IDR;
mega64 146:03e976389d16 140 obj->reg_set = &gpio->BSRR;
mega64 146:03e976389d16 141 #ifdef GPIO_IP_WITHOUT_BRR
mega64 146:03e976389d16 142 obj->reg_clr = &gpio->BSRR;
mega64 146:03e976389d16 143 #else
mega64 146:03e976389d16 144 obj->reg_clr = &gpio->BRR;
mega64 146:03e976389d16 145 #endif
mega64 146:03e976389d16 146 }
mega64 146:03e976389d16 147
mega64 146:03e976389d16 148 void gpio_mode(gpio_t *obj, PinMode mode) {
mega64 146:03e976389d16 149 pin_mode(obj->pin, mode);
mega64 146:03e976389d16 150 }
mega64 146:03e976389d16 151
mega64 146:03e976389d16 152 inline void gpio_dir(gpio_t *obj, PinDirection direction) {
mega64 146:03e976389d16 153 if (direction == PIN_INPUT) {
mega64 146:03e976389d16 154 LL_GPIO_SetPinMode(obj->gpio, obj->ll_pin, LL_GPIO_MODE_INPUT);
mega64 146:03e976389d16 155 } else {
mega64 146:03e976389d16 156 LL_GPIO_SetPinMode(obj->gpio, obj->ll_pin, LL_GPIO_MODE_OUTPUT);
mega64 146:03e976389d16 157 }
mega64 146:03e976389d16 158 }
mega64 146:03e976389d16 159