Nothing Special / mbed-STM32F103C8

Modification of Mbed-dev library for LQFP48 package microcontrollers: STM32F103C8 (STM32F103C8T6) and STM32F103CB (STM32F103CBT6) (Bluepill boards, Maple mini etc. )

Fork of mbed-STM32F103C8_org by Nothing Special

Library for STM32F103C8 (Bluepill boards etc.).
Use this instead of mbed library.
This library allows the size of the code in the FLASH up to 128kB. Therefore, code also runs on microcontrollers STM32F103CB (eg. Maple mini).
But in the case of STM32F103C8, check the size of the resulting code would not exceed 64kB.

To compile a program with this library, use NUCLEO-F103RB as the target name. !

Changes:

  • Corrected initialization of the HSE + crystal clock (mbed permanent bug), allowing the use of on-board xtal (8MHz).(1)
  • Additionally, it also set USB clock (48Mhz).(2)
  • Definitions of pins and peripherals adjusted to LQFP48 case.
  • Board led LED1 is now PC_13 (3)
  • USER_BUTTON is now PC_14 (4)

    Now the library is complete rebuilt based on mbed-dev v160 (and not yet fully tested).

notes
(1) - In case 8MHz xtal on board, CPU frequency is 72MHz. Without xtal is 64MHz.
(2) - Using the USB interface is only possible if STM32 is clocking by on-board 8MHz xtal or external clock signal 8MHz on the OSC_IN pin.
(3) - On Bluepill board led operation is reversed, i.e. 0 - led on, 1 - led off.
(4) - Bluepill board has no real user button

Information

After export to SW4STM (AC6):

  • add line #include "mbed_config.h" in files Serial.h and RawSerial.h
  • in project properties change Optimisation Level to Optimise for size (-Os)

targets/TARGET_STM/TARGET_STM32F1/pin_device.h@146:03e976389d16, 2017-03-16 (annotated)

Committer:
mega64
Date:
Thu Mar 16 06:15:53 2017 +0000
Revision:
146:03e976389d16
fully rebuild, now based on mbed-dev v160

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mega64 146:03e976389d16 1 /* mbed Microcontroller Library
mega64 146:03e976389d16 2 *******************************************************************************
mega64 146:03e976389d16 3 * Copyright (c) 2016, STMicroelectronics
mega64 146:03e976389d16 4 * All rights reserved.
mega64 146:03e976389d16 5 *
mega64 146:03e976389d16 6 * Redistribution and use in source and binary forms, with or without
mega64 146:03e976389d16 7 * modification, are permitted provided that the following conditions are met:
mega64 146:03e976389d16 8 *
mega64 146:03e976389d16 9 * 1. Redistributions of source code must retain the above copyright notice,
mega64 146:03e976389d16 10 * this list of conditions and the following disclaimer.
mega64 146:03e976389d16 11 * 2. Redistributions in binary form must reproduce the above copyright notice,
mega64 146:03e976389d16 12 * this list of conditions and the following disclaimer in the documentation
mega64 146:03e976389d16 13 * and/or other materials provided with the distribution.
mega64 146:03e976389d16 14 * 3. Neither the name of STMicroelectronics nor the names of its contributors
mega64 146:03e976389d16 15 * may be used to endorse or promote products derived from this software
mega64 146:03e976389d16 16 * without specific prior written permission.
mega64 146:03e976389d16 17 *
mega64 146:03e976389d16 18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
mega64 146:03e976389d16 19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
mega64 146:03e976389d16 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
mega64 146:03e976389d16 21 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
mega64 146:03e976389d16 22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
mega64 146:03e976389d16 23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
mega64 146:03e976389d16 24 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
mega64 146:03e976389d16 25 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
mega64 146:03e976389d16 26 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
mega64 146:03e976389d16 27 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
mega64 146:03e976389d16 28 *******************************************************************************
mega64 146:03e976389d16 29 */
mega64 146:03e976389d16 30 #ifndef MBED_PIN_DEVICE_H
mega64 146:03e976389d16 31 #define MBED_PIN_DEVICE_H
mega64 146:03e976389d16 32
mega64 146:03e976389d16 33 #include "cmsis.h"
mega64 146:03e976389d16 34 #include "stm32f1xx_ll_gpio.h"
mega64 146:03e976389d16 35
mega64 146:03e976389d16 36 extern const uint32_t ll_pin_defines[16];
mega64 146:03e976389d16 37
mega64 146:03e976389d16 38 static inline void stm_pin_DisconnectDebug(PinName pin)
mega64 146:03e976389d16 39 {
mega64 146:03e976389d16 40 // Disconnect JTAG-DP + SW-DP signals.
mega64 146:03e976389d16 41 // Warning: Need to reconnect under reset
mega64 146:03e976389d16 42 if ((pin == PA_13) || (pin == PA_14)) {
mega64 146:03e976389d16 43 __HAL_AFIO_REMAP_SWJ_DISABLE(); // JTAG-DP Disabled and SW-DP Disabled
mega64 146:03e976389d16 44 }
mega64 146:03e976389d16 45 if ((pin == PA_15) || (pin == PB_3) || (pin == PB_4)) {
mega64 146:03e976389d16 46 __HAL_AFIO_REMAP_SWJ_NOJTAG(); // JTAG-DP Disabled and SW-DP enabled
mega64 146:03e976389d16 47 }
mega64 146:03e976389d16 48 }
mega64 146:03e976389d16 49
mega64 146:03e976389d16 50 /* The AF selection of F1 family is specific compared to others */
mega64 146:03e976389d16 51 static inline void stm_pin_SetAFPin(GPIO_TypeDef *gpio, PinName pin, uint32_t afnum)
mega64 146:03e976389d16 52 {
mega64 146:03e976389d16 53 // Enable AFIO clock
mega64 146:03e976389d16 54 __HAL_RCC_AFIO_CLK_ENABLE();
mega64 146:03e976389d16 55
mega64 146:03e976389d16 56 if (afnum > 0) {
mega64 146:03e976389d16 57 switch (afnum) {
mega64 146:03e976389d16 58 case 1: // Remap SPI1
mega64 146:03e976389d16 59 __HAL_AFIO_REMAP_SPI1_ENABLE();
mega64 146:03e976389d16 60 break;
mega64 146:03e976389d16 61 case 2: // Remap I2C1
mega64 146:03e976389d16 62 __HAL_AFIO_REMAP_I2C1_ENABLE();
mega64 146:03e976389d16 63 break;
mega64 146:03e976389d16 64 case 3: // Remap USART1
mega64 146:03e976389d16 65 __HAL_AFIO_REMAP_USART1_ENABLE();
mega64 146:03e976389d16 66 break;
mega64 146:03e976389d16 67 case 4: // Remap USART2
mega64 146:03e976389d16 68 __HAL_AFIO_REMAP_USART2_ENABLE();
mega64 146:03e976389d16 69 break;
mega64 146:03e976389d16 70 case 5: // Partial Remap USART3
mega64 146:03e976389d16 71 __HAL_AFIO_REMAP_USART3_PARTIAL();
mega64 146:03e976389d16 72 break;
mega64 146:03e976389d16 73 case 6: // Partial Remap TIM1
mega64 146:03e976389d16 74 __HAL_AFIO_REMAP_TIM1_PARTIAL();
mega64 146:03e976389d16 75 break;
mega64 146:03e976389d16 76 case 7: // Partial Remap TIM3
mega64 146:03e976389d16 77 __HAL_AFIO_REMAP_TIM3_PARTIAL();
mega64 146:03e976389d16 78 break;
mega64 146:03e976389d16 79 case 8: // Full Remap TIM2
mega64 146:03e976389d16 80 __HAL_AFIO_REMAP_TIM2_ENABLE();
mega64 146:03e976389d16 81 break;
mega64 146:03e976389d16 82 case 9: // Full Remap TIM3
mega64 146:03e976389d16 83 __HAL_AFIO_REMAP_TIM3_ENABLE();
mega64 146:03e976389d16 84 break;
mega64 146:03e976389d16 85 #if defined(AFIO_MAPR_CAN_REMAP_REMAP1)
mega64 146:03e976389d16 86 case 10: // CAN_RX mapped to PB8, CAN_TX mapped to PB9
mega64 146:03e976389d16 87 __HAL_AFIO_REMAP_CAN1_2();
mega64 146:03e976389d16 88 break;
mega64 146:03e976389d16 89 #endif
mega64 146:03e976389d16 90 default:
mega64 146:03e976389d16 91 break;
mega64 146:03e976389d16 92 }
mega64 146:03e976389d16 93 }
mega64 146:03e976389d16 94 }
mega64 146:03e976389d16 95
mega64 146:03e976389d16 96 static inline void stm_pin_PullConfig(GPIO_TypeDef *gpio, uint32_t ll_pin, uint32_t pull_config)
mega64 146:03e976389d16 97 {
mega64 146:03e976389d16 98 uint32_t function = LL_GPIO_GetPinMode(gpio, ll_pin);
mega64 146:03e976389d16 99
mega64 146:03e976389d16 100 switch (pull_config) {
mega64 146:03e976389d16 101 case GPIO_PULLUP:
mega64 146:03e976389d16 102 if (function == LL_GPIO_MODE_FLOATING)
mega64 146:03e976389d16 103 LL_GPIO_SetPinMode(gpio, ll_pin, LL_GPIO_MODE_INPUT);
mega64 146:03e976389d16 104 LL_GPIO_SetPinPull(gpio, ll_pin, LL_GPIO_PULL_UP);
mega64 146:03e976389d16 105 break;
mega64 146:03e976389d16 106 case GPIO_PULLDOWN:
mega64 146:03e976389d16 107 if (function == LL_GPIO_MODE_FLOATING)
mega64 146:03e976389d16 108 LL_GPIO_SetPinMode(gpio, ll_pin, LL_GPIO_MODE_INPUT);
mega64 146:03e976389d16 109 LL_GPIO_SetPinPull(gpio, ll_pin, LL_GPIO_PULL_DOWN);
mega64 146:03e976389d16 110 break;
mega64 146:03e976389d16 111 default:
mega64 146:03e976389d16 112 /* Input+NoPull = Floating for F1 family */
mega64 146:03e976389d16 113 if (function == LL_GPIO_MODE_INPUT)
mega64 146:03e976389d16 114 LL_GPIO_SetPinMode(gpio, ll_pin, LL_GPIO_MODE_FLOATING);
mega64 146:03e976389d16 115 break;
mega64 146:03e976389d16 116 }
mega64 146:03e976389d16 117 }
mega64 146:03e976389d16 118
mega64 146:03e976389d16 119 #endif