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cmsis/core_ca9.h@146:03e976389d16, 2017-03-16 (annotated)

Committer:
mega64
Date:
Thu Mar 16 06:15:53 2017 +0000
Revision:
146:03e976389d16
fully rebuild, now based on mbed-dev v160

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mega64 146:03e976389d16 1 /**************************************************************************//**
mega64 146:03e976389d16 2 * @file core_ca9.h
mega64 146:03e976389d16 3 * @brief CMSIS Cortex-A9 Core Peripheral Access Layer Header File
mega64 146:03e976389d16 4 * @version
mega64 146:03e976389d16 5 * @date 25 March 2013
mega64 146:03e976389d16 6 *
mega64 146:03e976389d16 7 * @note
mega64 146:03e976389d16 8 *
mega64 146:03e976389d16 9 ******************************************************************************/
mega64 146:03e976389d16 10 /* Copyright (c) 2009 - 2012 ARM LIMITED
mega64 146:03e976389d16 11
mega64 146:03e976389d16 12 All rights reserved.
mega64 146:03e976389d16 13 Redistribution and use in source and binary forms, with or without
mega64 146:03e976389d16 14 modification, are permitted provided that the following conditions are met:
mega64 146:03e976389d16 15 - Redistributions of source code must retain the above copyright
mega64 146:03e976389d16 16 notice, this list of conditions and the following disclaimer.
mega64 146:03e976389d16 17 - Redistributions in binary form must reproduce the above copyright
mega64 146:03e976389d16 18 notice, this list of conditions and the following disclaimer in the
mega64 146:03e976389d16 19 documentation and/or other materials provided with the distribution.
mega64 146:03e976389d16 20 - Neither the name of ARM nor the names of its contributors may be used
mega64 146:03e976389d16 21 to endorse or promote products derived from this software without
mega64 146:03e976389d16 22 specific prior written permission.
mega64 146:03e976389d16 23 *
mega64 146:03e976389d16 24 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
mega64 146:03e976389d16 25 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
mega64 146:03e976389d16 26 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
mega64 146:03e976389d16 27 ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
mega64 146:03e976389d16 28 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
mega64 146:03e976389d16 29 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
mega64 146:03e976389d16 30 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
mega64 146:03e976389d16 31 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
mega64 146:03e976389d16 32 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
mega64 146:03e976389d16 33 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
mega64 146:03e976389d16 34 POSSIBILITY OF SUCH DAMAGE.
mega64 146:03e976389d16 35 ---------------------------------------------------------------------------*/
mega64 146:03e976389d16 36
mega64 146:03e976389d16 37
mega64 146:03e976389d16 38 #if defined ( __ICCARM__ )
mega64 146:03e976389d16 39 #pragma system_include /* treat file as system include file for MISRA check */
mega64 146:03e976389d16 40 #endif
mega64 146:03e976389d16 41
mega64 146:03e976389d16 42 #ifdef __cplusplus
mega64 146:03e976389d16 43 extern "C" {
mega64 146:03e976389d16 44 #endif
mega64 146:03e976389d16 45
mega64 146:03e976389d16 46 #ifndef __CORE_CA9_H_GENERIC
mega64 146:03e976389d16 47 #define __CORE_CA9_H_GENERIC
mega64 146:03e976389d16 48
mega64 146:03e976389d16 49
mega64 146:03e976389d16 50 /** \page CMSIS_MISRA_Exceptions MISRA-C:2004 Compliance Exceptions
mega64 146:03e976389d16 51 CMSIS violates the following MISRA-C:2004 rules:
mega64 146:03e976389d16 52
mega64 146:03e976389d16 53 \li Required Rule 8.5, object/function definition in header file.<br>
mega64 146:03e976389d16 54 Function definitions in header files are used to allow 'inlining'.
mega64 146:03e976389d16 55
mega64 146:03e976389d16 56 \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.<br>
mega64 146:03e976389d16 57 Unions are used for effective representation of core registers.
mega64 146:03e976389d16 58
mega64 146:03e976389d16 59 \li Advisory Rule 19.7, Function-like macro defined.<br>
mega64 146:03e976389d16 60 Function-like macros are used to allow more efficient code.
mega64 146:03e976389d16 61 */
mega64 146:03e976389d16 62
mega64 146:03e976389d16 63
mega64 146:03e976389d16 64 /*******************************************************************************
mega64 146:03e976389d16 65 * CMSIS definitions
mega64 146:03e976389d16 66 ******************************************************************************/
mega64 146:03e976389d16 67 /** \ingroup Cortex_A9
mega64 146:03e976389d16 68 @{
mega64 146:03e976389d16 69 */
mega64 146:03e976389d16 70
mega64 146:03e976389d16 71 /* CMSIS CA9 definitions */
mega64 146:03e976389d16 72 #define __CA9_CMSIS_VERSION_MAIN (0x03) /*!< [31:16] CMSIS HAL main version */
mega64 146:03e976389d16 73 #define __CA9_CMSIS_VERSION_SUB (0x10) /*!< [15:0] CMSIS HAL sub version */
mega64 146:03e976389d16 74 #define __CA9_CMSIS_VERSION ((__CA9_CMSIS_VERSION_MAIN << 16) | \
mega64 146:03e976389d16 75 __CA9_CMSIS_VERSION_SUB ) /*!< CMSIS HAL version number */
mega64 146:03e976389d16 76
mega64 146:03e976389d16 77 #define __CORTEX_A (0x09) /*!< Cortex-A Core */
mega64 146:03e976389d16 78
mega64 146:03e976389d16 79
mega64 146:03e976389d16 80 #if defined ( __CC_ARM )
mega64 146:03e976389d16 81 #define __ASM __asm /*!< asm keyword for ARM Compiler */
mega64 146:03e976389d16 82 #define __INLINE __inline /*!< inline keyword for ARM Compiler */
mega64 146:03e976389d16 83 #define __STATIC_INLINE static __inline
mega64 146:03e976389d16 84 #define __STATIC_ASM static __asm
mega64 146:03e976389d16 85
mega64 146:03e976389d16 86 #elif defined ( __ICCARM__ )
mega64 146:03e976389d16 87 #define __ASM __asm /*!< asm keyword for IAR Compiler */
mega64 146:03e976389d16 88 #define __INLINE inline /*!< inline keyword for IAR Compiler. Only available in High optimization mode! */
mega64 146:03e976389d16 89 #define __STATIC_INLINE static inline
mega64 146:03e976389d16 90 #define __STATIC_ASM static __asm
mega64 146:03e976389d16 91
mega64 146:03e976389d16 92 #include <stdint.h>
mega64 146:03e976389d16 93 inline uint32_t __get_PSR(void) {
mega64 146:03e976389d16 94 __ASM("mrs r0, cpsr");
mega64 146:03e976389d16 95 }
mega64 146:03e976389d16 96
mega64 146:03e976389d16 97 #elif defined ( __TMS470__ )
mega64 146:03e976389d16 98 #define __ASM __asm /*!< asm keyword for TI CCS Compiler */
mega64 146:03e976389d16 99 #define __STATIC_INLINE static inline
mega64 146:03e976389d16 100 #define __STATIC_ASM static __asm
mega64 146:03e976389d16 101
mega64 146:03e976389d16 102 #elif defined ( __GNUC__ )
mega64 146:03e976389d16 103 #define __ASM __asm /*!< asm keyword for GNU Compiler */
mega64 146:03e976389d16 104 #define __INLINE inline /*!< inline keyword for GNU Compiler */
mega64 146:03e976389d16 105 #define __STATIC_INLINE static inline
mega64 146:03e976389d16 106 #define __STATIC_ASM static __asm
mega64 146:03e976389d16 107
mega64 146:03e976389d16 108 #elif defined ( __TASKING__ )
mega64 146:03e976389d16 109 #define __ASM __asm /*!< asm keyword for TASKING Compiler */
mega64 146:03e976389d16 110 #define __INLINE inline /*!< inline keyword for TASKING Compiler */
mega64 146:03e976389d16 111 #define __STATIC_INLINE static inline
mega64 146:03e976389d16 112 #define __STATIC_ASM static __asm
mega64 146:03e976389d16 113
mega64 146:03e976389d16 114 #endif
mega64 146:03e976389d16 115
mega64 146:03e976389d16 116 /** __FPU_USED indicates whether an FPU is used or not. For this, __FPU_PRESENT has to be checked prior to making use of FPU specific registers and functions.
mega64 146:03e976389d16 117 */
mega64 146:03e976389d16 118 #if defined ( __CC_ARM )
mega64 146:03e976389d16 119 #if defined __TARGET_FPU_VFP
mega64 146:03e976389d16 120 #if (__FPU_PRESENT == 1)
mega64 146:03e976389d16 121 #define __FPU_USED 1
mega64 146:03e976389d16 122 #else
mega64 146:03e976389d16 123 #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
mega64 146:03e976389d16 124 #define __FPU_USED 0
mega64 146:03e976389d16 125 #endif
mega64 146:03e976389d16 126 #else
mega64 146:03e976389d16 127 #define __FPU_USED 0
mega64 146:03e976389d16 128 #endif
mega64 146:03e976389d16 129
mega64 146:03e976389d16 130 #elif defined ( __ICCARM__ )
mega64 146:03e976389d16 131 #if defined __ARMVFP__
mega64 146:03e976389d16 132 #if (__FPU_PRESENT == 1)
mega64 146:03e976389d16 133 #define __FPU_USED 1
mega64 146:03e976389d16 134 #else
mega64 146:03e976389d16 135 #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
mega64 146:03e976389d16 136 #define __FPU_USED 0
mega64 146:03e976389d16 137 #endif
mega64 146:03e976389d16 138 #else
mega64 146:03e976389d16 139 #define __FPU_USED 0
mega64 146:03e976389d16 140 #endif
mega64 146:03e976389d16 141
mega64 146:03e976389d16 142 #elif defined ( __TMS470__ )
mega64 146:03e976389d16 143 #if defined __TI_VFP_SUPPORT__
mega64 146:03e976389d16 144 #if (__FPU_PRESENT == 1)
mega64 146:03e976389d16 145 #define __FPU_USED 1
mega64 146:03e976389d16 146 #else
mega64 146:03e976389d16 147 #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
mega64 146:03e976389d16 148 #define __FPU_USED 0
mega64 146:03e976389d16 149 #endif
mega64 146:03e976389d16 150 #else
mega64 146:03e976389d16 151 #define __FPU_USED 0
mega64 146:03e976389d16 152 #endif
mega64 146:03e976389d16 153
mega64 146:03e976389d16 154 #elif defined ( __GNUC__ )
mega64 146:03e976389d16 155 #if defined (__VFP_FP__) && !defined(__SOFTFP__)
mega64 146:03e976389d16 156 #if (__FPU_PRESENT == 1)
mega64 146:03e976389d16 157 #define __FPU_USED 1
mega64 146:03e976389d16 158 #else
mega64 146:03e976389d16 159 #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
mega64 146:03e976389d16 160 #define __FPU_USED 0
mega64 146:03e976389d16 161 #endif
mega64 146:03e976389d16 162 #else
mega64 146:03e976389d16 163 #define __FPU_USED 0
mega64 146:03e976389d16 164 #endif
mega64 146:03e976389d16 165
mega64 146:03e976389d16 166 #elif defined ( __TASKING__ )
mega64 146:03e976389d16 167 #if defined __FPU_VFP__
mega64 146:03e976389d16 168 #if (__FPU_PRESENT == 1)
mega64 146:03e976389d16 169 #define __FPU_USED 1
mega64 146:03e976389d16 170 #else
mega64 146:03e976389d16 171 #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
mega64 146:03e976389d16 172 #define __FPU_USED 0
mega64 146:03e976389d16 173 #endif
mega64 146:03e976389d16 174 #else
mega64 146:03e976389d16 175 #define __FPU_USED 0
mega64 146:03e976389d16 176 #endif
mega64 146:03e976389d16 177 #endif
mega64 146:03e976389d16 178
mega64 146:03e976389d16 179 #include <stdint.h> /*!< standard types definitions */
mega64 146:03e976389d16 180 #include "core_caInstr.h" /*!< Core Instruction Access */
mega64 146:03e976389d16 181 #include "core_caFunc.h" /*!< Core Function Access */
mega64 146:03e976389d16 182 #include "core_cm4_simd.h" /*!< Compiler specific SIMD Intrinsics */
mega64 146:03e976389d16 183
mega64 146:03e976389d16 184 #endif /* __CORE_CA9_H_GENERIC */
mega64 146:03e976389d16 185
mega64 146:03e976389d16 186 #ifndef __CMSIS_GENERIC
mega64 146:03e976389d16 187
mega64 146:03e976389d16 188 #ifndef __CORE_CA9_H_DEPENDANT
mega64 146:03e976389d16 189 #define __CORE_CA9_H_DEPENDANT
mega64 146:03e976389d16 190
mega64 146:03e976389d16 191 /* check device defines and use defaults */
mega64 146:03e976389d16 192 #if defined __CHECK_DEVICE_DEFINES
mega64 146:03e976389d16 193 #ifndef __CA9_REV
mega64 146:03e976389d16 194 #define __CA9_REV 0x0000
mega64 146:03e976389d16 195 #warning "__CA9_REV not defined in device header file; using default!"
mega64 146:03e976389d16 196 #endif
mega64 146:03e976389d16 197
mega64 146:03e976389d16 198 #ifndef __FPU_PRESENT
mega64 146:03e976389d16 199 #define __FPU_PRESENT 1
mega64 146:03e976389d16 200 #warning "__FPU_PRESENT not defined in device header file; using default!"
mega64 146:03e976389d16 201 #endif
mega64 146:03e976389d16 202
mega64 146:03e976389d16 203 #ifndef __Vendor_SysTickConfig
mega64 146:03e976389d16 204 #define __Vendor_SysTickConfig 1
mega64 146:03e976389d16 205 #endif
mega64 146:03e976389d16 206
mega64 146:03e976389d16 207 #if __Vendor_SysTickConfig == 0
mega64 146:03e976389d16 208 #error "__Vendor_SysTickConfig set to 0, but vendor systick timer must be supplied for Cortex-A9"
mega64 146:03e976389d16 209 #endif
mega64 146:03e976389d16 210 #endif
mega64 146:03e976389d16 211
mega64 146:03e976389d16 212 /* IO definitions (access restrictions to peripheral registers) */
mega64 146:03e976389d16 213 /**
mega64 146:03e976389d16 214 \defgroup CMSIS_glob_defs CMSIS Global Defines
mega64 146:03e976389d16 215
mega64 146:03e976389d16 216 <strong>IO Type Qualifiers</strong> are used
mega64 146:03e976389d16 217 \li to specify the access to peripheral variables.
mega64 146:03e976389d16 218 \li for automatic generation of peripheral register debug information.
mega64 146:03e976389d16 219 */
mega64 146:03e976389d16 220 #ifdef __cplusplus
mega64 146:03e976389d16 221 #define __I volatile /*!< Defines 'read only' permissions */
mega64 146:03e976389d16 222 #else
mega64 146:03e976389d16 223 #define __I volatile const /*!< Defines 'read only' permissions */
mega64 146:03e976389d16 224 #endif
mega64 146:03e976389d16 225 #define __O volatile /*!< Defines 'write only' permissions */
mega64 146:03e976389d16 226 #define __IO volatile /*!< Defines 'read / write' permissions */
mega64 146:03e976389d16 227
mega64 146:03e976389d16 228 /*@} end of group Cortex_A9 */
mega64 146:03e976389d16 229
mega64 146:03e976389d16 230
mega64 146:03e976389d16 231 /*******************************************************************************
mega64 146:03e976389d16 232 * Register Abstraction
mega64 146:03e976389d16 233 ******************************************************************************/
mega64 146:03e976389d16 234 /** \defgroup CMSIS_core_register Defines and Type Definitions
mega64 146:03e976389d16 235 \brief Type definitions and defines for Cortex-A processor based devices.
mega64 146:03e976389d16 236 */
mega64 146:03e976389d16 237
mega64 146:03e976389d16 238 /** \ingroup CMSIS_core_register
mega64 146:03e976389d16 239 \defgroup CMSIS_CORE Status and Control Registers
mega64 146:03e976389d16 240 \brief Core Register type definitions.
mega64 146:03e976389d16 241 @{
mega64 146:03e976389d16 242 */
mega64 146:03e976389d16 243
mega64 146:03e976389d16 244 /** \brief Union type to access the Application Program Status Register (APSR).
mega64 146:03e976389d16 245 */
mega64 146:03e976389d16 246 typedef union
mega64 146:03e976389d16 247 {
mega64 146:03e976389d16 248 struct
mega64 146:03e976389d16 249 {
mega64 146:03e976389d16 250 uint32_t _reserved0:16; /*!< bit: 0..15 Reserved */
mega64 146:03e976389d16 251 uint32_t GE:4; /*!< bit: 16..19 Greater than or Equal flags */
mega64 146:03e976389d16 252 uint32_t reserved1:7; /*!< bit: 20..23 Reserved */
mega64 146:03e976389d16 253 uint32_t Q:1; /*!< bit: 27 Saturation condition flag */
mega64 146:03e976389d16 254 uint32_t V:1; /*!< bit: 28 Overflow condition code flag */
mega64 146:03e976389d16 255 uint32_t C:1; /*!< bit: 29 Carry condition code flag */
mega64 146:03e976389d16 256 uint32_t Z:1; /*!< bit: 30 Zero condition code flag */
mega64 146:03e976389d16 257 uint32_t N:1; /*!< bit: 31 Negative condition code flag */
mega64 146:03e976389d16 258 } b; /*!< Structure used for bit access */
mega64 146:03e976389d16 259 uint32_t w; /*!< Type used for word access */
mega64 146:03e976389d16 260 } APSR_Type;
mega64 146:03e976389d16 261
mega64 146:03e976389d16 262
mega64 146:03e976389d16 263 /*@} end of group CMSIS_CORE */
mega64 146:03e976389d16 264
mega64 146:03e976389d16 265 /*@} end of CMSIS_Core_FPUFunctions */
mega64 146:03e976389d16 266
mega64 146:03e976389d16 267
mega64 146:03e976389d16 268 #endif /* __CORE_CA9_H_GENERIC */
mega64 146:03e976389d16 269
mega64 146:03e976389d16 270 #endif /* __CMSIS_GENERIC */
mega64 146:03e976389d16 271
mega64 146:03e976389d16 272 #ifdef __cplusplus
mega64 146:03e976389d16 273 }
mega64 146:03e976389d16 274
mega64 146:03e976389d16 275
mega64 146:03e976389d16 276 #endif