mbed-dev library fork for STM32F100R6 microcontroller (LQFP64, 24MHz, 32kB flash, 4kB ram, 2-channel DAC, HDMI CEC, very cheap) . Use in online compiler (instead mbed library) with selected platform Nucleo F103RB.
Fork of mbed-dev by
spi_api.h
00001 /* mbed Microcontroller Library 00002 * Copyright (c) 2006-2013 ARM Limited 00003 * 00004 * Licensed under the Apache License, Version 2.0 (the "License"); 00005 * you may not use this file except in compliance with the License. 00006 * You may obtain a copy of the License at 00007 * 00008 * http://www.apache.org/licenses/LICENSE-2.0 00009 * 00010 * Unless required by applicable law or agreed to in writing, software 00011 * distributed under the License is distributed on an "AS IS" BASIS, 00012 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 00013 * See the License for the specific language governing permissions and 00014 * limitations under the License. 00015 */ 00016 #ifndef MBED_SPI_API_H 00017 #define MBED_SPI_API_H 00018 00019 #include "device.h" 00020 #include "dma_api.h" 00021 #include "buffer.h" 00022 00023 // for 100F6 not implemented (N.S.) 00024 #undef DEVICE_SPI_ASYNCH 00025 00026 00027 #if DEVICE_SPI 00028 00029 #define SPI_EVENT_ERROR (1 << 1) 00030 #define SPI_EVENT_COMPLETE (1 << 2) 00031 #define SPI_EVENT_RX_OVERFLOW (1 << 3) 00032 #define SPI_EVENT_ALL (SPI_EVENT_ERROR | SPI_EVENT_COMPLETE | SPI_EVENT_RX_OVERFLOW) 00033 00034 #define SPI_EVENT_INTERNAL_TRANSFER_COMPLETE (1 << 30) // internal flag to report an event occurred 00035 00036 #define SPI_FILL_WORD (0xFFFF) 00037 00038 #if DEVICE_SPI_ASYNCH 00039 /** Asynch spi hal structure 00040 */ 00041 typedef struct { 00042 struct spi_s spi; /**< Target specific spi structure */ 00043 struct buffer_s tx_buff; /**< Tx buffer */ 00044 struct buffer_s rx_buff; /**< Rx buffer */ 00045 } spi_t; 00046 00047 #else 00048 /** Non-asynch spi hal structure 00049 */ 00050 typedef struct spi_s spi_t; 00051 00052 #endif 00053 00054 #ifdef __cplusplus 00055 extern "C" { 00056 #endif 00057 00058 /** 00059 * \defgroup GeneralSPI SPI Configuration Functions 00060 * @{ 00061 */ 00062 00063 /** Initialize the SPI peripheral 00064 * 00065 * Configures the pins used by SPI, sets a default format and frequency, and enables the peripheral 00066 * @param[out] obj The SPI object to initialize 00067 * @param[in] mosi The pin to use for MOSI 00068 * @param[in] miso The pin to use for MISO 00069 * @param[in] sclk The pin to use for SCLK 00070 * @param[in] ssel The pin to use for SSEL 00071 */ 00072 void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel); 00073 00074 /** Release a SPI object 00075 * 00076 * TODO: spi_free is currently unimplemented 00077 * This will require reference counting at the C++ level to be safe 00078 * 00079 * Return the pins owned by the SPI object to their reset state 00080 * Disable the SPI peripheral 00081 * Disable the SPI clock 00082 * @param[in] obj The SPI object to deinitialize 00083 */ 00084 void spi_free(spi_t *obj); 00085 00086 /** Configure the SPI format 00087 * 00088 * Set the number of bits per frame, configure clock polarity and phase, shift order and master/slave mode 00089 * @param[in,out] obj The SPI object to configure 00090 * @param[in] bits The number of bits per frame 00091 * @param[in] mode The SPI mode (clock polarity, phase, and shift direction) 00092 * @param[in] slave Zero for master mode or non-zero for slave mode 00093 */ 00094 void spi_format(spi_t *obj, int bits, int mode, int slave); 00095 00096 /** Set the SPI baud rate 00097 * 00098 * Actual frequency may differ from the desired frequency due to available dividers and bus clock 00099 * Configures the SPI peripheral's baud rate 00100 * @param[in,out] obj The SPI object to configure 00101 * @param[in] hz The baud rate in Hz 00102 */ 00103 void spi_frequency(spi_t *obj, int hz); 00104 00105 /**@}*/ 00106 /** 00107 * \defgroup SynchSPI Synchronous SPI Hardware Abstraction Layer 00108 * @{ 00109 */ 00110 00111 /** Write a byte out in master mode and receive a value 00112 * 00113 * @param[in] obj The SPI peripheral to use for sending 00114 * @param[in] value The value to send 00115 * @return Returns the value received during send 00116 */ 00117 int spi_master_write(spi_t *obj, int value); 00118 00119 /** Check if a value is available to read 00120 * 00121 * @param[in] obj The SPI peripheral to check 00122 * @return non-zero if a value is available 00123 */ 00124 int spi_slave_receive(spi_t *obj); 00125 00126 /** Get a received value out of the SPI receive buffer in slave mode 00127 * 00128 * Blocks until a value is available 00129 * @param[in] obj The SPI peripheral to read 00130 * @return The value received 00131 */ 00132 int spi_slave_read(spi_t *obj); 00133 00134 /** Write a value to the SPI peripheral in slave mode 00135 * 00136 * Blocks until the SPI peripheral can be written to 00137 * @param[in] obj The SPI peripheral to write 00138 * @param[in] value The value to write 00139 */ 00140 void spi_slave_write(spi_t *obj, int value); 00141 00142 /** Checks if the specified SPI peripheral is in use 00143 * 00144 * @param[in] obj The SPI peripheral to check 00145 * @return non-zero if the peripheral is currently transmitting 00146 */ 00147 int spi_busy(spi_t *obj); 00148 00149 /** Get the module number 00150 * 00151 * @param[in] obj The SPI peripheral to check 00152 * @return The module number 00153 */ 00154 uint8_t spi_get_module(spi_t *obj); 00155 00156 /**@}*/ 00157 00158 #if DEVICE_SPI_ASYNCH 00159 /** 00160 * \defgroup AsynchSPI Asynchronous SPI Hardware Abstraction Layer 00161 * @{ 00162 */ 00163 00164 /** Begin the SPI transfer. Buffer pointers and lengths are specified in tx_buff and rx_buff 00165 * 00166 * @param[in] obj The SPI object which holds the transfer information 00167 * @param[in] tx The buffer to send 00168 * @param[in] tx_length The number of words to transmit 00169 * @param[in] rx The buffer to receive 00170 * @param[in] rx_length The number of words to receive 00171 * @param[in] bit_width The bit width of buffer words 00172 * @param[in] event The logical OR of events to be registered 00173 * @param[in] handler SPI interrupt handler 00174 * @param[in] hint A suggestion for how to use DMA with this transfer 00175 */ 00176 void spi_master_transfer(spi_t *obj, const void *tx, size_t tx_length, void *rx, size_t rx_length, uint8_t bit_width, uint32_t handler, uint32_t event, DMAUsage hint); 00177 00178 /** The asynchronous IRQ handler 00179 * 00180 * Reads the received values out of the RX FIFO, writes values into the TX FIFO and checks for transfer termination 00181 * conditions, such as buffer overflows or transfer complete. 00182 * @param[in] obj The SPI object which holds the transfer information 00183 * @return event flags if a transfer termination condition was met or 0 otherwise. 00184 */ 00185 uint32_t spi_irq_handler_asynch(spi_t *obj); 00186 00187 /** Attempts to determine if the SPI peripheral is already in use. 00188 * 00189 * If a temporary DMA channel has been allocated, peripheral is in use. 00190 * If a permanent DMA channel has been allocated, check if the DMA channel is in use. If not, proceed as though no DMA 00191 * channel were allocated. 00192 * If no DMA channel is allocated, check whether tx and rx buffers have been assigned. For each assigned buffer, check 00193 * if the corresponding buffer position is less than the buffer length. If buffers do not indicate activity, check if 00194 * there are any bytes in the FIFOs. 00195 * @param[in] obj The SPI object to check for activity 00196 * @return non-zero if the SPI port is active or zero if it is not. 00197 */ 00198 uint8_t spi_active(spi_t *obj); 00199 00200 /** Abort an SPI transfer 00201 * 00202 * @param obj The SPI peripheral to stop 00203 */ 00204 void spi_abort_asynch(spi_t *obj); 00205 00206 00207 #endif 00208 00209 /**@}*/ 00210 00211 #ifdef __cplusplus 00212 } 00213 #endif // __cplusplus 00214 00215 #endif // SPI_DEVICE 00216 00217 #endif // MBED_SPI_API_H
Generated on Wed Jul 13 2022 04:55:01 by 1.7.2