Manuel Caballero / PCF85063

Tiny Real-Time Clock/calendar

PCF85063.h@1:161eb44e3909, 2019-02-19 (annotated)

Committer:
mcm
Date:
Tue Feb 19 19:43:22 2019 +0000
Revision:
1:161eb44e3909
Parent:
0:f539e9fc9e78
Child:
4:a5c06ac163f1
Header file was completed, it is ready to be tested.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mcm 1:161eb44e3909 1 /**
mcm 1:161eb44e3909 2 * @brief PCF85063.h
mcm 1:161eb44e3909 3 * @details Tiny Real-Time Clock/calendar.
mcm 1:161eb44e3909 4 * Header file.
mcm 1:161eb44e3909 5 *
mcm 1:161eb44e3909 6 *
mcm 1:161eb44e3909 7 * @return N/A
mcm 1:161eb44e3909 8 *
mcm 1:161eb44e3909 9 * @author Manuel Caballero
mcm 1:161eb44e3909 10 * @date 19/February/2019
mcm 1:161eb44e3909 11 * @version 19/February/2019 The ORIGIN
mcm 1:161eb44e3909 12 * @pre N/A.
mcm 1:161eb44e3909 13 * @warning N/A
mcm 1:161eb44e3909 14 * @pre This code belongs to Nimbus Centre ( http://www.nimbus.cit.ie ). All rights reserved.
mcm 1:161eb44e3909 15 */
mcm 1:161eb44e3909 16 #ifndef PCF85063_H
mcm 1:161eb44e3909 17 #define PCF85063_H
mcm 1:161eb44e3909 18
mcm 1:161eb44e3909 19 #include "mbed.h"
mcm 1:161eb44e3909 20
mcm 1:161eb44e3909 21
mcm 1:161eb44e3909 22 /**
mcm 1:161eb44e3909 23 Example:
mcm 1:161eb44e3909 24 @code
mcm 1:161eb44e3909 25
mcm 1:161eb44e3909 26 @endcode
mcm 1:161eb44e3909 27 */
mcm 1:161eb44e3909 28
mcm 1:161eb44e3909 29
mcm 1:161eb44e3909 30 /*!
mcm 1:161eb44e3909 31 Library for the PCF85063 Tiny Real-Time Clock/calendar.
mcm 1:161eb44e3909 32 */
mcm 1:161eb44e3909 33 class PCF85063
mcm 1:161eb44e3909 34 {
mcm 1:161eb44e3909 35 public:
mcm 1:161eb44e3909 36 /**
mcm 1:161eb44e3909 37 * @brief DEFAULT ADDRESS
mcm 1:161eb44e3909 38 */
mcm 1:161eb44e3909 39 typedef enum {
mcm 1:161eb44e3909 40 PCF85063_ADDRESS = ( 0b1010001 << 1U ) /*!< I2C slave address byte */
mcm 1:161eb44e3909 41 } PCF85063_address_t;
mcm 1:161eb44e3909 42
mcm 1:161eb44e3909 43
mcm 1:161eb44e3909 44
mcm 1:161eb44e3909 45 /**
mcm 1:161eb44e3909 46 * @brief REGISTERS ORGANIZATION
mcm 1:161eb44e3909 47 */
mcm 1:161eb44e3909 48 typedef enum {
mcm 1:161eb44e3909 49 /* CONTROL AND STATUS REGISTERS */
mcm 1:161eb44e3909 50 PCF85063_CONTROL_1 = 0x00, /*!< Control and status register 1 */
mcm 1:161eb44e3909 51 PCF85063_CONTROL_2 = 0x01, /*!< Control and status register 2 */
mcm 1:161eb44e3909 52 PCF85063_OFFSET = 0x02, /*!< Offset register */
mcm 1:161eb44e3909 53 PCF85063_RAM_BYTE = 0x03, /*!< RAM byte register */
mcm 1:161eb44e3909 54
mcm 1:161eb44e3909 55 /* TIME AND DATE REGISTERS */
mcm 1:161eb44e3909 56 PCF85063_SECONDS = 0x04, /*!< Seconds register */
mcm 1:161eb44e3909 57 PCF85063_MINUTES = 0x05, /*!< Minutes register */
mcm 1:161eb44e3909 58 PCF85063_HOURS = 0x06, /*!< Hours register */
mcm 1:161eb44e3909 59 PCF85063_DAYS = 0x07, /*!< Days register */
mcm 1:161eb44e3909 60 PCF85063_WEEKDAYS = 0x08, /*!< Weekdays register */
mcm 1:161eb44e3909 61 PCF85063_MONTHS = 0x09, /*!< Months register */
mcm 1:161eb44e3909 62 PCF85063_YEARS = 0x0A /*!< Years register */
mcm 1:161eb44e3909 63 } PCF85063_registers_organization_t;
mcm 1:161eb44e3909 64
mcm 1:161eb44e3909 65
mcm 1:161eb44e3909 66
mcm 1:161eb44e3909 67 /**
mcm 1:161eb44e3909 68 * @brief Register Control_1
mcm 1:161eb44e3909 69 */
mcm 1:161eb44e3909 70 /* EXT_TEST <7>: EXTERNAL CLOCK TEST MODE
mcm 1:161eb44e3909 71 * NOTE: N/A.
mcm 1:161eb44e3909 72 */
mcm 1:161eb44e3909 73 typedef enum {
mcm 1:161eb44e3909 74 CONTROL_1_EXT_TEST_MASK = ( 1U << 7U ), /*!< EXT_TEST mask */
mcm 1:161eb44e3909 75 CONTROL_1_EXT_TEST_NORMAL_MODE = ( 0U << 7U ), /*!< EXT_TEST: normal mode [ Default ] */
mcm 1:161eb44e3909 76 CONTROL_1_EXT_TEST_EXTERNAL_CLOCK_TEST_MODE = ( 1U << 7U ) /*!< EXT_TEST: external clock test mode */
mcm 1:161eb44e3909 77 } PCF85063_control_1_ext_test_t;
mcm 1:161eb44e3909 78
mcm 1:161eb44e3909 79
mcm 1:161eb44e3909 80
mcm 1:161eb44e3909 81 /* STOP <5>: STOP BIT
mcm 1:161eb44e3909 82 * NOTE: N/A.
mcm 1:161eb44e3909 83 */
mcm 1:161eb44e3909 84 typedef enum {
mcm 1:161eb44e3909 85 CONTROL_1_STOP_MASK = ( 1U << 5U ), /*!< STOP mask */
mcm 1:161eb44e3909 86 CONTROL_1_STOP_RTC_CLOCK_RUNS = ( 0U << 5U ), /*!< STOP: RTC clock runs [ Default ] */
mcm 1:161eb44e3909 87 CONTROL_1_STOP_RTC_CLOCK_STOPPED = ( 1U << 5U ) /*!< STOP: RTC clock is stopped */
mcm 1:161eb44e3909 88 } PCF85063_control_1_stop_t;
mcm 1:161eb44e3909 89
mcm 1:161eb44e3909 90
mcm 1:161eb44e3909 91
mcm 1:161eb44e3909 92 /* SR <4>: SOFTWARE RESET
mcm 1:161eb44e3909 93 * NOTE: N/A.
mcm 1:161eb44e3909 94 */
mcm 1:161eb44e3909 95 typedef enum {
mcm 1:161eb44e3909 96 CONTROL_1_SR_MASK = ( 1U << 4U ), /*!< SR mask */
mcm 1:161eb44e3909 97 CONTROL_1_SR_NO_SOFTWARE_RESET = ( 0U << 4U ), /*!< SR: no software reset [ Default ] */
mcm 1:161eb44e3909 98 CONTROL_1_SR_SOFTWARE_RESET = ( 1U << 4U ) /*!< SR: initiate software reset */
mcm 1:161eb44e3909 99 } PCF85063_control_1_sr_t;
mcm 1:161eb44e3909 100
mcm 1:161eb44e3909 101
mcm 1:161eb44e3909 102
mcm 1:161eb44e3909 103 /* CIE <2>: CORRECTION INTERRUPT ENABLE
mcm 1:161eb44e3909 104 * NOTE: N/A.
mcm 1:161eb44e3909 105 */
mcm 1:161eb44e3909 106 typedef enum {
mcm 1:161eb44e3909 107 CONTROL_1_CIE_MASK = ( 1U << 2U ), /*!< CIE mask */
mcm 1:161eb44e3909 108 CONTROL_1_CIE_NO_CORRECTION_INTERRUPT_GENERATED = ( 0U << 2U ), /*!< CIE: no correction interrupt generated [ Default ] */
mcm 1:161eb44e3909 109 CONTROL_1_CIE_INTERRUPT_PULSES_GENERATED = ( 1U << 2U ) /*!< CIE: interrupt pulses are generated at every correction cycle */
mcm 1:161eb44e3909 110 } PCF85063_control_1_cie_t;
mcm 1:161eb44e3909 111
mcm 1:161eb44e3909 112
mcm 1:161eb44e3909 113
mcm 1:161eb44e3909 114 /* 12_24 <1>: SOFTWARE RESET
mcm 1:161eb44e3909 115 * NOTE: N/A.
mcm 1:161eb44e3909 116 */
mcm 1:161eb44e3909 117 typedef enum {
mcm 1:161eb44e3909 118 CONTROL_1_12_24_MASK = ( 1U << 1U ), /*!< 12_24 mask */
mcm 1:161eb44e3909 119 CONTROL_1_12_24_24_HOUR_MODE = ( 0U << 1U ), /*!< 12_24: 24 hour mode is selected [ Default ] */
mcm 1:161eb44e3909 120 CONTROL_1_12_24_12_HOUR_MODE = ( 1U << 1U ) /*!< 12_24: 12 hour mode is selected */
mcm 1:161eb44e3909 121 } PCF85063_control_1_12_24_t;
mcm 1:161eb44e3909 122
mcm 1:161eb44e3909 123
mcm 1:161eb44e3909 124
mcm 1:161eb44e3909 125 /* CAP_SEL <0>: INTERNAL OSCILLATOR CAPACITOR SELECTION
mcm 1:161eb44e3909 126 * NOTE: N/A.
mcm 1:161eb44e3909 127 */
mcm 1:161eb44e3909 128 typedef enum {
mcm 1:161eb44e3909 129 CONTROL_1_CAP_SEL_MASK = ( 1U << 0U ), /*!< CAP_SEL mask */
mcm 1:161eb44e3909 130 CONTROL_1_CAP_SEL_7_PF = ( 0U << 0U ), /*!< CAP_SEL: 7 pF [ Default ] */
mcm 1:161eb44e3909 131 CONTROL_1_CAP_SEL_12_5_PF = ( 1U << 0U ) /*!< CAP_SEL: 12.5 pF */
mcm 1:161eb44e3909 132 } PCF85063_control_1_cap_sel_t;
mcm 1:161eb44e3909 133
mcm 1:161eb44e3909 134
mcm 1:161eb44e3909 135
mcm 1:161eb44e3909 136 /**
mcm 1:161eb44e3909 137 * @brief Register Control_2
mcm 1:161eb44e3909 138 */
mcm 1:161eb44e3909 139 /* MI <5>: MINUTE INTERRUPT
mcm 1:161eb44e3909 140 * NOTE: N/A.
mcm 1:161eb44e3909 141 */
mcm 1:161eb44e3909 142 typedef enum {
mcm 1:161eb44e3909 143 CONTROL_2_MI_MASK = ( 1U << 5U ), /*!< MI mask */
mcm 1:161eb44e3909 144 CONTROL_2_MI_MINUTE_INTERRUPT_DISABLED = ( 0U << 5U ), /*!< Minute interrupt disabled [ Default ] */
mcm 1:161eb44e3909 145 CONTROL_2_MI_MINUTE_INTERRUPT_ENABLED = ( 1U << 5U ) /*!< Minute interrupt enabled */
mcm 1:161eb44e3909 146 } PCF85063_control_2_mi_t;
mcm 1:161eb44e3909 147
mcm 1:161eb44e3909 148
mcm 1:161eb44e3909 149
mcm 1:161eb44e3909 150 /* HMI <4>: HALF MINUTE INTERRUPT
mcm 1:161eb44e3909 151 * NOTE: N/A.
mcm 1:161eb44e3909 152 */
mcm 1:161eb44e3909 153 typedef enum {
mcm 1:161eb44e3909 154 CONTROL_2_HMI_MASK = ( 1U << 4U ), /*!< HMI mask */
mcm 1:161eb44e3909 155 CONTROL_2_HMI_HALF_MINUTE_INTERRUPT_DISABLED = ( 0U << 4U ), /*!< Half Minute interrupt disabled [ Default ] */
mcm 1:161eb44e3909 156 CONTROL_2_HMI_HALF_MINUTE_INTERRUPT_ENABLED = ( 1U << 4U ) /*!< Half Minute interrupt enabled */
mcm 1:161eb44e3909 157 } PCF85063_control_2_hmi_t;
mcm 1:161eb44e3909 158
mcm 1:161eb44e3909 159
mcm 1:161eb44e3909 160
mcm 1:161eb44e3909 161 /* TF <3>: TIMER FLAG
mcm 1:161eb44e3909 162 * NOTE: N/A.
mcm 1:161eb44e3909 163 */
mcm 1:161eb44e3909 164 typedef enum {
mcm 1:161eb44e3909 165 CONTROL_2_TF_MASK = ( 1U << 3U ), /*!< TF mask */
mcm 1:161eb44e3909 166 CONTROL_2_TF_TIMER_INTERRUPT_NOT_GENERATED = ( 0U << 3U ), /*!< No Timer interrupt generated [ Default ] */
mcm 1:161eb44e3909 167 CONTROL_2_TF_TIMER_INTERRUPT_GENERATED = ( 1U << 3U ) /*!< Timer interrupt generated */
mcm 1:161eb44e3909 168 } PCF85063_control_2_tf_t;
mcm 1:161eb44e3909 169
mcm 1:161eb44e3909 170
mcm 1:161eb44e3909 171
mcm 1:161eb44e3909 172 /* COF <2:0>: CLKOUT CONTROL
mcm 1:161eb44e3909 173 * NOTE: N/A.
mcm 1:161eb44e3909 174 */
mcm 1:161eb44e3909 175 typedef enum {
mcm 1:161eb44e3909 176 CONTROL_2_COF_MASK = ( 0b111 << 0U ), /*!< COF mask */
mcm 1:161eb44e3909 177 CONTROL_2_COF_CLKOUT_32768_HZ = ( 0b000 << 0U ), /*!< CLKOUT: 32768 Hz [ Default ] */
mcm 1:161eb44e3909 178 CONTROL_2_COF_CLKOUT_16384_HZ = ( 0b001 << 0U ), /*!< CLKOUT: 16384 Hz */
mcm 1:161eb44e3909 179 CONTROL_2_COF_CLKOUT_8192_HZ = ( 0b010 << 0U ), /*!< CLKOUT: 8192 Hz */
mcm 1:161eb44e3909 180 CONTROL_2_COF_CLKOUT_4096_HZ = ( 0b011 << 0U ), /*!< CLKOUT: 4096 Hz */
mcm 1:161eb44e3909 181 CONTROL_2_COF_CLKOUT_2048_HZ = ( 0b100 << 0U ), /*!< CLKOUT: 2048 Hz */
mcm 1:161eb44e3909 182 CONTROL_2_COF_CLKOUT_1024_HZ = ( 0b101 << 0U ), /*!< CLKOUT: 1024 Hz */
mcm 1:161eb44e3909 183 CONTROL_2_COF_CLKOUT_1_HZ = ( 0b110 << 0U ), /*!< CLKOUT: 1 Hz */
mcm 1:161eb44e3909 184 CONTROL_2_COF_CLKOUT_LOW = ( 0b111 << 0U ) /*!< CLKOUT: LOW */
mcm 1:161eb44e3909 185 } PCF85063_control_2_cof_t;
mcm 1:161eb44e3909 186
mcm 1:161eb44e3909 187
mcm 1:161eb44e3909 188
mcm 1:161eb44e3909 189 /**
mcm 1:161eb44e3909 190 * @brief Register Offset
mcm 1:161eb44e3909 191 */
mcm 1:161eb44e3909 192 /* MODE <7>: OFFSET MODE
mcm 1:161eb44e3909 193 * NOTE: N/A.
mcm 1:161eb44e3909 194 */
mcm 1:161eb44e3909 195 typedef enum {
mcm 1:161eb44e3909 196 OFFSET_MODE_MASK = ( 1U << 7U ), /*!< MODE mask */
mcm 1:161eb44e3909 197 OFFSET_MODE_NORMAL_MODE = ( 0U << 7U ), /*!< Normal mode: offset is made once every two hours[ Default ] */
mcm 1:161eb44e3909 198 OFFSET_MODE_COURSE_MODE = ( 1U << 7U ) /*!< Course mode: offset is made every 4 minutes */
mcm 1:161eb44e3909 199 } PCF85063_offset_mode_t;
mcm 1:161eb44e3909 200
mcm 1:161eb44e3909 201
mcm 1:161eb44e3909 202
mcm 1:161eb44e3909 203 /**
mcm 1:161eb44e3909 204 * @brief Register RAM_byte
mcm 1:161eb44e3909 205 */
mcm 1:161eb44e3909 206 /* B <7:0>: RAM CONTENT
mcm 1:161eb44e3909 207 * NOTE: N/A.
mcm 1:161eb44e3909 208 */
mcm 1:161eb44e3909 209 typedef enum {
mcm 1:161eb44e3909 210 RAM_BYTE_B_MASK = 0xFF /*!< RAM_byte mask */
mcm 1:161eb44e3909 211 } PCF85063_ram_byte_b_t;
mcm 1:161eb44e3909 212
mcm 1:161eb44e3909 213
mcm 1:161eb44e3909 214
mcm 1:161eb44e3909 215 /**
mcm 1:161eb44e3909 216 * @brief Register Seconds
mcm 1:161eb44e3909 217 */
mcm 1:161eb44e3909 218 /* OS <7>: OSCILLATOR STOP
mcm 1:161eb44e3909 219 * NOTE: N/A.
mcm 1:161eb44e3909 220 */
mcm 1:161eb44e3909 221 typedef enum {
mcm 1:161eb44e3909 222 SECONDS_OS_MASK = ( 1U << 7U ), /*!< OS mask */
mcm 1:161eb44e3909 223 SECONDS_OS_CLOCK_INTEGRITY_IS_GUARANTEED = ( 0U << 7U ), /*!< Clock integrity is guaranteed */
mcm 1:161eb44e3909 224 SECONDS_OS_CLOCK_INTEGRITY_NOT_GUARANTEED = ( 1U << 7U ) /*!< Clock integrity is not guaranteed, oscillator has stopped or has been interrupted [ Default ] */
mcm 1:161eb44e3909 225 } PCF85063_seconds_os_t;
mcm 1:161eb44e3909 226
mcm 1:161eb44e3909 227
mcm 1:161eb44e3909 228
mcm 1:161eb44e3909 229 /* SECONDS, TEN'S PLACE <6:4>: ACTUAL SECONDS, TEN'S PLACE
mcm 1:161eb44e3909 230 * NOTE: CODED IN BCD FORMAT.
mcm 1:161eb44e3909 231 */
mcm 1:161eb44e3909 232 typedef enum {
mcm 1:161eb44e3909 233 SECONDS_SECONDS_TEN_PLACE_MASK = ( 0b111 << 4U ) /*!< SECONDS TEN'S PLACE mask */
mcm 1:161eb44e3909 234 } PCF85063_seconds_ten_place_t;
mcm 1:161eb44e3909 235
mcm 1:161eb44e3909 236
mcm 1:161eb44e3909 237
mcm 1:161eb44e3909 238 /* SECONDS, UNIT PLACE <3:0>: ACTUAL SECONDS, UNIT PLACE
mcm 1:161eb44e3909 239 * NOTE: CODED IN BCD FORMAT.
mcm 1:161eb44e3909 240 */
mcm 1:161eb44e3909 241 typedef enum {
mcm 1:161eb44e3909 242 SECONDS_SECONDS_UNIT_PLACE_MASK = ( 0b1111 << 0U ) /*!< SECONDS UNIT PLACE mask */
mcm 1:161eb44e3909 243 } PCF85063_seconds_unit_place_t;
mcm 1:161eb44e3909 244
mcm 1:161eb44e3909 245
mcm 1:161eb44e3909 246
mcm 1:161eb44e3909 247 /**
mcm 1:161eb44e3909 248 * @brief Register Minutes
mcm 1:161eb44e3909 249 */
mcm 1:161eb44e3909 250 /* MINUTES, TEN'S PLACE <6:4>: ACTUAL MINUTES, TEN'S PLACE
mcm 1:161eb44e3909 251 * NOTE: CODED IN BCD FORMAT.
mcm 1:161eb44e3909 252 */
mcm 1:161eb44e3909 253 typedef enum {
mcm 1:161eb44e3909 254 MINUTES_MINUTES_TEN_PLACE_MASK = ( 0b111 << 4U ) /*!< MINUTES TEN'S PLACE mask */
mcm 1:161eb44e3909 255 } PCF85063_minutes_ten_place_t;
mcm 1:161eb44e3909 256
mcm 1:161eb44e3909 257
mcm 1:161eb44e3909 258
mcm 1:161eb44e3909 259 /* MINUTES, UNIT PLACE <3:0>: ACTUAL MINUTES, UNIT PLACE
mcm 1:161eb44e3909 260 * NOTE: CODED IN BCD FORMAT.
mcm 1:161eb44e3909 261 */
mcm 1:161eb44e3909 262 typedef enum {
mcm 1:161eb44e3909 263 MINUTES_MINUTES_UNIT_PLACE_MASK = ( 0b1111 << 0U ) /*!< MINUTES UNIT PLACE mask */
mcm 1:161eb44e3909 264 } PCF85063_minutes_unit_place_t;
mcm 1:161eb44e3909 265
mcm 1:161eb44e3909 266
mcm 1:161eb44e3909 267
mcm 1:161eb44e3909 268 /**
mcm 1:161eb44e3909 269 * @brief Register HOURS
mcm 1:161eb44e3909 270 */
mcm 1:161eb44e3909 271 /* AMPM <5>: AM/PM INDICATOR
mcm 1:161eb44e3909 272 * NOTE: ONLY FOR 12-HOUR MODE.
mcm 1:161eb44e3909 273 */
mcm 1:161eb44e3909 274 typedef enum {
mcm 1:161eb44e3909 275 HOURS_AMPM_MASK = ( 1U << 5U ), /*!< AMPM mask */
mcm 1:161eb44e3909 276 HOURS_AMPM_AM = ( 0U << 5U ), /*!< AMPM: AM mode */
mcm 1:161eb44e3909 277 HOURS_AMPM_PM = ( 1U << 5U ) /*!< AMPM: PM mode */
mcm 1:161eb44e3909 278 } PCF85063_hours_ampm_t;
mcm 1:161eb44e3909 279
mcm 1:161eb44e3909 280
mcm 1:161eb44e3909 281
mcm 1:161eb44e3909 282 /* HOURS, TEN'S PLACE <4>: ACTUAL HOURS, TEN'S PLACE
mcm 1:161eb44e3909 283 * NOTE: ONLY FOR 12-HOUR MODE, CODED IN BCD FORMAT.
mcm 1:161eb44e3909 284 */
mcm 1:161eb44e3909 285 typedef enum {
mcm 1:161eb44e3909 286 HOURS_12_HOUR_MODE_TEN_PLACE_MASK = ( 1U << 4U ) /*!< Hours TEN'S PLACE mask */
mcm 1:161eb44e3909 287 } PCF85063_12_hour_mode_ten_place_t;
mcm 1:161eb44e3909 288
mcm 1:161eb44e3909 289
mcm 1:161eb44e3909 290
mcm 1:161eb44e3909 291 /* HOURS, TEN'S PLACE <5:4>: ACTUAL HOURS, TEN'S PLACE
mcm 1:161eb44e3909 292 * NOTE: ONLY FOR 24-HOUR MODE, CODED IN BCD FORMAT.
mcm 1:161eb44e3909 293 */
mcm 1:161eb44e3909 294 typedef enum {
mcm 1:161eb44e3909 295 HOURS_24_HOUR_MODE_TEN_PLACE_MASK = ( 0b11 << 4U ) /*!< Hours TEN'S PLACE mask */
mcm 1:161eb44e3909 296 } PCF85063_24_hour_mode_ten_place_t;
mcm 1:161eb44e3909 297
mcm 1:161eb44e3909 298
mcm 1:161eb44e3909 299
mcm 1:161eb44e3909 300 /* HOURS, UNIT PLACE <3:0>: ACTUAL HOURS, UNIT PLACE
mcm 1:161eb44e3909 301 * NOTE: CODED IN BCD FORMAT.
mcm 1:161eb44e3909 302 */
mcm 1:161eb44e3909 303 typedef enum {
mcm 1:161eb44e3909 304 HOURS_HOURS_UNIT_PLACE_MASK = ( 0b1111 << 0U ) /*!< HOURS UNIT PLACE mask */
mcm 1:161eb44e3909 305 } PCF85063_hours_unit_place_t;
mcm 1:161eb44e3909 306
mcm 1:161eb44e3909 307
mcm 1:161eb44e3909 308
mcm 1:161eb44e3909 309 /**
mcm 1:161eb44e3909 310 * @brief Register Days
mcm 1:161eb44e3909 311 */
mcm 1:161eb44e3909 312 /* DAYS, TEN'S PLACE <5:4>: ACTUAL DAYS, TEN'S PLACE
mcm 1:161eb44e3909 313 * NOTE: CODED IN BCD FORMAT.
mcm 1:161eb44e3909 314 */
mcm 1:161eb44e3909 315 typedef enum {
mcm 1:161eb44e3909 316 DAYS_DAYS_TEN_PLACE_MASK = ( 0b11 << 4U ) /*!< DAYS TEN'S PLACE mask */
mcm 1:161eb44e3909 317 } PCF85063_days_ten_place_t;
mcm 1:161eb44e3909 318
mcm 1:161eb44e3909 319
mcm 1:161eb44e3909 320
mcm 1:161eb44e3909 321 /* DAYS, UNIT PLACE <3:0>: ACTUAL DAYS, UNIT PLACE
mcm 1:161eb44e3909 322 * NOTE: CODED IN BCD FORMAT.
mcm 1:161eb44e3909 323 */
mcm 1:161eb44e3909 324 typedef enum {
mcm 1:161eb44e3909 325 DAYS_DAYS_UNIT_PLACE_MASK = ( 0b1111 << 0U ) /*!< DAYS UNIT PLACE mask */
mcm 1:161eb44e3909 326 } PCF85063_days_unit_place_t;
mcm 1:161eb44e3909 327
mcm 1:161eb44e3909 328
mcm 1:161eb44e3909 329
mcm 1:161eb44e3909 330 /**
mcm 1:161eb44e3909 331 * @brief Register Weekdays
mcm 1:161eb44e3909 332 */
mcm 1:161eb44e3909 333 /* WEEKDAYS <2:0>: ACTUAL WEEKDAY
mcm 1:161eb44e3909 334 * NOTE: N/A.
mcm 1:161eb44e3909 335 */
mcm 1:161eb44e3909 336 typedef enum {
mcm 1:161eb44e3909 337 WEEKDAYS_WEEKDAYS_MASK = ( 0b111 << 0U ), /*!< WEEKDAYS mask */
mcm 1:161eb44e3909 338 WEEKDAYS_WEEKDAYS_SUNDAY = ( 0b000 << 0U ), /*!< WEEKDAYS Sunday */
mcm 1:161eb44e3909 339 WEEKDAYS_WEEKDAYS_MONDAY = ( 0b001 << 0U ), /*!< WEEKDAYS Monday */
mcm 1:161eb44e3909 340 WEEKDAYS_WEEKDAYS_TUESDAY = ( 0b010 << 0U ), /*!< WEEKDAYS Tuesday */
mcm 1:161eb44e3909 341 WEEKDAYS_WEEKDAYS_WEDNESDAY = ( 0b011 << 0U ), /*!< WEEKDAYS Wednesday */
mcm 1:161eb44e3909 342 WEEKDAYS_WEEKDAYS_THURSDAY = ( 0b100 << 0U ), /*!< WEEKDAYS Thursday */
mcm 1:161eb44e3909 343 WEEKDAYS_WEEKDAYS_FRIDAY = ( 0b101 << 0U ), /*!< WEEKDAYS Friday */
mcm 1:161eb44e3909 344 WEEKDAYS_WEEKDAYS_SATURDAY = ( 0b111 << 0U ) /*!< WEEKDAYS Saturday [ Default ] */
mcm 1:161eb44e3909 345 } PCF85063_weekdays_weekdays_t;
mcm 1:161eb44e3909 346
mcm 1:161eb44e3909 347
mcm 1:161eb44e3909 348
mcm 1:161eb44e3909 349 /**
mcm 1:161eb44e3909 350 * @brief Register Months
mcm 1:161eb44e3909 351 */
mcm 1:161eb44e3909 352 /* MONTHS <4:0>: ACTUAL MONTH
mcm 1:161eb44e3909 353 * NOTE: CODED IN BCD FORMAT.
mcm 1:161eb44e3909 354 */
mcm 1:161eb44e3909 355 typedef enum {
mcm 1:161eb44e3909 356 MONTHS_MONTHS_MASK = ( 0b11111 << 0U ), /*!< MONTHS mask */
mcm 1:161eb44e3909 357 MONTHS_MONTHS_JANUARY = ( 0b00001 << 0U ), /*!< MONTHS January [ Default ] */
mcm 1:161eb44e3909 358 MONTHS_MONTHS_FEBRUARY = ( 0b00010 << 0U ), /*!< MONTHS February */
mcm 1:161eb44e3909 359 MONTHS_MONTHS_MARCH = ( 0b00011 << 0U ), /*!< MONTHS March */
mcm 1:161eb44e3909 360 MONTHS_MONTHS_APRIL = ( 0b00100 << 0U ), /*!< MONTHS April */
mcm 1:161eb44e3909 361 MONTHS_MONTHS_MAY = ( 0b00101 << 0U ), /*!< MONTHS May */
mcm 1:161eb44e3909 362 MONTHS_MONTHS_JUNE = ( 0b00110 << 0U ), /*!< MONTHS June */
mcm 1:161eb44e3909 363 MONTHS_MONTHS_JULY = ( 0b00111 << 0U ), /*!< MONTHS July */
mcm 1:161eb44e3909 364 MONTHS_MONTHS_AUGUST = ( 0b01000 << 0U ), /*!< MONTHS August */
mcm 1:161eb44e3909 365 MONTHS_MONTHS_SEPTEMBER = ( 0b01001 << 0U ), /*!< MONTHS September */
mcm 1:161eb44e3909 366 MONTHS_MONTHS_OCTOBER = ( 0b10000 << 0U ), /*!< MONTHS October */
mcm 1:161eb44e3909 367 MONTHS_MONTHS_NOVEMBER = ( 0b10001 << 0U ), /*!< MONTHS November */
mcm 1:161eb44e3909 368 MONTHS_MONTHS_DECEMBER = ( 0b10010 << 0U ) /*!< MONTHS December */
mcm 1:161eb44e3909 369 } PCF85063_months_months_t;
mcm 1:161eb44e3909 370
mcm 1:161eb44e3909 371
mcm 1:161eb44e3909 372
mcm 1:161eb44e3909 373 /**
mcm 1:161eb44e3909 374 * @brief Register Years
mcm 1:161eb44e3909 375 */
mcm 1:161eb44e3909 376 /* YEARS, TEN'S PLACE <7:4>: ACTUAL YEARS, TEN'S PLACE
mcm 1:161eb44e3909 377 * NOTE: CODED IN BCD FORMAT.
mcm 1:161eb44e3909 378 */
mcm 1:161eb44e3909 379 typedef enum {
mcm 1:161eb44e3909 380 YEARS_YEARS_TEN_PLACE_MASK = ( 0b1111 << 4U ) /*!< YEARS TEN'S PLACE mask */
mcm 1:161eb44e3909 381 } PCF85063_years_ten_place_t;
mcm 1:161eb44e3909 382
mcm 1:161eb44e3909 383
mcm 1:161eb44e3909 384
mcm 1:161eb44e3909 385 /* YEARS, UNIT PLACE <3:0>: ACTUAL YEARS, UNIT PLACE
mcm 1:161eb44e3909 386 * NOTE: CODED IN BCD FORMAT.
mcm 1:161eb44e3909 387 */
mcm 1:161eb44e3909 388 typedef enum {
mcm 1:161eb44e3909 389 YEARS_YEARS_UNIT_PLACE_MASK = ( 0b1111 << 0U ) /*!< YEARS UNIT PLACE mask */
mcm 1:161eb44e3909 390 } PCF85063_years_unit_place_t;
mcm 1:161eb44e3909 391
mcm 1:161eb44e3909 392
mcm 1:161eb44e3909 393
mcm 1:161eb44e3909 394
mcm 1:161eb44e3909 395
mcm 1:161eb44e3909 396 #ifndef PCF85063_VECTOR_STRUCT_H
mcm 1:161eb44e3909 397 #define PCF85063_VECTOR_STRUCT_H
mcm 1:161eb44e3909 398 typedef struct {
mcm 1:161eb44e3909 399 PCF85063_control_1_12_24_t Time12H_24HMode; /*!< Time mode: 12-hour or 24-hour mode */
mcm 1:161eb44e3909 400 PCF85063_hours_ampm_t TimeAM_PM_Mode; /*!< AM/PM mode ( only for 12-hour mode ) */
mcm 1:161eb44e3909 401
mcm 1:161eb44e3909 402 uint32_t BCDtime; /*!< Time ( HHMMSS ) in BCD format */
mcm 1:161eb44e3909 403 uint8_t BCDday; /*!< Day number in BCD format */
mcm 1:161eb44e3909 404 PCF85063_weekdays_weekdays_t weekday; /*!< Weekday */
mcm 1:161eb44e3909 405 PCF85063_months_months_t BCDmonth; /*!< Month in BCD format */
mcm 1:161eb44e3909 406 uint8_t BCDyear; /*!< Year in BCD format */
mcm 1:161eb44e3909 407
mcm 1:161eb44e3909 408 int8_t ramByte; /*!< RAM byte */
mcm 1:161eb44e3909 409 PCF85063_seconds_os_t os; /*!< Oscillator flag */
mcm 1:161eb44e3909 410 } PCF85063_data_t;
mcm 1:161eb44e3909 411 #endif
mcm 1:161eb44e3909 412
mcm 1:161eb44e3909 413
mcm 1:161eb44e3909 414 /**
mcm 1:161eb44e3909 415 * @brief INTERNAL CONSTANTS
mcm 1:161eb44e3909 416 */
mcm 1:161eb44e3909 417 typedef enum {
mcm 1:161eb44e3909 418 PCF85063_SUCCESS = 0,
mcm 1:161eb44e3909 419 PCF85063_FAILURE = 1,
mcm 1:161eb44e3909 420 I2C_SUCCESS = 0 /*!< I2C communication was fine */
mcm 1:161eb44e3909 421 } PCF85063_status_t;
mcm 1:161eb44e3909 422
mcm 1:161eb44e3909 423
mcm 1:161eb44e3909 424
mcm 1:161eb44e3909 425
mcm 1:161eb44e3909 426 /** Create an PCF85063 object connected to the specified I2C pins.
mcm 1:161eb44e3909 427 *
mcm 1:161eb44e3909 428 * @param sda I2C data pin
mcm 1:161eb44e3909 429 * @param scl I2C clock pin
mcm 1:161eb44e3909 430 * @param addr I2C slave address
mcm 1:161eb44e3909 431 * @param freq I2C frequency
mcm 1:161eb44e3909 432 */
mcm 1:161eb44e3909 433 PCF85063 ( PinName sda, PinName scl, uint32_t addr, uint32_t freq );
mcm 1:161eb44e3909 434
mcm 1:161eb44e3909 435 /** Delete PCF85063 object.
mcm 1:161eb44e3909 436 */
mcm 1:161eb44e3909 437 ~PCF85063();
mcm 1:161eb44e3909 438
mcm 1:161eb44e3909 439 /** It sets the external clock test mode.
mcm 1:161eb44e3909 440 */
mcm 1:161eb44e3909 441 PCF85063_status_t PCF85063_SetTestMode ( PCF85063_control_1_ext_test_t myEXT_TEST );
mcm 1:161eb44e3909 442
mcm 1:161eb44e3909 443 /** It sets the RTC clock mode.
mcm 1:161eb44e3909 444 */
mcm 1:161eb44e3909 445 PCF85063_status_t PCF85063_SetRTCMode ( PCF85063_control_1_stop_t mySTOP );
mcm 1:161eb44e3909 446
mcm 1:161eb44e3909 447 /** It performs a software reset.
mcm 1:161eb44e3909 448 */
mcm 1:161eb44e3909 449 PCF85063_status_t PCF85063_SoftwareReset ( void );
mcm 1:161eb44e3909 450
mcm 1:161eb44e3909 451 /** It sets the correction interrupt mode.
mcm 1:161eb44e3909 452 */
mcm 1:161eb44e3909 453 PCF85063_status_t PCF85063_SetCorrectionInterruptMode ( PCF85063_control_1_cie_t myCIE );
mcm 1:161eb44e3909 454
mcm 1:161eb44e3909 455 /** It sets 12 or 24 hour mode.
mcm 1:161eb44e3909 456 */
mcm 1:161eb44e3909 457 PCF85063_status_t PCF85063_Set12_24_HourMode ( PCF85063_data_t my12_24 );
mcm 1:161eb44e3909 458
mcm 1:161eb44e3909 459 /** It sets the internal oscillator capacitor.
mcm 1:161eb44e3909 460 */
mcm 1:161eb44e3909 461 PCF85063_status_t PCF85063_SetInternalOscillatorCapacitor ( PCF85063_control_1_cap_sel_t myCAP_SEL );
mcm 1:161eb44e3909 462
mcm 1:161eb44e3909 463 /** It enables/disables minute/half minute interrupt.
mcm 1:161eb44e3909 464 */
mcm 1:161eb44e3909 465 PCF85063_status_t PCF85063_SetMinuteInterrupts ( PCF85063_control_2_mi_t myMI, PCF85063_control_2_hmi_t myHMI );
mcm 1:161eb44e3909 466
mcm 1:161eb44e3909 467 /** It gets the status of the timer flag.
mcm 1:161eb44e3909 468 */
mcm 1:161eb44e3909 469 PCF85063_status_t PCF85063_GetTimerFlag ( PCF85063_control_2_tf_t* myTF );
mcm 1:161eb44e3909 470
mcm 1:161eb44e3909 471 /** It resets the status of the timer flag.
mcm 1:161eb44e3909 472 */
mcm 1:161eb44e3909 473 PCF85063_status_t PCF85063_ClearTimerFlag ( void );
mcm 1:161eb44e3909 474
mcm 1:161eb44e3909 475 /** It sets the clock output frequency.
mcm 1:161eb44e3909 476 */
mcm 1:161eb44e3909 477 PCF85063_status_t PCF85063_SetClockOutputFrequency ( PCF85063_control_2_cof_t myCOF );
mcm 1:161eb44e3909 478
mcm 1:161eb44e3909 479 /** It sets the offset.
mcm 1:161eb44e3909 480 */
mcm 1:161eb44e3909 481 PCF85063_status_t PCF85063_SetOffset ( PCF85063_offset_mode_t myMODE, int8_t myOFFSET );
mcm 1:161eb44e3909 482
mcm 1:161eb44e3909 483 /** It writes into the RAM byte register.
mcm 1:161eb44e3909 484 */
mcm 1:161eb44e3909 485 PCF85063_status_t PCF85063_WriteByteRAM ( PCF85063_data_t myData );
mcm 1:161eb44e3909 486
mcm 1:161eb44e3909 487 /** It reads the RAM byte register.
mcm 1:161eb44e3909 488 */
mcm 1:161eb44e3909 489 PCF85063_status_t PCF85063_ReadByteRAM ( PCF85063_data_t* myData );
mcm 1:161eb44e3909 490
mcm 1:161eb44e3909 491 /** It checks oscillator clock integrity flag.
mcm 1:161eb44e3909 492 */
mcm 1:161eb44e3909 493 PCF85063_status_t PCF85063_CheckOscillatorClockIntegrityFlag ( PCF85063_data_t* myOS );
mcm 1:161eb44e3909 494
mcm 1:161eb44e3909 495 /** It clears oscillator clock integrity flag.
mcm 1:161eb44e3909 496 */
mcm 1:161eb44e3909 497 PCF85063_status_t PCF85063_ClearOscillatorClockIntegrityFlag ( void );
mcm 1:161eb44e3909 498
mcm 1:161eb44e3909 499 /** It sets the AM/PM indicator ( only for 12-hour mode ).
mcm 1:161eb44e3909 500 */
mcm 1:161eb44e3909 501 PCF85063_status_t PCF85063_SetAM_PM_Indicator ( PCF85063_data_t myAM_PM_Indicator );
mcm 1:161eb44e3909 502
mcm 1:161eb44e3909 503 /** It gets the AM/PM indicator ( only for 12-hour mode ).
mcm 1:161eb44e3909 504 */
mcm 1:161eb44e3909 505 PCF85063_status_t PCF85063_GetAM_PM_Indicator ( PCF85063_data_t* myAM_PM_Indicator );
mcm 1:161eb44e3909 506
mcm 1:161eb44e3909 507 /** It gets the day ( BCD format ).
mcm 1:161eb44e3909 508 */
mcm 1:161eb44e3909 509 PCF85063_status_t PCF85063_GetDay ( PCF85063_data_t* myActualDay );
mcm 1:161eb44e3909 510
mcm 1:161eb44e3909 511 /** It sets the day ( BCD format ).
mcm 1:161eb44e3909 512 */
mcm 1:161eb44e3909 513 PCF85063_status_t PCF85063_SetDay ( PCF85063_data_t myNewDay );
mcm 1:161eb44e3909 514
mcm 1:161eb44e3909 515 /** It gets the weekday.
mcm 1:161eb44e3909 516 */
mcm 1:161eb44e3909 517 PCF85063_status_t PCF85063_GetWeekday ( PCF85063_data_t* myActualWeekday );
mcm 1:161eb44e3909 518
mcm 1:161eb44e3909 519 /** It sets the weekday.
mcm 1:161eb44e3909 520 */
mcm 1:161eb44e3909 521 PCF85063_status_t PCF85063_SetWeekday ( PCF85063_data_t myNewWeekday );
mcm 1:161eb44e3909 522
mcm 1:161eb44e3909 523 /** It gets the month ( BCD format ).
mcm 1:161eb44e3909 524 */
mcm 1:161eb44e3909 525 PCF85063_status_t PCF85063_GetMonth ( PCF85063_data_t* myActualMonth );
mcm 1:161eb44e3909 526
mcm 1:161eb44e3909 527 /** It sets the month ( BCD format ).
mcm 1:161eb44e3909 528 */
mcm 1:161eb44e3909 529 PCF85063_status_t PCF85063_SetMonth ( PCF85063_data_t myNewMonth );
mcm 1:161eb44e3909 530
mcm 1:161eb44e3909 531 /** It gets the time ( BCD format ).
mcm 1:161eb44e3909 532 */
mcm 1:161eb44e3909 533 PCF85063_status_t PCF85063_GetTime ( PCF85063_data_t* myActualTime );
mcm 1:161eb44e3909 534
mcm 1:161eb44e3909 535 /** It sets the time ( BCD format ).
mcm 1:161eb44e3909 536 */
mcm 1:161eb44e3909 537 PCF85063_status_t PCF85063_SetTime ( PCF85063_data_t myNewTime );
mcm 1:161eb44e3909 538
mcm 1:161eb44e3909 539 /** It gets the year ( BCD format ).
mcm 1:161eb44e3909 540 */
mcm 1:161eb44e3909 541 PCF85063_status_t PCF85063_GetYear ( PCF85063_data_t* myActualYear );
mcm 1:161eb44e3909 542
mcm 1:161eb44e3909 543 /** It sets the year ( BCD format ).
mcm 1:161eb44e3909 544 */
mcm 1:161eb44e3909 545 PCF85063_status_t PCF85063_SetYear ( PCF85063_data_t myNewYear );
mcm 1:161eb44e3909 546
mcm 1:161eb44e3909 547
mcm 1:161eb44e3909 548
mcm 1:161eb44e3909 549
mcm 1:161eb44e3909 550 private:
mcm 1:161eb44e3909 551 I2C _i2c;
mcm 1:161eb44e3909 552 uint32_t _PCF85063_Addr;
mcm 1:161eb44e3909 553 };
mcm 1:161eb44e3909 554
mcm 1:161eb44e3909 555 #endif