Manuel Caballero / MCP9808

±0.5°C Maximum Accuracy Digital Temperature Sensor

Dependents:   mbed-os5-F303-18650-Manager-tp4056

MCP9808.h@1:3aa7e66c9a5b, 2019-04-25 (annotated)

Committer:
mcm
Date:
Thu Apr 25 10:27:33 2019 +0000
Revision:
1:3aa7e66c9a5b
Parent:
0:6a0fe4376e0f
Child:
2:da266f1b2273
Header file is ready to be tested.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mcm 1:3aa7e66c9a5b 1 /**
mcm 1:3aa7e66c9a5b 2 * @brief MCP9808.h
mcm 1:3aa7e66c9a5b 3 * @details ±0.5°C Maximum Accuracy Digital Temperature Sensor.
mcm 1:3aa7e66c9a5b 4 * Header file.
mcm 1:3aa7e66c9a5b 5 *
mcm 1:3aa7e66c9a5b 6 *
mcm 1:3aa7e66c9a5b 7 * @return N/A
mcm 1:3aa7e66c9a5b 8 *
mcm 1:3aa7e66c9a5b 9 * @author Manuel Caballero
mcm 1:3aa7e66c9a5b 10 * @date 15/April/2019
mcm 1:3aa7e66c9a5b 11 * @version 15/April/2019 The ORIGIN
mcm 1:3aa7e66c9a5b 12 * @pre N/A.
mcm 1:3aa7e66c9a5b 13 * @warning N/A
mcm 1:3aa7e66c9a5b 14 * @pre This code belongs to AqueronteBlog ( http://unbarquero.blogspot.com ). All rights reserved.
mcm 1:3aa7e66c9a5b 15 */
mcm 1:3aa7e66c9a5b 16 #ifndef MCP9808_H
mcm 1:3aa7e66c9a5b 17 #define MCP9808_H
mcm 1:3aa7e66c9a5b 18
mcm 1:3aa7e66c9a5b 19 #include "mbed.h"
mcm 1:3aa7e66c9a5b 20
mcm 1:3aa7e66c9a5b 21
mcm 1:3aa7e66c9a5b 22 /**
mcm 1:3aa7e66c9a5b 23 Example:
mcm 1:3aa7e66c9a5b 24 @code
mcm 1:3aa7e66c9a5b 25 [todo]
mcm 1:3aa7e66c9a5b 26 @endcode
mcm 1:3aa7e66c9a5b 27 */
mcm 1:3aa7e66c9a5b 28
mcm 1:3aa7e66c9a5b 29
mcm 1:3aa7e66c9a5b 30 /*!
mcm 1:3aa7e66c9a5b 31 Library for the MCP9808 ±0.5°C Maximum Accuracy Digital Temperature Sensor.
mcm 1:3aa7e66c9a5b 32 */
mcm 1:3aa7e66c9a5b 33 class MCP9808
mcm 1:3aa7e66c9a5b 34 {
mcm 1:3aa7e66c9a5b 35 public:
mcm 1:3aa7e66c9a5b 36 /**
mcm 1:3aa7e66c9a5b 37 * @brief DEFAULT ADDRESSES
mcm 1:3aa7e66c9a5b 38 */
mcm 1:3aa7e66c9a5b 39 typedef enum {
mcm 1:3aa7e66c9a5b 40 MCP9808_ADDRESS_0 = ( 0b0011000 << 1U ), /*!< I2C slave address byte: A2A1A0: 000 */
mcm 1:3aa7e66c9a5b 41 MCP9808_ADDRESS_1 = ( 0b0011001 << 1U ), /*!< I2C slave address byte: A2A1A0: 001 */
mcm 1:3aa7e66c9a5b 42 MCP9808_ADDRESS_2 = ( 0b0011010 << 1U ), /*!< I2C slave address byte: A2A1A0: 010 */
mcm 1:3aa7e66c9a5b 43 MCP9808_ADDRESS_3 = ( 0b0011011 << 1U ), /*!< I2C slave address byte: A2A1A0: 011 */
mcm 1:3aa7e66c9a5b 44 MCP9808_ADDRESS_4 = ( 0b0011100 << 1U ), /*!< I2C slave address byte: A2A1A0: 100 */
mcm 1:3aa7e66c9a5b 45 MCP9808_ADDRESS_5 = ( 0b0011101 << 1U ), /*!< I2C slave address byte: A2A1A0: 101 */
mcm 1:3aa7e66c9a5b 46 MCP9808_ADDRESS_6 = ( 0b0011110 << 1U ), /*!< I2C slave address byte: A2A1A0: 110 */
mcm 1:3aa7e66c9a5b 47 MCP9808_ADDRESS_7 = ( 0b0011111 << 1U ) /*!< I2C slave address byte: A2A1A0: 111 */
mcm 1:3aa7e66c9a5b 48 } MCP9808_addresses_t;
mcm 1:3aa7e66c9a5b 49
mcm 1:3aa7e66c9a5b 50
mcm 1:3aa7e66c9a5b 51
mcm 1:3aa7e66c9a5b 52 /**
mcm 1:3aa7e66c9a5b 53 * @brief REGISTERS
mcm 1:3aa7e66c9a5b 54 */
mcm 1:3aa7e66c9a5b 55 typedef enum {
mcm 1:3aa7e66c9a5b 56 MCP9808_CONFIG = 0x01, /*!< CONFIG register */
mcm 1:3aa7e66c9a5b 57 MCP9808_TUPPER = 0x02, /*!< T_UPPER register */
mcm 1:3aa7e66c9a5b 58 MCP9808_TLOWER = 0x03, /*!< T_LOWER register */
mcm 1:3aa7e66c9a5b 59 MCP9808_TCRIT = 0x04, /*!< T_CRIT register */
mcm 1:3aa7e66c9a5b 60 MCP9808_TA = 0x05, /*!< T_A register */
mcm 1:3aa7e66c9a5b 61 MCP9808_MANUFACTURER_ID = 0x06, /*!< Manufacturer ID register */
mcm 1:3aa7e66c9a5b 62 MCP9808_DEVICE_ID = 0x07, /*!< Device ID/Revision register */
mcm 1:3aa7e66c9a5b 63 MCP9808_RESOLUTION = 0x08 /*!< Resolution register */
mcm 1:3aa7e66c9a5b 64 } MCP9808_registers_t;
mcm 1:3aa7e66c9a5b 65
mcm 1:3aa7e66c9a5b 66
mcm 1:3aa7e66c9a5b 67
mcm 1:3aa7e66c9a5b 68 /**
mcm 1:3aa7e66c9a5b 69 * @brief CONFIG Register
mcm 1:3aa7e66c9a5b 70 */
mcm 1:3aa7e66c9a5b 71 /* T_HYST <9:10>: TUPPER AND TLOWER LIMIT HYSTERESIS BITS
mcm 1:3aa7e66c9a5b 72 * NOTE:
mcm 1:3aa7e66c9a5b 73 * · This bit can not be altered when either of the Lock bits are set ( bit 6 and bit 7 )
mcm 1:3aa7e66c9a5b 74 * · This bit can be programmed in Shutdown mode
mcm 1:3aa7e66c9a5b 75 */
mcm 1:3aa7e66c9a5b 76 typedef enum {
mcm 1:3aa7e66c9a5b 77 CONFIG_T_HYST_MASK = ( 0b11 << 9U ), /*!< T_HYST mask */
mcm 1:3aa7e66c9a5b 78 CONFIG_T_HYST_0_C = ( 0b00 << 9U ), /*!< T_HYST: 0C [ Default ] */
mcm 1:3aa7e66c9a5b 79 CONFIG_T_HYST_1_5_C = ( 0b01 << 9U ), /*!< T_HYST: +1.5C */
mcm 1:3aa7e66c9a5b 80 CONFIG_T_HYST_3_0_C = ( 0b10 << 9U ), /*!< T_HYST: +3.0C */
mcm 1:3aa7e66c9a5b 81 CONFIG_T_HYST_6_0_C = ( 0b11 << 9U ), /*!< T_HYST: +6.0C */
mcm 1:3aa7e66c9a5b 82 } MCP9808_config_thyst_t;
mcm 1:3aa7e66c9a5b 83
mcm 1:3aa7e66c9a5b 84
mcm 1:3aa7e66c9a5b 85
mcm 1:3aa7e66c9a5b 86 /* SHDN <8>: SHUTDOWN MODE BIT
mcm 1:3aa7e66c9a5b 87 * NOTE:
mcm 1:3aa7e66c9a5b 88 * · This bit can not be set to '1' when either of the Lock bits are set ( bit 6 and bit 7 ), however,
mcm 1:3aa7e66c9a5b 89 * it can be cleared to '0' for continuous conversion while locked.
mcm 1:3aa7e66c9a5b 90 */
mcm 1:3aa7e66c9a5b 91 typedef enum {
mcm 1:3aa7e66c9a5b 92 CONFIG_SHDN_MASK = ( 1U << 8U ), /*!< SHDN mask */
mcm 1:3aa7e66c9a5b 93 CONFIG_SHDN_CONTINUOUS_CONVERSION = ( 0U << 8U ), /*!< SHDN: Continuous conversion [ Default ] */
mcm 1:3aa7e66c9a5b 94 CONFIG_SHDN_SHUTDOWN = ( 1U << 8U ) /*!< SHDN: Shutdown ( Low-power mode ) */
mcm 1:3aa7e66c9a5b 95 } MCP9808_config_shdn_t;
mcm 1:3aa7e66c9a5b 96
mcm 1:3aa7e66c9a5b 97
mcm 1:3aa7e66c9a5b 98
mcm 1:3aa7e66c9a5b 99 /* CRIT_LOCK <7>: T_CRIT LOCKED BIT
mcm 1:3aa7e66c9a5b 100 * NOTE: N/A.
mcm 1:3aa7e66c9a5b 101 */
mcm 1:3aa7e66c9a5b 102 typedef enum {
mcm 1:3aa7e66c9a5b 103 CONFIG_CRIT_LOCK_MASK = ( 1U << 7U ), /*!< CRIT_LOCK mask */
mcm 1:3aa7e66c9a5b 104 CONFIG_CRIT_LOCK_UNLOCKED = ( 0U << 7U ), /*!< T_CRIT register can be written [ Default ] */
mcm 1:3aa7e66c9a5b 105 CONFIG_CRIT_LOCK_LOCKED = ( 1U << 7U ) /*!< T_CRIT register can not be written */
mcm 1:3aa7e66c9a5b 106 } MCP9808_config_crit_lock_t;
mcm 1:3aa7e66c9a5b 107
mcm 1:3aa7e66c9a5b 108
mcm 1:3aa7e66c9a5b 109
mcm 1:3aa7e66c9a5b 110 /* WIN_LOCK <6>: CORRECTION INTERRUPT ENABLE
mcm 1:3aa7e66c9a5b 111 * NOTE: N/A.
mcm 1:3aa7e66c9a5b 112 */
mcm 1:3aa7e66c9a5b 113 typedef enum {
mcm 1:3aa7e66c9a5b 114 CONFIG_WIN_LOCK_MASK = ( 1U << 6U ), /*!< WIN_LOCK mask */
mcm 1:3aa7e66c9a5b 115 CONFIG_WIN_LOCK_UNLOCKED = ( 0U << 6U ), /*!< TUPPER and TLOWER can be written [ Default ] */
mcm 1:3aa7e66c9a5b 116 CONFIG_WIN_LOCK_LOCKED = ( 1U << 6U ) /*!< TUPPER and TLOWER can not be written */
mcm 1:3aa7e66c9a5b 117 } MCP9808_config_win_lock_t;
mcm 1:3aa7e66c9a5b 118
mcm 1:3aa7e66c9a5b 119
mcm 1:3aa7e66c9a5b 120
mcm 1:3aa7e66c9a5b 121 /* INT_CLEAR <5>: INTERRUPT CLEAR BIT
mcm 1:3aa7e66c9a5b 122 * NOTE:
mcm 1:3aa7e66c9a5b 123 * · This bit can not be set to '1' in Shutdown mode, but it can be cleared after the device enters Shutdown mode
mcm 1:3aa7e66c9a5b 124 */
mcm 1:3aa7e66c9a5b 125 typedef enum {
mcm 1:3aa7e66c9a5b 126 CONFIG_INT_CLEAR_MASK = ( 1U << 5U ), /*!< INT_CLEAR mask */
mcm 1:3aa7e66c9a5b 127 CONFIG_INT_CLEAR_NO_EFFECT = ( 0U << 5U ), /*!< No effect [ Default ] */
mcm 1:3aa7e66c9a5b 128 CONFIG_INT_CLEAR_CLEAR_INT_OUTPUT = ( 1U << 5U ) /*!< Clear interrupt output, when read, returns '0' */
mcm 1:3aa7e66c9a5b 129 } MCP9808_conf_int_clear_t;
mcm 1:3aa7e66c9a5b 130
mcm 1:3aa7e66c9a5b 131
mcm 1:3aa7e66c9a5b 132
mcm 1:3aa7e66c9a5b 133 /* ALERT_STAT <4>: ALERT OUTPUT STATUS BIT
mcm 1:3aa7e66c9a5b 134 * NOTE: N/A.
mcm 1:3aa7e66c9a5b 135 */
mcm 1:3aa7e66c9a5b 136 typedef enum {
mcm 1:3aa7e66c9a5b 137 CONFIG_ALERT_STAT_MASK = ( 1U << 4U ), /*!< ALERT_STAT mask */
mcm 1:3aa7e66c9a5b 138 CONFIG_ALERT_STAT_NOT_ASSERTED = ( 0U << 4U ), /*!< ALERT_STAT is not asserted [ Default ] */
mcm 1:3aa7e66c9a5b 139 CONFIG_ALERT_STAT_ASSERTED = ( 1U << 4U ) /*!< ALERT_STAT is asserted */
mcm 1:3aa7e66c9a5b 140 } MCP9808_config_alert_stat_t;
mcm 1:3aa7e66c9a5b 141
mcm 1:3aa7e66c9a5b 142
mcm 1:3aa7e66c9a5b 143
mcm 1:3aa7e66c9a5b 144 /* ALERT_CNT <3>: ALERT OUTPUT CONTROL BIT
mcm 1:3aa7e66c9a5b 145 * NOTE: N/A.
mcm 1:3aa7e66c9a5b 146 */
mcm 1:3aa7e66c9a5b 147 typedef enum {
mcm 1:3aa7e66c9a5b 148 CONFIG_ALERT_CNT_MASK = ( 1U << 3U ), /*!< ALERT_CNT mask */
mcm 1:3aa7e66c9a5b 149 CONFIG_ALERT_CNT_DISABLED = ( 0U << 3U ), /*!< ALERT_CNT disabled [ Default ] */
mcm 1:3aa7e66c9a5b 150 CONFIG_ALERT_CNT_ENABLED = ( 1U << 3U ) /*!< ALERT_CNT enabled */
mcm 1:3aa7e66c9a5b 151 } MCP9808_config_alert_cnt_t;
mcm 1:3aa7e66c9a5b 152
mcm 1:3aa7e66c9a5b 153
mcm 1:3aa7e66c9a5b 154
mcm 1:3aa7e66c9a5b 155 /* ALERT_SEL <2>: ALERT OUTPUT SELECT BIT
mcm 1:3aa7e66c9a5b 156 * NOTE: N/A.
mcm 1:3aa7e66c9a5b 157 */
mcm 1:3aa7e66c9a5b 158 typedef enum {
mcm 1:3aa7e66c9a5b 159 CONFIG_ALERT_SEL_MASK = ( 1U << 2U ), /*!< ALERT_SEL mask */
mcm 1:3aa7e66c9a5b 160 CONFIG_ALERT_SEL_TUPPER_TLOWER_TCRIT = ( 0U << 2U ), /*!< Alert output for T_UPPER, T_LOWER and T_CRIT [ Default ] */
mcm 1:3aa7e66c9a5b 161 CONFIG_ALERT_SEL_TA_GREATER_TCRIT = ( 1U << 2U ) /*!< Alert output for T_A greater T_CRIT */
mcm 1:3aa7e66c9a5b 162 } MCP9808_config_alert_sel_t;
mcm 1:3aa7e66c9a5b 163
mcm 1:3aa7e66c9a5b 164
mcm 1:3aa7e66c9a5b 165
mcm 1:3aa7e66c9a5b 166 /* ALERT_POL <1>: ALERT OUTPUT POLARITY BIT
mcm 1:3aa7e66c9a5b 167 * NOTE: N/A.
mcm 1:3aa7e66c9a5b 168 */
mcm 1:3aa7e66c9a5b 169 typedef enum {
mcm 1:3aa7e66c9a5b 170 CONFIG_ALERT_POL_MASK = ( 1U << 1U ), /*!< ALERT_POL mask */
mcm 1:3aa7e66c9a5b 171 CONFIG_ALERT_POL_ACTIVE_LOW = ( 0U << 1U ), /*!< ALERT_POL active-low [ Default ] */
mcm 1:3aa7e66c9a5b 172 CONFIG_ALERT_POL_ACTIVE_HIGH = ( 1U << 1U ) /*!< ALERT_POL active-high */
mcm 1:3aa7e66c9a5b 173 } MCP9808_config_alert_pol_t;
mcm 1:3aa7e66c9a5b 174
mcm 1:3aa7e66c9a5b 175
mcm 1:3aa7e66c9a5b 176
mcm 1:3aa7e66c9a5b 177 /* ALERT_MOD <0>: ALERT OUTPUT MODE BIT
mcm 1:3aa7e66c9a5b 178 * NOTE: N/A.
mcm 1:3aa7e66c9a5b 179 */
mcm 1:3aa7e66c9a5b 180 typedef enum {
mcm 1:3aa7e66c9a5b 181 CONFIG_ALERT_MOD_MASK = ( 1U << 0U ), /*!< ALERT_MOD mask */
mcm 1:3aa7e66c9a5b 182 CONFIG_ALERT_MOD_COMPARATOR_OUTPUT = ( 0U << 0U ), /*!< ALERT_MOD comparator output [ Default ] */
mcm 1:3aa7e66c9a5b 183 CONFIG_ALERT_MOD_INTERRUPT_OUTPUT = ( 1U << 0U ) /*!< ALERT_MOD interrupt output */
mcm 1:3aa7e66c9a5b 184 } MCP9808_config_alert_mod_t;
mcm 1:3aa7e66c9a5b 185
mcm 1:3aa7e66c9a5b 186
mcm 1:3aa7e66c9a5b 187
mcm 1:3aa7e66c9a5b 188
mcm 1:3aa7e66c9a5b 189 /**
mcm 1:3aa7e66c9a5b 190 * @brief T_UPPER/T_LOWER/T_CRIT TEMPERATURE LIMIT REGISTERS
mcm 1:3aa7e66c9a5b 191 */
mcm 1:3aa7e66c9a5b 192 /* SIGN <12>: SIGN BIT
mcm 1:3aa7e66c9a5b 193 * NOTE: N/A.
mcm 1:3aa7e66c9a5b 194 */
mcm 1:3aa7e66c9a5b 195 typedef enum {
mcm 1:3aa7e66c9a5b 196 TEMPERATURE_LIMIT_SIGN_MASK = ( 1U << 12U ), /*!< SIGN mask */
mcm 1:3aa7e66c9a5b 197 TEMPERATURE_LIMIT_SIGN_TA_POSITIVE = ( 0U << 12U ), /*!< T_A greater or iqual 0C [ Default ] */
mcm 1:3aa7e66c9a5b 198 TEMPERATURE_LIMIT_SIGN_TA_NEGATIVE = ( 1U << 12U ) /*!< T_A lower 0C */
mcm 1:3aa7e66c9a5b 199 } MCP9808_temperature_limit_sign_t;
mcm 1:3aa7e66c9a5b 200
mcm 1:3aa7e66c9a5b 201
mcm 1:3aa7e66c9a5b 202
mcm 1:3aa7e66c9a5b 203 /* INTEGRAL <8:4>: TEMPERATURE INTEGRAL BOUNDARY PART
mcm 1:3aa7e66c9a5b 204 * NOTE: N/A.
mcm 1:3aa7e66c9a5b 205 */
mcm 1:3aa7e66c9a5b 206 typedef enum {
mcm 1:3aa7e66c9a5b 207 TEMPERATURE_LIMIT_INTEGRAL_PART_MASK = ( 0b11111111 << 4U ) /*!< Temperature limit, integral part mask */
mcm 1:3aa7e66c9a5b 208 } MCP9808_temperature_limit_integral_boundary_t;
mcm 1:3aa7e66c9a5b 209
mcm 1:3aa7e66c9a5b 210
mcm 1:3aa7e66c9a5b 211
mcm 1:3aa7e66c9a5b 212 /* DECIMAL <3:2>: TEMPERATURE DECIMAL BOUNDARY PART
mcm 1:3aa7e66c9a5b 213 * NOTE: N/A.
mcm 1:3aa7e66c9a5b 214 */
mcm 1:3aa7e66c9a5b 215 typedef enum {
mcm 1:3aa7e66c9a5b 216 TEMPERATURE_LIMIT_DECIMAL_PART_MASK = ( 0b11 << 2U ), /*!< Temperature limit, decimal part mask */
mcm 1:3aa7e66c9a5b 217 TEMPERATURE_LIMIT_DECIMAL_PART_0_00C = ( 0b00 << 2U ), /*!< Temperature limit, decimal part: 0.00C */
mcm 1:3aa7e66c9a5b 218 TEMPERATURE_LIMIT_DECIMAL_PART_0_25C = ( 0b01 << 2U ), /*!< Temperature limit, decimal part: 0.25C */
mcm 1:3aa7e66c9a5b 219 TEMPERATURE_LIMIT_DECIMAL_PART_0_50C = ( 0b10 << 2U ), /*!< Temperature limit, decimal part: 0.50C */
mcm 1:3aa7e66c9a5b 220 TEMPERATURE_LIMIT_DECIMAL_PART_0_75C = ( 0b11 << 2U ) /*!< Temperature limit, decimal part: 0.75C */
mcm 1:3aa7e66c9a5b 221 } MCP9808_temperature_limit_decimal_boundary_t;
mcm 1:3aa7e66c9a5b 222
mcm 1:3aa7e66c9a5b 223
mcm 1:3aa7e66c9a5b 224
mcm 1:3aa7e66c9a5b 225
mcm 1:3aa7e66c9a5b 226 /**
mcm 1:3aa7e66c9a5b 227 * @brief T_A AMBIENT TEMPERATURE REGISTERS
mcm 1:3aa7e66c9a5b 228 */
mcm 1:3aa7e66c9a5b 229 /* TA_VS_TCRIT <15>
mcm 1:3aa7e66c9a5b 230 * NOTE: N/A.
mcm 1:3aa7e66c9a5b 231 */
mcm 1:3aa7e66c9a5b 232 typedef enum {
mcm 1:3aa7e66c9a5b 233 T_A_TA_VS_TCRIT_MASK = ( 1U << 15U ), /*!< T_A mask */
mcm 1:3aa7e66c9a5b 234 T_A_TA_VS_TCRIT_TA_LOWER_TCRIT = ( 0U << 15U ), /*!< T_A lower T_CRIT */
mcm 1:3aa7e66c9a5b 235 T_A_TA_VS_TCRIT_TA_GREATER_EQUAL_TCRIT = ( 1U << 15U ) /*!< T_A greater or equal T_CRIT */
mcm 1:3aa7e66c9a5b 236 } MCP9808_t_a_ta_vs_tcrit_t;
mcm 1:3aa7e66c9a5b 237
mcm 1:3aa7e66c9a5b 238
mcm 1:3aa7e66c9a5b 239
mcm 1:3aa7e66c9a5b 240 /* TA_VS_TUPPER <14>
mcm 1:3aa7e66c9a5b 241 * NOTE: N/A.
mcm 1:3aa7e66c9a5b 242 */
mcm 1:3aa7e66c9a5b 243 typedef enum {
mcm 1:3aa7e66c9a5b 244 T_A_TA_VS_TUPPER_MASK = ( 1U << 14U ), /*!< T_A mask */
mcm 1:3aa7e66c9a5b 245 T_A_TA_VS_TUPPER_TA_LOWER__IQUAL_TUPPER = ( 0U << 14U ), /*!< T_A lower or equal T_UPPER */
mcm 1:3aa7e66c9a5b 246 T_A_TA_VS_TUPPER_TA_GREATER_TUPPER = ( 1U << 14U ) /*!< T_A greater T_UPPER */
mcm 1:3aa7e66c9a5b 247 } MCP9808_t_a_ta_vs_tupper_t;
mcm 1:3aa7e66c9a5b 248
mcm 1:3aa7e66c9a5b 249
mcm 1:3aa7e66c9a5b 250
mcm 1:3aa7e66c9a5b 251 /* TA_VS_LOWER <13>
mcm 1:3aa7e66c9a5b 252 * NOTE: N/A.
mcm 1:3aa7e66c9a5b 253 */
mcm 1:3aa7e66c9a5b 254 typedef enum {
mcm 1:3aa7e66c9a5b 255 T_A_TA_VS_TLOWER_MASK = ( 1U << 13U ), /*!< T_A mask */
mcm 1:3aa7e66c9a5b 256 T_A_TA_VS_TLOWER_TA_LOWER_TLOWER = ( 1U << 13U ), /*!< T_A lower or equal T_LOWER */
mcm 1:3aa7e66c9a5b 257 T_A_TA_VS_TLOWER_TA_GREATER_EQUAL_TLOWER = ( 0U << 13U ) /*!< T_A greater T_LOWER */
mcm 1:3aa7e66c9a5b 258 } MCP9808_t_a_ta_vs_tlower_t;
mcm 1:3aa7e66c9a5b 259
mcm 1:3aa7e66c9a5b 260
mcm 1:3aa7e66c9a5b 261
mcm 1:3aa7e66c9a5b 262 /* TA_SIGN <12>
mcm 1:3aa7e66c9a5b 263 * NOTE: N/A.
mcm 1:3aa7e66c9a5b 264 */
mcm 1:3aa7e66c9a5b 265 typedef enum {
mcm 1:3aa7e66c9a5b 266 T_A_TA_SIGN_MASK = ( 1U << 12U ), /*!< T_A SIGN mask */
mcm 1:3aa7e66c9a5b 267 T_A_TA_SIGN_POSITIVE = ( 0U << 12U ), /*!< T_A positive */
mcm 1:3aa7e66c9a5b 268 T_A_TA_SIGN_NEGATIVE = ( 1U << 12U ) /*!< T_A negative */
mcm 1:3aa7e66c9a5b 269 } MCP9808_t_a_sign_t;
mcm 1:3aa7e66c9a5b 270
mcm 1:3aa7e66c9a5b 271
mcm 1:3aa7e66c9a5b 272
mcm 1:3aa7e66c9a5b 273 /* TA_INTEGRAL <11:4>
mcm 1:3aa7e66c9a5b 274 * NOTE: N/A.
mcm 1:3aa7e66c9a5b 275 */
mcm 1:3aa7e66c9a5b 276 typedef enum {
mcm 1:3aa7e66c9a5b 277 T_A_TA_INTEGRAL_PART_MASK = ( 0b11111111 << 4U ) /*!< T_A integral part */
mcm 1:3aa7e66c9a5b 278 } MCP9808_t_a_integral_t;
mcm 1:3aa7e66c9a5b 279
mcm 1:3aa7e66c9a5b 280
mcm 1:3aa7e66c9a5b 281
mcm 1:3aa7e66c9a5b 282 /* TA_DECIMAL <3:0>
mcm 1:3aa7e66c9a5b 283 * NOTE: N/A.
mcm 1:3aa7e66c9a5b 284 */
mcm 1:3aa7e66c9a5b 285 typedef enum {
mcm 1:3aa7e66c9a5b 286 T_A_TA_DECIMAL_PART_MASK = ( 0b1111 << 0U ) /*!< T_A decimal part */
mcm 1:3aa7e66c9a5b 287 } MCP9808_t_a_decimal_t;
mcm 1:3aa7e66c9a5b 288
mcm 1:3aa7e66c9a5b 289
mcm 1:3aa7e66c9a5b 290
mcm 1:3aa7e66c9a5b 291
mcm 1:3aa7e66c9a5b 292 /**
mcm 1:3aa7e66c9a5b 293 * @brief RESOLUTION REGISTER
mcm 1:3aa7e66c9a5b 294 */
mcm 1:3aa7e66c9a5b 295 /* RESOLUTION <1:0>
mcm 1:3aa7e66c9a5b 296 * NOTE: N/A.
mcm 1:3aa7e66c9a5b 297 */
mcm 1:3aa7e66c9a5b 298 typedef enum {
mcm 1:3aa7e66c9a5b 299 RESOLUTION_MASK = ( 0b11 << 0U ), /*!< Resolution mask */
mcm 1:3aa7e66c9a5b 300 RESOLUTION_0_5_C = ( 0b00 << 0U ), /*!< Resolution: +0.5C */
mcm 1:3aa7e66c9a5b 301 RESOLUTION_0_25_C = ( 0b01 << 0U ), /*!< Resolution: +0.25C */
mcm 1:3aa7e66c9a5b 302 RESOLUTION_0_125_C = ( 0b10 << 0U ), /*!< Resolution: +0.125C */
mcm 1:3aa7e66c9a5b 303 RESOLUTION_0_0625_C = ( 0b11 << 0U ) /*!< Resolution: +0.0625C [ Default ] */
mcm 1:3aa7e66c9a5b 304 } MCP9808_resolution_t;
mcm 1:3aa7e66c9a5b 305
mcm 1:3aa7e66c9a5b 306
mcm 1:3aa7e66c9a5b 307
mcm 1:3aa7e66c9a5b 308
mcm 1:3aa7e66c9a5b 309
mcm 1:3aa7e66c9a5b 310
mcm 1:3aa7e66c9a5b 311 #ifndef MCP9808_VECTOR_STRUCT_H
mcm 1:3aa7e66c9a5b 312 #define MCP9808_VECTOR_STRUCT_H
mcm 1:3aa7e66c9a5b 313 typedef struct {
mcm 1:3aa7e66c9a5b 314 MCP9808_config_thyst_t t_hyst; /*!< Temperature Limit Hysteresis */
mcm 1:3aa7e66c9a5b 315 MCP9808_config_shdn_t shdn; /*!< Shutdown mode */
mcm 1:3aa7e66c9a5b 316 MCP9808_config_crit_lock_t t_crit; /*!< T_CRIT lock bit */
mcm 1:3aa7e66c9a5b 317 MCP9808_config_win_lock_t t_win_lock; /*!< Win. Lock bit */
mcm 1:3aa7e66c9a5b 318 MCP9808_conf_int_clear_t int_clear; /*!< Interrupt clear bit */
mcm 1:3aa7e66c9a5b 319 MCP9808_config_alert_stat_t alert_stat; /*!< Alert output status bit */
mcm 1:3aa7e66c9a5b 320 MCP9808_config_alert_cnt_t alert_cnt; /*!< Alert Output control bit */
mcm 1:3aa7e66c9a5b 321 MCP9808_config_alert_sel_t alert_sel; /*!< Alert Output select bit */
mcm 1:3aa7e66c9a5b 322 MCP9808_config_alert_pol_t alert_pol; /*!< Alert Output polarity bit */
mcm 1:3aa7e66c9a5b 323 MCP9808_config_alert_mod_t alert_mod; /*!< Alert Output mode bit */
mcm 1:3aa7e66c9a5b 324 } MCP9808_config_reg_t;
mcm 1:3aa7e66c9a5b 325
mcm 1:3aa7e66c9a5b 326
mcm 1:3aa7e66c9a5b 327 typedef struct {
mcm 1:3aa7e66c9a5b 328 float t_a; /*!< Ambient temperature value */
mcm 1:3aa7e66c9a5b 329 uint16_t t_a_raw; /*!< Raw ambient temperature value */
mcm 1:3aa7e66c9a5b 330
mcm 1:3aa7e66c9a5b 331 MCP9808_t_a_sign_t t_a_sign; /*!< Ambient temperature sign */
mcm 1:3aa7e66c9a5b 332 MCP9808_t_a_ta_vs_tcrit_t ta_vs_tcrit; /*!< T_A vs T_CRIT result */
mcm 1:3aa7e66c9a5b 333 MCP9808_t_a_ta_vs_tupper_t ta_vs_tupper; /*!< T_A vs T_UPPER result */
mcm 1:3aa7e66c9a5b 334 MCP9808_t_a_ta_vs_tlower_t ta_vs_tlower; /*!< T_A vs T_LOWER result */
mcm 1:3aa7e66c9a5b 335
mcm 1:3aa7e66c9a5b 336 MCP9808_resolution_t resolution; /*!< Device resolution */
mcm 1:3aa7e66c9a5b 337
mcm 1:3aa7e66c9a5b 338 float t_upper; /*!< T_UPPER limit */
mcm 1:3aa7e66c9a5b 339 float t_lower; /*!< T_LOWER limit */
mcm 1:3aa7e66c9a5b 340 float t_crit; /*!< T_CRIT limit */
mcm 1:3aa7e66c9a5b 341
mcm 1:3aa7e66c9a5b 342 uint16_t manufacturerID; /*!< Manufacturer ID */
mcm 1:3aa7e66c9a5b 343 uint8_t deviceID; /*!< Device ID */
mcm 1:3aa7e66c9a5b 344 uint8_t deviceRevision; /*!< Device Revision */
mcm 1:3aa7e66c9a5b 345 } MCP9808_data_t;
mcm 1:3aa7e66c9a5b 346 #endif
mcm 1:3aa7e66c9a5b 347
mcm 1:3aa7e66c9a5b 348
mcm 1:3aa7e66c9a5b 349 /**
mcm 1:3aa7e66c9a5b 350 * @brief INTERNAL CONSTANTS
mcm 1:3aa7e66c9a5b 351 */
mcm 1:3aa7e66c9a5b 352 typedef enum {
mcm 1:3aa7e66c9a5b 353 MCP9808_SUCCESS = 0U,
mcm 1:3aa7e66c9a5b 354 MCP9808_FAILURE = 1U,
mcm 1:3aa7e66c9a5b 355 I2C_SUCCESS = 0U /*!< I2C communication was fine */
mcm 1:3aa7e66c9a5b 356 } MCP9808_status_t;
mcm 1:3aa7e66c9a5b 357
mcm 1:3aa7e66c9a5b 358
mcm 1:3aa7e66c9a5b 359
mcm 1:3aa7e66c9a5b 360
mcm 1:3aa7e66c9a5b 361 /** Create an MCP9808 object connected to the specified I2C pins.
mcm 1:3aa7e66c9a5b 362 *
mcm 1:3aa7e66c9a5b 363 * @param sda I2C data pin
mcm 1:3aa7e66c9a5b 364 * @param scl I2C clock pin
mcm 1:3aa7e66c9a5b 365 * @param addr I2C slave address
mcm 1:3aa7e66c9a5b 366 * @param freq I2C frequency
mcm 1:3aa7e66c9a5b 367 */
mcm 1:3aa7e66c9a5b 368 MCP9808 ( PinName sda, PinName scl, uint32_t addr, uint32_t freq );
mcm 1:3aa7e66c9a5b 369
mcm 1:3aa7e66c9a5b 370 /** Delete MCP9808 object.
mcm 1:3aa7e66c9a5b 371 */
mcm 1:3aa7e66c9a5b 372 ~MCP9808();
mcm 1:3aa7e66c9a5b 373
mcm 1:3aa7e66c9a5b 374 /** It gets CONFIG register value.
mcm 1:3aa7e66c9a5b 375 */
mcm 1:3aa7e66c9a5b 376 MCP9808_status_t MCP9808_GetCONFIG ( MCP9808_config_reg_t* myCONFIG );
mcm 1:3aa7e66c9a5b 377
mcm 1:3aa7e66c9a5b 378 /** It sets CONFIG register value.
mcm 1:3aa7e66c9a5b 379 */
mcm 1:3aa7e66c9a5b 380 MCP9808_status_t MCP9808_SetCONFIG ( MCP9808_config_reg_t myCONFIG );
mcm 1:3aa7e66c9a5b 381
mcm 1:3aa7e66c9a5b 382 /** It sets temperature limit for: T_UPPER, T_LOWER or T_CRIT.
mcm 1:3aa7e66c9a5b 383 */
mcm 1:3aa7e66c9a5b 384 MCP9808_status_t MCP9808_SetT_Limit ( MCP9808_registers_t myTLimit, MCP9808_data_t myTValue_Limit );
mcm 1:3aa7e66c9a5b 385
mcm 1:3aa7e66c9a5b 386 /** It gets temperature limit for: T_UPPER, T_LOWER or T_CRIT.
mcm 1:3aa7e66c9a5b 387 */
mcm 1:3aa7e66c9a5b 388 MCP9808_status_t MCP9808_GetT_Limit ( MCP9808_registers_t myTLimit, MCP9808_data_t* myTValue_Limit);
mcm 1:3aa7e66c9a5b 389
mcm 1:3aa7e66c9a5b 390 /** It gets ambient temperature register ( raw value ).
mcm 1:3aa7e66c9a5b 391 */
mcm 1:3aa7e66c9a5b 392 MCP9808_status_t MCP9808_GetRawTA ( MCP9808_data_t* myRawTA );
mcm 1:3aa7e66c9a5b 393
mcm 1:3aa7e66c9a5b 394 /** It gets ambient temperature register ( Celsius degrees ).
mcm 1:3aa7e66c9a5b 395 */
mcm 1:3aa7e66c9a5b 396 MCP9808_status_t MCP9808_GetTA ( MCP9808_data_t* myTA );
mcm 1:3aa7e66c9a5b 397
mcm 1:3aa7e66c9a5b 398 /** It gets manufacturer ID.
mcm 1:3aa7e66c9a5b 399 */
mcm 1:3aa7e66c9a5b 400 MCP9808_status_t MCP9808_GetManufacturerID ( MCP9808_data_t* myManufacturerID );
mcm 1:3aa7e66c9a5b 401
mcm 1:3aa7e66c9a5b 402 /** It gets both device ID and device revision.
mcm 1:3aa7e66c9a5b 403 */
mcm 1:3aa7e66c9a5b 404 MCP9808_status_t MCP9808_GetDeviceID ( MCP9808_data_t* myDeviceID );
mcm 1:3aa7e66c9a5b 405
mcm 1:3aa7e66c9a5b 406 /** It sets the sensor resolution.
mcm 1:3aa7e66c9a5b 407 */
mcm 1:3aa7e66c9a5b 408 MCP9808_status_t MCP9808_SetResolution ( MCP9808_data_t myResolution );
mcm 1:3aa7e66c9a5b 409
mcm 1:3aa7e66c9a5b 410 /** It gets the sensor resolution.
mcm 1:3aa7e66c9a5b 411 */
mcm 1:3aa7e66c9a5b 412 MCP9808_status_t MCP9808_GetResolution ( MCP9808_data_t* myResolution );
mcm 1:3aa7e66c9a5b 413
mcm 1:3aa7e66c9a5b 414
mcm 1:3aa7e66c9a5b 415
mcm 1:3aa7e66c9a5b 416
mcm 1:3aa7e66c9a5b 417 private:
mcm 1:3aa7e66c9a5b 418 I2C _i2c;
mcm 1:3aa7e66c9a5b 419 uint32_t _MCP9808_Addr;
mcm 1:3aa7e66c9a5b 420 };
mcm 1:3aa7e66c9a5b 421
mcm 1:3aa7e66c9a5b 422 #endif