12-bit buffered voltage output Digital-to-Analog Convertor (DAC) with non-volatile memory.

Committer:
mcm
Date:
Fri Sep 08 18:25:52 2017 +0000
Revision:
3:2d28c56053cd
Parent:
2:e09b7dd7c1dd
The library was completed and tested, it works as expected.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mcm 2:e09b7dd7c1dd 1 /**
mcm 2:e09b7dd7c1dd 2 * @brief MCP4725.c
mcm 2:e09b7dd7c1dd 3 * @details 12-Bit Digital-to-Analog Converter with EEPROM Memory.
mcm 2:e09b7dd7c1dd 4 * Functions file.
mcm 2:e09b7dd7c1dd 5 *
mcm 2:e09b7dd7c1dd 6 *
mcm 2:e09b7dd7c1dd 7 * @return NA
mcm 2:e09b7dd7c1dd 8 *
mcm 2:e09b7dd7c1dd 9 * @author Manuel Caballero
mcm 2:e09b7dd7c1dd 10 * @date 7/September/2017
mcm 2:e09b7dd7c1dd 11 * @version 7/September/2017 The ORIGIN
mcm 2:e09b7dd7c1dd 12 * @pre NaN.
mcm 2:e09b7dd7c1dd 13 * @warning NaN
mcm 2:e09b7dd7c1dd 14 * @pre This code belongs to AqueronteBlog ( http://unbarquero.blogspot.com ).
mcm 2:e09b7dd7c1dd 15 */
mcm 2:e09b7dd7c1dd 16
mcm 2:e09b7dd7c1dd 17 #include "MCP4725.h"
mcm 2:e09b7dd7c1dd 18
mcm 2:e09b7dd7c1dd 19
mcm 2:e09b7dd7c1dd 20 MCP4725::MCP4725 ( PinName sda, PinName scl, uint32_t addr, uint32_t freq )
mcm 2:e09b7dd7c1dd 21 : i2c ( sda, scl )
mcm 2:e09b7dd7c1dd 22 , MCP4725_Addr ( addr )
mcm 2:e09b7dd7c1dd 23 {
mcm 2:e09b7dd7c1dd 24 i2c.frequency( freq );
mcm 2:e09b7dd7c1dd 25 }
mcm 2:e09b7dd7c1dd 26
mcm 2:e09b7dd7c1dd 27
mcm 2:e09b7dd7c1dd 28 MCP4725::~MCP4725()
mcm 2:e09b7dd7c1dd 29 {
mcm 2:e09b7dd7c1dd 30 }
mcm 2:e09b7dd7c1dd 31
mcm 2:e09b7dd7c1dd 32
mcm 2:e09b7dd7c1dd 33
mcm 2:e09b7dd7c1dd 34 /**
mcm 2:e09b7dd7c1dd 35 * @brief MCP4725_Reset ( void )
mcm 2:e09b7dd7c1dd 36 *
mcm 2:e09b7dd7c1dd 37 * @details It performs an internal reset similar to a power-on-reset ( POR ).
mcm 2:e09b7dd7c1dd 38 *
mcm 2:e09b7dd7c1dd 39 * @param[in] NaN.
mcm 2:e09b7dd7c1dd 40 *
mcm 2:e09b7dd7c1dd 41 * @param[out] NaN.
mcm 2:e09b7dd7c1dd 42 *
mcm 2:e09b7dd7c1dd 43 *
mcm 2:e09b7dd7c1dd 44 * @return Status of MCP4725_Reset.
mcm 2:e09b7dd7c1dd 45 *
mcm 2:e09b7dd7c1dd 46 *
mcm 2:e09b7dd7c1dd 47 * @author Manuel Caballero
mcm 2:e09b7dd7c1dd 48 * @date 7/September/2017
mcm 2:e09b7dd7c1dd 49 * @version 7/September/2017 The ORIGIN
mcm 2:e09b7dd7c1dd 50 * @pre NaN
mcm 2:e09b7dd7c1dd 51 * @warning The user MUST respect the time it takes this instruction to be
mcm 2:e09b7dd7c1dd 52 * performed ( max. 50ms ).
mcm 2:e09b7dd7c1dd 53 */
mcm 2:e09b7dd7c1dd 54 MCP4725::MCP4725_status_t MCP4725::MCP4725_Reset ( void )
mcm 2:e09b7dd7c1dd 55 {
mcm 2:e09b7dd7c1dd 56 char cmd = MCP4725_GENERAL_CALL_RESET;
mcm 2:e09b7dd7c1dd 57 uint32_t aux = 0;
mcm 2:e09b7dd7c1dd 58
mcm 2:e09b7dd7c1dd 59
mcm 2:e09b7dd7c1dd 60 aux = i2c.write ( MCP4725_GENERAL_CALL, &cmd, 1 );
mcm 2:e09b7dd7c1dd 61
mcm 2:e09b7dd7c1dd 62
mcm 2:e09b7dd7c1dd 63
mcm 2:e09b7dd7c1dd 64 if ( aux == I2C_SUCCESS )
mcm 2:e09b7dd7c1dd 65 return MCP4725_SUCCESS;
mcm 2:e09b7dd7c1dd 66 else
mcm 2:e09b7dd7c1dd 67 return MCP4725_FAILURE;
mcm 2:e09b7dd7c1dd 68 }
mcm 2:e09b7dd7c1dd 69
mcm 2:e09b7dd7c1dd 70
mcm 2:e09b7dd7c1dd 71
mcm 2:e09b7dd7c1dd 72 /**
mcm 2:e09b7dd7c1dd 73 * @brief MCP4725_WakeUp ( void )
mcm 2:e09b7dd7c1dd 74 *
mcm 2:e09b7dd7c1dd 75 * @details The power-down bits of the DAC register are set to a normal operation.
mcm 2:e09b7dd7c1dd 76 *
mcm 2:e09b7dd7c1dd 77 * @param[in] NaN.
mcm 2:e09b7dd7c1dd 78 *
mcm 2:e09b7dd7c1dd 79 * @param[out] NaN.
mcm 2:e09b7dd7c1dd 80 *
mcm 2:e09b7dd7c1dd 81 *
mcm 2:e09b7dd7c1dd 82 * @return Status of MCP4725_WakeUp.
mcm 2:e09b7dd7c1dd 83 *
mcm 2:e09b7dd7c1dd 84 *
mcm 2:e09b7dd7c1dd 85 * @author Manuel Caballero
mcm 2:e09b7dd7c1dd 86 * @date 7/September/2017
mcm 2:e09b7dd7c1dd 87 * @version 7/September/2017 The ORIGIN
mcm 2:e09b7dd7c1dd 88 * @pre NaN
mcm 2:e09b7dd7c1dd 89 * @warning NaN.
mcm 2:e09b7dd7c1dd 90 */
mcm 2:e09b7dd7c1dd 91 MCP4725::MCP4725_status_t MCP4725::MCP4725_WakeUp ( void )
mcm 2:e09b7dd7c1dd 92 {
mcm 2:e09b7dd7c1dd 93 char cmd = MCP4725_GENERAL_CALL_WAKE_UP;
mcm 2:e09b7dd7c1dd 94 uint32_t aux = 0;
mcm 2:e09b7dd7c1dd 95
mcm 2:e09b7dd7c1dd 96
mcm 2:e09b7dd7c1dd 97 aux = i2c.write ( MCP4725_GENERAL_CALL, &cmd, 1 );
mcm 2:e09b7dd7c1dd 98
mcm 2:e09b7dd7c1dd 99
mcm 2:e09b7dd7c1dd 100
mcm 2:e09b7dd7c1dd 101 if ( aux == I2C_SUCCESS )
mcm 2:e09b7dd7c1dd 102 return MCP4725_SUCCESS;
mcm 2:e09b7dd7c1dd 103 else
mcm 2:e09b7dd7c1dd 104 return MCP4725_FAILURE;
mcm 2:e09b7dd7c1dd 105 }
mcm 2:e09b7dd7c1dd 106
mcm 2:e09b7dd7c1dd 107
mcm 2:e09b7dd7c1dd 108 /**
mcm 2:e09b7dd7c1dd 109 * @brief MCP4725_PowerMode ( MCP4725_write_command_type_t , MCP4725_operation_mode_t )
mcm 2:e09b7dd7c1dd 110 *
mcm 2:e09b7dd7c1dd 111 * @details It configures the power mode of the device.
mcm 2:e09b7dd7c1dd 112 *
mcm 2:e09b7dd7c1dd 113 * @param[in] myWriteCMD: It writes the command into the DAC or EEPROM/DAC.
mcm 2:e09b7dd7c1dd 114 * @param[in] myPowerMode: Normal Mode or one of the Power-Down available modes.
mcm 2:e09b7dd7c1dd 115 *
mcm 2:e09b7dd7c1dd 116 * @param[out] NaN.
mcm 2:e09b7dd7c1dd 117 *
mcm 2:e09b7dd7c1dd 118 *
mcm 2:e09b7dd7c1dd 119 * @return Status of MCP4725_PowerMode.
mcm 2:e09b7dd7c1dd 120 *
mcm 2:e09b7dd7c1dd 121 *
mcm 2:e09b7dd7c1dd 122 * @author Manuel Caballero
mcm 2:e09b7dd7c1dd 123 * @date 7/September/2017
mcm 2:e09b7dd7c1dd 124 * @version 7/September/2017 The ORIGIN
mcm 2:e09b7dd7c1dd 125 * @pre NaN
mcm 2:e09b7dd7c1dd 126 * @warning NaN.
mcm 2:e09b7dd7c1dd 127 */
mcm 2:e09b7dd7c1dd 128 MCP4725::MCP4725_status_t MCP4725::MCP4725_PowerMode ( MCP4725_write_command_type_t myWriteCMD, MCP4725_operation_mode_t myPowerMode )
mcm 2:e09b7dd7c1dd 129 {
mcm 2:e09b7dd7c1dd 130 char cmd[] = { 0, 0, 0, 0, 0, 0 };
mcm 2:e09b7dd7c1dd 131 uint32_t aux = 0;
mcm 2:e09b7dd7c1dd 132 uint32_t dataTX = 3;
mcm 2:e09b7dd7c1dd 133
mcm 2:e09b7dd7c1dd 134
mcm 2:e09b7dd7c1dd 135 // Read the device to mask the default value
mcm 2:e09b7dd7c1dd 136 aux = i2c.read ( MCP4725_Addr, &cmd[0], 5 );
mcm 2:e09b7dd7c1dd 137
mcm 2:e09b7dd7c1dd 138
mcm 2:e09b7dd7c1dd 139
mcm 2:e09b7dd7c1dd 140 // Choose the power mode
mcm 2:e09b7dd7c1dd 141 switch ( myPowerMode ){
mcm 2:e09b7dd7c1dd 142 default:
mcm 2:e09b7dd7c1dd 143 case NORMAL_MODE:
mcm 2:e09b7dd7c1dd 144 cmd[0] = 0;
mcm 2:e09b7dd7c1dd 145 break;
mcm 2:e09b7dd7c1dd 146
mcm 2:e09b7dd7c1dd 147 case POWER_DOWN_1KOHM_RESISTIVE_LOAD_MODE:
mcm 2:e09b7dd7c1dd 148 cmd[0] = 0x01;
mcm 2:e09b7dd7c1dd 149 break;
mcm 2:e09b7dd7c1dd 150
mcm 2:e09b7dd7c1dd 151 case POWER_DOWN_100KOHM_RESISTIVE_LOAD_MODE:
mcm 2:e09b7dd7c1dd 152 cmd[0] = 0x02;
mcm 2:e09b7dd7c1dd 153 break;
mcm 2:e09b7dd7c1dd 154
mcm 2:e09b7dd7c1dd 155 case POWER_DOWN_500KOHM_RESISTIVE_LOAD_MODE:
mcm 2:e09b7dd7c1dd 156 cmd[0] = 0x03;
mcm 2:e09b7dd7c1dd 157 break;
mcm 2:e09b7dd7c1dd 158 }
mcm 2:e09b7dd7c1dd 159
mcm 2:e09b7dd7c1dd 160
mcm 2:e09b7dd7c1dd 161 // Prepare the data according to the write mode
mcm 2:e09b7dd7c1dd 162 switch ( myWriteCMD ){
mcm 2:e09b7dd7c1dd 163 default:
mcm 2:e09b7dd7c1dd 164 case FAST_MODE:
mcm 2:e09b7dd7c1dd 165 cmd[0] <<= 4;
mcm 2:e09b7dd7c1dd 166 cmd[0] |= ( ( cmd[1] & 0xF0 ) >> 4 );
mcm 2:e09b7dd7c1dd 167 cmd[1] = ( ( cmd[1] & 0x0F ) << 4 );
mcm 2:e09b7dd7c1dd 168 cmd[1] |= ( ( cmd[2] & 0xF0 ) >> 4 );
mcm 2:e09b7dd7c1dd 169
mcm 2:e09b7dd7c1dd 170 dataTX = 2;
mcm 2:e09b7dd7c1dd 171 break;
mcm 2:e09b7dd7c1dd 172
mcm 2:e09b7dd7c1dd 173 case WRITE_DAC_REGISTER_MODE:
mcm 2:e09b7dd7c1dd 174 cmd[0] <<= 1;
mcm 2:e09b7dd7c1dd 175 cmd[0] |= 0x40;
mcm 2:e09b7dd7c1dd 176 break;
mcm 2:e09b7dd7c1dd 177
mcm 2:e09b7dd7c1dd 178 case WRITE_DAC_AND_EEPROM_REGISTER_MODE:
mcm 2:e09b7dd7c1dd 179 cmd[0] <<= 1;
mcm 2:e09b7dd7c1dd 180 cmd[0] |= 0x60;
mcm 2:e09b7dd7c1dd 181 break;
mcm 2:e09b7dd7c1dd 182 }
mcm 2:e09b7dd7c1dd 183
mcm 2:e09b7dd7c1dd 184
mcm 2:e09b7dd7c1dd 185
mcm 2:e09b7dd7c1dd 186 aux = i2c.write ( MCP4725_Addr, &cmd[0], dataTX );
mcm 2:e09b7dd7c1dd 187
mcm 2:e09b7dd7c1dd 188
mcm 2:e09b7dd7c1dd 189
mcm 2:e09b7dd7c1dd 190 if ( aux == I2C_SUCCESS )
mcm 2:e09b7dd7c1dd 191 return MCP4725_SUCCESS;
mcm 2:e09b7dd7c1dd 192 else
mcm 2:e09b7dd7c1dd 193 return MCP4725_FAILURE;
mcm 2:e09b7dd7c1dd 194 }
mcm 2:e09b7dd7c1dd 195
mcm 2:e09b7dd7c1dd 196
mcm 2:e09b7dd7c1dd 197
mcm 2:e09b7dd7c1dd 198 /**
mcm 2:e09b7dd7c1dd 199 * @brief MCP4725_SetNewValue ( MCP4725_write_command_type_t , uint32_t )
mcm 2:e09b7dd7c1dd 200 *
mcm 2:e09b7dd7c1dd 201 * @details It sends a new output value.
mcm 2:e09b7dd7c1dd 202 *
mcm 2:e09b7dd7c1dd 203 * @param[in] myWriteCMD: It writes the command into the DAC or EEPROM/DAC.
mcm 2:e09b7dd7c1dd 204 * @param[in] myDACNewValue: New output value.
mcm 2:e09b7dd7c1dd 205 *
mcm 2:e09b7dd7c1dd 206 * @param[out] NaN.
mcm 2:e09b7dd7c1dd 207 *
mcm 2:e09b7dd7c1dd 208 *
mcm 2:e09b7dd7c1dd 209 * @return Status of MCP4725_SetNewValue.
mcm 2:e09b7dd7c1dd 210 *
mcm 2:e09b7dd7c1dd 211 *
mcm 2:e09b7dd7c1dd 212 * @author Manuel Caballero
mcm 2:e09b7dd7c1dd 213 * @date 7/September/2017
mcm 2:e09b7dd7c1dd 214 * @version 7/September/2017 The ORIGIN
mcm 2:e09b7dd7c1dd 215 * @pre NaN
mcm 2:e09b7dd7c1dd 216 * @warning NaN.
mcm 2:e09b7dd7c1dd 217 */
mcm 3:2d28c56053cd 218 MCP4725::MCP4725_status_t MCP4725::MCP4725_SetNewValue ( MCP4725_write_command_type_t myWriteCMD, Vector_new_dac_value_t myDACNewValue )
mcm 2:e09b7dd7c1dd 219 {
mcm 2:e09b7dd7c1dd 220 char cmd[] = { 0, 0, 0 };
mcm 2:e09b7dd7c1dd 221 uint32_t aux = 0;
mcm 2:e09b7dd7c1dd 222 uint32_t dataTX = 3;
mcm 2:e09b7dd7c1dd 223
mcm 2:e09b7dd7c1dd 224
mcm 2:e09b7dd7c1dd 225 // 12-Bit of resolution ONLY!
mcm 3:2d28c56053cd 226 if ( myDACNewValue.DAC_New_Value > 4095 )
mcm 2:e09b7dd7c1dd 227 return MCP4725_FAILURE;
mcm 2:e09b7dd7c1dd 228
mcm 2:e09b7dd7c1dd 229
mcm 2:e09b7dd7c1dd 230 // Prepare the data according to the write mode
mcm 3:2d28c56053cd 231 cmd[1] |= ( ( myDACNewValue.DAC_New_Value & 0xFF0 ) >> 4 );
mcm 3:2d28c56053cd 232 cmd[2] |= ( ( myDACNewValue.DAC_New_Value & 0x00F ) << 4 );
mcm 2:e09b7dd7c1dd 233
mcm 2:e09b7dd7c1dd 234 switch ( myWriteCMD ){
mcm 2:e09b7dd7c1dd 235 default:
mcm 2:e09b7dd7c1dd 236 case FAST_MODE:
mcm 3:2d28c56053cd 237 cmd[0] |= ( ( myDACNewValue.DAC_New_Value & 0xF00 ) >> 8 );
mcm 3:2d28c56053cd 238 cmd[1] = ( myDACNewValue.DAC_New_Value & 0x0FF );
mcm 2:e09b7dd7c1dd 239
mcm 2:e09b7dd7c1dd 240 dataTX = 2;
mcm 2:e09b7dd7c1dd 241 break;
mcm 2:e09b7dd7c1dd 242
mcm 2:e09b7dd7c1dd 243 case WRITE_DAC_REGISTER_MODE:
mcm 2:e09b7dd7c1dd 244 cmd[0] |= 0x40;
mcm 2:e09b7dd7c1dd 245 break;
mcm 2:e09b7dd7c1dd 246
mcm 2:e09b7dd7c1dd 247 case WRITE_DAC_AND_EEPROM_REGISTER_MODE:
mcm 2:e09b7dd7c1dd 248 cmd[0] |= 0x60;
mcm 2:e09b7dd7c1dd 249 break;
mcm 2:e09b7dd7c1dd 250 }
mcm 2:e09b7dd7c1dd 251
mcm 2:e09b7dd7c1dd 252
mcm 2:e09b7dd7c1dd 253
mcm 2:e09b7dd7c1dd 254 aux = i2c.write ( MCP4725_Addr, &cmd[0], dataTX );
mcm 2:e09b7dd7c1dd 255
mcm 2:e09b7dd7c1dd 256
mcm 2:e09b7dd7c1dd 257
mcm 2:e09b7dd7c1dd 258 if ( aux == I2C_SUCCESS )
mcm 2:e09b7dd7c1dd 259 return MCP4725_SUCCESS;
mcm 2:e09b7dd7c1dd 260 else
mcm 2:e09b7dd7c1dd 261 return MCP4725_FAILURE;
mcm 2:e09b7dd7c1dd 262 }
mcm 2:e09b7dd7c1dd 263
mcm 2:e09b7dd7c1dd 264
mcm 2:e09b7dd7c1dd 265
mcm 2:e09b7dd7c1dd 266 /**
mcm 2:e09b7dd7c1dd 267 * @brief MCP4725_EEPROM_Status ( MCP4725_eeprom_status_t )
mcm 2:e09b7dd7c1dd 268 *
mcm 2:e09b7dd7c1dd 269 * @details It gets the eeprom status.
mcm 2:e09b7dd7c1dd 270 *
mcm 2:e09b7dd7c1dd 271 * @param[in] myEEPROM_Status: EEPROM status.
mcm 2:e09b7dd7c1dd 272 *
mcm 2:e09b7dd7c1dd 273 * @param[out] NaN.
mcm 2:e09b7dd7c1dd 274 *
mcm 2:e09b7dd7c1dd 275 *
mcm 2:e09b7dd7c1dd 276 * @return Status of MCP4725_EEPROM_Status.
mcm 2:e09b7dd7c1dd 277 *
mcm 2:e09b7dd7c1dd 278 *
mcm 2:e09b7dd7c1dd 279 * @author Manuel Caballero
mcm 2:e09b7dd7c1dd 280 * @date 7/September/2017
mcm 2:e09b7dd7c1dd 281 * @version 7/September/2017 The ORIGIN
mcm 2:e09b7dd7c1dd 282 * @pre NaN
mcm 2:e09b7dd7c1dd 283 * @warning NaN.
mcm 2:e09b7dd7c1dd 284 */
mcm 2:e09b7dd7c1dd 285 MCP4725::MCP4725_status_t MCP4725::MCP4725_EEPROM_Status ( MCP4725_eeprom_status_t* myEEPROM_Status )
mcm 2:e09b7dd7c1dd 286 {
mcm 2:e09b7dd7c1dd 287 char cmd[] = { 0, 0, 0, 0, 0 };
mcm 2:e09b7dd7c1dd 288 uint32_t aux = 0;
mcm 2:e09b7dd7c1dd 289
mcm 2:e09b7dd7c1dd 290 // Read command
mcm 2:e09b7dd7c1dd 291 aux = i2c.read ( MCP4725_Addr, &cmd[0], 5 );
mcm 2:e09b7dd7c1dd 292
mcm 2:e09b7dd7c1dd 293 // Update EEPROM status
mcm 2:e09b7dd7c1dd 294 *myEEPROM_Status = ( MCP4725_eeprom_status_t )( ( cmd[0] & 0x80 ) >> 7 );
mcm 2:e09b7dd7c1dd 295
mcm 2:e09b7dd7c1dd 296
mcm 2:e09b7dd7c1dd 297
mcm 2:e09b7dd7c1dd 298 if ( aux == I2C_SUCCESS )
mcm 2:e09b7dd7c1dd 299 return MCP4725_SUCCESS;
mcm 2:e09b7dd7c1dd 300 else
mcm 2:e09b7dd7c1dd 301 return MCP4725_FAILURE;
mcm 2:e09b7dd7c1dd 302 }
mcm 3:2d28c56053cd 303
mcm 3:2d28c56053cd 304
mcm 3:2d28c56053cd 305
mcm 3:2d28c56053cd 306 /**
mcm 3:2d28c56053cd 307 * @brief MCP4725_GetEEPROM_Data ( Vector_data_t* )
mcm 3:2d28c56053cd 308 *
mcm 3:2d28c56053cd 309 * @details It gets the eeprom value.
mcm 3:2d28c56053cd 310 *
mcm 3:2d28c56053cd 311 * @param[in] myEEPROMData: EEPROM value.
mcm 3:2d28c56053cd 312 *
mcm 3:2d28c56053cd 313 * @param[out] NaN.
mcm 3:2d28c56053cd 314 *
mcm 3:2d28c56053cd 315 *
mcm 3:2d28c56053cd 316 * @return Status of MCP4725_GetEEPROM_Data.
mcm 3:2d28c56053cd 317 *
mcm 3:2d28c56053cd 318 *
mcm 3:2d28c56053cd 319 * @author Manuel Caballero
mcm 3:2d28c56053cd 320 * @date 8/September/2017
mcm 3:2d28c56053cd 321 * @version 8/September/2017 The ORIGIN
mcm 3:2d28c56053cd 322 * @pre NaN
mcm 3:2d28c56053cd 323 * @warning NaN.
mcm 3:2d28c56053cd 324 */
mcm 3:2d28c56053cd 325 MCP4725::MCP4725_status_t MCP4725::MCP4725_GetEEPROM_Data ( Vector_data_t* myEEPROMData )
mcm 3:2d28c56053cd 326 {
mcm 3:2d28c56053cd 327 char cmd[] = { 0, 0, 0, 0, 0 };
mcm 3:2d28c56053cd 328 uint32_t aux = 0;
mcm 3:2d28c56053cd 329
mcm 3:2d28c56053cd 330 // Read command
mcm 3:2d28c56053cd 331 aux = i2c.read ( MCP4725_Addr, &cmd[0], 5 );
mcm 3:2d28c56053cd 332
mcm 3:2d28c56053cd 333 // Read EEPROM value
mcm 3:2d28c56053cd 334 myEEPROMData->EEPROM_Data = ( ( cmd[3] & 0x0F ) << 8 ) | ( cmd[4] );
mcm 3:2d28c56053cd 335
mcm 3:2d28c56053cd 336
mcm 3:2d28c56053cd 337
mcm 3:2d28c56053cd 338 if ( aux == I2C_SUCCESS )
mcm 3:2d28c56053cd 339 return MCP4725_SUCCESS;
mcm 3:2d28c56053cd 340 else
mcm 3:2d28c56053cd 341 return MCP4725_FAILURE;
mcm 3:2d28c56053cd 342 }
mcm 3:2d28c56053cd 343
mcm 3:2d28c56053cd 344
mcm 3:2d28c56053cd 345
mcm 3:2d28c56053cd 346 /**
mcm 3:2d28c56053cd 347 * @brief MCP4725_GetDAC_Data ( Vector_data_t* )
mcm 3:2d28c56053cd 348 *
mcm 3:2d28c56053cd 349 * @details It gets the DAC value.
mcm 3:2d28c56053cd 350 *
mcm 3:2d28c56053cd 351 * @param[in] myDACData: DAC value.
mcm 3:2d28c56053cd 352 *
mcm 3:2d28c56053cd 353 * @param[out] NaN.
mcm 3:2d28c56053cd 354 *
mcm 3:2d28c56053cd 355 *
mcm 3:2d28c56053cd 356 * @return Status of MCP4725_GetDAC_Data.
mcm 3:2d28c56053cd 357 *
mcm 3:2d28c56053cd 358 *
mcm 3:2d28c56053cd 359 * @author Manuel Caballero
mcm 3:2d28c56053cd 360 * @date 8/September/2017
mcm 3:2d28c56053cd 361 * @version 8/September/2017 The ORIGIN
mcm 3:2d28c56053cd 362 * @pre NaN
mcm 3:2d28c56053cd 363 * @warning NaN.
mcm 3:2d28c56053cd 364 */
mcm 3:2d28c56053cd 365 MCP4725::MCP4725_status_t MCP4725::MCP4725_GetDAC_Data ( Vector_data_t* myDACData )
mcm 3:2d28c56053cd 366 {
mcm 3:2d28c56053cd 367 char cmd[] = { 0, 0, 0, 0, 0 };
mcm 3:2d28c56053cd 368 uint32_t aux = 0;
mcm 3:2d28c56053cd 369
mcm 3:2d28c56053cd 370 // Read command
mcm 3:2d28c56053cd 371 aux = i2c.read ( MCP4725_Addr, &cmd[0], 5 );
mcm 3:2d28c56053cd 372
mcm 3:2d28c56053cd 373 // Read DAC value
mcm 3:2d28c56053cd 374 myDACData->DAC_Data = ( ( cmd[1] & 0xF0 ) << 4 ) | ( ( ( ( cmd[1] & 0x0F ) >> 4 ) | ( cmd[2] & 0xF0 ) >> 4 ) );
mcm 3:2d28c56053cd 375
mcm 3:2d28c56053cd 376
mcm 3:2d28c56053cd 377
mcm 3:2d28c56053cd 378 if ( aux == I2C_SUCCESS )
mcm 3:2d28c56053cd 379 return MCP4725_SUCCESS;
mcm 3:2d28c56053cd 380 else
mcm 3:2d28c56053cd 381 return MCP4725_FAILURE;
mcm 3:2d28c56053cd 382 }