Manuel Caballero / DS3231

DS3231.h@2:3710775b1864, 2017-12-20 (annotated)

Committer:
mcm
Date:
Wed Dec 20 12:42:33 2017 +0000
Revision:
2:3710775b1864
Parent:
1:8ac54576db6d
Child:
3:0226d018fdcb
The function file seems to be completed. Compilation without any errors.

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mcm 1:8ac54576db6d 1 /**
mcm 1:8ac54576db6d 2 * @brief DS3231.h
mcm 1:8ac54576db6d 3 * @details Extremely Accurate I2C-Integrated RTC/TCXO/Crystal.
mcm 1:8ac54576db6d 4 * Header file.
mcm 1:8ac54576db6d 5 *
mcm 1:8ac54576db6d 6 *
mcm 1:8ac54576db6d 7 * @return NA
mcm 1:8ac54576db6d 8 *
mcm 1:8ac54576db6d 9 * @author Manuel Caballero
mcm 1:8ac54576db6d 10 * @date 20/December/2017
mcm 1:8ac54576db6d 11 * @version 20/December/2017 The ORIGIN
mcm 1:8ac54576db6d 12 * @pre NaN.
mcm 1:8ac54576db6d 13 * @warning NaN
mcm 1:8ac54576db6d 14 * @pre This code belongs to AqueronteBlog ( http://unbarquero.blogspot.com ).
mcm 1:8ac54576db6d 15 */
mcm 1:8ac54576db6d 16 #ifndef DS3231_H
mcm 1:8ac54576db6d 17 #define DS3231_H
mcm 1:8ac54576db6d 18
mcm 1:8ac54576db6d 19 #include "mbed.h"
mcm 1:8ac54576db6d 20
mcm 1:8ac54576db6d 21
mcm 1:8ac54576db6d 22 /**
mcm 1:8ac54576db6d 23 Example:
mcm 1:8ac54576db6d 24
mcm 1:8ac54576db6d 25 [todo]
mcm 1:8ac54576db6d 26
mcm 1:8ac54576db6d 27 */
mcm 1:8ac54576db6d 28
mcm 1:8ac54576db6d 29
mcm 1:8ac54576db6d 30 /*!
mcm 1:8ac54576db6d 31 Library for the DS3231 Extremely Accurate I2C-Integrated RTC/TCXO/Crystal.
mcm 1:8ac54576db6d 32 */
mcm 1:8ac54576db6d 33 class DS3231
mcm 1:8ac54576db6d 34 {
mcm 1:8ac54576db6d 35 public:
mcm 1:8ac54576db6d 36 /**
mcm 1:8ac54576db6d 37 * @brief DEFAULT ADDRESSES
mcm 1:8ac54576db6d 38 */
mcm 1:8ac54576db6d 39 typedef enum {
mcm 1:8ac54576db6d 40 DS3231_ADDRESS = ( 0x68 << 1 ) /*!< DS3231 I2C Address */
mcm 1:8ac54576db6d 41 } DS3231_address_t;
mcm 1:8ac54576db6d 42
mcm 1:8ac54576db6d 43
mcm 1:8ac54576db6d 44 // REGISTERS
mcm 1:8ac54576db6d 45 /**
mcm 1:8ac54576db6d 46 * @brief TIMEKEEPING REGISTERS
mcm 1:8ac54576db6d 47 */
mcm 1:8ac54576db6d 48 typedef enum {
mcm 1:8ac54576db6d 49 DS3231_SECONDS = 0x00, /*!< Seconds. RANGE 00-59 */
mcm 1:8ac54576db6d 50 DS3231_MINUTES = 0x01, /*!< Minutes. RANGE 00-59 */
mcm 1:8ac54576db6d 51 DS3231_HOURS = 0x02, /*!< Hours. 1-12 + AM/PM 00-23 */
mcm 1:8ac54576db6d 52 DS3231_DAY = 0x03, /*!< Day. 1-7 */
mcm 1:8ac54576db6d 53 DS3231_DATE = 0x04, /*!< Date. 01-31 */
mcm 1:8ac54576db6d 54 DS3231_MONTH_CENTURY = 0x05, /*!< Month/Century. 01-12 + Century */
mcm 1:8ac54576db6d 55 DS3231_YEAR = 0x06, /*!< Year. 00-99 */
mcm 1:8ac54576db6d 56 DS3231_ALARM_1_SECONDS = 0x07, /*!< Alarm 1 seconds. 00-59 */
mcm 1:8ac54576db6d 57 DS3231_ALARM_1_MINUTES = 0x08, /*!< Alarm 1 minutes. 00-59 */
mcm 1:8ac54576db6d 58 DS3231_ALARM_1_HOURS = 0x09, /*!< Alarm 1 hours. 1-12 + AM/PM 00-23 */
mcm 1:8ac54576db6d 59 DS3231_ALARM_1_DAY_DATE = 0x0A, /*!< Alarm 1 day/date. 1-7/1-31 */
mcm 1:8ac54576db6d 60 DS3231_ALARM_2_MINUTES = 0x0B, /*!< Alarm 2 minutes. 00-59 */
mcm 1:8ac54576db6d 61 DS3231_ALARM_2_HOURS = 0x0C, /*!< Alarm 2 hours. 1-12 + AM/PM 00-23 */
mcm 1:8ac54576db6d 62 DS3231_ALARM_2_DAY_DATE = 0x0D, /*!< Alarm 2 day/date. 1-7/1-31 */
mcm 1:8ac54576db6d 63 DS3231_CONTROL = 0x0E, /*!< Control */
mcm 1:8ac54576db6d 64 DS3231_CONTROL_STATUS = 0x0F, /*!< Control/Status */
mcm 1:8ac54576db6d 65 DS3231_AGING_OFFSET = 0x10, /*!< Aging offset */
mcm 1:8ac54576db6d 66 DS3231_MSB_TEMPERATURE = 0x11, /*!< MSB of Temp */
mcm 1:8ac54576db6d 67 DS3231_LSB_TEMPERATURE = 0x12 /*!< LSB of Temp */
mcm 1:8ac54576db6d 68 } DS3231_registers_t;
mcm 1:8ac54576db6d 69
mcm 1:8ac54576db6d 70
mcm 1:8ac54576db6d 71
mcm 1:8ac54576db6d 72 // CONTROL REGISTER
mcm 1:8ac54576db6d 73 /**
mcm 1:8ac54576db6d 74 * @brief Enable Oscillator ( #EOSC )
mcm 1:8ac54576db6d 75 */
mcm 1:8ac54576db6d 76 typedef enum {
mcm 1:8ac54576db6d 77 CONTROL_STATUS_ENABLE_OSCILLATOR_MASK = ( 1 << 7 ), /*!< #EOSC Mask */
mcm 1:8ac54576db6d 78 CONTROL_STATUS_ENABLE_OSCILLATOR_ENABLED = ( 1 << 7 ), /*!< Enable oscillator */
mcm 1:8ac54576db6d 79 CONTROL_STATUS_ENABLE_OSCILLATOR_DISABLED = ( 0 << 7 ) /*!< Disable oscillator */
mcm 1:8ac54576db6d 80 } DS3231_control_status_enable_oscillator_t;
mcm 1:8ac54576db6d 81
mcm 1:8ac54576db6d 82
mcm 1:8ac54576db6d 83 /**
mcm 1:8ac54576db6d 84 * @brief Battery-Backed Square-Wave Enable ( BBSQW )
mcm 1:8ac54576db6d 85 */
mcm 1:8ac54576db6d 86 typedef enum {
mcm 1:8ac54576db6d 87 CONTROL_STATUS_BBSQW_MASK = ( 1 << 6 ), /*!< BBSQW Mask */
mcm 1:8ac54576db6d 88 CONTROL_STATUS_BBSQW_ENABLED = ( 1 << 6 ), /*!< Enable BBSQW */
mcm 1:8ac54576db6d 89 CONTROL_STATUS_BBSQW_DISABLED = ( 0 << 6 ) /*!< Disable BBSQW */
mcm 1:8ac54576db6d 90 } DS3231_control_status_bbsqw_t;
mcm 1:8ac54576db6d 91
mcm 1:8ac54576db6d 92
mcm 1:8ac54576db6d 93 /**
mcm 1:8ac54576db6d 94 * @brief Convert Temperature ( CONV )
mcm 1:8ac54576db6d 95 */
mcm 1:8ac54576db6d 96 typedef enum {
mcm 1:8ac54576db6d 97 CONTROL_STATUS_CONVERT_TEMPERATURE_MASK = ( 1 << 5 ), /*!< CONVERT TEMPERATURE Mask */
mcm 1:8ac54576db6d 98 CONTROL_STATUS_CONVERT_TEMPERATURE_ENABLED = ( 1 << 5 ), /*!< Enable CONVERT_TEMPERATURE */
mcm 1:8ac54576db6d 99 CONTROL_STATUS_CONVERT_TEMPERATURE_DISABLED = ( 0 << 5 ) /*!< Disable CONVERT_TEMPERATURE */
mcm 1:8ac54576db6d 100 } DS3231_control_status_convert_temperature_t;
mcm 1:8ac54576db6d 101
mcm 1:8ac54576db6d 102
mcm 1:8ac54576db6d 103 /**
mcm 1:8ac54576db6d 104 * @brief Rate Select ( RS2 and RS1 )
mcm 1:8ac54576db6d 105 */
mcm 1:8ac54576db6d 106 typedef enum {
mcm 1:8ac54576db6d 107 CONTROL_STATUS_RATE_SELECT_MASK = ( 3 << 3 ), /*!< Rate select Mask */
mcm 1:8ac54576db6d 108 CONTROL_STATUS_RATE_SELECT_1_HZ = ( 0 << 3 ), /*!< Rate select 1 Hz */
mcm 1:8ac54576db6d 109 CONTROL_STATUS_RATE_SELECT_1_024_KHZ = ( 1 << 3 ), /*!< Rate select 1.024 kHz */
mcm 1:8ac54576db6d 110 CONTROL_STATUS_RATE_SELECT_4_096_KHZ = ( 2 << 3 ), /*!< Rate select 4.096 kHz */
mcm 1:8ac54576db6d 111 CONTROL_STATUS_RATE_SELECT_8_192_KHZ = ( 3 << 3 ) /*!< Rate select 8.192 kHz */
mcm 1:8ac54576db6d 112 } DS3231_control_status_rate_select_t;
mcm 1:8ac54576db6d 113
mcm 1:8ac54576db6d 114
mcm 1:8ac54576db6d 115 /**
mcm 1:8ac54576db6d 116 * @brief Interrupt Control ( INTCN )
mcm 1:8ac54576db6d 117 */
mcm 1:8ac54576db6d 118 typedef enum {
mcm 1:8ac54576db6d 119 CONTROL_STATUS_INTERRUPT_CONTROL_MASK = ( 1 << 2 ), /*!< Interrupt control Mask */
mcm 1:8ac54576db6d 120 CONTROL_STATUS_INTERRUPT_CONTROL_SQW = ( 0 << 2 ), /*!< Square wave is output */
mcm 1:8ac54576db6d 121 CONTROL_STATUS_INTERRUPT_CONTROL_INT = ( 1 << 2 ) /*!< Alarm activates the output */
mcm 1:8ac54576db6d 122 } DS3231_control_status_interrupt_control_t;
mcm 1:8ac54576db6d 123
mcm 1:8ac54576db6d 124
mcm 1:8ac54576db6d 125 /**
mcm 1:8ac54576db6d 126 * @brief Alarm 2 Interrupt Enable ( A2IE )
mcm 1:8ac54576db6d 127 */
mcm 1:8ac54576db6d 128 typedef enum {
mcm 1:8ac54576db6d 129 CONTROL_STATUS_ALARM2_MASK = ( 1 << 1 ), /*!< Alarm 2 Mask */
mcm 1:8ac54576db6d 130 CONTROL_STATUS_ALARM2_ENABLED = ( 1 << 1 ), /*!< Alarm 2 enabled */
mcm 1:8ac54576db6d 131 CONTROL_STATUS_ALARM2_DISABLED = ( 0 << 1 ) /*!< Alarm 2 disabled */
mcm 1:8ac54576db6d 132 } DS3231_control_status_alarm2_t;
mcm 1:8ac54576db6d 133
mcm 1:8ac54576db6d 134
mcm 1:8ac54576db6d 135 /**
mcm 1:8ac54576db6d 136 * @brief Alarm 1 Interrupt Enable ( A1IE )
mcm 1:8ac54576db6d 137 */
mcm 1:8ac54576db6d 138 typedef enum {
mcm 1:8ac54576db6d 139 CONTROL_STATUS_ALARM1_MASK = ( 1 << 0 ), /*!< Alarm 1 Mask */
mcm 1:8ac54576db6d 140 CONTROL_STATUS_ALARM1_ENABLED = ( 1 << 0 ), /*!< Alarm 1 enabled */
mcm 1:8ac54576db6d 141 CONTROL_STATUS_ALARM1_DISABLED = ( 0 << 0 ) /*!< Alarm 1 disabled */
mcm 1:8ac54576db6d 142 } DS3231_control_status_alarm1_t;
mcm 1:8ac54576db6d 143
mcm 1:8ac54576db6d 144
mcm 1:8ac54576db6d 145
mcm 1:8ac54576db6d 146 // STATUS REGISTER
mcm 1:8ac54576db6d 147 /**
mcm 1:8ac54576db6d 148 * @brief Oscillator Stop Flag ( OSF )
mcm 1:8ac54576db6d 149 */
mcm 1:8ac54576db6d 150 typedef enum {
mcm 1:8ac54576db6d 151 STATUS_OSCILLATOR_STOP_FLAG_MASK = ( 1 << 7 ), /*!< OSF Mask */
mcm 1:8ac54576db6d 152 STATUS_OSCILLATOR_STOP_FLAG_ENABLED = ( 1 << 7 ), /*!< Flag ON */
mcm 1:8ac54576db6d 153 STATUS_OSCILLATOR_STOP_FLAG_DISABLED = ( 0 << 7 ), /*!< Flag OFF */
mcm 1:8ac54576db6d 154 STATUS_OSCILLATOR_STOP_FLAG_RESET = ( 0 << 7 ) /*!< Reset flag */
mcm 1:8ac54576db6d 155 } DS3231_status_oscillator_stop_flag_t;
mcm 1:8ac54576db6d 156
mcm 1:8ac54576db6d 157
mcm 1:8ac54576db6d 158 /**
mcm 1:8ac54576db6d 159 * @brief Enable 32kHz Output ( EN32kHz )
mcm 1:8ac54576db6d 160 */
mcm 1:8ac54576db6d 161 typedef enum {
mcm 1:8ac54576db6d 162 STATUS_ENABLE_32KHZ_OUTPUT_MASK = ( 1 << 3 ), /*!< 32kHz output mask */
mcm 1:8ac54576db6d 163 STATUS_ENABLE_32KHZ_OUTPUT_ENABLED = ( 1 << 3 ), /*!< 32kHz output on 32kHz pin */
mcm 1:8ac54576db6d 164 STATUS_ENABLE_32KHZ_OUTPUT_DISABLED = ( 0 << 3 ) /*!< 32kHz output disabled */
mcm 1:8ac54576db6d 165 } DS3231_status_enable_32khz_output_t;
mcm 1:8ac54576db6d 166
mcm 1:8ac54576db6d 167
mcm 1:8ac54576db6d 168 /**
mcm 1:8ac54576db6d 169 * @brief Busy ( BSY )
mcm 1:8ac54576db6d 170 */
mcm 1:8ac54576db6d 171 typedef enum {
mcm 1:8ac54576db6d 172 STATUS_BUSY_MASK = ( 1 << 2 ), /*!< BSY mask */
mcm 1:8ac54576db6d 173 STATUS_BUSY_BUSY = ( 1 << 2 ), /*!< device busy executing TCXO functions */
mcm 1:8ac54576db6d 174 STATUS_BUSY_NOBUSY = ( 0 << 2 ) /*!< device IS NOT busy */
mcm 1:8ac54576db6d 175 } DS3231_status_busy_t;
mcm 1:8ac54576db6d 176
mcm 1:8ac54576db6d 177
mcm 1:8ac54576db6d 178 /**
mcm 1:8ac54576db6d 179 * @brief Alarm 2 Flag ( A2F )
mcm 1:8ac54576db6d 180 */
mcm 1:8ac54576db6d 181 typedef enum {
mcm 1:8ac54576db6d 182 STATUS_ALARM2_FLAG_MASK = ( 1 << 1 ), /*!< Alarm 2 flag mask */
mcm 1:8ac54576db6d 183 STATUS_ALARM2_FLAG_ENABLED = ( 1 << 1 ), /*!< Alarm 2 flag enabled */
mcm 1:8ac54576db6d 184 STATUS_ALARM2_FLAG_DISABLED = ( 0 << 1 ), /*!< Alarm 2 flag disabled */
mcm 1:8ac54576db6d 185 STATUS_ALARM2_FLAG_RESET = ( 0 << 1 ), /*!< Alarm 2 flag reset flag */
mcm 1:8ac54576db6d 186 } DS3231_status_alarm2_flag_t;
mcm 1:8ac54576db6d 187
mcm 1:8ac54576db6d 188
mcm 1:8ac54576db6d 189
mcm 1:8ac54576db6d 190 /**
mcm 1:8ac54576db6d 191 * @brief Alarm 1 Flag ( A1F )
mcm 1:8ac54576db6d 192 */
mcm 1:8ac54576db6d 193 typedef enum {
mcm 1:8ac54576db6d 194 STATUS_ALARM1_FLAG_MASK = ( 1 << 0 ), /*!< Alarm 1 flag mask */
mcm 1:8ac54576db6d 195 STATUS_ALARM1_FLAG_ENABLED = ( 1 << 0 ), /*!< Alarm 1 flag enabled */
mcm 1:8ac54576db6d 196 STATUS_ALARM1_FLAG_DISABLED = ( 0 << 0 ), /*!< Alarm 1 flag disabled */
mcm 1:8ac54576db6d 197 STATUS_ALARM1_FLAG_RESET = ( 0 << 0 ), /*!< Alarm 1 flag reset flag */
mcm 1:8ac54576db6d 198 } DS3231_status_alarm1_flag_t;
mcm 1:8ac54576db6d 199
mcm 1:8ac54576db6d 200
mcm 1:8ac54576db6d 201
mcm 1:8ac54576db6d 202 // ALARMS
mcm 1:8ac54576db6d 203 /**
mcm 1:8ac54576db6d 204 * @brief Alarm 1 Mask Bits
mcm 1:8ac54576db6d 205 */
mcm 1:8ac54576db6d 206 typedef enum {
mcm 1:8ac54576db6d 207 ALARM1_ALARM_ONCE_PER_SECOND = 1, /*!< Alarm 1 once per second */
mcm 1:8ac54576db6d 208 ALARM1_WHEN_SECONDS_MATCH = 2, /*!< Alarm 1 when seconds match */
mcm 1:8ac54576db6d 209 ALARM1_WHEN_MINUTES_AND_SECONDS_MATCH = 3, /*!< Alarm 1 when minutes and seconds match */
mcm 1:8ac54576db6d 210 ALARM1_WHEN_HOURS_MINUTES_AND_SECONDS_MATCH = 4, /*!< Alarm 1 when hours, minutes, and seconds match */
mcm 1:8ac54576db6d 211 ALARM1_WHEN_DATE_HOURS_MINUTES_AND_SECONDS_MATCH = 5, /*!< Alarm 1 when date, hours, minutes, and seconds match */
mcm 1:8ac54576db6d 212 ALARM1_WHEN_DAY_HOURS_MINUTES_AND_SECONDS_MATCH = 6 /*!< Alarm 1 when day, hours, minutes, and seconds match */
mcm 1:8ac54576db6d 213 } DS3231_alarm1_register_t;
mcm 1:8ac54576db6d 214
mcm 1:8ac54576db6d 215
mcm 1:8ac54576db6d 216 /**
mcm 1:8ac54576db6d 217 * @brief Alarm 2 Mask Bits
mcm 1:8ac54576db6d 218 */
mcm 1:8ac54576db6d 219 typedef enum {
mcm 1:8ac54576db6d 220 ALARM2_ALARM_ONCE_PER_MINUTE = 1, /*!< Alarm 2 once per minute */
mcm 1:8ac54576db6d 221 ALARM2_WHEN_MINUTES_MATCH = 2, /*!< Alarm 2 when minutes match */
mcm 1:8ac54576db6d 222 ALARM2_WHEN_HOURS_MINUTES_MATCH = 3, /*!< Alarm 2 when hours and minutes match */
mcm 1:8ac54576db6d 223 ALARM2_WHEN_DATE_HOURS_AND_MINUTES_MATCH = 4, /*!< Alarm 2 when date, hours and minutes match */
mcm 1:8ac54576db6d 224 ALARM2_WHEN_DAY_HOURS_AND_MINUTES_MATCH = 5 /*!< Alarm 2 when day, hours and minutes match */
mcm 1:8ac54576db6d 225 } DS3231_alarm2_register_t;
mcm 1:8ac54576db6d 226
mcm 1:8ac54576db6d 227
mcm 1:8ac54576db6d 228 // TIMEKEEPING REGISTERS
mcm 1:8ac54576db6d 229 // SECONDS
mcm 1:8ac54576db6d 230 typedef enum {
mcm 1:8ac54576db6d 231 SECONDS_SECONDS_MASK = 0x0F, /*!< Seconds Seconds mask */
mcm 1:8ac54576db6d 232 SECONDS_10SECONDS_MASK = 0x70 /*!< Seconds 10Seconds mask */
mcm 1:8ac54576db6d 233 } DS3231_seconds_t;
mcm 1:8ac54576db6d 234
mcm 1:8ac54576db6d 235
mcm 1:8ac54576db6d 236 // MINUTES
mcm 1:8ac54576db6d 237 typedef enum {
mcm 1:8ac54576db6d 238 MINUTES_MINUTES_MASK = 0x0F, /*!< Minutes Minutes mask */
mcm 1:8ac54576db6d 239 MINUTES_10MINUTES_MASK = 0x70 /*!< Minutes 10Minutes mask */
mcm 1:8ac54576db6d 240 } DS3231_minutes_t;
mcm 1:8ac54576db6d 241
mcm 1:8ac54576db6d 242
mcm 1:8ac54576db6d 243 // HOURS
mcm 1:8ac54576db6d 244 typedef enum {
mcm 1:8ac54576db6d 245 HOURS_HOUR_MASK = 0x0F, /*!< Hour Hour mask */
mcm 1:8ac54576db6d 246 HOURS_10HOUR_MASK = 0x10, /*!< Hour 10Hour mask */
mcm 1:8ac54576db6d 247
mcm 1:8ac54576db6d 248 HOURS_nAM_PM_MASK = 0x20, /*!< Hour #AM/PM mask */
mcm 1:8ac54576db6d 249 HOURS_AM_ENABLED = ( 0 << 5 ), /*!< Hour AM ENABLED */
mcm 1:8ac54576db6d 250 HOURS_PM_ENABLED = ( 1 << 5 ), /*!< Hour PM ENABLED */
mcm 1:8ac54576db6d 251
mcm 1:8ac54576db6d 252 HOURS_12_n24_MASK = 0x40, /*!< Hour 12/#24 mask */
mcm 1:8ac54576db6d 253 HOURS_12_ENABLED = ( 1 << 6 ), /*!< Hour 12 ENABLED */
mcm 1:8ac54576db6d 254 HOURS_24_ENABLED = ( 0 << 6 ), /*!< Hour 24 ENABLED */
mcm 1:8ac54576db6d 255 } DS3231_hours_t;
mcm 1:8ac54576db6d 256
mcm 1:8ac54576db6d 257
mcm 1:8ac54576db6d 258 // DAY
mcm 1:8ac54576db6d 259 typedef enum {
mcm 1:8ac54576db6d 260 DAY_DAY_MASK = 0x07 /*!< Day Day mask */
mcm 1:8ac54576db6d 261 } DS3231_day_t;
mcm 1:8ac54576db6d 262
mcm 1:8ac54576db6d 263
mcm 1:8ac54576db6d 264 // DATE
mcm 1:8ac54576db6d 265 typedef enum {
mcm 1:8ac54576db6d 266 DATE_DATE_MASK = 0x0F, /*!< Date Date mask */
mcm 1:8ac54576db6d 267 DATE_10DATE_MASK = 0x30 /*!< Date 10Date mask */
mcm 1:8ac54576db6d 268 } DS3231_date_t;
mcm 1:8ac54576db6d 269
mcm 1:8ac54576db6d 270
mcm 1:8ac54576db6d 271 // MONTH/CENTURY
mcm 1:8ac54576db6d 272 typedef enum {
mcm 1:8ac54576db6d 273 MONTH_MONTH_MASK = 0x0F, /*!< Month Month mask */
mcm 1:8ac54576db6d 274 MONTH_10MONTH_MASK = 0x10, /*!< Month 10Month mask */
mcm 1:8ac54576db6d 275 MONTH_CENTURY_MASK = 0x80 /*!< Month Century mask */
mcm 1:8ac54576db6d 276 } DS3231_month_t;
mcm 1:8ac54576db6d 277
mcm 1:8ac54576db6d 278
mcm 1:8ac54576db6d 279 // YEAR
mcm 1:8ac54576db6d 280 typedef enum {
mcm 1:8ac54576db6d 281 YEAR_YEAR_MASK = 0x0F, /*!< Year Year mask */
mcm 1:8ac54576db6d 282 YEAR_10YEAR_MASK = 0xF0 /*!< Year 10Year mask */
mcm 1:8ac54576db6d 283 } DS3231_year_t;
mcm 1:8ac54576db6d 284
mcm 1:8ac54576db6d 285
mcm 1:8ac54576db6d 286 // ALARM 1 SECONDS
mcm 1:8ac54576db6d 287 typedef enum {
mcm 1:8ac54576db6d 288 ALARM1_A1M1_MASK = 0x80, /*!< Alarm1 A1M1 mask */
mcm 1:8ac54576db6d 289 ALARM1_10SECONDS_MASK = 0x70, /*!< Alarm1 10Seconds mask */
mcm 1:8ac54576db6d 290 ALARM1_SECONDS_MASK = 0x0F /*!< Alarm1 Seconds mask */
mcm 1:8ac54576db6d 291 } DS3231_alarm1_seconds_t;
mcm 1:8ac54576db6d 292
mcm 1:8ac54576db6d 293
mcm 1:8ac54576db6d 294 // ALARM 1 MINUTES
mcm 1:8ac54576db6d 295 typedef enum {
mcm 1:8ac54576db6d 296 ALARM1_A1M2_MASK = 0x80, /*!< Alarm1 A1M2 mask */
mcm 1:8ac54576db6d 297 ALARM1_10MINUTES_MASK = 0x70, /*!< Alarm1 10Minutes mask */
mcm 1:8ac54576db6d 298 ALARM1_MINUTES_MASK = 0x0F /*!< Alarm1 Minutes mask */
mcm 1:8ac54576db6d 299 } DS3231_alarm1_minutes_t;
mcm 1:8ac54576db6d 300
mcm 1:8ac54576db6d 301
mcm 1:8ac54576db6d 302 // ALARM 1 HOURS
mcm 1:8ac54576db6d 303 typedef enum {
mcm 1:8ac54576db6d 304 ALARM1_A1M3_MASK = 0x80, /*!< Alarm1 A1M3 mask */
mcm 1:8ac54576db6d 305 ALARM1_10HOUR_MASK = 0x10, /*!< Alarm1 10Hour mask */
mcm 1:8ac54576db6d 306 ALARM1_HOUR_MASK = 0x0F /*!< Alarm1 Hour mask */
mcm 1:8ac54576db6d 307 } DS3231_alarm1_hours_t;
mcm 1:8ac54576db6d 308
mcm 1:8ac54576db6d 309
mcm 1:8ac54576db6d 310 // ALARM 1 DAY/DATE
mcm 1:8ac54576db6d 311 typedef enum {
mcm 1:8ac54576db6d 312 ALARM1_A1M4_MASK = 0x80, /*!< Alarm1 A1M4 mask */
mcm 1:8ac54576db6d 313 ALARM1_DYDT_MASK = 0x40, /*!< Alarm1 DY/DT mask */
mcm 1:8ac54576db6d 314 ALARM1_10DATE_MASK = 0x30, /*!< Alarm1 10Date mask */
mcm 1:8ac54576db6d 315 ALARM1_DATE_DAY_MASK = 0x0F /*!< Alarm1 Day/Date mask */
mcm 1:8ac54576db6d 316 } DS3231_alarm1_day_date_t;
mcm 1:8ac54576db6d 317
mcm 1:8ac54576db6d 318
mcm 1:8ac54576db6d 319 // ALARM 2 MINUTES
mcm 1:8ac54576db6d 320 typedef enum {
mcm 1:8ac54576db6d 321 ALARM2_A2M2_MASK = 0x80, /*!< Alarm2 A2M2 mask */
mcm 1:8ac54576db6d 322 ALARM2_10MINUTES_MASK = 0x70, /*!< Alarm2 10Minutes mask */
mcm 1:8ac54576db6d 323 ALARM2_MINUTES_MASK = 0x0F /*!< Alarm2 Minutes mask */
mcm 1:8ac54576db6d 324 } DS3231_alarm2_minutes_t;
mcm 1:8ac54576db6d 325
mcm 1:8ac54576db6d 326
mcm 1:8ac54576db6d 327 // ALARM 2 HOURS
mcm 1:8ac54576db6d 328 typedef enum {
mcm 1:8ac54576db6d 329 ALARM2_A2M3_MASK = 0x80, /*!< Alarm2 A1M3 mask */
mcm 1:8ac54576db6d 330 ALARM2_10HOUR_MASK = 0x10, /*!< Alarm2 10Hour mask */
mcm 1:8ac54576db6d 331 ALARM2_HOUR_MASK = 0x0F /*!< Alarm2 Hour mask */
mcm 1:8ac54576db6d 332 } DS3231_alarm2_hours_t;
mcm 1:8ac54576db6d 333
mcm 1:8ac54576db6d 334
mcm 1:8ac54576db6d 335 // ALARM 2 DAY/DATE
mcm 1:8ac54576db6d 336 typedef enum {
mcm 1:8ac54576db6d 337 ALARM2_A2M4_MASK = 0x80, /*!< Alarm2 A2M4 mask */
mcm 1:8ac54576db6d 338 ALARM2_DYDT_MASK = 0x40, /*!< Alarm2 DY/DT mask */
mcm 1:8ac54576db6d 339 ALARM2_10DATE_MASK = 0x30, /*!< Alarm2 10Date mask */
mcm 1:8ac54576db6d 340 ALARM2_DATE_DAY_MASK = 0x0F /*!< Alarm2 Day/Date mask */
mcm 1:8ac54576db6d 341 } DS3231_alarm2_day_date_t;
mcm 1:8ac54576db6d 342
mcm 1:8ac54576db6d 343
mcm 1:8ac54576db6d 344
mcm 1:8ac54576db6d 345 // MACRO: It turns BCD into decimal
mcm 1:8ac54576db6d 346 #define _MYBCD_TO_DECIMAL( x ) ({ \
mcm 1:8ac54576db6d 347 ( ( x & 0x0F ) + ( ( ( x & 0xF0 ) >> 4) * 10) ); \
mcm 1:8ac54576db6d 348 })
mcm 1:8ac54576db6d 349
mcm 1:8ac54576db6d 350 // MACRO: It turns decimal into BCD
mcm 1:8ac54576db6d 351 #define _MYDECIMAL_TO_BCD( x ) ({ \
mcm 1:8ac54576db6d 352 ( ( ( x / 10) << 4 ) & 0xF0 ) | ( ( x % 10 ) & 0x0F ); \
mcm 1:8ac54576db6d 353 })
mcm 1:8ac54576db6d 354
mcm 1:8ac54576db6d 355
mcm 1:8ac54576db6d 356
mcm 1:8ac54576db6d 357
mcm 1:8ac54576db6d 358
mcm 1:8ac54576db6d 359
mcm 1:8ac54576db6d 360 #ifndef DS3231_VECTOR_STRUCT_H
mcm 1:8ac54576db6d 361 #define DS3231_VECTOR_STRUCT_H
mcm 1:8ac54576db6d 362 typedef struct {
mcm 1:8ac54576db6d 363 uint8_t MSBTemperature;
mcm 1:8ac54576db6d 364 uint8_t LSBTemperature;
mcm 1:8ac54576db6d 365 uint8_t RawAging;
mcm 1:8ac54576db6d 366 uint8_t Control_Status_Register;
mcm 1:8ac54576db6d 367
mcm 1:8ac54576db6d 368 float Temperature;
mcm 1:8ac54576db6d 369 } DS3231_vector_data_t;
mcm 1:8ac54576db6d 370
mcm 1:8ac54576db6d 371 typedef struct {
mcm 1:8ac54576db6d 372 uint8_t Date;
mcm 1:8ac54576db6d 373 uint8_t Month;
mcm 1:8ac54576db6d 374 uint8_t Year;
mcm 1:8ac54576db6d 375 uint8_t DayOfWeek;
mcm 1:8ac54576db6d 376 uint8_t Century;
mcm 1:8ac54576db6d 377
mcm 1:8ac54576db6d 378 uint8_t Hours;
mcm 1:8ac54576db6d 379 uint8_t Minutes;
mcm 1:8ac54576db6d 380 uint8_t Seconds;
mcm 1:8ac54576db6d 381 uint8_t Mode_nAM_PM; /*!< Mode_nAM_PM = 0 -> AM | Mode_nAM_PM = 0x20 -> PM */
mcm 1:8ac54576db6d 382 uint8_t Mode_12_n24; /*!< Mode_12_n24 = 0x40 -> 12 | Mode_12_n24 = 0 -> 24 */
mcm 1:8ac54576db6d 383 } DS3231_vector_date_time_t;
mcm 1:8ac54576db6d 384 #endif
mcm 1:8ac54576db6d 385
mcm 1:8ac54576db6d 386
mcm 1:8ac54576db6d 387
mcm 1:8ac54576db6d 388 /**
mcm 1:8ac54576db6d 389 * @brief INTERNAL CONSTANTS
mcm 1:8ac54576db6d 390 */
mcm 1:8ac54576db6d 391 typedef enum {
mcm 1:8ac54576db6d 392 DS3231_SUCCESS = 0,
mcm 1:8ac54576db6d 393 DS3231_FAILURE = 1,
mcm 1:8ac54576db6d 394 DS3231_TIMEOUT = 1000,
mcm 1:8ac54576db6d 395
mcm 2:3710775b1864 396 I2C_SUCCESS = 0, /*!< I2C communication was fine */
mcm 2:3710775b1864 397 I2C_FAILURE = 1
mcm 1:8ac54576db6d 398 } DS3231_status_t;
mcm 1:8ac54576db6d 399
mcm 1:8ac54576db6d 400
mcm 1:8ac54576db6d 401
mcm 1:8ac54576db6d 402
mcm 1:8ac54576db6d 403 /** Create an DS3231 object connected to the specified I2C pins.
mcm 1:8ac54576db6d 404 *
mcm 1:8ac54576db6d 405 * @param sda I2C data pin
mcm 1:8ac54576db6d 406 * @param scl I2C clock pin
mcm 1:8ac54576db6d 407 * @param addr I2C slave address
mcm 1:8ac54576db6d 408 * @param freq I2C frequency in Hz.
mcm 1:8ac54576db6d 409 */
mcm 1:8ac54576db6d 410 DS3231 ( PinName sda, PinName scl, uint32_t addr, uint32_t freq );
mcm 1:8ac54576db6d 411
mcm 1:8ac54576db6d 412 /** Delete DS3231 object.
mcm 1:8ac54576db6d 413 */
mcm 1:8ac54576db6d 414 ~DS3231();
mcm 1:8ac54576db6d 415
mcm 1:8ac54576db6d 416 /** It reads the temperature data.
mcm 1:8ac54576db6d 417 */
mcm 1:8ac54576db6d 418 DS3231_status_t DS3231_ReadTemperature ( DS3231_vector_data_t* myTemperature );
mcm 1:8ac54576db6d 419
mcm 1:8ac54576db6d 420 /** It reads the raw temperature data.
mcm 1:8ac54576db6d 421 */
mcm 1:8ac54576db6d 422 DS3231_status_t DS3231_ReadRawTemperature ( DS3231_vector_data_t* myRawTemperature );
mcm 1:8ac54576db6d 423
mcm 1:8ac54576db6d 424 /** It triggers a new temperature measurement.
mcm 1:8ac54576db6d 425 */
mcm 1:8ac54576db6d 426 DS3231_status_t DS3231_StartNewConvertTemperature ( void );
mcm 1:8ac54576db6d 427
mcm 1:8ac54576db6d 428 /** It reads the raw aging data.
mcm 1:8ac54576db6d 429 */
mcm 1:8ac54576db6d 430 DS3231_status_t DS3231_ReadRawAging ( DS3231_vector_data_t* myRawAging );
mcm 1:8ac54576db6d 431
mcm 1:8ac54576db6d 432 /** It sets the 32kHz pin output: Enabled/Disabled.
mcm 1:8ac54576db6d 433 */
mcm 1:8ac54576db6d 434 DS3231_status_t DS3231_Status32kHzPin ( DS3231_status_enable_32khz_output_t my32kHzPin );
mcm 1:8ac54576db6d 435
mcm 1:8ac54576db6d 436 /** It clears alarm flags.
mcm 1:8ac54576db6d 437 */
mcm 1:8ac54576db6d 438 DS3231_status_t DS3231_ClearAlarmFlag ( DS3231_status_alarm1_flag_t myA1F, DS3231_status_alarm2_flag_t myA2F );
mcm 1:8ac54576db6d 439
mcm 1:8ac54576db6d 440 /** It sets the alarm1.
mcm 1:8ac54576db6d 441 */
mcm 1:8ac54576db6d 442 DS3231_status_t DS3231_SetAlarm1 ( DS3231_alarm1_register_t myAlarm1 );
mcm 1:8ac54576db6d 443
mcm 1:8ac54576db6d 444 /** It sets the alarm2.
mcm 1:8ac54576db6d 445 */
mcm 1:8ac54576db6d 446 DS3231_status_t DS3231_SetAlarm2 ( DS3231_alarm2_register_t myAlarm2 );
mcm 1:8ac54576db6d 447
mcm 1:8ac54576db6d 448 /** It enables/disables Alarm ( 1 and 2 ) interrupts.
mcm 1:8ac54576db6d 449 */
mcm 1:8ac54576db6d 450 DS3231_status_t DS3231_SetAlarmsInterrupt ( DS3231_control_status_alarm1_t myAlarm1, DS3231_control_status_alarm2_t myAlarm2 );
mcm 1:8ac54576db6d 451
mcm 1:8ac54576db6d 452 /** It sets square-wave output frequency.
mcm 1:8ac54576db6d 453 */
mcm 1:8ac54576db6d 454 DS3231_status_t DS3231_SetSquareWaveOutput ( DS3231_control_status_rate_select_t myRate );
mcm 1:8ac54576db6d 455
mcm 1:8ac54576db6d 456 /** It gets the date.
mcm 1:8ac54576db6d 457 */
mcm 1:8ac54576db6d 458 DS3231_status_t DS3231_GetDate ( DS3231_vector_date_time_t* myDate );
mcm 1:8ac54576db6d 459
mcm 1:8ac54576db6d 460 /** It sets the date.
mcm 1:8ac54576db6d 461 */
mcm 1:8ac54576db6d 462 DS3231_status_t DS3231_SetDate ( DS3231_vector_date_time_t myDate );
mcm 1:8ac54576db6d 463
mcm 1:8ac54576db6d 464 /** It gets the time.
mcm 1:8ac54576db6d 465 */
mcm 1:8ac54576db6d 466 DS3231_status_t DS3231_GetTime ( DS3231_vector_date_time_t* myTime );
mcm 1:8ac54576db6d 467
mcm 1:8ac54576db6d 468 /** It sets the time.
mcm 1:8ac54576db6d 469 */
mcm 1:8ac54576db6d 470 DS3231_status_t DS3231_SetTime ( DS3231_vector_date_time_t myTime );
mcm 1:8ac54576db6d 471
mcm 1:8ac54576db6d 472 /** It gets the CONTROL/STATUS register.
mcm 1:8ac54576db6d 473 */
mcm 1:8ac54576db6d 474 DS3231_status_t DS3231_GetControlStatusRegister ( DS3231_vector_data_t* myControlStatusReg );
mcm 1:8ac54576db6d 475
mcm 1:8ac54576db6d 476
mcm 1:8ac54576db6d 477
mcm 1:8ac54576db6d 478
mcm 1:8ac54576db6d 479 private:
mcm 1:8ac54576db6d 480 I2C _i2c;
mcm 1:8ac54576db6d 481 uint32_t _DS3231_Addr;
mcm 1:8ac54576db6d 482 };
mcm 1:8ac54576db6d 483
mcm 1:8ac54576db6d 484 #endif