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Dependents:   DHTSensor_Test K64F_eCompass_OneNET_JW

TARGET_ARCH_GPRS/core_cm4_simd.h@0:2cc6bb4d7fea, 2015-02-25 (annotated)

Committer:
mbotkinl
Date:
Wed Feb 25 20:22:22 2015 +0000
Revision:
0:2cc6bb4d7fea
Working code to read Temperature and Humidity readings

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbotkinl 0:2cc6bb4d7fea 1 /**************************************************************************//**
mbotkinl 0:2cc6bb4d7fea 2 * @file core_cm4_simd.h
mbotkinl 0:2cc6bb4d7fea 3 * @brief CMSIS Cortex-M4 SIMD Header File
mbotkinl 0:2cc6bb4d7fea 4 * @version V3.20
mbotkinl 0:2cc6bb4d7fea 5 * @date 25. February 2013
mbotkinl 0:2cc6bb4d7fea 6 *
mbotkinl 0:2cc6bb4d7fea 7 * @note
mbotkinl 0:2cc6bb4d7fea 8 *
mbotkinl 0:2cc6bb4d7fea 9 ******************************************************************************/
mbotkinl 0:2cc6bb4d7fea 10 /* Copyright (c) 2009 - 2013 ARM LIMITED
mbotkinl 0:2cc6bb4d7fea 11
mbotkinl 0:2cc6bb4d7fea 12 All rights reserved.
mbotkinl 0:2cc6bb4d7fea 13 Redistribution and use in source and binary forms, with or without
mbotkinl 0:2cc6bb4d7fea 14 modification, are permitted provided that the following conditions are met:
mbotkinl 0:2cc6bb4d7fea 15 - Redistributions of source code must retain the above copyright
mbotkinl 0:2cc6bb4d7fea 16 notice, this list of conditions and the following disclaimer.
mbotkinl 0:2cc6bb4d7fea 17 - Redistributions in binary form must reproduce the above copyright
mbotkinl 0:2cc6bb4d7fea 18 notice, this list of conditions and the following disclaimer in the
mbotkinl 0:2cc6bb4d7fea 19 documentation and/or other materials provided with the distribution.
mbotkinl 0:2cc6bb4d7fea 20 - Neither the name of ARM nor the names of its contributors may be used
mbotkinl 0:2cc6bb4d7fea 21 to endorse or promote products derived from this software without
mbotkinl 0:2cc6bb4d7fea 22 specific prior written permission.
mbotkinl 0:2cc6bb4d7fea 23 *
mbotkinl 0:2cc6bb4d7fea 24 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
mbotkinl 0:2cc6bb4d7fea 25 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
mbotkinl 0:2cc6bb4d7fea 26 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
mbotkinl 0:2cc6bb4d7fea 27 ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
mbotkinl 0:2cc6bb4d7fea 28 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
mbotkinl 0:2cc6bb4d7fea 29 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
mbotkinl 0:2cc6bb4d7fea 30 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
mbotkinl 0:2cc6bb4d7fea 31 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
mbotkinl 0:2cc6bb4d7fea 32 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
mbotkinl 0:2cc6bb4d7fea 33 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
mbotkinl 0:2cc6bb4d7fea 34 POSSIBILITY OF SUCH DAMAGE.
mbotkinl 0:2cc6bb4d7fea 35 ---------------------------------------------------------------------------*/
mbotkinl 0:2cc6bb4d7fea 36
mbotkinl 0:2cc6bb4d7fea 37
mbotkinl 0:2cc6bb4d7fea 38 #ifdef __cplusplus
mbotkinl 0:2cc6bb4d7fea 39 extern "C" {
mbotkinl 0:2cc6bb4d7fea 40 #endif
mbotkinl 0:2cc6bb4d7fea 41
mbotkinl 0:2cc6bb4d7fea 42 #ifndef __CORE_CM4_SIMD_H
mbotkinl 0:2cc6bb4d7fea 43 #define __CORE_CM4_SIMD_H
mbotkinl 0:2cc6bb4d7fea 44
mbotkinl 0:2cc6bb4d7fea 45
mbotkinl 0:2cc6bb4d7fea 46 /*******************************************************************************
mbotkinl 0:2cc6bb4d7fea 47 * Hardware Abstraction Layer
mbotkinl 0:2cc6bb4d7fea 48 ******************************************************************************/
mbotkinl 0:2cc6bb4d7fea 49
mbotkinl 0:2cc6bb4d7fea 50
mbotkinl 0:2cc6bb4d7fea 51 /* ################### Compiler specific Intrinsics ########################### */
mbotkinl 0:2cc6bb4d7fea 52 /** \defgroup CMSIS_SIMD_intrinsics CMSIS SIMD Intrinsics
mbotkinl 0:2cc6bb4d7fea 53 Access to dedicated SIMD instructions
mbotkinl 0:2cc6bb4d7fea 54 @{
mbotkinl 0:2cc6bb4d7fea 55 */
mbotkinl 0:2cc6bb4d7fea 56
mbotkinl 0:2cc6bb4d7fea 57 #if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/
mbotkinl 0:2cc6bb4d7fea 58 /* ARM armcc specific functions */
mbotkinl 0:2cc6bb4d7fea 59
mbotkinl 0:2cc6bb4d7fea 60 /*------ CM4 SIMD Intrinsics -----------------------------------------------------*/
mbotkinl 0:2cc6bb4d7fea 61 #define __SADD8 __sadd8
mbotkinl 0:2cc6bb4d7fea 62 #define __QADD8 __qadd8
mbotkinl 0:2cc6bb4d7fea 63 #define __SHADD8 __shadd8
mbotkinl 0:2cc6bb4d7fea 64 #define __UADD8 __uadd8
mbotkinl 0:2cc6bb4d7fea 65 #define __UQADD8 __uqadd8
mbotkinl 0:2cc6bb4d7fea 66 #define __UHADD8 __uhadd8
mbotkinl 0:2cc6bb4d7fea 67 #define __SSUB8 __ssub8
mbotkinl 0:2cc6bb4d7fea 68 #define __QSUB8 __qsub8
mbotkinl 0:2cc6bb4d7fea 69 #define __SHSUB8 __shsub8
mbotkinl 0:2cc6bb4d7fea 70 #define __USUB8 __usub8
mbotkinl 0:2cc6bb4d7fea 71 #define __UQSUB8 __uqsub8
mbotkinl 0:2cc6bb4d7fea 72 #define __UHSUB8 __uhsub8
mbotkinl 0:2cc6bb4d7fea 73 #define __SADD16 __sadd16
mbotkinl 0:2cc6bb4d7fea 74 #define __QADD16 __qadd16
mbotkinl 0:2cc6bb4d7fea 75 #define __SHADD16 __shadd16
mbotkinl 0:2cc6bb4d7fea 76 #define __UADD16 __uadd16
mbotkinl 0:2cc6bb4d7fea 77 #define __UQADD16 __uqadd16
mbotkinl 0:2cc6bb4d7fea 78 #define __UHADD16 __uhadd16
mbotkinl 0:2cc6bb4d7fea 79 #define __SSUB16 __ssub16
mbotkinl 0:2cc6bb4d7fea 80 #define __QSUB16 __qsub16
mbotkinl 0:2cc6bb4d7fea 81 #define __SHSUB16 __shsub16
mbotkinl 0:2cc6bb4d7fea 82 #define __USUB16 __usub16
mbotkinl 0:2cc6bb4d7fea 83 #define __UQSUB16 __uqsub16
mbotkinl 0:2cc6bb4d7fea 84 #define __UHSUB16 __uhsub16
mbotkinl 0:2cc6bb4d7fea 85 #define __SASX __sasx
mbotkinl 0:2cc6bb4d7fea 86 #define __QASX __qasx
mbotkinl 0:2cc6bb4d7fea 87 #define __SHASX __shasx
mbotkinl 0:2cc6bb4d7fea 88 #define __UASX __uasx
mbotkinl 0:2cc6bb4d7fea 89 #define __UQASX __uqasx
mbotkinl 0:2cc6bb4d7fea 90 #define __UHASX __uhasx
mbotkinl 0:2cc6bb4d7fea 91 #define __SSAX __ssax
mbotkinl 0:2cc6bb4d7fea 92 #define __QSAX __qsax
mbotkinl 0:2cc6bb4d7fea 93 #define __SHSAX __shsax
mbotkinl 0:2cc6bb4d7fea 94 #define __USAX __usax
mbotkinl 0:2cc6bb4d7fea 95 #define __UQSAX __uqsax
mbotkinl 0:2cc6bb4d7fea 96 #define __UHSAX __uhsax
mbotkinl 0:2cc6bb4d7fea 97 #define __USAD8 __usad8
mbotkinl 0:2cc6bb4d7fea 98 #define __USADA8 __usada8
mbotkinl 0:2cc6bb4d7fea 99 #define __SSAT16 __ssat16
mbotkinl 0:2cc6bb4d7fea 100 #define __USAT16 __usat16
mbotkinl 0:2cc6bb4d7fea 101 #define __UXTB16 __uxtb16
mbotkinl 0:2cc6bb4d7fea 102 #define __UXTAB16 __uxtab16
mbotkinl 0:2cc6bb4d7fea 103 #define __SXTB16 __sxtb16
mbotkinl 0:2cc6bb4d7fea 104 #define __SXTAB16 __sxtab16
mbotkinl 0:2cc6bb4d7fea 105 #define __SMUAD __smuad
mbotkinl 0:2cc6bb4d7fea 106 #define __SMUADX __smuadx
mbotkinl 0:2cc6bb4d7fea 107 #define __SMLAD __smlad
mbotkinl 0:2cc6bb4d7fea 108 #define __SMLADX __smladx
mbotkinl 0:2cc6bb4d7fea 109 #define __SMLALD __smlald
mbotkinl 0:2cc6bb4d7fea 110 #define __SMLALDX __smlaldx
mbotkinl 0:2cc6bb4d7fea 111 #define __SMUSD __smusd
mbotkinl 0:2cc6bb4d7fea 112 #define __SMUSDX __smusdx
mbotkinl 0:2cc6bb4d7fea 113 #define __SMLSD __smlsd
mbotkinl 0:2cc6bb4d7fea 114 #define __SMLSDX __smlsdx
mbotkinl 0:2cc6bb4d7fea 115 #define __SMLSLD __smlsld
mbotkinl 0:2cc6bb4d7fea 116 #define __SMLSLDX __smlsldx
mbotkinl 0:2cc6bb4d7fea 117 #define __SEL __sel
mbotkinl 0:2cc6bb4d7fea 118 #define __QADD __qadd
mbotkinl 0:2cc6bb4d7fea 119 #define __QSUB __qsub
mbotkinl 0:2cc6bb4d7fea 120
mbotkinl 0:2cc6bb4d7fea 121 #define __PKHBT(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0x0000FFFFUL) | \
mbotkinl 0:2cc6bb4d7fea 122 ((((uint32_t)(ARG2)) << (ARG3)) & 0xFFFF0000UL) )
mbotkinl 0:2cc6bb4d7fea 123
mbotkinl 0:2cc6bb4d7fea 124 #define __PKHTB(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0xFFFF0000UL) | \
mbotkinl 0:2cc6bb4d7fea 125 ((((uint32_t)(ARG2)) >> (ARG3)) & 0x0000FFFFUL) )
mbotkinl 0:2cc6bb4d7fea 126
mbotkinl 0:2cc6bb4d7fea 127 #define __SMMLA(ARG1,ARG2,ARG3) ( (int32_t)((((int64_t)(ARG1) * (ARG2)) + \
mbotkinl 0:2cc6bb4d7fea 128 ((int64_t)(ARG3) << 32) ) >> 32))
mbotkinl 0:2cc6bb4d7fea 129
mbotkinl 0:2cc6bb4d7fea 130 /*-- End CM4 SIMD Intrinsics -----------------------------------------------------*/
mbotkinl 0:2cc6bb4d7fea 131
mbotkinl 0:2cc6bb4d7fea 132
mbotkinl 0:2cc6bb4d7fea 133
mbotkinl 0:2cc6bb4d7fea 134 #elif defined ( __ICCARM__ ) /*------------------ ICC Compiler -------------------*/
mbotkinl 0:2cc6bb4d7fea 135 /* IAR iccarm specific functions */
mbotkinl 0:2cc6bb4d7fea 136
mbotkinl 0:2cc6bb4d7fea 137 /*------ CM4 SIMD Intrinsics -----------------------------------------------------*/
mbotkinl 0:2cc6bb4d7fea 138 #include <cmsis_iar.h>
mbotkinl 0:2cc6bb4d7fea 139
mbotkinl 0:2cc6bb4d7fea 140 /*-- End CM4 SIMD Intrinsics -----------------------------------------------------*/
mbotkinl 0:2cc6bb4d7fea 141
mbotkinl 0:2cc6bb4d7fea 142
mbotkinl 0:2cc6bb4d7fea 143
mbotkinl 0:2cc6bb4d7fea 144 #elif defined ( __TMS470__ ) /*---------------- TI CCS Compiler ------------------*/
mbotkinl 0:2cc6bb4d7fea 145 /* TI CCS specific functions */
mbotkinl 0:2cc6bb4d7fea 146
mbotkinl 0:2cc6bb4d7fea 147 /*------ CM4 SIMD Intrinsics -----------------------------------------------------*/
mbotkinl 0:2cc6bb4d7fea 148 #include <cmsis_ccs.h>
mbotkinl 0:2cc6bb4d7fea 149
mbotkinl 0:2cc6bb4d7fea 150 /*-- End CM4 SIMD Intrinsics -----------------------------------------------------*/
mbotkinl 0:2cc6bb4d7fea 151
mbotkinl 0:2cc6bb4d7fea 152
mbotkinl 0:2cc6bb4d7fea 153
mbotkinl 0:2cc6bb4d7fea 154 #elif defined ( __GNUC__ ) /*------------------ GNU Compiler ---------------------*/
mbotkinl 0:2cc6bb4d7fea 155 /* GNU gcc specific functions */
mbotkinl 0:2cc6bb4d7fea 156
mbotkinl 0:2cc6bb4d7fea 157 /*------ CM4 SIMD Intrinsics -----------------------------------------------------*/
mbotkinl 0:2cc6bb4d7fea 158 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SADD8(uint32_t op1, uint32_t op2)
mbotkinl 0:2cc6bb4d7fea 159 {
mbotkinl 0:2cc6bb4d7fea 160 uint32_t result;
mbotkinl 0:2cc6bb4d7fea 161
mbotkinl 0:2cc6bb4d7fea 162 __ASM volatile ("sadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
mbotkinl 0:2cc6bb4d7fea 163 return(result);
mbotkinl 0:2cc6bb4d7fea 164 }
mbotkinl 0:2cc6bb4d7fea 165
mbotkinl 0:2cc6bb4d7fea 166 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QADD8(uint32_t op1, uint32_t op2)
mbotkinl 0:2cc6bb4d7fea 167 {
mbotkinl 0:2cc6bb4d7fea 168 uint32_t result;
mbotkinl 0:2cc6bb4d7fea 169
mbotkinl 0:2cc6bb4d7fea 170 __ASM volatile ("qadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
mbotkinl 0:2cc6bb4d7fea 171 return(result);
mbotkinl 0:2cc6bb4d7fea 172 }
mbotkinl 0:2cc6bb4d7fea 173
mbotkinl 0:2cc6bb4d7fea 174 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHADD8(uint32_t op1, uint32_t op2)
mbotkinl 0:2cc6bb4d7fea 175 {
mbotkinl 0:2cc6bb4d7fea 176 uint32_t result;
mbotkinl 0:2cc6bb4d7fea 177
mbotkinl 0:2cc6bb4d7fea 178 __ASM volatile ("shadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
mbotkinl 0:2cc6bb4d7fea 179 return(result);
mbotkinl 0:2cc6bb4d7fea 180 }
mbotkinl 0:2cc6bb4d7fea 181
mbotkinl 0:2cc6bb4d7fea 182 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UADD8(uint32_t op1, uint32_t op2)
mbotkinl 0:2cc6bb4d7fea 183 {
mbotkinl 0:2cc6bb4d7fea 184 uint32_t result;
mbotkinl 0:2cc6bb4d7fea 185
mbotkinl 0:2cc6bb4d7fea 186 __ASM volatile ("uadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
mbotkinl 0:2cc6bb4d7fea 187 return(result);
mbotkinl 0:2cc6bb4d7fea 188 }
mbotkinl 0:2cc6bb4d7fea 189
mbotkinl 0:2cc6bb4d7fea 190 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQADD8(uint32_t op1, uint32_t op2)
mbotkinl 0:2cc6bb4d7fea 191 {
mbotkinl 0:2cc6bb4d7fea 192 uint32_t result;
mbotkinl 0:2cc6bb4d7fea 193
mbotkinl 0:2cc6bb4d7fea 194 __ASM volatile ("uqadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
mbotkinl 0:2cc6bb4d7fea 195 return(result);
mbotkinl 0:2cc6bb4d7fea 196 }
mbotkinl 0:2cc6bb4d7fea 197
mbotkinl 0:2cc6bb4d7fea 198 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHADD8(uint32_t op1, uint32_t op2)
mbotkinl 0:2cc6bb4d7fea 199 {
mbotkinl 0:2cc6bb4d7fea 200 uint32_t result;
mbotkinl 0:2cc6bb4d7fea 201
mbotkinl 0:2cc6bb4d7fea 202 __ASM volatile ("uhadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
mbotkinl 0:2cc6bb4d7fea 203 return(result);
mbotkinl 0:2cc6bb4d7fea 204 }
mbotkinl 0:2cc6bb4d7fea 205
mbotkinl 0:2cc6bb4d7fea 206
mbotkinl 0:2cc6bb4d7fea 207 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SSUB8(uint32_t op1, uint32_t op2)
mbotkinl 0:2cc6bb4d7fea 208 {
mbotkinl 0:2cc6bb4d7fea 209 uint32_t result;
mbotkinl 0:2cc6bb4d7fea 210
mbotkinl 0:2cc6bb4d7fea 211 __ASM volatile ("ssub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
mbotkinl 0:2cc6bb4d7fea 212 return(result);
mbotkinl 0:2cc6bb4d7fea 213 }
mbotkinl 0:2cc6bb4d7fea 214
mbotkinl 0:2cc6bb4d7fea 215 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QSUB8(uint32_t op1, uint32_t op2)
mbotkinl 0:2cc6bb4d7fea 216 {
mbotkinl 0:2cc6bb4d7fea 217 uint32_t result;
mbotkinl 0:2cc6bb4d7fea 218
mbotkinl 0:2cc6bb4d7fea 219 __ASM volatile ("qsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
mbotkinl 0:2cc6bb4d7fea 220 return(result);
mbotkinl 0:2cc6bb4d7fea 221 }
mbotkinl 0:2cc6bb4d7fea 222
mbotkinl 0:2cc6bb4d7fea 223 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHSUB8(uint32_t op1, uint32_t op2)
mbotkinl 0:2cc6bb4d7fea 224 {
mbotkinl 0:2cc6bb4d7fea 225 uint32_t result;
mbotkinl 0:2cc6bb4d7fea 226
mbotkinl 0:2cc6bb4d7fea 227 __ASM volatile ("shsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
mbotkinl 0:2cc6bb4d7fea 228 return(result);
mbotkinl 0:2cc6bb4d7fea 229 }
mbotkinl 0:2cc6bb4d7fea 230
mbotkinl 0:2cc6bb4d7fea 231 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USUB8(uint32_t op1, uint32_t op2)
mbotkinl 0:2cc6bb4d7fea 232 {
mbotkinl 0:2cc6bb4d7fea 233 uint32_t result;
mbotkinl 0:2cc6bb4d7fea 234
mbotkinl 0:2cc6bb4d7fea 235 __ASM volatile ("usub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
mbotkinl 0:2cc6bb4d7fea 236 return(result);
mbotkinl 0:2cc6bb4d7fea 237 }
mbotkinl 0:2cc6bb4d7fea 238
mbotkinl 0:2cc6bb4d7fea 239 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQSUB8(uint32_t op1, uint32_t op2)
mbotkinl 0:2cc6bb4d7fea 240 {
mbotkinl 0:2cc6bb4d7fea 241 uint32_t result;
mbotkinl 0:2cc6bb4d7fea 242
mbotkinl 0:2cc6bb4d7fea 243 __ASM volatile ("uqsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
mbotkinl 0:2cc6bb4d7fea 244 return(result);
mbotkinl 0:2cc6bb4d7fea 245 }
mbotkinl 0:2cc6bb4d7fea 246
mbotkinl 0:2cc6bb4d7fea 247 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHSUB8(uint32_t op1, uint32_t op2)
mbotkinl 0:2cc6bb4d7fea 248 {
mbotkinl 0:2cc6bb4d7fea 249 uint32_t result;
mbotkinl 0:2cc6bb4d7fea 250
mbotkinl 0:2cc6bb4d7fea 251 __ASM volatile ("uhsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
mbotkinl 0:2cc6bb4d7fea 252 return(result);
mbotkinl 0:2cc6bb4d7fea 253 }
mbotkinl 0:2cc6bb4d7fea 254
mbotkinl 0:2cc6bb4d7fea 255
mbotkinl 0:2cc6bb4d7fea 256 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SADD16(uint32_t op1, uint32_t op2)
mbotkinl 0:2cc6bb4d7fea 257 {
mbotkinl 0:2cc6bb4d7fea 258 uint32_t result;
mbotkinl 0:2cc6bb4d7fea 259
mbotkinl 0:2cc6bb4d7fea 260 __ASM volatile ("sadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
mbotkinl 0:2cc6bb4d7fea 261 return(result);
mbotkinl 0:2cc6bb4d7fea 262 }
mbotkinl 0:2cc6bb4d7fea 263
mbotkinl 0:2cc6bb4d7fea 264 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QADD16(uint32_t op1, uint32_t op2)
mbotkinl 0:2cc6bb4d7fea 265 {
mbotkinl 0:2cc6bb4d7fea 266 uint32_t result;
mbotkinl 0:2cc6bb4d7fea 267
mbotkinl 0:2cc6bb4d7fea 268 __ASM volatile ("qadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
mbotkinl 0:2cc6bb4d7fea 269 return(result);
mbotkinl 0:2cc6bb4d7fea 270 }
mbotkinl 0:2cc6bb4d7fea 271
mbotkinl 0:2cc6bb4d7fea 272 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHADD16(uint32_t op1, uint32_t op2)
mbotkinl 0:2cc6bb4d7fea 273 {
mbotkinl 0:2cc6bb4d7fea 274 uint32_t result;
mbotkinl 0:2cc6bb4d7fea 275
mbotkinl 0:2cc6bb4d7fea 276 __ASM volatile ("shadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
mbotkinl 0:2cc6bb4d7fea 277 return(result);
mbotkinl 0:2cc6bb4d7fea 278 }
mbotkinl 0:2cc6bb4d7fea 279
mbotkinl 0:2cc6bb4d7fea 280 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UADD16(uint32_t op1, uint32_t op2)
mbotkinl 0:2cc6bb4d7fea 281 {
mbotkinl 0:2cc6bb4d7fea 282 uint32_t result;
mbotkinl 0:2cc6bb4d7fea 283
mbotkinl 0:2cc6bb4d7fea 284 __ASM volatile ("uadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
mbotkinl 0:2cc6bb4d7fea 285 return(result);
mbotkinl 0:2cc6bb4d7fea 286 }
mbotkinl 0:2cc6bb4d7fea 287
mbotkinl 0:2cc6bb4d7fea 288 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQADD16(uint32_t op1, uint32_t op2)
mbotkinl 0:2cc6bb4d7fea 289 {
mbotkinl 0:2cc6bb4d7fea 290 uint32_t result;
mbotkinl 0:2cc6bb4d7fea 291
mbotkinl 0:2cc6bb4d7fea 292 __ASM volatile ("uqadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
mbotkinl 0:2cc6bb4d7fea 293 return(result);
mbotkinl 0:2cc6bb4d7fea 294 }
mbotkinl 0:2cc6bb4d7fea 295
mbotkinl 0:2cc6bb4d7fea 296 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHADD16(uint32_t op1, uint32_t op2)
mbotkinl 0:2cc6bb4d7fea 297 {
mbotkinl 0:2cc6bb4d7fea 298 uint32_t result;
mbotkinl 0:2cc6bb4d7fea 299
mbotkinl 0:2cc6bb4d7fea 300 __ASM volatile ("uhadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
mbotkinl 0:2cc6bb4d7fea 301 return(result);
mbotkinl 0:2cc6bb4d7fea 302 }
mbotkinl 0:2cc6bb4d7fea 303
mbotkinl 0:2cc6bb4d7fea 304 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SSUB16(uint32_t op1, uint32_t op2)
mbotkinl 0:2cc6bb4d7fea 305 {
mbotkinl 0:2cc6bb4d7fea 306 uint32_t result;
mbotkinl 0:2cc6bb4d7fea 307
mbotkinl 0:2cc6bb4d7fea 308 __ASM volatile ("ssub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
mbotkinl 0:2cc6bb4d7fea 309 return(result);
mbotkinl 0:2cc6bb4d7fea 310 }
mbotkinl 0:2cc6bb4d7fea 311
mbotkinl 0:2cc6bb4d7fea 312 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QSUB16(uint32_t op1, uint32_t op2)
mbotkinl 0:2cc6bb4d7fea 313 {
mbotkinl 0:2cc6bb4d7fea 314 uint32_t result;
mbotkinl 0:2cc6bb4d7fea 315
mbotkinl 0:2cc6bb4d7fea 316 __ASM volatile ("qsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
mbotkinl 0:2cc6bb4d7fea 317 return(result);
mbotkinl 0:2cc6bb4d7fea 318 }
mbotkinl 0:2cc6bb4d7fea 319
mbotkinl 0:2cc6bb4d7fea 320 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHSUB16(uint32_t op1, uint32_t op2)
mbotkinl 0:2cc6bb4d7fea 321 {
mbotkinl 0:2cc6bb4d7fea 322 uint32_t result;
mbotkinl 0:2cc6bb4d7fea 323
mbotkinl 0:2cc6bb4d7fea 324 __ASM volatile ("shsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
mbotkinl 0:2cc6bb4d7fea 325 return(result);
mbotkinl 0:2cc6bb4d7fea 326 }
mbotkinl 0:2cc6bb4d7fea 327
mbotkinl 0:2cc6bb4d7fea 328 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USUB16(uint32_t op1, uint32_t op2)
mbotkinl 0:2cc6bb4d7fea 329 {
mbotkinl 0:2cc6bb4d7fea 330 uint32_t result;
mbotkinl 0:2cc6bb4d7fea 331
mbotkinl 0:2cc6bb4d7fea 332 __ASM volatile ("usub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
mbotkinl 0:2cc6bb4d7fea 333 return(result);
mbotkinl 0:2cc6bb4d7fea 334 }
mbotkinl 0:2cc6bb4d7fea 335
mbotkinl 0:2cc6bb4d7fea 336 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQSUB16(uint32_t op1, uint32_t op2)
mbotkinl 0:2cc6bb4d7fea 337 {
mbotkinl 0:2cc6bb4d7fea 338 uint32_t result;
mbotkinl 0:2cc6bb4d7fea 339
mbotkinl 0:2cc6bb4d7fea 340 __ASM volatile ("uqsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
mbotkinl 0:2cc6bb4d7fea 341 return(result);
mbotkinl 0:2cc6bb4d7fea 342 }
mbotkinl 0:2cc6bb4d7fea 343
mbotkinl 0:2cc6bb4d7fea 344 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHSUB16(uint32_t op1, uint32_t op2)
mbotkinl 0:2cc6bb4d7fea 345 {
mbotkinl 0:2cc6bb4d7fea 346 uint32_t result;
mbotkinl 0:2cc6bb4d7fea 347
mbotkinl 0:2cc6bb4d7fea 348 __ASM volatile ("uhsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
mbotkinl 0:2cc6bb4d7fea 349 return(result);
mbotkinl 0:2cc6bb4d7fea 350 }
mbotkinl 0:2cc6bb4d7fea 351
mbotkinl 0:2cc6bb4d7fea 352 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SASX(uint32_t op1, uint32_t op2)
mbotkinl 0:2cc6bb4d7fea 353 {
mbotkinl 0:2cc6bb4d7fea 354 uint32_t result;
mbotkinl 0:2cc6bb4d7fea 355
mbotkinl 0:2cc6bb4d7fea 356 __ASM volatile ("sasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
mbotkinl 0:2cc6bb4d7fea 357 return(result);
mbotkinl 0:2cc6bb4d7fea 358 }
mbotkinl 0:2cc6bb4d7fea 359
mbotkinl 0:2cc6bb4d7fea 360 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QASX(uint32_t op1, uint32_t op2)
mbotkinl 0:2cc6bb4d7fea 361 {
mbotkinl 0:2cc6bb4d7fea 362 uint32_t result;
mbotkinl 0:2cc6bb4d7fea 363
mbotkinl 0:2cc6bb4d7fea 364 __ASM volatile ("qasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
mbotkinl 0:2cc6bb4d7fea 365 return(result);
mbotkinl 0:2cc6bb4d7fea 366 }
mbotkinl 0:2cc6bb4d7fea 367
mbotkinl 0:2cc6bb4d7fea 368 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHASX(uint32_t op1, uint32_t op2)
mbotkinl 0:2cc6bb4d7fea 369 {
mbotkinl 0:2cc6bb4d7fea 370 uint32_t result;
mbotkinl 0:2cc6bb4d7fea 371
mbotkinl 0:2cc6bb4d7fea 372 __ASM volatile ("shasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
mbotkinl 0:2cc6bb4d7fea 373 return(result);
mbotkinl 0:2cc6bb4d7fea 374 }
mbotkinl 0:2cc6bb4d7fea 375
mbotkinl 0:2cc6bb4d7fea 376 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UASX(uint32_t op1, uint32_t op2)
mbotkinl 0:2cc6bb4d7fea 377 {
mbotkinl 0:2cc6bb4d7fea 378 uint32_t result;
mbotkinl 0:2cc6bb4d7fea 379
mbotkinl 0:2cc6bb4d7fea 380 __ASM volatile ("uasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
mbotkinl 0:2cc6bb4d7fea 381 return(result);
mbotkinl 0:2cc6bb4d7fea 382 }
mbotkinl 0:2cc6bb4d7fea 383
mbotkinl 0:2cc6bb4d7fea 384 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQASX(uint32_t op1, uint32_t op2)
mbotkinl 0:2cc6bb4d7fea 385 {
mbotkinl 0:2cc6bb4d7fea 386 uint32_t result;
mbotkinl 0:2cc6bb4d7fea 387
mbotkinl 0:2cc6bb4d7fea 388 __ASM volatile ("uqasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
mbotkinl 0:2cc6bb4d7fea 389 return(result);
mbotkinl 0:2cc6bb4d7fea 390 }
mbotkinl 0:2cc6bb4d7fea 391
mbotkinl 0:2cc6bb4d7fea 392 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHASX(uint32_t op1, uint32_t op2)
mbotkinl 0:2cc6bb4d7fea 393 {
mbotkinl 0:2cc6bb4d7fea 394 uint32_t result;
mbotkinl 0:2cc6bb4d7fea 395
mbotkinl 0:2cc6bb4d7fea 396 __ASM volatile ("uhasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
mbotkinl 0:2cc6bb4d7fea 397 return(result);
mbotkinl 0:2cc6bb4d7fea 398 }
mbotkinl 0:2cc6bb4d7fea 399
mbotkinl 0:2cc6bb4d7fea 400 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SSAX(uint32_t op1, uint32_t op2)
mbotkinl 0:2cc6bb4d7fea 401 {
mbotkinl 0:2cc6bb4d7fea 402 uint32_t result;
mbotkinl 0:2cc6bb4d7fea 403
mbotkinl 0:2cc6bb4d7fea 404 __ASM volatile ("ssax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
mbotkinl 0:2cc6bb4d7fea 405 return(result);
mbotkinl 0:2cc6bb4d7fea 406 }
mbotkinl 0:2cc6bb4d7fea 407
mbotkinl 0:2cc6bb4d7fea 408 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QSAX(uint32_t op1, uint32_t op2)
mbotkinl 0:2cc6bb4d7fea 409 {
mbotkinl 0:2cc6bb4d7fea 410 uint32_t result;
mbotkinl 0:2cc6bb4d7fea 411
mbotkinl 0:2cc6bb4d7fea 412 __ASM volatile ("qsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
mbotkinl 0:2cc6bb4d7fea 413 return(result);
mbotkinl 0:2cc6bb4d7fea 414 }
mbotkinl 0:2cc6bb4d7fea 415
mbotkinl 0:2cc6bb4d7fea 416 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHSAX(uint32_t op1, uint32_t op2)
mbotkinl 0:2cc6bb4d7fea 417 {
mbotkinl 0:2cc6bb4d7fea 418 uint32_t result;
mbotkinl 0:2cc6bb4d7fea 419
mbotkinl 0:2cc6bb4d7fea 420 __ASM volatile ("shsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
mbotkinl 0:2cc6bb4d7fea 421 return(result);
mbotkinl 0:2cc6bb4d7fea 422 }
mbotkinl 0:2cc6bb4d7fea 423
mbotkinl 0:2cc6bb4d7fea 424 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USAX(uint32_t op1, uint32_t op2)
mbotkinl 0:2cc6bb4d7fea 425 {
mbotkinl 0:2cc6bb4d7fea 426 uint32_t result;
mbotkinl 0:2cc6bb4d7fea 427
mbotkinl 0:2cc6bb4d7fea 428 __ASM volatile ("usax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
mbotkinl 0:2cc6bb4d7fea 429 return(result);
mbotkinl 0:2cc6bb4d7fea 430 }
mbotkinl 0:2cc6bb4d7fea 431
mbotkinl 0:2cc6bb4d7fea 432 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQSAX(uint32_t op1, uint32_t op2)
mbotkinl 0:2cc6bb4d7fea 433 {
mbotkinl 0:2cc6bb4d7fea 434 uint32_t result;
mbotkinl 0:2cc6bb4d7fea 435
mbotkinl 0:2cc6bb4d7fea 436 __ASM volatile ("uqsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
mbotkinl 0:2cc6bb4d7fea 437 return(result);
mbotkinl 0:2cc6bb4d7fea 438 }
mbotkinl 0:2cc6bb4d7fea 439
mbotkinl 0:2cc6bb4d7fea 440 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHSAX(uint32_t op1, uint32_t op2)
mbotkinl 0:2cc6bb4d7fea 441 {
mbotkinl 0:2cc6bb4d7fea 442 uint32_t result;
mbotkinl 0:2cc6bb4d7fea 443
mbotkinl 0:2cc6bb4d7fea 444 __ASM volatile ("uhsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
mbotkinl 0:2cc6bb4d7fea 445 return(result);
mbotkinl 0:2cc6bb4d7fea 446 }
mbotkinl 0:2cc6bb4d7fea 447
mbotkinl 0:2cc6bb4d7fea 448 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USAD8(uint32_t op1, uint32_t op2)
mbotkinl 0:2cc6bb4d7fea 449 {
mbotkinl 0:2cc6bb4d7fea 450 uint32_t result;
mbotkinl 0:2cc6bb4d7fea 451
mbotkinl 0:2cc6bb4d7fea 452 __ASM volatile ("usad8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
mbotkinl 0:2cc6bb4d7fea 453 return(result);
mbotkinl 0:2cc6bb4d7fea 454 }
mbotkinl 0:2cc6bb4d7fea 455
mbotkinl 0:2cc6bb4d7fea 456 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USADA8(uint32_t op1, uint32_t op2, uint32_t op3)
mbotkinl 0:2cc6bb4d7fea 457 {
mbotkinl 0:2cc6bb4d7fea 458 uint32_t result;
mbotkinl 0:2cc6bb4d7fea 459
mbotkinl 0:2cc6bb4d7fea 460 __ASM volatile ("usada8 %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
mbotkinl 0:2cc6bb4d7fea 461 return(result);
mbotkinl 0:2cc6bb4d7fea 462 }
mbotkinl 0:2cc6bb4d7fea 463
mbotkinl 0:2cc6bb4d7fea 464 #define __SSAT16(ARG1,ARG2) \
mbotkinl 0:2cc6bb4d7fea 465 ({ \
mbotkinl 0:2cc6bb4d7fea 466 uint32_t __RES, __ARG1 = (ARG1); \
mbotkinl 0:2cc6bb4d7fea 467 __ASM ("ssat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
mbotkinl 0:2cc6bb4d7fea 468 __RES; \
mbotkinl 0:2cc6bb4d7fea 469 })
mbotkinl 0:2cc6bb4d7fea 470
mbotkinl 0:2cc6bb4d7fea 471 #define __USAT16(ARG1,ARG2) \
mbotkinl 0:2cc6bb4d7fea 472 ({ \
mbotkinl 0:2cc6bb4d7fea 473 uint32_t __RES, __ARG1 = (ARG1); \
mbotkinl 0:2cc6bb4d7fea 474 __ASM ("usat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
mbotkinl 0:2cc6bb4d7fea 475 __RES; \
mbotkinl 0:2cc6bb4d7fea 476 })
mbotkinl 0:2cc6bb4d7fea 477
mbotkinl 0:2cc6bb4d7fea 478 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UXTB16(uint32_t op1)
mbotkinl 0:2cc6bb4d7fea 479 {
mbotkinl 0:2cc6bb4d7fea 480 uint32_t result;
mbotkinl 0:2cc6bb4d7fea 481
mbotkinl 0:2cc6bb4d7fea 482 __ASM volatile ("uxtb16 %0, %1" : "=r" (result) : "r" (op1));
mbotkinl 0:2cc6bb4d7fea 483 return(result);
mbotkinl 0:2cc6bb4d7fea 484 }
mbotkinl 0:2cc6bb4d7fea 485
mbotkinl 0:2cc6bb4d7fea 486 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UXTAB16(uint32_t op1, uint32_t op2)
mbotkinl 0:2cc6bb4d7fea 487 {
mbotkinl 0:2cc6bb4d7fea 488 uint32_t result;
mbotkinl 0:2cc6bb4d7fea 489
mbotkinl 0:2cc6bb4d7fea 490 __ASM volatile ("uxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
mbotkinl 0:2cc6bb4d7fea 491 return(result);
mbotkinl 0:2cc6bb4d7fea 492 }
mbotkinl 0:2cc6bb4d7fea 493
mbotkinl 0:2cc6bb4d7fea 494 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SXTB16(uint32_t op1)
mbotkinl 0:2cc6bb4d7fea 495 {
mbotkinl 0:2cc6bb4d7fea 496 uint32_t result;
mbotkinl 0:2cc6bb4d7fea 497
mbotkinl 0:2cc6bb4d7fea 498 __ASM volatile ("sxtb16 %0, %1" : "=r" (result) : "r" (op1));
mbotkinl 0:2cc6bb4d7fea 499 return(result);
mbotkinl 0:2cc6bb4d7fea 500 }
mbotkinl 0:2cc6bb4d7fea 501
mbotkinl 0:2cc6bb4d7fea 502 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SXTAB16(uint32_t op1, uint32_t op2)
mbotkinl 0:2cc6bb4d7fea 503 {
mbotkinl 0:2cc6bb4d7fea 504 uint32_t result;
mbotkinl 0:2cc6bb4d7fea 505
mbotkinl 0:2cc6bb4d7fea 506 __ASM volatile ("sxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
mbotkinl 0:2cc6bb4d7fea 507 return(result);
mbotkinl 0:2cc6bb4d7fea 508 }
mbotkinl 0:2cc6bb4d7fea 509
mbotkinl 0:2cc6bb4d7fea 510 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMUAD (uint32_t op1, uint32_t op2)
mbotkinl 0:2cc6bb4d7fea 511 {
mbotkinl 0:2cc6bb4d7fea 512 uint32_t result;
mbotkinl 0:2cc6bb4d7fea 513
mbotkinl 0:2cc6bb4d7fea 514 __ASM volatile ("smuad %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
mbotkinl 0:2cc6bb4d7fea 515 return(result);
mbotkinl 0:2cc6bb4d7fea 516 }
mbotkinl 0:2cc6bb4d7fea 517
mbotkinl 0:2cc6bb4d7fea 518 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMUADX (uint32_t op1, uint32_t op2)
mbotkinl 0:2cc6bb4d7fea 519 {
mbotkinl 0:2cc6bb4d7fea 520 uint32_t result;
mbotkinl 0:2cc6bb4d7fea 521
mbotkinl 0:2cc6bb4d7fea 522 __ASM volatile ("smuadx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
mbotkinl 0:2cc6bb4d7fea 523 return(result);
mbotkinl 0:2cc6bb4d7fea 524 }
mbotkinl 0:2cc6bb4d7fea 525
mbotkinl 0:2cc6bb4d7fea 526 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMLAD (uint32_t op1, uint32_t op2, uint32_t op3)
mbotkinl 0:2cc6bb4d7fea 527 {
mbotkinl 0:2cc6bb4d7fea 528 uint32_t result;
mbotkinl 0:2cc6bb4d7fea 529
mbotkinl 0:2cc6bb4d7fea 530 __ASM volatile ("smlad %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
mbotkinl 0:2cc6bb4d7fea 531 return(result);
mbotkinl 0:2cc6bb4d7fea 532 }
mbotkinl 0:2cc6bb4d7fea 533
mbotkinl 0:2cc6bb4d7fea 534 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMLADX (uint32_t op1, uint32_t op2, uint32_t op3)
mbotkinl 0:2cc6bb4d7fea 535 {
mbotkinl 0:2cc6bb4d7fea 536 uint32_t result;
mbotkinl 0:2cc6bb4d7fea 537
mbotkinl 0:2cc6bb4d7fea 538 __ASM volatile ("smladx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
mbotkinl 0:2cc6bb4d7fea 539 return(result);
mbotkinl 0:2cc6bb4d7fea 540 }
mbotkinl 0:2cc6bb4d7fea 541
mbotkinl 0:2cc6bb4d7fea 542 #define __SMLALD(ARG1,ARG2,ARG3) \
mbotkinl 0:2cc6bb4d7fea 543 ({ \
mbotkinl 0:2cc6bb4d7fea 544 uint32_t __ARG1 = (ARG1), __ARG2 = (ARG2), __ARG3_H = (uint32_t)((uint64_t)(ARG3) >> 32), __ARG3_L = (uint32_t)((uint64_t)(ARG3) & 0xFFFFFFFFUL); \
mbotkinl 0:2cc6bb4d7fea 545 __ASM volatile ("smlald %0, %1, %2, %3" : "=r" (__ARG3_L), "=r" (__ARG3_H) : "r" (__ARG1), "r" (__ARG2), "0" (__ARG3_L), "1" (__ARG3_H) ); \
mbotkinl 0:2cc6bb4d7fea 546 (uint64_t)(((uint64_t)__ARG3_H << 32) | __ARG3_L); \
mbotkinl 0:2cc6bb4d7fea 547 })
mbotkinl 0:2cc6bb4d7fea 548
mbotkinl 0:2cc6bb4d7fea 549 #define __SMLALDX(ARG1,ARG2,ARG3) \
mbotkinl 0:2cc6bb4d7fea 550 ({ \
mbotkinl 0:2cc6bb4d7fea 551 uint32_t __ARG1 = (ARG1), __ARG2 = (ARG2), __ARG3_H = (uint32_t)((uint64_t)(ARG3) >> 32), __ARG3_L = (uint32_t)((uint64_t)(ARG3) & 0xFFFFFFFFUL); \
mbotkinl 0:2cc6bb4d7fea 552 __ASM volatile ("smlaldx %0, %1, %2, %3" : "=r" (__ARG3_L), "=r" (__ARG3_H) : "r" (__ARG1), "r" (__ARG2), "0" (__ARG3_L), "1" (__ARG3_H) ); \
mbotkinl 0:2cc6bb4d7fea 553 (uint64_t)(((uint64_t)__ARG3_H << 32) | __ARG3_L); \
mbotkinl 0:2cc6bb4d7fea 554 })
mbotkinl 0:2cc6bb4d7fea 555
mbotkinl 0:2cc6bb4d7fea 556 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMUSD (uint32_t op1, uint32_t op2)
mbotkinl 0:2cc6bb4d7fea 557 {
mbotkinl 0:2cc6bb4d7fea 558 uint32_t result;
mbotkinl 0:2cc6bb4d7fea 559
mbotkinl 0:2cc6bb4d7fea 560 __ASM volatile ("smusd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
mbotkinl 0:2cc6bb4d7fea 561 return(result);
mbotkinl 0:2cc6bb4d7fea 562 }
mbotkinl 0:2cc6bb4d7fea 563
mbotkinl 0:2cc6bb4d7fea 564 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMUSDX (uint32_t op1, uint32_t op2)
mbotkinl 0:2cc6bb4d7fea 565 {
mbotkinl 0:2cc6bb4d7fea 566 uint32_t result;
mbotkinl 0:2cc6bb4d7fea 567
mbotkinl 0:2cc6bb4d7fea 568 __ASM volatile ("smusdx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
mbotkinl 0:2cc6bb4d7fea 569 return(result);
mbotkinl 0:2cc6bb4d7fea 570 }
mbotkinl 0:2cc6bb4d7fea 571
mbotkinl 0:2cc6bb4d7fea 572 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMLSD (uint32_t op1, uint32_t op2, uint32_t op3)
mbotkinl 0:2cc6bb4d7fea 573 {
mbotkinl 0:2cc6bb4d7fea 574 uint32_t result;
mbotkinl 0:2cc6bb4d7fea 575
mbotkinl 0:2cc6bb4d7fea 576 __ASM volatile ("smlsd %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
mbotkinl 0:2cc6bb4d7fea 577 return(result);
mbotkinl 0:2cc6bb4d7fea 578 }
mbotkinl 0:2cc6bb4d7fea 579
mbotkinl 0:2cc6bb4d7fea 580 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMLSDX (uint32_t op1, uint32_t op2, uint32_t op3)
mbotkinl 0:2cc6bb4d7fea 581 {
mbotkinl 0:2cc6bb4d7fea 582 uint32_t result;
mbotkinl 0:2cc6bb4d7fea 583
mbotkinl 0:2cc6bb4d7fea 584 __ASM volatile ("smlsdx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
mbotkinl 0:2cc6bb4d7fea 585 return(result);
mbotkinl 0:2cc6bb4d7fea 586 }
mbotkinl 0:2cc6bb4d7fea 587
mbotkinl 0:2cc6bb4d7fea 588 #define __SMLSLD(ARG1,ARG2,ARG3) \
mbotkinl 0:2cc6bb4d7fea 589 ({ \
mbotkinl 0:2cc6bb4d7fea 590 uint32_t __ARG1 = (ARG1), __ARG2 = (ARG2), __ARG3_H = (uint32_t)((ARG3) >> 32), __ARG3_L = (uint32_t)((ARG3) & 0xFFFFFFFFUL); \
mbotkinl 0:2cc6bb4d7fea 591 __ASM volatile ("smlsld %0, %1, %2, %3" : "=r" (__ARG3_L), "=r" (__ARG3_H) : "r" (__ARG1), "r" (__ARG2), "0" (__ARG3_L), "1" (__ARG3_H) ); \
mbotkinl 0:2cc6bb4d7fea 592 (uint64_t)(((uint64_t)__ARG3_H << 32) | __ARG3_L); \
mbotkinl 0:2cc6bb4d7fea 593 })
mbotkinl 0:2cc6bb4d7fea 594
mbotkinl 0:2cc6bb4d7fea 595 #define __SMLSLDX(ARG1,ARG2,ARG3) \
mbotkinl 0:2cc6bb4d7fea 596 ({ \
mbotkinl 0:2cc6bb4d7fea 597 uint32_t __ARG1 = (ARG1), __ARG2 = (ARG2), __ARG3_H = (uint32_t)((ARG3) >> 32), __ARG3_L = (uint32_t)((ARG3) & 0xFFFFFFFFUL); \
mbotkinl 0:2cc6bb4d7fea 598 __ASM volatile ("smlsldx %0, %1, %2, %3" : "=r" (__ARG3_L), "=r" (__ARG3_H) : "r" (__ARG1), "r" (__ARG2), "0" (__ARG3_L), "1" (__ARG3_H) ); \
mbotkinl 0:2cc6bb4d7fea 599 (uint64_t)(((uint64_t)__ARG3_H << 32) | __ARG3_L); \
mbotkinl 0:2cc6bb4d7fea 600 })
mbotkinl 0:2cc6bb4d7fea 601
mbotkinl 0:2cc6bb4d7fea 602 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SEL (uint32_t op1, uint32_t op2)
mbotkinl 0:2cc6bb4d7fea 603 {
mbotkinl 0:2cc6bb4d7fea 604 uint32_t result;
mbotkinl 0:2cc6bb4d7fea 605
mbotkinl 0:2cc6bb4d7fea 606 __ASM volatile ("sel %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
mbotkinl 0:2cc6bb4d7fea 607 return(result);
mbotkinl 0:2cc6bb4d7fea 608 }
mbotkinl 0:2cc6bb4d7fea 609
mbotkinl 0:2cc6bb4d7fea 610 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QADD(uint32_t op1, uint32_t op2)
mbotkinl 0:2cc6bb4d7fea 611 {
mbotkinl 0:2cc6bb4d7fea 612 uint32_t result;
mbotkinl 0:2cc6bb4d7fea 613
mbotkinl 0:2cc6bb4d7fea 614 __ASM volatile ("qadd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
mbotkinl 0:2cc6bb4d7fea 615 return(result);
mbotkinl 0:2cc6bb4d7fea 616 }
mbotkinl 0:2cc6bb4d7fea 617
mbotkinl 0:2cc6bb4d7fea 618 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QSUB(uint32_t op1, uint32_t op2)
mbotkinl 0:2cc6bb4d7fea 619 {
mbotkinl 0:2cc6bb4d7fea 620 uint32_t result;
mbotkinl 0:2cc6bb4d7fea 621
mbotkinl 0:2cc6bb4d7fea 622 __ASM volatile ("qsub %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
mbotkinl 0:2cc6bb4d7fea 623 return(result);
mbotkinl 0:2cc6bb4d7fea 624 }
mbotkinl 0:2cc6bb4d7fea 625
mbotkinl 0:2cc6bb4d7fea 626 #define __PKHBT(ARG1,ARG2,ARG3) \
mbotkinl 0:2cc6bb4d7fea 627 ({ \
mbotkinl 0:2cc6bb4d7fea 628 uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \
mbotkinl 0:2cc6bb4d7fea 629 __ASM ("pkhbt %0, %1, %2, lsl %3" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2), "I" (ARG3) ); \
mbotkinl 0:2cc6bb4d7fea 630 __RES; \
mbotkinl 0:2cc6bb4d7fea 631 })
mbotkinl 0:2cc6bb4d7fea 632
mbotkinl 0:2cc6bb4d7fea 633 #define __PKHTB(ARG1,ARG2,ARG3) \
mbotkinl 0:2cc6bb4d7fea 634 ({ \
mbotkinl 0:2cc6bb4d7fea 635 uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \
mbotkinl 0:2cc6bb4d7fea 636 if (ARG3 == 0) \
mbotkinl 0:2cc6bb4d7fea 637 __ASM ("pkhtb %0, %1, %2" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2) ); \
mbotkinl 0:2cc6bb4d7fea 638 else \
mbotkinl 0:2cc6bb4d7fea 639 __ASM ("pkhtb %0, %1, %2, asr %3" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2), "I" (ARG3) ); \
mbotkinl 0:2cc6bb4d7fea 640 __RES; \
mbotkinl 0:2cc6bb4d7fea 641 })
mbotkinl 0:2cc6bb4d7fea 642
mbotkinl 0:2cc6bb4d7fea 643 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMMLA (int32_t op1, int32_t op2, int32_t op3)
mbotkinl 0:2cc6bb4d7fea 644 {
mbotkinl 0:2cc6bb4d7fea 645 int32_t result;
mbotkinl 0:2cc6bb4d7fea 646
mbotkinl 0:2cc6bb4d7fea 647 __ASM volatile ("smmla %0, %1, %2, %3" : "=r" (result): "r" (op1), "r" (op2), "r" (op3) );
mbotkinl 0:2cc6bb4d7fea 648 return(result);
mbotkinl 0:2cc6bb4d7fea 649 }
mbotkinl 0:2cc6bb4d7fea 650
mbotkinl 0:2cc6bb4d7fea 651 /*-- End CM4 SIMD Intrinsics -----------------------------------------------------*/
mbotkinl 0:2cc6bb4d7fea 652
mbotkinl 0:2cc6bb4d7fea 653
mbotkinl 0:2cc6bb4d7fea 654
mbotkinl 0:2cc6bb4d7fea 655 #elif defined ( __TASKING__ ) /*------------------ TASKING Compiler --------------*/
mbotkinl 0:2cc6bb4d7fea 656 /* TASKING carm specific functions */
mbotkinl 0:2cc6bb4d7fea 657
mbotkinl 0:2cc6bb4d7fea 658
mbotkinl 0:2cc6bb4d7fea 659 /*------ CM4 SIMD Intrinsics -----------------------------------------------------*/
mbotkinl 0:2cc6bb4d7fea 660 /* not yet supported */
mbotkinl 0:2cc6bb4d7fea 661 /*-- End CM4 SIMD Intrinsics -----------------------------------------------------*/
mbotkinl 0:2cc6bb4d7fea 662
mbotkinl 0:2cc6bb4d7fea 663
mbotkinl 0:2cc6bb4d7fea 664 #endif
mbotkinl 0:2cc6bb4d7fea 665
mbotkinl 0:2cc6bb4d7fea 666 /*@} end of group CMSIS_SIMD_intrinsics */
mbotkinl 0:2cc6bb4d7fea 667
mbotkinl 0:2cc6bb4d7fea 668
mbotkinl 0:2cc6bb4d7fea 669 #endif /* __CORE_CM4_SIMD_H */
mbotkinl 0:2cc6bb4d7fea 670
mbotkinl 0:2cc6bb4d7fea 671 #ifdef __cplusplus
mbotkinl 0:2cc6bb4d7fea 672 }
mbotkinl 0:2cc6bb4d7fea 673 #endif