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TARGET_KL82Z/TOOLCHAIN_IAR/qspi_device.h@171:3a7713b1edbc, 2018-11-08 (annotated)

Committer:
AnnaBridge
Date:
Thu Nov 08 11:45:42 2018 +0000
Revision:
171:3a7713b1edbc
mbed library. Release version 164

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 171:3a7713b1edbc 1 /* mbed Microcontroller Library
AnnaBridge 171:3a7713b1edbc 2 * Copyright (c) 2018, ARM Limited
AnnaBridge 171:3a7713b1edbc 3 * All rights reserved.
AnnaBridge 171:3a7713b1edbc 4 *
AnnaBridge 171:3a7713b1edbc 5 * Redistribution and use in source and binary forms, with or without
AnnaBridge 171:3a7713b1edbc 6 * modification, are permitted provided that the following conditions are met:
AnnaBridge 171:3a7713b1edbc 7 *
AnnaBridge 171:3a7713b1edbc 8 * 1. Redistributions of source code must retain the above copyright notice,
AnnaBridge 171:3a7713b1edbc 9 * this list of conditions and the following disclaimer.
AnnaBridge 171:3a7713b1edbc 10 * 2. Redistributions in binary form must reproduce the above copyright notice,
AnnaBridge 171:3a7713b1edbc 11 * this list of conditions and the following disclaimer in the documentation
AnnaBridge 171:3a7713b1edbc 12 * and/or other materials provided with the distribution.
AnnaBridge 171:3a7713b1edbc 13 * 3. Neither the name of STMicroelectronics nor the names of its contributors
AnnaBridge 171:3a7713b1edbc 14 * may be used to endorse or promote products derived from this software
AnnaBridge 171:3a7713b1edbc 15 * without specific prior written permission.
AnnaBridge 171:3a7713b1edbc 16 *
AnnaBridge 171:3a7713b1edbc 17 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AnnaBridge 171:3a7713b1edbc 18 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
AnnaBridge 171:3a7713b1edbc 19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
AnnaBridge 171:3a7713b1edbc 20 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
AnnaBridge 171:3a7713b1edbc 21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
AnnaBridge 171:3a7713b1edbc 22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
AnnaBridge 171:3a7713b1edbc 23 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
AnnaBridge 171:3a7713b1edbc 24 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
AnnaBridge 171:3a7713b1edbc 25 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
AnnaBridge 171:3a7713b1edbc 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
AnnaBridge 171:3a7713b1edbc 27 */
AnnaBridge 171:3a7713b1edbc 28
AnnaBridge 171:3a7713b1edbc 29 #ifndef _FSL_MBED_QSPI_DEVICE_H_
AnnaBridge 171:3a7713b1edbc 30 #define _FSL_MBED_QSPI_DEVICE_H_
AnnaBridge 171:3a7713b1edbc 31
AnnaBridge 171:3a7713b1edbc 32 #include "fsl_qspi.h"
AnnaBridge 171:3a7713b1edbc 33
AnnaBridge 171:3a7713b1edbc 34 #define FLASH_SIZE 0x01000000U
AnnaBridge 171:3a7713b1edbc 35 #define FLASH_PAGE_SIZE 256U
AnnaBridge 171:3a7713b1edbc 36
AnnaBridge 171:3a7713b1edbc 37 qspi_flash_config_t single_config = {
AnnaBridge 171:3a7713b1edbc 38 .flashA1Size = FLASH_SIZE, /* 16MB */
AnnaBridge 171:3a7713b1edbc 39 .flashA2Size = 0,
AnnaBridge 171:3a7713b1edbc 40 #if defined(FSL_FEATURE_QSPI_SUPPORT_PARALLEL_MODE) && (FSL_FEATURE_QSPI_SUPPORT_PARALLEL_MODE)
AnnaBridge 171:3a7713b1edbc 41 .flashB1Size = FLASH_SIZE,
AnnaBridge 171:3a7713b1edbc 42 .flashB2Size = 0,
AnnaBridge 171:3a7713b1edbc 43 #endif
AnnaBridge 171:3a7713b1edbc 44 #if !defined(FSL_FEATURE_QSPI_HAS_NO_TDH) || (!FSL_FEATURE_QSPI_HAS_NO_TDH)
AnnaBridge 171:3a7713b1edbc 45 .dataHoldTime = 0,
AnnaBridge 171:3a7713b1edbc 46 #endif
AnnaBridge 171:3a7713b1edbc 47 .CSHoldTime = 0,
AnnaBridge 171:3a7713b1edbc 48 .CSSetupTime = 0,
AnnaBridge 171:3a7713b1edbc 49 .cloumnspace = 0,
AnnaBridge 171:3a7713b1edbc 50 .dataLearnValue = 0,
AnnaBridge 171:3a7713b1edbc 51 .endian = kQSPI_64LittleEndian,
AnnaBridge 171:3a7713b1edbc 52 .enableWordAddress = false
AnnaBridge 171:3a7713b1edbc 53 };
AnnaBridge 171:3a7713b1edbc 54
AnnaBridge 171:3a7713b1edbc 55 /* Pre-defined LUT definitions */
AnnaBridge 171:3a7713b1edbc 56 uint32_t lut[FSL_FEATURE_QSPI_LUT_DEPTH] =
AnnaBridge 171:3a7713b1edbc 57 {
AnnaBridge 171:3a7713b1edbc 58 /* Seq0 : Read */
AnnaBridge 171:3a7713b1edbc 59 /* CMD: 0x03 - Read, Single pad */
AnnaBridge 171:3a7713b1edbc 60 /* ADDR: 0x18 - 24bit address, Single pad */
AnnaBridge 171:3a7713b1edbc 61 /* READ: 0x80 - Read 128 bytes, Single pad */
AnnaBridge 171:3a7713b1edbc 62 /* JUMP_ON_CS: 0 */
AnnaBridge 171:3a7713b1edbc 63 [0] = QSPI_LUT_SEQ(QSPI_CMD, QSPI_PAD_1, 0x03, QSPI_ADDR, QSPI_PAD_1, 0x18),
AnnaBridge 171:3a7713b1edbc 64 [1] = QSPI_LUT_SEQ(QSPI_READ, QSPI_PAD_1, 0x80, QSPI_JMP_ON_CS, QSPI_PAD_1, 0x0),
AnnaBridge 171:3a7713b1edbc 65
AnnaBridge 171:3a7713b1edbc 66 /* Seq1: Page Program */
AnnaBridge 171:3a7713b1edbc 67 /* CMD: 0x02 - Page Program, Single pad */
AnnaBridge 171:3a7713b1edbc 68 /* ADDR: 0x18 - 24bit address, Single pad */
AnnaBridge 171:3a7713b1edbc 69 /* WRITE: 0x80 - Write 128 bytes at one pass, Single pad */
AnnaBridge 171:3a7713b1edbc 70 [4] = QSPI_LUT_SEQ(QSPI_CMD, QSPI_PAD_1, 0x02, QSPI_ADDR, QSPI_PAD_1, 0x18),
AnnaBridge 171:3a7713b1edbc 71 [5] = QSPI_LUT_SEQ(QSPI_WRITE, QSPI_PAD_1, 0x80, 0, 0, 0),
AnnaBridge 171:3a7713b1edbc 72
AnnaBridge 171:3a7713b1edbc 73 /* Match MISRA rule */
AnnaBridge 171:3a7713b1edbc 74 [63] = 0
AnnaBridge 171:3a7713b1edbc 75 };
AnnaBridge 171:3a7713b1edbc 76
AnnaBridge 171:3a7713b1edbc 77 #endif /* _FSL_MBED_QSPI_DEVICE_H_*/