The official Mbed 2 C/C++ SDK provides the software platform and libraries to build your applications.
Dependents: hello SerialTestv11 SerialTestv12 Sierpinski ... more
mbed 2
This is the mbed 2 library. If you'd like to learn about Mbed OS please see the mbed-os docs.
Diff: TARGET_NUCLEO_F334R8/stm32f3xx_hal_sdadc.h
- Revision:
- 122:f9eeca106725
- Parent:
- 92:4fc01daae5a5
- Child:
- 123:b0220dba8be7
diff -r 6c34061e7c34 -r f9eeca106725 TARGET_NUCLEO_F334R8/stm32f3xx_hal_sdadc.h --- a/TARGET_NUCLEO_F334R8/stm32f3xx_hal_sdadc.h Wed May 25 16:44:06 2016 +0100 +++ b/TARGET_NUCLEO_F334R8/stm32f3xx_hal_sdadc.h Thu Jul 07 14:34:11 2016 +0100 @@ -2,14 +2,14 @@ ****************************************************************************** * @file stm32f3xx_hal_sdadc.h * @author MCD Application Team - * @version V1.1.0 - * @date 12-Sept-2014 + * @version V1.2.1 + * @date 29-April-2015 * @brief This file contains all the functions prototypes for the SDADC * firmware library. ****************************************************************************** * @attention * - * <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2> + * <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> * * Redistribution and use in source and binary forms, with or without modification, * are permitted provided that the following conditions are met: @@ -89,6 +89,7 @@ uint32_t SlowClockMode; /*!< Specifies if slow clock mode is enabled or not. This parameter can be a value of @ref SDADC_Slow_Clock_Mode */ uint32_t ReferenceVoltage; /*!< Specifies the reference voltage. + Note: This parameter is common to all SDADC instances. This parameter can be a value of @ref SDADC_Reference_Voltage */ }SDADC_InitTypeDef; @@ -144,9 +145,6 @@ #define SDADC_LOWPOWER_NONE ((uint32_t)0x00000000) #define SDADC_LOWPOWER_POWERDOWN SDADC_CR1_PDI #define SDADC_LOWPOWER_STANDBY SDADC_CR1_SBI -#define IS_SDADC_LOWPOWER_MODE(LOWPOWER) (((LOWPOWER) == SDADC_LOWPOWER_NONE) || \ - ((LOWPOWER) == SDADC_LOWPOWER_POWERDOWN) || \ - ((LOWPOWER) == SDADC_LOWPOWER_STANDBY)) /** * @} */ @@ -156,8 +154,6 @@ */ #define SDADC_FAST_CONV_DISABLE ((uint32_t)0x00000000) #define SDADC_FAST_CONV_ENABLE SDADC_CR2_FAST -#define IS_SDADC_FAST_CONV_MODE(FAST) (((FAST) == SDADC_FAST_CONV_DISABLE) || \ - ((FAST) == SDADC_FAST_CONV_ENABLE)) /** * @} */ @@ -167,8 +163,6 @@ */ #define SDADC_SLOW_CLOCK_DISABLE ((uint32_t)0x00000000) #define SDADC_SLOW_CLOCK_ENABLE SDADC_CR1_SLOWCK -#define IS_SDADC_SLOW_CLOCK_MODE(MODE) (((MODE) == SDADC_SLOW_CLOCK_DISABLE) || \ - ((MODE) == SDADC_SLOW_CLOCK_ENABLE)) /** * @} */ @@ -180,10 +174,6 @@ #define SDADC_VREF_VREFINT1 SDADC_CR1_REFV_0 /*!< The reference voltage is forced internally to 1.22V VREFINT */ #define SDADC_VREF_VREFINT2 SDADC_CR1_REFV_1 /*!< The reference voltage is forced internally to 1.8V VREFINT */ #define SDADC_VREF_VDDA SDADC_CR1_REFV /*!< The reference voltage is forced internally to VDDA */ -#define IS_SDADC_VREF(VREF) (((VREF) == SDADC_VREF_EXT) || \ - ((VREF) == SDADC_VREF_VREFINT1) || \ - ((VREF) == SDADC_VREF_VREFINT2) || \ - ((VREF) == SDADC_VREF_VDDA)) /** * @} */ @@ -195,10 +185,6 @@ #define SDADC_CONF_INDEX_0 ((uint32_t)0x00000000) /*!< Configuration 0 Register selected */ #define SDADC_CONF_INDEX_1 ((uint32_t)0x00000001) /*!< Configuration 1 Register selected */ #define SDADC_CONF_INDEX_2 ((uint32_t)0x00000002) /*!< Configuration 2 Register selected */ - -#define IS_SDADC_CONF_INDEX(CONF) (((CONF) == SDADC_CONF_INDEX_0) || \ - ((CONF) == SDADC_CONF_INDEX_1) || \ - ((CONF) == SDADC_CONF_INDEX_2)) /** * @} */ @@ -209,10 +195,6 @@ #define SDADC_INPUT_MODE_DIFF ((uint32_t)0x00000000) /*!< Conversions are executed in differential mode */ #define SDADC_INPUT_MODE_SE_OFFSET SDADC_CONF0R_SE0_0 /*!< Conversions are executed in single ended offset mode */ #define SDADC_INPUT_MODE_SE_ZERO_REFERENCE SDADC_CONF0R_SE0 /*!< Conversions are executed in single ended zero-volt reference mode */ - -#define IS_SDADC_INPUT_MODE(MODE) (((MODE) == SDADC_INPUT_MODE_DIFF) || \ - ((MODE) == SDADC_INPUT_MODE_SE_OFFSET) || \ - ((MODE) == SDADC_INPUT_MODE_SE_ZERO_REFERENCE)) /** * @} */ @@ -227,13 +209,6 @@ #define SDADC_GAIN_16 SDADC_CONF0R_GAIN0_2 /*!< Gain equal to 16 */ #define SDADC_GAIN_32 ((uint32_t)0x00500000) /*!< Gain equal to 32 */ #define SDADC_GAIN_1_2 SDADC_CONF0R_GAIN0 /*!< Gain equal to 1/2 */ -#define IS_SDADC_GAIN(GAIN) (((GAIN) == SDADC_GAIN_1) || \ - ((GAIN) == SDADC_GAIN_2) || \ - ((GAIN) == SDADC_GAIN_4) || \ - ((GAIN) == SDADC_GAIN_8) || \ - ((GAIN) == SDADC_GAIN_16) || \ - ((GAIN) == SDADC_GAIN_32) || \ - ((GAIN) == SDADC_GAIN_1_2)) /** * @} */ @@ -244,20 +219,11 @@ #define SDADC_COMMON_MODE_VSSA ((uint32_t)0x00000000) /*!< Select SDADC VSSA as common mode */ #define SDADC_COMMON_MODE_VDDA_2 SDADC_CONF0R_COMMON0_0 /*!< Select SDADC VDDA/2 as common mode */ #define SDADC_COMMON_MODE_VDDA SDADC_CONF0R_COMMON0_1 /*!< Select SDADC VDDA as common mode */ -#define IS_SDADC_COMMON_MODE(MODE) (((MODE) == SDADC_COMMON_MODE_VSSA) || \ - ((MODE) == SDADC_COMMON_MODE_VDDA_2) || \ - ((MODE) == SDADC_COMMON_MODE_VDDA)) /** * @} */ -/** @defgroup SDADC_Offset SDADC Offset - * @{ - */ -#define IS_SDADC_OFFSET_VALUE(VALUE) ((VALUE) <= 0x00000FFF) -/** - * @} - */ + /** @defgroup SDADC_Channel_Selection SDADC Channel Selection * @{ @@ -280,21 +246,6 @@ #define SDADC_CHANNEL_6 ((uint32_t)0x00060040) #define SDADC_CHANNEL_7 ((uint32_t)0x00070080) #define SDADC_CHANNEL_8 ((uint32_t)0x00080100) - -/* Just one channel of the 9 channels can be selected for regular conversion */ -#define IS_SDADC_REGULAR_CHANNEL(CHANNEL) (((CHANNEL) == SDADC_CHANNEL_0) || \ - ((CHANNEL) == SDADC_CHANNEL_1) || \ - ((CHANNEL) == SDADC_CHANNEL_2) || \ - ((CHANNEL) == SDADC_CHANNEL_3) || \ - ((CHANNEL) == SDADC_CHANNEL_4) || \ - ((CHANNEL) == SDADC_CHANNEL_5) || \ - ((CHANNEL) == SDADC_CHANNEL_6) || \ - ((CHANNEL) == SDADC_CHANNEL_7) || \ - ((CHANNEL) == SDADC_CHANNEL_8)) - -/* Any or all of the 9 channels can be selected for injected conversion */ -#define IS_SDADC_INJECTED_CHANNEL(CHANNEL) (((CHANNEL) != 0) && ((CHANNEL) <= 0x000F01FF)) - /** * @} */ @@ -305,10 +256,6 @@ #define SDADC_CALIBRATION_SEQ_1 ((uint32_t)0x00000000) /*!< One calibration sequence to calculate offset of conf0 (OFFSET0[11:0]) */ #define SDADC_CALIBRATION_SEQ_2 SDADC_CR2_CALIBCNT_0 /*!< Two calibration sequences to calculate offset of conf0 and conf1 (OFFSET0[11:0] and OFFSET1[11:0]) */ #define SDADC_CALIBRATION_SEQ_3 SDADC_CR2_CALIBCNT_1 /*!< Three calibration sequences to calculate offset of conf0, conf1 and conf2 (OFFSET0[11:0], OFFSET1[11:0], and OFFSET2[11:0]) */ - -#define IS_SDADC_CALIB_SEQUENCE(SEQUENCE) (((SEQUENCE) == SDADC_CALIBRATION_SEQ_1) || \ - ((SEQUENCE) == SDADC_CALIBRATION_SEQ_2) || \ - ((SEQUENCE) == SDADC_CALIBRATION_SEQ_3)) /** * @} */ @@ -318,9 +265,6 @@ */ #define SDADC_CONTINUOUS_CONV_OFF ((uint32_t)0x00000000) /*!< Conversion are not continuous */ #define SDADC_CONTINUOUS_CONV_ON ((uint32_t)0x00000001) /*!< Conversion are continuous */ - -#define IS_SDADC_CONTINUOUS_MODE(MODE) (((MODE) == SDADC_CONTINUOUS_CONV_OFF) || \ - ((MODE) == SDADC_CONTINUOUS_CONV_ON)) /** * @} */ @@ -331,13 +275,6 @@ #define SDADC_SOFTWARE_TRIGGER ((uint32_t)0x00000000) /*!< Software trigger */ #define SDADC_SYNCHRONOUS_TRIGGER ((uint32_t)0x00000001) /*!< Synchronous with SDADC1 (only for SDADC2 and SDADC3) */ #define SDADC_EXTERNAL_TRIGGER ((uint32_t)0x00000002) /*!< External trigger */ - -#define IS_SDADC_REGULAR_TRIGGER(TRIGGER) (((TRIGGER) == SDADC_SOFTWARE_TRIGGER) || \ - ((TRIGGER) == SDADC_SYNCHRONOUS_TRIGGER)) - -#define IS_SDADC_INJECTED_TRIGGER(TRIGGER) (((TRIGGER) == SDADC_SOFTWARE_TRIGGER) || \ - ((TRIGGER) == SDADC_SYNCHRONOUS_TRIGGER) || \ - ((TRIGGER) == SDADC_EXTERNAL_TRIGGER)) /** * @} */ @@ -365,6 +302,237 @@ #define SDADC_EXT_TRIG_TIM19_CC4 ((uint32_t)0x00000500) /*!< Trigger source for SDADC3 */ #define SDADC_EXT_TRIG_EXTI11 ((uint32_t)0x00000700) /*!< Trigger source for SDADC1, SDADC2 and SDADC3 */ #define SDADC_EXT_TRIG_EXTI15 ((uint32_t)0x00000600) /*!< Trigger source for SDADC1, SDADC2 and SDADC3 */ +/** + * @} + */ + +/** @defgroup SDADC_ExtTriggerEdge SDADC External Trigger Edge + * @{ + */ +#define SDADC_EXT_TRIG_RISING_EDGE SDADC_CR2_JEXTEN_0 /*!< External rising edge */ +#define SDADC_EXT_TRIG_FALLING_EDGE SDADC_CR2_JEXTEN_1 /*!< External falling edge */ +#define SDADC_EXT_TRIG_BOTH_EDGES SDADC_CR2_JEXTEN /*!< External rising and falling edges */ +/** + * @} + */ + +/** @defgroup SDADC_InjectedDelay SDADC Injected Conversion Delay + * @{ + */ +#define SDADC_INJECTED_DELAY_NONE ((uint32_t)0x00000000) /*!< No delay on injected conversion */ +#define SDADC_INJECTED_DELAY SDADC_CR2_JDS /*!< Delay on injected conversion */ +/** + * @} + */ + +/** @defgroup SDADC_MultimodeType SDADC Multimode Type + * @{ + */ +#define SDADC_MULTIMODE_SDADC1_SDADC2 ((uint32_t)0x00000000) /*!< Get conversion values for SDADC1 and SDADC2 */ +#define SDADC_MULTIMODE_SDADC1_SDADC3 ((uint32_t)0x00000001) /*!< Get conversion values for SDADC1 and SDADC3 */ +/** + * @} + */ + +/** @defgroup SDADC_ErrorCode SDADC Error Code + * @{ + */ +#define SDADC_ERROR_NONE ((uint32_t)0x00000000) /*!< No error */ +#define SDADC_ERROR_REGULAR_OVERRUN ((uint32_t)0x00000001) /*!< Overrun occurs during regular conversion */ +#define SDADC_ERROR_INJECTED_OVERRUN ((uint32_t)0x00000002) /*!< Overrun occurs during injected conversion */ +#define SDADC_ERROR_DMA ((uint32_t)0x00000003) /*!< DMA error occurs */ +/** + * @} + */ + +/** @defgroup SDADC_interrupts_definition SDADC interrupts definition + * @{ + */ +#define SDADC_IT_EOCAL SDADC_CR1_EOCALIE /*!< End of calibration interrupt enable */ +#define SDADC_IT_JEOC SDADC_CR1_JEOCIE /*!< Injected end of conversion interrupt enable */ +#define SDADC_IT_JOVR SDADC_CR1_JOVRIE /*!< Injected data overrun interrupt enable */ +#define SDADC_IT_REOC SDADC_CR1_REOCIE /*!< Regular end of conversion interrupt enable */ +#define SDADC_IT_ROVR SDADC_CR1_ROVRIE /*!< Regular data overrun interrupt enable */ +/** + * @} + */ + +/** @defgroup SDADC_flags_definition SDADC flags definition + * @{ + */ +#define SDADC_FLAG_EOCAL SDADC_ISR_EOCALF /*!< End of calibration flag */ +#define SDADC_FLAG_JEOC SDADC_ISR_JEOCF /*!< End of injected conversion flag */ +#define SDADC_FLAG_JOVR SDADC_ISR_JOVRF /*!< Injected conversion overrun flag */ +#define SDADC_FLAG_REOC SDADC_ISR_REOCF /*!< End of regular conversion flag */ +#define SDADC_FLAG_ROVR SDADC_ISR_ROVRF /*!< Regular conversion overrun flag */ +/** + * @} + */ + +/** + * @} + */ + +/* Exported macros -----------------------------------------------------------*/ +/** @defgroup SDADC_Exported_Macros SDADC Exported Macros + * @{ + */ + +/* Macro for internal HAL driver usage, and possibly can be used into code of */ +/* final user. */ + +/** @brief Enable the ADC end of conversion interrupt. + * @param __HANDLE__: ADC handle + * @param __INTERRUPT__: ADC Interrupt + * This parameter can be any combination of the following values: + * @arg SDADC_IT_EOCAL: End of calibration interrupt enable + * @arg SDADC_IT_JEOC: Injected end of conversion interrupt enable + * @arg SDADC_IT_JOVR: Injected data overrun interrupt enable + * @arg SDADC_IT_REOC: Regular end of conversion interrupt enable + * @arg SDADC_IT_ROVR: Regular data overrun interrupt enable + * @retval None + */ +#define __HAL_SDADC_ENABLE_IT(__HANDLE__, __INTERRUPT__) \ + (SET_BIT((__HANDLE__)->Instance->CR1, (__INTERRUPT__))) + +/** @brief Disable the ADC end of conversion interrupt. + * @param __HANDLE__: ADC handle + * @param __INTERRUPT__: ADC Interrupt + * This parameter can be any combination of the following values: + * @arg SDADC_IT_EOCAL: End of calibration interrupt enable + * @arg SDADC_IT_JEOC: Injected end of conversion interrupt enable + * @arg SDADC_IT_JOVR: Injected data overrun interrupt enable + * @arg SDADC_IT_REOC: Regular end of conversion interrupt enable + * @arg SDADC_IT_ROVR: Regular data overrun interrupt enable + * @retval None + */ +#define __HAL_SDADC_DISABLE_IT(__HANDLE__, __INTERRUPT__) \ + (CLEAR_BIT((__HANDLE__)->Instance->CR1, (__INTERRUPT__))) + +/** @brief Checks if the specified ADC interrupt source is enabled or disabled. + * @param __HANDLE__: ADC handle + * @param __INTERRUPT__: ADC interrupt source to check + * This parameter can be any combination of the following values: + * @arg SDADC_IT_EOCAL: End of calibration interrupt enable + * @arg SDADC_IT_JEOC: Injected end of conversion interrupt enable + * @arg SDADC_IT_JOVR: Injected data overrun interrupt enable + * @arg SDADC_IT_REOC: Regular end of conversion interrupt enable + * @arg SDADC_IT_ROVR: Regular data overrun interrupt enable + * @retval State of interruption (SET or RESET) + */ +#define __HAL_SDADC_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) \ + (((__HANDLE__)->Instance->CR1 & (__INTERRUPT__)) == (__INTERRUPT__)) + +/** @brief Get the selected ADC's flag status. + * @param __HANDLE__: ADC handle + * @param __FLAG__: ADC flag + * This parameter can be any combination of the following values: + * @arg SDADC_FLAG_EOCAL: End of calibration flag + * @arg SDADC_FLAG_JEOC: End of injected conversion flag + * @arg SDADC_FLAG_JOVR: Injected conversion overrun flag + * @arg SDADC_FLAG_REOC: End of regular conversion flag + * @arg SDADC_FLAG_ROVR: Regular conversion overrun flag + * @retval None + */ +#define __HAL_SDADC_GET_FLAG(__HANDLE__, __FLAG__) \ + ((((__HANDLE__)->Instance->ISR) & (__FLAG__)) == (__FLAG__)) + +/** @brief Clear the ADC's pending flags + * @param __HANDLE__: ADC handle + * @param __FLAG__: ADC flag + * This parameter can be any combination of the following values: + * @arg SDADC_FLAG_EOCAL: End of calibration flag + * @arg SDADC_FLAG_JEOC: End of injected conversion flag + * @arg SDADC_FLAG_JOVR: Injected conversion overrun flag + * @arg SDADC_FLAG_REOC: End of regular conversion flag + * @arg SDADC_FLAG_ROVR: Regular conversion overrun flag + * @retval None + */ +#define __HAL_SDADC_CLEAR_FLAG(__HANDLE__, __FLAG__) \ + (CLEAR_BIT((__HANDLE__)->Instance->ISR, (__FLAG__))) + +/** @brief Reset SDADC handle state + * @param __HANDLE__: SDADC handle. + * @retval None + */ +#define __HAL_SDADC_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SDADC_STATE_RESET) + +/** + * @} + */ + +/* Private macros ------------------------------------------------------------*/ +/** @defgroup SDADC_Private_Macros SDADC Private Macros + * @{ + */ + +#define IS_SDADC_LOWPOWER_MODE(LOWPOWER) (((LOWPOWER) == SDADC_LOWPOWER_NONE) || \ + ((LOWPOWER) == SDADC_LOWPOWER_POWERDOWN) || \ + ((LOWPOWER) == SDADC_LOWPOWER_STANDBY)) + +#define IS_SDADC_FAST_CONV_MODE(FAST) (((FAST) == SDADC_FAST_CONV_DISABLE) || \ + ((FAST) == SDADC_FAST_CONV_ENABLE)) + +#define IS_SDADC_SLOW_CLOCK_MODE(MODE) (((MODE) == SDADC_SLOW_CLOCK_DISABLE) || \ + ((MODE) == SDADC_SLOW_CLOCK_ENABLE)) + +#define IS_SDADC_VREF(VREF) (((VREF) == SDADC_VREF_EXT) || \ + ((VREF) == SDADC_VREF_VREFINT1) || \ + ((VREF) == SDADC_VREF_VREFINT2) || \ + ((VREF) == SDADC_VREF_VDDA)) + +#define IS_SDADC_CONF_INDEX(CONF) (((CONF) == SDADC_CONF_INDEX_0) || \ + ((CONF) == SDADC_CONF_INDEX_1) || \ + ((CONF) == SDADC_CONF_INDEX_2)) + +#define IS_SDADC_INPUT_MODE(MODE) (((MODE) == SDADC_INPUT_MODE_DIFF) || \ + ((MODE) == SDADC_INPUT_MODE_SE_OFFSET) || \ + ((MODE) == SDADC_INPUT_MODE_SE_ZERO_REFERENCE)) + +#define IS_SDADC_GAIN(GAIN) (((GAIN) == SDADC_GAIN_1) || \ + ((GAIN) == SDADC_GAIN_2) || \ + ((GAIN) == SDADC_GAIN_4) || \ + ((GAIN) == SDADC_GAIN_8) || \ + ((GAIN) == SDADC_GAIN_16) || \ + ((GAIN) == SDADC_GAIN_32) || \ + ((GAIN) == SDADC_GAIN_1_2)) + +#define IS_SDADC_COMMON_MODE(MODE) (((MODE) == SDADC_COMMON_MODE_VSSA) || \ + ((MODE) == SDADC_COMMON_MODE_VDDA_2) || \ + ((MODE) == SDADC_COMMON_MODE_VDDA)) + +#define IS_SDADC_OFFSET_VALUE(VALUE) ((VALUE) <= 0x00000FFF) + +/* Just one channel of the 9 channels can be selected for regular conversion */ +#define IS_SDADC_REGULAR_CHANNEL(CHANNEL) (((CHANNEL) == SDADC_CHANNEL_0) || \ + ((CHANNEL) == SDADC_CHANNEL_1) || \ + ((CHANNEL) == SDADC_CHANNEL_2) || \ + ((CHANNEL) == SDADC_CHANNEL_3) || \ + ((CHANNEL) == SDADC_CHANNEL_4) || \ + ((CHANNEL) == SDADC_CHANNEL_5) || \ + ((CHANNEL) == SDADC_CHANNEL_6) || \ + ((CHANNEL) == SDADC_CHANNEL_7) || \ + ((CHANNEL) == SDADC_CHANNEL_8)) + +/* Any or all of the 9 channels can be selected for injected conversion */ +#define IS_SDADC_INJECTED_CHANNEL(CHANNEL) (((CHANNEL) != 0) && ((CHANNEL) <= 0x000F01FF)) + + +#define IS_SDADC_CALIB_SEQUENCE(SEQUENCE) (((SEQUENCE) == SDADC_CALIBRATION_SEQ_1) || \ + ((SEQUENCE) == SDADC_CALIBRATION_SEQ_2) || \ + ((SEQUENCE) == SDADC_CALIBRATION_SEQ_3)) + +#define IS_SDADC_CONTINUOUS_MODE(MODE) (((MODE) == SDADC_CONTINUOUS_CONV_OFF) || \ + ((MODE) == SDADC_CONTINUOUS_CONV_ON)) + + +#define IS_SDADC_REGULAR_TRIGGER(TRIGGER) (((TRIGGER) == SDADC_SOFTWARE_TRIGGER) || \ + ((TRIGGER) == SDADC_SYNCHRONOUS_TRIGGER)) + +#define IS_SDADC_INJECTED_TRIGGER(TRIGGER) (((TRIGGER) == SDADC_SOFTWARE_TRIGGER) || \ + ((TRIGGER) == SDADC_SYNCHRONOUS_TRIGGER) || \ + ((TRIGGER) == SDADC_EXTERNAL_TRIGGER)) + #define IS_SDADC_EXT_INJEC_TRIG(INJTRIG) (((INJTRIG) == SDADC_EXT_TRIG_TIM13_CC1) || \ ((INJTRIG) == SDADC_EXT_TRIG_TIM14_CC1) || \ @@ -386,41 +554,14 @@ ((INJTRIG) == SDADC_EXT_TRIG_TIM19_CC4) || \ ((INJTRIG) == SDADC_EXT_TRIG_EXTI11) || \ ((INJTRIG) == SDADC_EXT_TRIG_EXTI15)) -/** - * @} - */ - -/** @defgroup SDADC_ExtTriggerEdge SDADC External Trigger Edge - * @{ - */ -#define SDADC_EXT_TRIG_RISING_EDGE SDADC_CR2_JEXTEN_0 /*!< External rising edge */ -#define SDADC_EXT_TRIG_FALLING_EDGE SDADC_CR2_JEXTEN_1 /*!< External falling edge */ -#define SDADC_EXT_TRIG_BOTH_EDGES SDADC_CR2_JEXTEN /*!< External rising and falling edges */ #define IS_SDADC_EXT_TRIG_EDGE(TRIGGER) (((TRIGGER) == SDADC_EXT_TRIG_RISING_EDGE) || \ ((TRIGGER) == SDADC_EXT_TRIG_FALLING_EDGE) || \ ((TRIGGER) == SDADC_EXT_TRIG_BOTH_EDGES)) -/** - * @} - */ -/** @defgroup SDADC_InjectedDelay SDADC Injected Conversion Delay - * @{ - */ -#define SDADC_INJECTED_DELAY_NONE ((uint32_t)0x00000000) /*!< No delay on injected conversion */ -#define SDADC_INJECTED_DELAY SDADC_CR2_JDS /*!< Delay on injected conversion */ #define IS_SDADC_INJECTED_DELAY(DELAY) (((DELAY) == SDADC_INJECTED_DELAY_NONE) || \ ((DELAY) == SDADC_INJECTED_DELAY)) -/** - * @} - */ - -/** @defgroup SDADC_MultimodeType SDADC Multimode Type - * @{ - */ -#define SDADC_MULTIMODE_SDADC1_SDADC2 ((uint32_t)0x00000000) /*!< Get conversion values for SDADC1 and SDADC2 */ -#define SDADC_MULTIMODE_SDADC1_SDADC3 ((uint32_t)0x00000001) /*!< Get conversion values for SDADC1 and SDADC3 */ #define IS_SDADC_MULTIMODE_TYPE(TYPE) (((TYPE) == SDADC_MULTIMODE_SDADC1_SDADC2) || \ ((TYPE) == SDADC_MULTIMODE_SDADC1_SDADC3)) @@ -428,37 +569,6 @@ * @} */ -/** @defgroup SDADC_ErrorCode SDADC Error Code - * @{ - */ -#define SDADC_ERROR_NONE ((uint32_t)0x00000000) /*!< No error */ -#define SDADC_ERROR_REGULAR_OVERRUN ((uint32_t)0x00000001) /*!< Overrun occurs during regular conversion */ -#define SDADC_ERROR_INJECTED_OVERRUN ((uint32_t)0x00000002) /*!< Overrun occurs during injected conversion */ -#define SDADC_ERROR_DMA ((uint32_t)0x00000003) /*!< DMA error occurs */ -/** - * @} - */ - -/** - * @} - */ - -/* Exported macros -----------------------------------------------------------*/ -/** @defgroup SDADC_Exported_Macros SDADC Exported Macros - * @{ - */ - -/** @brief Reset SDADC handle state - * @param __HANDLE__: SDADC handle. - * @retval None - */ -#define __HAL_SDADC_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SDADC_STATE_RESET) - -/** - * @} - */ - - /* Exported functions --------------------------------------------------------*/ /** @addtogroup SDADC_Exported_Functions SDADC Exported Functions * @{