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Dependents:   hello SerialTestv11 SerialTestv12 Sierpinski ... more

TARGET_NUCLEO_L152RE/stm32l1xx_hal_pwr.h@122:f9eeca106725, 2016-07-07 (annotated)

Committer:
Kojto
Date:
Thu Jul 07 14:34:11 2016 +0100
Revision:
122:f9eeca106725
Parent:
90:cb3d968589d8 
Release 122 of the mbed library



Changes:

- new targets - Nucleo L432KC, Beetle, Nucleo F446ZE, Nucleo L011K4

- Thread safety addition - mbed API should contain a statement about thread safety

- critical section API addition

- CAS API (core_util_atomic_incr/decr)

- DEVICE_ are generated from targets.json file, device.h deprecated

- Callback replaces FunctionPointer to provide std like interface

- mbed HAL API docs improvements

- toolchain - prexif attributes with MBED_

            - add new attributes - packed, weak, forcedinline, align

- target.json - contains targets definitions

- ST - L1XX - Cube update to 1.5

     - SPI clock selection fix (clock from APB domain)

     - F7 - Cube update v1.4.0

     - L0 -  baudrate init fix

     - L1 - Cube update v1.5

     - F3 - baudrate init fix, 3 targets CAN support

     - F4 - Cube update v1.12.0, 3 targets CAN support

     - L4XX - Cube update v1.5.1

     - F0 - update Cube to v1.5.0

     - L4 - 2 targets (L476RG/VG) CAN support

- NXP - pwm clock fix for KSDK2 MCU

      - LPC2368 - remove ARM toolchain support - due to regression

      - KSDK2 - fix SPI , I2C address and repeat start

- Silabs - some fixes backported from mbed 3

- Renesas - RZ_A1H - SystemCoreClockUpdate addition

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Kojto 90:cb3d968589d8 1 /**
Kojto 90:cb3d968589d8 2 ******************************************************************************
Kojto 90:cb3d968589d8 3 * @file stm32l1xx_hal_pwr.h
Kojto 90:cb3d968589d8 4 * @author MCD Application Team
Kojto 122:f9eeca106725 5 * @version V1.1.3
Kojto 122:f9eeca106725 6 * @date 04-March-2016
Kojto 90:cb3d968589d8 7 * @brief Header file of PWR HAL module.
Kojto 90:cb3d968589d8 8 ******************************************************************************
Kojto 90:cb3d968589d8 9 * @attention
Kojto 90:cb3d968589d8 10 *
Kojto 122:f9eeca106725 11 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
Kojto 90:cb3d968589d8 12 *
Kojto 90:cb3d968589d8 13 * Redistribution and use in source and binary forms, with or without modification,
Kojto 90:cb3d968589d8 14 * are permitted provided that the following conditions are met:
Kojto 90:cb3d968589d8 15 * 1. Redistributions of source code must retain the above copyright notice,
Kojto 90:cb3d968589d8 16 * this list of conditions and the following disclaimer.
Kojto 90:cb3d968589d8 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
Kojto 90:cb3d968589d8 18 * this list of conditions and the following disclaimer in the documentation
Kojto 90:cb3d968589d8 19 * and/or other materials provided with the distribution.
Kojto 90:cb3d968589d8 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
Kojto 90:cb3d968589d8 21 * may be used to endorse or promote products derived from this software
Kojto 90:cb3d968589d8 22 * without specific prior written permission.
Kojto 90:cb3d968589d8 23 *
Kojto 90:cb3d968589d8 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
Kojto 90:cb3d968589d8 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
Kojto 90:cb3d968589d8 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
Kojto 90:cb3d968589d8 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
Kojto 90:cb3d968589d8 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
Kojto 90:cb3d968589d8 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
Kojto 90:cb3d968589d8 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
Kojto 90:cb3d968589d8 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
Kojto 90:cb3d968589d8 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
Kojto 90:cb3d968589d8 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
Kojto 90:cb3d968589d8 34 *
Kojto 90:cb3d968589d8 35 ******************************************************************************
Kojto 90:cb3d968589d8 36 */
Kojto 90:cb3d968589d8 37
Kojto 90:cb3d968589d8 38 /* Define to prevent recursive inclusion -------------------------------------*/
Kojto 90:cb3d968589d8 39 #ifndef __STM32L1xx_HAL_PWR_H
Kojto 90:cb3d968589d8 40 #define __STM32L1xx_HAL_PWR_H
Kojto 90:cb3d968589d8 41
Kojto 90:cb3d968589d8 42 #ifdef __cplusplus
Kojto 90:cb3d968589d8 43 extern "C" {
Kojto 90:cb3d968589d8 44 #endif
Kojto 90:cb3d968589d8 45
Kojto 90:cb3d968589d8 46 /* Includes ------------------------------------------------------------------*/
Kojto 90:cb3d968589d8 47 #include "stm32l1xx_hal_def.h"
Kojto 90:cb3d968589d8 48
Kojto 90:cb3d968589d8 49 /** @addtogroup STM32L1xx_HAL_Driver
Kojto 90:cb3d968589d8 50 * @{
Kojto 90:cb3d968589d8 51 */
Kojto 90:cb3d968589d8 52
Kojto 90:cb3d968589d8 53 /** @addtogroup PWR
Kojto 90:cb3d968589d8 54 * @{
Kojto 90:cb3d968589d8 55 */
Kojto 90:cb3d968589d8 56
Kojto 90:cb3d968589d8 57 /* Exported types ------------------------------------------------------------*/
Kojto 90:cb3d968589d8 58
Kojto 90:cb3d968589d8 59 /** @defgroup PWR_Exported_Types PWR Exported Types
Kojto 90:cb3d968589d8 60 * @{
Kojto 90:cb3d968589d8 61 */
Kojto 90:cb3d968589d8 62
Kojto 90:cb3d968589d8 63 /**
Kojto 90:cb3d968589d8 64 * @brief PWR PVD configuration structure definition
Kojto 90:cb3d968589d8 65 */
Kojto 90:cb3d968589d8 66 typedef struct
Kojto 90:cb3d968589d8 67 {
Kojto 90:cb3d968589d8 68 uint32_t PVDLevel; /*!< PVDLevel: Specifies the PVD detection level.
Kojto 90:cb3d968589d8 69 This parameter can be a value of @ref PWR_PVD_detection_level */
Kojto 90:cb3d968589d8 70
Kojto 90:cb3d968589d8 71 uint32_t Mode; /*!< Mode: Specifies the operating mode for the selected pins.
Kojto 90:cb3d968589d8 72 This parameter can be a value of @ref PWR_PVD_Mode */
Kojto 90:cb3d968589d8 73 }PWR_PVDTypeDef;
Kojto 90:cb3d968589d8 74
Kojto 90:cb3d968589d8 75 /**
Kojto 90:cb3d968589d8 76 * @}
Kojto 90:cb3d968589d8 77 */
Kojto 122:f9eeca106725 78
Kojto 122:f9eeca106725 79 /* Internal constants --------------------------------------------------------*/
Kojto 122:f9eeca106725 80
Kojto 122:f9eeca106725 81 /** @addtogroup PWR_Private_Constants
Kojto 122:f9eeca106725 82 * @{
Kojto 122:f9eeca106725 83 */
Kojto 122:f9eeca106725 84 #define PWR_EXTI_LINE_PVD ((uint32_t)0x00010000) /*!< External interrupt line 16 Connected to the PVD EXTI Line */
Kojto 122:f9eeca106725 85
Kojto 122:f9eeca106725 86 /**
Kojto 122:f9eeca106725 87 * @}
Kojto 122:f9eeca106725 88 */
Kojto 122:f9eeca106725 89
Kojto 122:f9eeca106725 90
Kojto 90:cb3d968589d8 91
Kojto 90:cb3d968589d8 92 /* Exported constants --------------------------------------------------------*/
Kojto 90:cb3d968589d8 93
Kojto 90:cb3d968589d8 94 /** @defgroup PWR_Exported_Constants PWR Exported Constants
Kojto 90:cb3d968589d8 95 * @{
Kojto 90:cb3d968589d8 96 */
Kojto 90:cb3d968589d8 97
Kojto 90:cb3d968589d8 98 /** @defgroup PWR_register_alias_address PWR Register alias address
Kojto 90:cb3d968589d8 99 * @{
Kojto 90:cb3d968589d8 100 */
Kojto 90:cb3d968589d8 101 /* ------------- PWR registers bit address in the alias region ---------------*/
Kojto 90:cb3d968589d8 102 #define PWR_OFFSET (PWR_BASE - PERIPH_BASE)
Kojto 90:cb3d968589d8 103 #define PWR_CR_OFFSET 0x00
Kojto 90:cb3d968589d8 104 #define PWR_CSR_OFFSET 0x04
Kojto 90:cb3d968589d8 105 #define PWR_CR_OFFSET_BB (PWR_OFFSET + PWR_CR_OFFSET)
Kojto 90:cb3d968589d8 106 #define PWR_CSR_OFFSET_BB (PWR_OFFSET + PWR_CSR_OFFSET)
Kojto 90:cb3d968589d8 107 /**
Kojto 90:cb3d968589d8 108 * @}
Kojto 90:cb3d968589d8 109 */
Kojto 90:cb3d968589d8 110
Kojto 90:cb3d968589d8 111 /** @defgroup PWR_CR_register_alias PWR CR Register alias address
Kojto 90:cb3d968589d8 112 * @{
Kojto 90:cb3d968589d8 113 */
Kojto 90:cb3d968589d8 114 /* --- CR Register ---*/
Kojto 90:cb3d968589d8 115 /* Alias word address of LPSDSR bit */
Kojto 90:cb3d968589d8 116 #define LPSDSR_BIT_NUMBER POSITION_VAL(PWR_CR_LPSDSR)
Kojto 90:cb3d968589d8 117 #define CR_LPSDSR_BB ((uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32) + (LPSDSR_BIT_NUMBER * 4)))
Kojto 90:cb3d968589d8 118
Kojto 90:cb3d968589d8 119 /* Alias word address of DBP bit */
Kojto 90:cb3d968589d8 120 #define DBP_BIT_NUMBER POSITION_VAL(PWR_CR_DBP)
Kojto 90:cb3d968589d8 121 #define CR_DBP_BB ((uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32) + (DBP_BIT_NUMBER * 4)))
Kojto 90:cb3d968589d8 122
Kojto 90:cb3d968589d8 123 /* Alias word address of LPRUN bit */
Kojto 90:cb3d968589d8 124 #define LPRUN_BIT_NUMBER POSITION_VAL(PWR_CR_LPRUN)
Kojto 90:cb3d968589d8 125 #define CR_LPRUN_BB ((uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32) + (LPRUN_BIT_NUMBER * 4)))
Kojto 90:cb3d968589d8 126
Kojto 90:cb3d968589d8 127 /* Alias word address of PVDE bit */
Kojto 90:cb3d968589d8 128 #define PVDE_BIT_NUMBER POSITION_VAL(PWR_CR_PVDE)
Kojto 90:cb3d968589d8 129 #define CR_PVDE_BB ((uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32) + (PVDE_BIT_NUMBER * 4)))
Kojto 90:cb3d968589d8 130
Kojto 90:cb3d968589d8 131 /* Alias word address of FWU bit */
Kojto 90:cb3d968589d8 132 #define FWU_BIT_NUMBER POSITION_VAL(PWR_CR_FWU)
Kojto 90:cb3d968589d8 133 #define CR_FWU_BB ((uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32) + (FWU_BIT_NUMBER * 4)))
Kojto 90:cb3d968589d8 134
Kojto 90:cb3d968589d8 135 /* Alias word address of ULP bit */
Kojto 90:cb3d968589d8 136 #define ULP_BIT_NUMBER POSITION_VAL(PWR_CR_ULP)
Kojto 90:cb3d968589d8 137 #define CR_ULP_BB ((uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32) + (ULP_BIT_NUMBER * 4)))
Kojto 90:cb3d968589d8 138 /**
Kojto 90:cb3d968589d8 139 * @}
Kojto 90:cb3d968589d8 140 */
Kojto 90:cb3d968589d8 141
Kojto 90:cb3d968589d8 142 /** @defgroup PWR_CSR_register_alias PWR CSR Register alias address
Kojto 90:cb3d968589d8 143 * @{
Kojto 90:cb3d968589d8 144 */
Kojto 90:cb3d968589d8 145
Kojto 90:cb3d968589d8 146 /* --- CSR Register ---*/
Kojto 90:cb3d968589d8 147 /* Alias word address of EWUP1, EWUP2 and EWUP3 bits */
Kojto 90:cb3d968589d8 148 #define CSR_EWUP_BB(VAL) ((uint32_t)(PERIPH_BB_BASE + (PWR_CSR_OFFSET_BB * 32) + (POSITION_VAL(VAL) * 4)))
Kojto 90:cb3d968589d8 149 /**
Kojto 90:cb3d968589d8 150 * @}
Kojto 90:cb3d968589d8 151 */
Kojto 90:cb3d968589d8 152
Kojto 90:cb3d968589d8 153 /** @defgroup PWR_PVD_detection_level PWR PVD detection level
Kojto 90:cb3d968589d8 154 * @{
Kojto 90:cb3d968589d8 155 */
Kojto 90:cb3d968589d8 156 #define PWR_PVDLEVEL_0 PWR_CR_PLS_LEV0
Kojto 90:cb3d968589d8 157 #define PWR_PVDLEVEL_1 PWR_CR_PLS_LEV1
Kojto 90:cb3d968589d8 158 #define PWR_PVDLEVEL_2 PWR_CR_PLS_LEV2
Kojto 90:cb3d968589d8 159 #define PWR_PVDLEVEL_3 PWR_CR_PLS_LEV3
Kojto 90:cb3d968589d8 160 #define PWR_PVDLEVEL_4 PWR_CR_PLS_LEV4
Kojto 90:cb3d968589d8 161 #define PWR_PVDLEVEL_5 PWR_CR_PLS_LEV5
Kojto 90:cb3d968589d8 162 #define PWR_PVDLEVEL_6 PWR_CR_PLS_LEV6
Kojto 90:cb3d968589d8 163 #define PWR_PVDLEVEL_7 PWR_CR_PLS_LEV7 /* External input analog voltage
Kojto 90:cb3d968589d8 164 (Compare internally to VREFINT) */
Kojto 122:f9eeca106725 165
Kojto 90:cb3d968589d8 166 /**
Kojto 90:cb3d968589d8 167 * @}
Kojto 90:cb3d968589d8 168 */
Kojto 90:cb3d968589d8 169
Kojto 90:cb3d968589d8 170 /** @defgroup PWR_PVD_Mode PWR PVD Mode
Kojto 90:cb3d968589d8 171 * @{
Kojto 90:cb3d968589d8 172 */
Kojto 90:cb3d968589d8 173 #define PWR_PVD_MODE_NORMAL ((uint32_t)0x00000000) /*!< basic mode is used */
Kojto 90:cb3d968589d8 174 #define PWR_PVD_MODE_IT_RISING ((uint32_t)0x00010001) /*!< External Interrupt Mode with Rising edge trigger detection */
Kojto 90:cb3d968589d8 175 #define PWR_PVD_MODE_IT_FALLING ((uint32_t)0x00010002) /*!< External Interrupt Mode with Falling edge trigger detection */
Kojto 90:cb3d968589d8 176 #define PWR_PVD_MODE_IT_RISING_FALLING ((uint32_t)0x00010003) /*!< External Interrupt Mode with Rising/Falling edge trigger detection */
Kojto 90:cb3d968589d8 177 #define PWR_PVD_MODE_EVENT_RISING ((uint32_t)0x00020001) /*!< Event Mode with Rising edge trigger detection */
Kojto 90:cb3d968589d8 178 #define PWR_PVD_MODE_EVENT_FALLING ((uint32_t)0x00020002) /*!< Event Mode with Falling edge trigger detection */
Kojto 90:cb3d968589d8 179 #define PWR_PVD_MODE_EVENT_RISING_FALLING ((uint32_t)0x00020003) /*!< Event Mode with Rising/Falling edge trigger detection */
Kojto 90:cb3d968589d8 180
Kojto 122:f9eeca106725 181 /**
Kojto 122:f9eeca106725 182 * @}
Kojto 90:cb3d968589d8 183 */
Kojto 90:cb3d968589d8 184
Kojto 90:cb3d968589d8 185 /** @defgroup PWR_Regulator_state_in_SLEEP_STOP_mode PWR Regulator state in SLEEP/STOP mode
Kojto 90:cb3d968589d8 186 * @{
Kojto 90:cb3d968589d8 187 */
Kojto 90:cb3d968589d8 188 #define PWR_MAINREGULATOR_ON ((uint32_t)0x00000000)
Kojto 90:cb3d968589d8 189 #define PWR_LOWPOWERREGULATOR_ON PWR_CR_LPSDSR
Kojto 90:cb3d968589d8 190
Kojto 90:cb3d968589d8 191 /**
Kojto 90:cb3d968589d8 192 * @}
Kojto 90:cb3d968589d8 193 */
Kojto 90:cb3d968589d8 194
Kojto 90:cb3d968589d8 195 /** @defgroup PWR_SLEEP_mode_entry PWR SLEEP mode entry
Kojto 90:cb3d968589d8 196 * @{
Kojto 90:cb3d968589d8 197 */
Kojto 90:cb3d968589d8 198 #define PWR_SLEEPENTRY_WFI ((uint8_t)0x01)
Kojto 90:cb3d968589d8 199 #define PWR_SLEEPENTRY_WFE ((uint8_t)0x02)
Kojto 122:f9eeca106725 200
Kojto 90:cb3d968589d8 201 /**
Kojto 90:cb3d968589d8 202 * @}
Kojto 90:cb3d968589d8 203 */
Kojto 90:cb3d968589d8 204
Kojto 90:cb3d968589d8 205 /** @defgroup PWR_STOP_mode_entry PWR STOP mode entry
Kojto 90:cb3d968589d8 206 * @{
Kojto 90:cb3d968589d8 207 */
Kojto 90:cb3d968589d8 208 #define PWR_STOPENTRY_WFI ((uint8_t)0x01)
Kojto 90:cb3d968589d8 209 #define PWR_STOPENTRY_WFE ((uint8_t)0x02)
Kojto 122:f9eeca106725 210
Kojto 90:cb3d968589d8 211 /**
Kojto 90:cb3d968589d8 212 * @}
Kojto 90:cb3d968589d8 213 */
Kojto 90:cb3d968589d8 214
Kojto 90:cb3d968589d8 215 /** @defgroup PWR_Regulator_Voltage_Scale PWR Regulator Voltage Scale
Kojto 90:cb3d968589d8 216 * @{
Kojto 90:cb3d968589d8 217 */
Kojto 90:cb3d968589d8 218
Kojto 90:cb3d968589d8 219 #define PWR_REGULATOR_VOLTAGE_SCALE1 PWR_CR_VOS_0
Kojto 90:cb3d968589d8 220 #define PWR_REGULATOR_VOLTAGE_SCALE2 PWR_CR_VOS_1
Kojto 90:cb3d968589d8 221 #define PWR_REGULATOR_VOLTAGE_SCALE3 PWR_CR_VOS
Kojto 90:cb3d968589d8 222
Kojto 122:f9eeca106725 223
Kojto 90:cb3d968589d8 224 /**
Kojto 90:cb3d968589d8 225 * @}
Kojto 90:cb3d968589d8 226 */
Kojto 90:cb3d968589d8 227
Kojto 90:cb3d968589d8 228 /** @defgroup PWR_Flag PWR Flag
Kojto 90:cb3d968589d8 229 * @{
Kojto 90:cb3d968589d8 230 */
Kojto 90:cb3d968589d8 231 #define PWR_FLAG_WU PWR_CSR_WUF
Kojto 90:cb3d968589d8 232 #define PWR_FLAG_SB PWR_CSR_SBF
Kojto 90:cb3d968589d8 233 #define PWR_FLAG_PVDO PWR_CSR_PVDO
Kojto 90:cb3d968589d8 234 #define PWR_FLAG_VREFINTRDY PWR_CSR_VREFINTRDYF
Kojto 90:cb3d968589d8 235 #define PWR_FLAG_VOS PWR_CSR_VOSF
Kojto 90:cb3d968589d8 236 #define PWR_FLAG_REGLP PWR_CSR_REGLPF
Kojto 90:cb3d968589d8 237
Kojto 90:cb3d968589d8 238 /**
Kojto 90:cb3d968589d8 239 * @}
Kojto 90:cb3d968589d8 240 */
Kojto 90:cb3d968589d8 241
Kojto 90:cb3d968589d8 242 /**
Kojto 90:cb3d968589d8 243 * @}
Kojto 90:cb3d968589d8 244 */
Kojto 90:cb3d968589d8 245
Kojto 90:cb3d968589d8 246 /* Exported macro ------------------------------------------------------------*/
Kojto 122:f9eeca106725 247 /** @defgroup PWR_Exported_Macros PWR Exported Macros
Kojto 90:cb3d968589d8 248 * @{
Kojto 90:cb3d968589d8 249 */
Kojto 90:cb3d968589d8 250
Kojto 90:cb3d968589d8 251 /** @brief macros configure the main internal regulator output voltage.
Kojto 90:cb3d968589d8 252 * @param __REGULATOR__: specifies the regulator output voltage to achieve
Kojto 90:cb3d968589d8 253 * a tradeoff between performance and power consumption when the device does
Kojto 90:cb3d968589d8 254 * not operate at the maximum frequency (refer to the datasheets for more details).
Kojto 90:cb3d968589d8 255 * This parameter can be one of the following values:
Kojto 90:cb3d968589d8 256 * @arg PWR_REGULATOR_VOLTAGE_SCALE1: Regulator voltage output Scale 1 mode,
Kojto 90:cb3d968589d8 257 * System frequency up to 32 MHz.
Kojto 90:cb3d968589d8 258 * @arg PWR_REGULATOR_VOLTAGE_SCALE2: Regulator voltage output Scale 2 mode,
Kojto 90:cb3d968589d8 259 * System frequency up to 16 MHz.
Kojto 90:cb3d968589d8 260 * @arg PWR_REGULATOR_VOLTAGE_SCALE3: Regulator voltage output Scale 3 mode,
Kojto 90:cb3d968589d8 261 * System frequency up to 4.2 MHz
Kojto 90:cb3d968589d8 262 * @retval None
Kojto 90:cb3d968589d8 263 */
Kojto 90:cb3d968589d8 264 #define __HAL_PWR_VOLTAGESCALING_CONFIG(__REGULATOR__) (MODIFY_REG(PWR->CR, PWR_CR_VOS, (__REGULATOR__)))
Kojto 90:cb3d968589d8 265
Kojto 90:cb3d968589d8 266 /** @brief Check PWR flag is set or not.
Kojto 90:cb3d968589d8 267 * @param __FLAG__: specifies the flag to check.
Kojto 90:cb3d968589d8 268 * This parameter can be one of the following values:
Kojto 90:cb3d968589d8 269 * @arg PWR_FLAG_WU: Wake Up flag. This flag indicates that a wakeup event
Kojto 90:cb3d968589d8 270 * was received from the WKUP pin or from the RTC alarm (Alarm B),
Kojto 90:cb3d968589d8 271 * RTC Tamper event, RTC TimeStamp event or RTC Wakeup.
Kojto 90:cb3d968589d8 272 * An additional wakeup event is detected if the WKUP pin is enabled
Kojto 90:cb3d968589d8 273 * (by setting the EWUP bit) when the WKUP pin level is already high.
Kojto 90:cb3d968589d8 274 * @arg PWR_FLAG_SB: StandBy flag. This flag indicates that the system was
Kojto 90:cb3d968589d8 275 * resumed from StandBy mode.
Kojto 90:cb3d968589d8 276 * @arg PWR_FLAG_PVDO: PVD Output. This flag is valid only if PVD is enabled
Kojto 90:cb3d968589d8 277 * by the HAL_PWR_EnablePVD() function. The PVD is stopped by Standby mode
Kojto 90:cb3d968589d8 278 * For this reason, this bit is equal to 0 after Standby or reset
Kojto 90:cb3d968589d8 279 * until the PVDE bit is set.
Kojto 90:cb3d968589d8 280 * @arg PWR_FLAG_VREFINTRDY: Internal voltage reference (VREFINT) ready flag.
Kojto 90:cb3d968589d8 281 * This bit indicates the state of the internal voltage reference, VREFINT.
Kojto 90:cb3d968589d8 282 * @arg PWR_FLAG_VOS: Voltage Scaling select flag. A delay is required for
Kojto 90:cb3d968589d8 283 * the internal regulator to be ready after the voltage range is changed.
Kojto 90:cb3d968589d8 284 * The VOSF bit indicates that the regulator has reached the voltage level
Kojto 90:cb3d968589d8 285 * defined with bits VOS of PWR_CR register.
Kojto 90:cb3d968589d8 286 * @arg PWR_FLAG_REGLP: Regulator LP flag. When the MCU exits from Low power run
Kojto 90:cb3d968589d8 287 * mode, this bit stays at 1 until the regulator is ready in main mode.
Kojto 90:cb3d968589d8 288 * A polling on this bit is recommended to wait for the regulator main mode.
Kojto 90:cb3d968589d8 289 * This bit is reset by hardware when the regulator is ready.
Kojto 90:cb3d968589d8 290 * @retval The new state of __FLAG__ (TRUE or FALSE).
Kojto 90:cb3d968589d8 291 */
Kojto 90:cb3d968589d8 292 #define __HAL_PWR_GET_FLAG(__FLAG__) ((PWR->CSR & (__FLAG__)) == (__FLAG__))
Kojto 90:cb3d968589d8 293
Kojto 90:cb3d968589d8 294 /** @brief Clear the PWR's pending flags.
Kojto 90:cb3d968589d8 295 * @param __FLAG__: specifies the flag to clear.
Kojto 90:cb3d968589d8 296 * This parameter can be one of the following values:
Kojto 90:cb3d968589d8 297 * @arg PWR_FLAG_WU: Wake Up flag
Kojto 90:cb3d968589d8 298 * @arg PWR_FLAG_SB: StandBy flag
Kojto 90:cb3d968589d8 299 */
Kojto 122:f9eeca106725 300 #define __HAL_PWR_CLEAR_FLAG(__FLAG__) SET_BIT(PWR->CR, ((__FLAG__) << 2))
Kojto 90:cb3d968589d8 301
Kojto 90:cb3d968589d8 302 /**
Kojto 90:cb3d968589d8 303 * @brief Enable interrupt on PVD Exti Line 16.
Kojto 90:cb3d968589d8 304 * @retval None.
Kojto 90:cb3d968589d8 305 */
Kojto 122:f9eeca106725 306 #define __HAL_PWR_PVD_EXTI_ENABLE_IT() SET_BIT(EXTI->IMR, PWR_EXTI_LINE_PVD)
Kojto 90:cb3d968589d8 307
Kojto 90:cb3d968589d8 308 /**
Kojto 90:cb3d968589d8 309 * @brief Disable interrupt on PVD Exti Line 16.
Kojto 90:cb3d968589d8 310 * @retval None.
Kojto 90:cb3d968589d8 311 */
Kojto 122:f9eeca106725 312 #define __HAL_PWR_PVD_EXTI_DISABLE_IT() CLEAR_BIT(EXTI->IMR, PWR_EXTI_LINE_PVD)
Kojto 90:cb3d968589d8 313
Kojto 90:cb3d968589d8 314 /**
Kojto 90:cb3d968589d8 315 * @brief Enable event on PVD Exti Line 16.
Kojto 90:cb3d968589d8 316 * @retval None.
Kojto 90:cb3d968589d8 317 */
Kojto 122:f9eeca106725 318 #define __HAL_PWR_PVD_EXTI_ENABLE_EVENT() SET_BIT(EXTI->EMR, PWR_EXTI_LINE_PVD)
Kojto 90:cb3d968589d8 319
Kojto 90:cb3d968589d8 320 /**
Kojto 90:cb3d968589d8 321 * @brief Disable event on PVD Exti Line 16.
Kojto 90:cb3d968589d8 322 * @retval None.
Kojto 90:cb3d968589d8 323 */
Kojto 122:f9eeca106725 324 #define __HAL_PWR_PVD_EXTI_DISABLE_EVENT() CLEAR_BIT(EXTI->EMR, PWR_EXTI_LINE_PVD)
Kojto 90:cb3d968589d8 325
Kojto 90:cb3d968589d8 326
Kojto 90:cb3d968589d8 327 /**
Kojto 90:cb3d968589d8 328 * @brief PVD EXTI line configuration: set falling edge trigger.
Kojto 90:cb3d968589d8 329 * @retval None.
Kojto 90:cb3d968589d8 330 */
Kojto 122:f9eeca106725 331 #define __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE() SET_BIT(EXTI->FTSR, PWR_EXTI_LINE_PVD)
Kojto 122:f9eeca106725 332
Kojto 122:f9eeca106725 333
Kojto 122:f9eeca106725 334 /**
Kojto 122:f9eeca106725 335 * @brief Disable the PVD Extended Interrupt Falling Trigger.
Kojto 122:f9eeca106725 336 * @retval None.
Kojto 122:f9eeca106725 337 */
Kojto 122:f9eeca106725 338 #define __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE() CLEAR_BIT(EXTI->FTSR, PWR_EXTI_LINE_PVD)
Kojto 122:f9eeca106725 339
Kojto 90:cb3d968589d8 340
Kojto 90:cb3d968589d8 341 /**
Kojto 90:cb3d968589d8 342 * @brief PVD EXTI line configuration: set rising edge trigger.
Kojto 90:cb3d968589d8 343 * @retval None.
Kojto 90:cb3d968589d8 344 */
Kojto 122:f9eeca106725 345 #define __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE() SET_BIT(EXTI->RTSR, PWR_EXTI_LINE_PVD)
Kojto 122:f9eeca106725 346
Kojto 122:f9eeca106725 347 /**
Kojto 122:f9eeca106725 348 * @brief Disable the PVD Extended Interrupt Rising Trigger.
Kojto 122:f9eeca106725 349 * @retval None.
Kojto 122:f9eeca106725 350 */
Kojto 122:f9eeca106725 351 #define __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE() CLEAR_BIT(EXTI->RTSR, PWR_EXTI_LINE_PVD)
Kojto 122:f9eeca106725 352
Kojto 122:f9eeca106725 353 /**
Kojto 122:f9eeca106725 354 * @brief PVD EXTI line configuration: set rising & falling edge trigger.
Kojto 122:f9eeca106725 355 * @retval None.
Kojto 122:f9eeca106725 356 */
Kojto 122:f9eeca106725 357 #define __HAL_PWR_PVD_EXTI_ENABLE_RISING_FALLING_EDGE() \
Kojto 122:f9eeca106725 358 do { \
Kojto 122:f9eeca106725 359 __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE(); \
Kojto 122:f9eeca106725 360 __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE(); \
Kojto 122:f9eeca106725 361 } while(0)
Kojto 122:f9eeca106725 362
Kojto 122:f9eeca106725 363 /**
Kojto 122:f9eeca106725 364 * @brief Disable the PVD Extended Interrupt Rising & Falling Trigger.
Kojto 122:f9eeca106725 365 * @retval None.
Kojto 122:f9eeca106725 366 */
Kojto 122:f9eeca106725 367 #define __HAL_PWR_PVD_EXTI_DISABLE_RISING_FALLING_EDGE() \
Kojto 122:f9eeca106725 368 do { \
Kojto 122:f9eeca106725 369 __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE(); \
Kojto 122:f9eeca106725 370 __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE(); \
Kojto 122:f9eeca106725 371 } while(0)
Kojto 122:f9eeca106725 372
Kojto 122:f9eeca106725 373
Kojto 90:cb3d968589d8 374
Kojto 90:cb3d968589d8 375 /**
Kojto 90:cb3d968589d8 376 * @brief Check whether the specified PVD EXTI interrupt flag is set or not.
Kojto 90:cb3d968589d8 377 * @retval EXTI PVD Line Status.
Kojto 90:cb3d968589d8 378 */
Kojto 90:cb3d968589d8 379 #define __HAL_PWR_PVD_EXTI_GET_FLAG() (EXTI->PR & (PWR_EXTI_LINE_PVD))
Kojto 90:cb3d968589d8 380
Kojto 90:cb3d968589d8 381 /**
Kojto 90:cb3d968589d8 382 * @brief Clear the PVD EXTI flag.
Kojto 90:cb3d968589d8 383 * @retval None.
Kojto 90:cb3d968589d8 384 */
Kojto 90:cb3d968589d8 385 #define __HAL_PWR_PVD_EXTI_CLEAR_FLAG() (EXTI->PR = (PWR_EXTI_LINE_PVD))
Kojto 90:cb3d968589d8 386
Kojto 90:cb3d968589d8 387 /**
Kojto 90:cb3d968589d8 388 * @brief Generate a Software interrupt on selected EXTI line.
Kojto 90:cb3d968589d8 389 * @retval None.
Kojto 90:cb3d968589d8 390 */
Kojto 122:f9eeca106725 391 #define __HAL_PWR_PVD_EXTI_GENERATE_SWIT() SET_BIT(EXTI->SWIER, PWR_EXTI_LINE_PVD)
Kojto 122:f9eeca106725 392
Kojto 90:cb3d968589d8 393 /**
Kojto 90:cb3d968589d8 394 * @}
Kojto 90:cb3d968589d8 395 */
Kojto 90:cb3d968589d8 396
Kojto 122:f9eeca106725 397 /* Private macro -------------------------------------------------------------*/
Kojto 122:f9eeca106725 398 /** @defgroup PWR_Private_Macros PWR Private Macros
Kojto 122:f9eeca106725 399 * @{
Kojto 122:f9eeca106725 400 */
Kojto 122:f9eeca106725 401
Kojto 122:f9eeca106725 402 #define IS_PWR_PVD_LEVEL(LEVEL) (((LEVEL) == PWR_PVDLEVEL_0) || ((LEVEL) == PWR_PVDLEVEL_1)|| \
Kojto 122:f9eeca106725 403 ((LEVEL) == PWR_PVDLEVEL_2) || ((LEVEL) == PWR_PVDLEVEL_3)|| \
Kojto 122:f9eeca106725 404 ((LEVEL) == PWR_PVDLEVEL_4) || ((LEVEL) == PWR_PVDLEVEL_5)|| \
Kojto 122:f9eeca106725 405 ((LEVEL) == PWR_PVDLEVEL_6) || ((LEVEL) == PWR_PVDLEVEL_7))
Kojto 122:f9eeca106725 406
Kojto 122:f9eeca106725 407
Kojto 122:f9eeca106725 408 #define IS_PWR_PVD_MODE(MODE) (((MODE) == PWR_PVD_MODE_IT_RISING)|| ((MODE) == PWR_PVD_MODE_IT_FALLING) || \
Kojto 122:f9eeca106725 409 ((MODE) == PWR_PVD_MODE_IT_RISING_FALLING) || ((MODE) == PWR_PVD_MODE_EVENT_RISING) || \
Kojto 122:f9eeca106725 410 ((MODE) == PWR_PVD_MODE_EVENT_FALLING) || ((MODE) == PWR_PVD_MODE_EVENT_RISING_FALLING) || \
Kojto 122:f9eeca106725 411 ((MODE) == PWR_PVD_MODE_NORMAL))
Kojto 122:f9eeca106725 412
Kojto 122:f9eeca106725 413 #define IS_PWR_REGULATOR(REGULATOR) (((REGULATOR) == PWR_MAINREGULATOR_ON) || \
Kojto 122:f9eeca106725 414 ((REGULATOR) == PWR_LOWPOWERREGULATOR_ON))
Kojto 122:f9eeca106725 415
Kojto 122:f9eeca106725 416
Kojto 122:f9eeca106725 417 #define IS_PWR_SLEEP_ENTRY(ENTRY) (((ENTRY) == PWR_SLEEPENTRY_WFI) || ((ENTRY) == PWR_SLEEPENTRY_WFE))
Kojto 122:f9eeca106725 418
Kojto 122:f9eeca106725 419 #define IS_PWR_STOP_ENTRY(ENTRY) (((ENTRY) == PWR_STOPENTRY_WFI) || ((ENTRY) == PWR_STOPENTRY_WFE) )
Kojto 122:f9eeca106725 420
Kojto 122:f9eeca106725 421 #define IS_PWR_VOLTAGE_SCALING_RANGE(RANGE) (((RANGE) == PWR_REGULATOR_VOLTAGE_SCALE1) || \
Kojto 122:f9eeca106725 422 ((RANGE) == PWR_REGULATOR_VOLTAGE_SCALE2) || \
Kojto 122:f9eeca106725 423 ((RANGE) == PWR_REGULATOR_VOLTAGE_SCALE3))
Kojto 122:f9eeca106725 424
Kojto 122:f9eeca106725 425
Kojto 122:f9eeca106725 426 /**
Kojto 122:f9eeca106725 427 * @}
Kojto 122:f9eeca106725 428 */
Kojto 122:f9eeca106725 429
Kojto 122:f9eeca106725 430
Kojto 122:f9eeca106725 431
Kojto 90:cb3d968589d8 432 /* Include PWR HAL Extension module */
Kojto 90:cb3d968589d8 433 #include "stm32l1xx_hal_pwr_ex.h"
Kojto 90:cb3d968589d8 434
Kojto 90:cb3d968589d8 435 /* Exported functions --------------------------------------------------------*/
Kojto 90:cb3d968589d8 436
Kojto 90:cb3d968589d8 437 /** @addtogroup PWR_Exported_Functions PWR Exported Functions
Kojto 90:cb3d968589d8 438 * @{
Kojto 90:cb3d968589d8 439 */
Kojto 90:cb3d968589d8 440
Kojto 90:cb3d968589d8 441 /** @addtogroup PWR_Exported_Functions_Group1 Initialization and de-initialization functions
Kojto 90:cb3d968589d8 442 * @{
Kojto 90:cb3d968589d8 443 */
Kojto 90:cb3d968589d8 444
Kojto 90:cb3d968589d8 445 /* Initialization and de-initialization functions *******************************/
Kojto 90:cb3d968589d8 446 void HAL_PWR_DeInit(void);
Kojto 90:cb3d968589d8 447 void HAL_PWR_EnableBkUpAccess(void);
Kojto 90:cb3d968589d8 448 void HAL_PWR_DisableBkUpAccess(void);
Kojto 90:cb3d968589d8 449
Kojto 90:cb3d968589d8 450 /**
Kojto 90:cb3d968589d8 451 * @}
Kojto 90:cb3d968589d8 452 */
Kojto 90:cb3d968589d8 453
Kojto 90:cb3d968589d8 454 /** @addtogroup PWR_Exported_Functions_Group2 Peripheral Control functions
Kojto 90:cb3d968589d8 455 * @{
Kojto 90:cb3d968589d8 456 */
Kojto 90:cb3d968589d8 457
Kojto 90:cb3d968589d8 458 /* Peripheral Control functions ************************************************/
Kojto 122:f9eeca106725 459 void HAL_PWR_ConfigPVD(PWR_PVDTypeDef *sConfigPVD);
Kojto 90:cb3d968589d8 460 void HAL_PWR_EnablePVD(void);
Kojto 90:cb3d968589d8 461 void HAL_PWR_DisablePVD(void);
Kojto 90:cb3d968589d8 462
Kojto 90:cb3d968589d8 463 /* WakeUp pins configuration functions ****************************************/
Kojto 90:cb3d968589d8 464 void HAL_PWR_EnableWakeUpPin(uint32_t WakeUpPinx);
Kojto 90:cb3d968589d8 465 void HAL_PWR_DisableWakeUpPin(uint32_t WakeUpPinx);
Kojto 90:cb3d968589d8 466
Kojto 90:cb3d968589d8 467 /* Low Power modes configuration functions ************************************/
Kojto 90:cb3d968589d8 468 void HAL_PWR_EnterSTOPMode(uint32_t Regulator, uint8_t STOPEntry);
Kojto 90:cb3d968589d8 469 void HAL_PWR_EnterSLEEPMode(uint32_t Regulator, uint8_t SLEEPEntry);
Kojto 90:cb3d968589d8 470 void HAL_PWR_EnterSTANDBYMode(void);
Kojto 90:cb3d968589d8 471
Kojto 122:f9eeca106725 472 void HAL_PWR_EnableSleepOnExit(void);
Kojto 122:f9eeca106725 473 void HAL_PWR_DisableSleepOnExit(void);
Kojto 122:f9eeca106725 474 void HAL_PWR_EnableSEVOnPend(void);
Kojto 122:f9eeca106725 475 void HAL_PWR_DisableSEVOnPend(void);
Kojto 122:f9eeca106725 476
Kojto 122:f9eeca106725 477
Kojto 122:f9eeca106725 478
Kojto 90:cb3d968589d8 479 void HAL_PWR_PVD_IRQHandler(void);
Kojto 90:cb3d968589d8 480 void HAL_PWR_PVDCallback(void);
Kojto 90:cb3d968589d8 481 /**
Kojto 90:cb3d968589d8 482 * @}
Kojto 90:cb3d968589d8 483 */
Kojto 90:cb3d968589d8 484
Kojto 90:cb3d968589d8 485 /**
Kojto 90:cb3d968589d8 486 * @}
Kojto 90:cb3d968589d8 487 */
Kojto 90:cb3d968589d8 488
Kojto 90:cb3d968589d8 489 /**
Kojto 90:cb3d968589d8 490 * @}
Kojto 90:cb3d968589d8 491 */
Kojto 90:cb3d968589d8 492
Kojto 90:cb3d968589d8 493 /**
Kojto 90:cb3d968589d8 494 * @}
Kojto 90:cb3d968589d8 495 */
Kojto 90:cb3d968589d8 496
Kojto 90:cb3d968589d8 497 #ifdef __cplusplus
Kojto 90:cb3d968589d8 498 }
Kojto 90:cb3d968589d8 499 #endif
Kojto 90:cb3d968589d8 500
Kojto 90:cb3d968589d8 501
Kojto 90:cb3d968589d8 502 #endif /* __STM32L1xx_HAL_PWR_H */
Kojto 90:cb3d968589d8 503
Kojto 90:cb3d968589d8 504 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/