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TARGET_NUCLEO_L011K4/TARGET_STM/TARGET_STM32L0/device/stm32l0xx_hal_flash_ex.h@157:e7ca05fa8600, 2017-11-09 (annotated)
- Committer:
- AnnaBridge
- Date:
- Thu Nov 09 11:14:10 2017 +0000
- Revision:
- 157:e7ca05fa8600
- Child:
- 167:84c0a372a020
Release 155 of the mbed library.
Who changed what in which revision?
User | Revision | Line number | New contents of line |
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AnnaBridge | 157:e7ca05fa8600 | 1 | /** |
AnnaBridge | 157:e7ca05fa8600 | 2 | ****************************************************************************** |
AnnaBridge | 157:e7ca05fa8600 | 3 | * @file stm32l0xx_hal_flash_ex.h |
AnnaBridge | 157:e7ca05fa8600 | 4 | * @author MCD Application Team |
AnnaBridge | 157:e7ca05fa8600 | 5 | * @version V1.7.0 |
AnnaBridge | 157:e7ca05fa8600 | 6 | * @date 31-May-2016 |
AnnaBridge | 157:e7ca05fa8600 | 7 | * @brief Header file of FLash HAL Extension module. |
AnnaBridge | 157:e7ca05fa8600 | 8 | ****************************************************************************** |
AnnaBridge | 157:e7ca05fa8600 | 9 | * @attention |
AnnaBridge | 157:e7ca05fa8600 | 10 | * |
AnnaBridge | 157:e7ca05fa8600 | 11 | * <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> |
AnnaBridge | 157:e7ca05fa8600 | 12 | * |
AnnaBridge | 157:e7ca05fa8600 | 13 | * Redistribution and use in source and binary forms, with or without modification, |
AnnaBridge | 157:e7ca05fa8600 | 14 | * are permitted provided that the following conditions are met: |
AnnaBridge | 157:e7ca05fa8600 | 15 | * 1. Redistributions of source code must retain the above copyright notice, |
AnnaBridge | 157:e7ca05fa8600 | 16 | * this list of conditions and the following disclaimer. |
AnnaBridge | 157:e7ca05fa8600 | 17 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
AnnaBridge | 157:e7ca05fa8600 | 18 | * this list of conditions and the following disclaimer in the documentation |
AnnaBridge | 157:e7ca05fa8600 | 19 | * and/or other materials provided with the distribution. |
AnnaBridge | 157:e7ca05fa8600 | 20 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
AnnaBridge | 157:e7ca05fa8600 | 21 | * may be used to endorse or promote products derived from this software |
AnnaBridge | 157:e7ca05fa8600 | 22 | * without specific prior written permission. |
AnnaBridge | 157:e7ca05fa8600 | 23 | * |
AnnaBridge | 157:e7ca05fa8600 | 24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
AnnaBridge | 157:e7ca05fa8600 | 25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
AnnaBridge | 157:e7ca05fa8600 | 26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
AnnaBridge | 157:e7ca05fa8600 | 27 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
AnnaBridge | 157:e7ca05fa8600 | 28 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
AnnaBridge | 157:e7ca05fa8600 | 29 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
AnnaBridge | 157:e7ca05fa8600 | 30 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
AnnaBridge | 157:e7ca05fa8600 | 31 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
AnnaBridge | 157:e7ca05fa8600 | 32 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
AnnaBridge | 157:e7ca05fa8600 | 33 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
AnnaBridge | 157:e7ca05fa8600 | 34 | * |
AnnaBridge | 157:e7ca05fa8600 | 35 | ****************************************************************************** |
AnnaBridge | 157:e7ca05fa8600 | 36 | */ |
AnnaBridge | 157:e7ca05fa8600 | 37 | |
AnnaBridge | 157:e7ca05fa8600 | 38 | /* Define to prevent recursive inclusion -------------------------------------*/ |
AnnaBridge | 157:e7ca05fa8600 | 39 | #ifndef __STM32L0xx_HAL_FLASH_EX_H |
AnnaBridge | 157:e7ca05fa8600 | 40 | #define __STM32L0xx_HAL_FLASH_EX_H |
AnnaBridge | 157:e7ca05fa8600 | 41 | |
AnnaBridge | 157:e7ca05fa8600 | 42 | #ifdef __cplusplus |
AnnaBridge | 157:e7ca05fa8600 | 43 | extern "C" { |
AnnaBridge | 157:e7ca05fa8600 | 44 | #endif |
AnnaBridge | 157:e7ca05fa8600 | 45 | |
AnnaBridge | 157:e7ca05fa8600 | 46 | /* Includes ------------------------------------------------------------------*/ |
AnnaBridge | 157:e7ca05fa8600 | 47 | #include "stm32l0xx_hal_def.h" |
AnnaBridge | 157:e7ca05fa8600 | 48 | |
AnnaBridge | 157:e7ca05fa8600 | 49 | /** @addtogroup STM32L0xx_HAL_Driver |
AnnaBridge | 157:e7ca05fa8600 | 50 | * @{ |
AnnaBridge | 157:e7ca05fa8600 | 51 | */ |
AnnaBridge | 157:e7ca05fa8600 | 52 | |
AnnaBridge | 157:e7ca05fa8600 | 53 | /** @defgroup FLASHEx FLASHEx |
AnnaBridge | 157:e7ca05fa8600 | 54 | * @{ |
AnnaBridge | 157:e7ca05fa8600 | 55 | */ |
AnnaBridge | 157:e7ca05fa8600 | 56 | |
AnnaBridge | 157:e7ca05fa8600 | 57 | /** @defgroup FLASHEx_Exported_Types FLASHEx Exported Types |
AnnaBridge | 157:e7ca05fa8600 | 58 | * @{ |
AnnaBridge | 157:e7ca05fa8600 | 59 | */ |
AnnaBridge | 157:e7ca05fa8600 | 60 | |
AnnaBridge | 157:e7ca05fa8600 | 61 | /** |
AnnaBridge | 157:e7ca05fa8600 | 62 | * @brief FLASH Option Bytes PROGRAM structure definition |
AnnaBridge | 157:e7ca05fa8600 | 63 | */ |
AnnaBridge | 157:e7ca05fa8600 | 64 | typedef struct |
AnnaBridge | 157:e7ca05fa8600 | 65 | { |
AnnaBridge | 157:e7ca05fa8600 | 66 | uint32_t OptionType; /*!< OptionType: Option byte to be configured. |
AnnaBridge | 157:e7ca05fa8600 | 67 | This parameter can be a value of @ref FLASHEx_Option_Type */ |
AnnaBridge | 157:e7ca05fa8600 | 68 | |
AnnaBridge | 157:e7ca05fa8600 | 69 | uint32_t WRPState; /*!< WRPState: Write protection activation or deactivation. |
AnnaBridge | 157:e7ca05fa8600 | 70 | This parameter can be a value of @ref FLASHEx_WRP_State */ |
AnnaBridge | 157:e7ca05fa8600 | 71 | |
AnnaBridge | 157:e7ca05fa8600 | 72 | uint32_t WRPSector; /*!< WRPSector: This bitfield specifies the sector (s) which are write protected. |
AnnaBridge | 157:e7ca05fa8600 | 73 | This parameter can be a combination of @ref FLASHEx_Option_Bytes_Write_Protection */ |
AnnaBridge | 157:e7ca05fa8600 | 74 | |
AnnaBridge | 157:e7ca05fa8600 | 75 | #if defined(STM32L071xx) || defined(STM32L072xx) || defined(STM32L073xx) || defined(STM32L081xx) || defined(STM32L082xx) || defined(STM32L083xx) |
AnnaBridge | 157:e7ca05fa8600 | 76 | uint32_t WRPSector2; /*!< WRPSector2 : This bitfield specifies the sector(s) upper Sector31 which are write protected. |
AnnaBridge | 157:e7ca05fa8600 | 77 | This parameter can be a combination of @ref FLASHEx_Option_Bytes_Write_Protection2 */ |
AnnaBridge | 157:e7ca05fa8600 | 78 | #endif |
AnnaBridge | 157:e7ca05fa8600 | 79 | |
AnnaBridge | 157:e7ca05fa8600 | 80 | uint8_t RDPLevel; /*!< RDPLevel: Set the read protection level. |
AnnaBridge | 157:e7ca05fa8600 | 81 | This parameter can be a value of @ref FLASHEx_Option_Bytes_Read_Protection */ |
AnnaBridge | 157:e7ca05fa8600 | 82 | |
AnnaBridge | 157:e7ca05fa8600 | 83 | uint8_t BORLevel; /*!< BORLevel: Set the BOR Level. |
AnnaBridge | 157:e7ca05fa8600 | 84 | This parameter can be a value of @ref FLASHEx_Option_Bytes_BOR_Level */ |
AnnaBridge | 157:e7ca05fa8600 | 85 | |
AnnaBridge | 157:e7ca05fa8600 | 86 | uint8_t USERConfig; /*!< USERConfig: Program the FLASH User Option Byte: IWDG_SW / RST_STOP / RST_STDBY. |
AnnaBridge | 157:e7ca05fa8600 | 87 | This parameter can be a combination of @ref FLASHEx_Option_Bytes_IWatchdog, |
AnnaBridge | 157:e7ca05fa8600 | 88 | @ref FLASHEx_Option_Bytes_nRST_STOP and @ref FLASHEx_Option_Bytes_nRST_STDBY */ |
AnnaBridge | 157:e7ca05fa8600 | 89 | |
AnnaBridge | 157:e7ca05fa8600 | 90 | uint8_t BOOTBit1Config; /*!< BOOT1Config: Together with input pad Boot0, this bit selects the boot source, flash, ram or system memory |
AnnaBridge | 157:e7ca05fa8600 | 91 | This parameter can be a value of @ref FLASHEx_Option_Bytes_BOOTBit1 */ |
AnnaBridge | 157:e7ca05fa8600 | 92 | |
AnnaBridge | 157:e7ca05fa8600 | 93 | } FLASH_OBProgramInitTypeDef; |
AnnaBridge | 157:e7ca05fa8600 | 94 | |
AnnaBridge | 157:e7ca05fa8600 | 95 | /** |
AnnaBridge | 157:e7ca05fa8600 | 96 | * @brief FLASH Advanced Option Bytes Program structure definition |
AnnaBridge | 157:e7ca05fa8600 | 97 | */ |
AnnaBridge | 157:e7ca05fa8600 | 98 | typedef struct |
AnnaBridge | 157:e7ca05fa8600 | 99 | { |
AnnaBridge | 157:e7ca05fa8600 | 100 | uint32_t OptionType; /*!< OptionType: Option byte to be configured for extension . |
AnnaBridge | 157:e7ca05fa8600 | 101 | This parameter can be a value of @ref FLASHEx_OptionAdv_Type */ |
AnnaBridge | 157:e7ca05fa8600 | 102 | |
AnnaBridge | 157:e7ca05fa8600 | 103 | uint8_t PCROPState; /*!< PCROPState: PCROP activation or deactivation. |
AnnaBridge | 157:e7ca05fa8600 | 104 | This parameter can be a value of @ref FLASHEx_PCROP_State */ |
AnnaBridge | 157:e7ca05fa8600 | 105 | |
AnnaBridge | 157:e7ca05fa8600 | 106 | uint32_t PCROPSector; /*!< PCROPSector : This bitfield specifies the sector(s) which are read/write protected. |
AnnaBridge | 157:e7ca05fa8600 | 107 | This parameter can be a combination of @ref FLASHEx_Option_Bytes_PC_ReadWrite_Protection */ |
AnnaBridge | 157:e7ca05fa8600 | 108 | |
AnnaBridge | 157:e7ca05fa8600 | 109 | #if defined (STM32L071xx) || defined (STM32L072xx) || defined (STM32L073xx) || defined (STM32L081xx) || defined (STM32L082xx) || defined (STM32L083xx) |
AnnaBridge | 157:e7ca05fa8600 | 110 | uint32_t PCROPSector2; /*!< PCROPSector : This bitfield specifies the sector(s) upper Sector31 which are read/write protected. |
AnnaBridge | 157:e7ca05fa8600 | 111 | This parameter can be a combination of @ref FLASHEx_Option_Bytes_PC_ReadWrite_Protection2 */ |
AnnaBridge | 157:e7ca05fa8600 | 112 | |
AnnaBridge | 157:e7ca05fa8600 | 113 | uint8_t BootConfig; /*!< BootConfig: specifies Option bytes for boot config. |
AnnaBridge | 157:e7ca05fa8600 | 114 | This parameter can be a value of @ref FLASHEx_Option_Bytes_BOOT_BANK */ |
AnnaBridge | 157:e7ca05fa8600 | 115 | #endif /* if STM32L071xx || STM32L072xx || STM32L073xx || STM32L081xx || STM32L082xx || STM32L083xx */ |
AnnaBridge | 157:e7ca05fa8600 | 116 | } FLASH_AdvOBProgramInitTypeDef; |
AnnaBridge | 157:e7ca05fa8600 | 117 | |
AnnaBridge | 157:e7ca05fa8600 | 118 | /** |
AnnaBridge | 157:e7ca05fa8600 | 119 | * @} |
AnnaBridge | 157:e7ca05fa8600 | 120 | */ |
AnnaBridge | 157:e7ca05fa8600 | 121 | |
AnnaBridge | 157:e7ca05fa8600 | 122 | /** @defgroup FLASHEx_Exported_Constants FLASHEx Exported Constants |
AnnaBridge | 157:e7ca05fa8600 | 123 | * @{ |
AnnaBridge | 157:e7ca05fa8600 | 124 | */ |
AnnaBridge | 157:e7ca05fa8600 | 125 | |
AnnaBridge | 157:e7ca05fa8600 | 126 | /** @defgroup FLASHEx_Type_Erase FLASH Type Erase |
AnnaBridge | 157:e7ca05fa8600 | 127 | * @{ |
AnnaBridge | 157:e7ca05fa8600 | 128 | */ |
AnnaBridge | 157:e7ca05fa8600 | 129 | #define FLASH_TYPEERASE_PAGES ((uint32_t)0x00U) /*!< Page erase only */ |
AnnaBridge | 157:e7ca05fa8600 | 130 | /** |
AnnaBridge | 157:e7ca05fa8600 | 131 | * @} |
AnnaBridge | 157:e7ca05fa8600 | 132 | */ |
AnnaBridge | 157:e7ca05fa8600 | 133 | |
AnnaBridge | 157:e7ca05fa8600 | 134 | /** @defgroup FLASHEx_Option_Type FLASH Option Type |
AnnaBridge | 157:e7ca05fa8600 | 135 | * @{ |
AnnaBridge | 157:e7ca05fa8600 | 136 | */ |
AnnaBridge | 157:e7ca05fa8600 | 137 | #define OPTIONBYTE_WRP ((uint32_t)0x01U) /*!< WRP option byte configuration */ |
AnnaBridge | 157:e7ca05fa8600 | 138 | #define OPTIONBYTE_RDP ((uint32_t)0x02U) /*!< RDP option byte configuration */ |
AnnaBridge | 157:e7ca05fa8600 | 139 | #define OPTIONBYTE_USER ((uint32_t)0x04U) /*!< USER option byte configuration */ |
AnnaBridge | 157:e7ca05fa8600 | 140 | #define OPTIONBYTE_BOR ((uint32_t)0x08U) /*!< BOR option byte configuration */ |
AnnaBridge | 157:e7ca05fa8600 | 141 | #define OPTIONBYTE_BOOT_BIT1 ((uint32_t)0x10U) /*!< BOOT PIN1 option byte configuration*/ |
AnnaBridge | 157:e7ca05fa8600 | 142 | /** |
AnnaBridge | 157:e7ca05fa8600 | 143 | * @} |
AnnaBridge | 157:e7ca05fa8600 | 144 | */ |
AnnaBridge | 157:e7ca05fa8600 | 145 | |
AnnaBridge | 157:e7ca05fa8600 | 146 | /** @defgroup FLASHEx_WRP_State FLASH WRP State |
AnnaBridge | 157:e7ca05fa8600 | 147 | * @{ |
AnnaBridge | 157:e7ca05fa8600 | 148 | */ |
AnnaBridge | 157:e7ca05fa8600 | 149 | #define OB_WRPSTATE_DISABLE ((uint32_t)0x00U) /*!< Disable the write protection of the desired sectors */ |
AnnaBridge | 157:e7ca05fa8600 | 150 | #define OB_WRPSTATE_ENABLE ((uint32_t)0x01U) /*!< Enable the write protection of the desired sectors */ |
AnnaBridge | 157:e7ca05fa8600 | 151 | /** |
AnnaBridge | 157:e7ca05fa8600 | 152 | * @} |
AnnaBridge | 157:e7ca05fa8600 | 153 | */ |
AnnaBridge | 157:e7ca05fa8600 | 154 | |
AnnaBridge | 157:e7ca05fa8600 | 155 | /** @defgroup FLASHEx_Option_Bytes_ReadWrite_Mask FLASH Option Bytes Write Mask |
AnnaBridge | 157:e7ca05fa8600 | 156 | * @{ |
AnnaBridge | 157:e7ca05fa8600 | 157 | */ |
AnnaBridge | 157:e7ca05fa8600 | 158 | #define WRP_MASK_LOW ((uint32_t)0x0000FFFFU) |
AnnaBridge | 157:e7ca05fa8600 | 159 | #define WRP_MASK_HIGH ((uint32_t)0xFFFF0000U) |
AnnaBridge | 157:e7ca05fa8600 | 160 | /** |
AnnaBridge | 157:e7ca05fa8600 | 161 | * @} |
AnnaBridge | 157:e7ca05fa8600 | 162 | */ |
AnnaBridge | 157:e7ca05fa8600 | 163 | |
AnnaBridge | 157:e7ca05fa8600 | 164 | #if defined (STM32L011xx) || defined (STM32L021xx) || defined (STM32L031xx) || defined (STM32L041xx) |
AnnaBridge | 157:e7ca05fa8600 | 165 | /** @defgroup FLASHEx_Option_Bytes_Write_Protection FLASH Option Bytes Write Protection |
AnnaBridge | 157:e7ca05fa8600 | 166 | * @{ |
AnnaBridge | 157:e7ca05fa8600 | 167 | */ |
AnnaBridge | 157:e7ca05fa8600 | 168 | #define OB_WRP_Pages0to31 ((uint32_t)0x00000001U) /* Write protection of Sector0 */ |
AnnaBridge | 157:e7ca05fa8600 | 169 | #define OB_WRP_Pages32to63 ((uint32_t)0x00000002U) /* Write protection of Sector1 */ |
AnnaBridge | 157:e7ca05fa8600 | 170 | #define OB_WRP_Pages64to95 ((uint32_t)0x00000004U) /* Write protection of Sector2 */ |
AnnaBridge | 157:e7ca05fa8600 | 171 | #define OB_WRP_Pages96to127 ((uint32_t)0x00000008U) /* Write protection of Sector3 */ |
AnnaBridge | 157:e7ca05fa8600 | 172 | #define OB_WRP_Pages128to159 ((uint32_t)0x00000010U) /* Write protection of Sector4 */ |
AnnaBridge | 157:e7ca05fa8600 | 173 | #define OB_WRP_Pages160to191 ((uint32_t)0x00000020U) /* Write protection of Sector5 */ |
AnnaBridge | 157:e7ca05fa8600 | 174 | #define OB_WRP_Pages192to223 ((uint32_t)0x00000040U) /* Write protection of Sector6 */ |
AnnaBridge | 157:e7ca05fa8600 | 175 | #define OB_WRP_Pages224to255 ((uint32_t)0x00000080U) /* Write protection of Sector7 */ |
AnnaBridge | 157:e7ca05fa8600 | 176 | #define OB_WRP_AllPages ((uint32_t)0x000000FFU) /*!< Write protection of all Sectors */ |
AnnaBridge | 157:e7ca05fa8600 | 177 | /** |
AnnaBridge | 157:e7ca05fa8600 | 178 | * @} |
AnnaBridge | 157:e7ca05fa8600 | 179 | */ |
AnnaBridge | 157:e7ca05fa8600 | 180 | #elif defined (STM32L051xx) || defined (STM32L052xx) || defined (STM32L053xx) || defined (STM32L061xx) || defined (STM32L062xx) || defined (STM32L063xx) |
AnnaBridge | 157:e7ca05fa8600 | 181 | /** @defgroup FLASHEx_Option_Bytes_Write_Protection FLASH Option Bytes Write Protection |
AnnaBridge | 157:e7ca05fa8600 | 182 | * @{ |
AnnaBridge | 157:e7ca05fa8600 | 183 | */ |
AnnaBridge | 157:e7ca05fa8600 | 184 | #define OB_WRP_Pages0to31 ((uint32_t)0x00000001U) /* Write protection of Sector0 */ |
AnnaBridge | 157:e7ca05fa8600 | 185 | #define OB_WRP_Pages32to63 ((uint32_t)0x00000002U) /* Write protection of Sector1 */ |
AnnaBridge | 157:e7ca05fa8600 | 186 | #define OB_WRP_Pages64to95 ((uint32_t)0x00000004U) /* Write protection of Sector2 */ |
AnnaBridge | 157:e7ca05fa8600 | 187 | #define OB_WRP_Pages96to127 ((uint32_t)0x00000008U) /* Write protection of Sector3 */ |
AnnaBridge | 157:e7ca05fa8600 | 188 | #define OB_WRP_Pages128to159 ((uint32_t)0x00000010U) /* Write protection of Sector4 */ |
AnnaBridge | 157:e7ca05fa8600 | 189 | #define OB_WRP_Pages160to191 ((uint32_t)0x00000020U) /* Write protection of Sector5 */ |
AnnaBridge | 157:e7ca05fa8600 | 190 | #define OB_WRP_Pages192to223 ((uint32_t)0x00000040U) /* Write protection of Sector6 */ |
AnnaBridge | 157:e7ca05fa8600 | 191 | #define OB_WRP_Pages224to255 ((uint32_t)0x00000080U) /* Write protection of Sector7 */ |
AnnaBridge | 157:e7ca05fa8600 | 192 | #define OB_WRP_Pages256to287 ((uint32_t)0x00000100U) /* Write protection of Sector8 */ |
AnnaBridge | 157:e7ca05fa8600 | 193 | #define OB_WRP_Pages288to319 ((uint32_t)0x00000200U) /* Write protection of Sector9 */ |
AnnaBridge | 157:e7ca05fa8600 | 194 | #define OB_WRP_Pages320to351 ((uint32_t)0x00000400U) /* Write protection of Sector10 */ |
AnnaBridge | 157:e7ca05fa8600 | 195 | #define OB_WRP_Pages352to383 ((uint32_t)0x00000800U) /* Write protection of Sector11 */ |
AnnaBridge | 157:e7ca05fa8600 | 196 | #define OB_WRP_Pages384to415 ((uint32_t)0x00001000U) /* Write protection of Sector12 */ |
AnnaBridge | 157:e7ca05fa8600 | 197 | #define OB_WRP_Pages416to447 ((uint32_t)0x00002000U) /* Write protection of Sector13 */ |
AnnaBridge | 157:e7ca05fa8600 | 198 | #define OB_WRP_Pages448to479 ((uint32_t)0x00004000U) /* Write protection of Sector14 */ |
AnnaBridge | 157:e7ca05fa8600 | 199 | #define OB_WRP_Pages480to511 ((uint32_t)0x00008000U) /* Write protection of Sector15 */ |
AnnaBridge | 157:e7ca05fa8600 | 200 | #define OB_WRP_AllPages ((uint32_t)0x0000FFFFU) /*!< Write protection of all Sectors */ |
AnnaBridge | 157:e7ca05fa8600 | 201 | /** |
AnnaBridge | 157:e7ca05fa8600 | 202 | * @} |
AnnaBridge | 157:e7ca05fa8600 | 203 | */ |
AnnaBridge | 157:e7ca05fa8600 | 204 | |
AnnaBridge | 157:e7ca05fa8600 | 205 | #elif defined (STM32L071xx) || defined (STM32L072xx) || defined (STM32L073xx) || defined (STM32L081xx) || defined (STM32L082xx) || defined (STM32L083xx) |
AnnaBridge | 157:e7ca05fa8600 | 206 | /** @defgroup FLASHEx_Option_Bytes_Write_Protection FLASH Option Bytes Write ProtectionP |
AnnaBridge | 157:e7ca05fa8600 | 207 | * @{ |
AnnaBridge | 157:e7ca05fa8600 | 208 | */ |
AnnaBridge | 157:e7ca05fa8600 | 209 | #define OB_WRP_Pages0to31 ((uint32_t)0x00000001U) /* Write protection of Sector0 */ |
AnnaBridge | 157:e7ca05fa8600 | 210 | #define OB_WRP_Pages32to63 ((uint32_t)0x00000002U) /* Write protection of Sector1 */ |
AnnaBridge | 157:e7ca05fa8600 | 211 | #define OB_WRP_Pages64to95 ((uint32_t)0x00000004U) /* Write protection of Sector2 */ |
AnnaBridge | 157:e7ca05fa8600 | 212 | #define OB_WRP_Pages96to127 ((uint32_t)0x00000008U) /* Write protection of Sector3 */ |
AnnaBridge | 157:e7ca05fa8600 | 213 | #define OB_WRP_Pages128to159 ((uint32_t)0x00000010U) /* Write protection of Sector4 */ |
AnnaBridge | 157:e7ca05fa8600 | 214 | #define OB_WRP_Pages160to191 ((uint32_t)0x00000020U) /* Write protection of Sector5 */ |
AnnaBridge | 157:e7ca05fa8600 | 215 | #define OB_WRP_Pages192to223 ((uint32_t)0x00000040U) /* Write protection of Sector6 */ |
AnnaBridge | 157:e7ca05fa8600 | 216 | #define OB_WRP_Pages224to255 ((uint32_t)0x00000080U) /* Write protection of Sector7 */ |
AnnaBridge | 157:e7ca05fa8600 | 217 | #define OB_WRP_Pages256to287 ((uint32_t)0x00000100U) /* Write protection of Sector8 */ |
AnnaBridge | 157:e7ca05fa8600 | 218 | #define OB_WRP_Pages288to319 ((uint32_t)0x00000200U) /* Write protection of Sector9 */ |
AnnaBridge | 157:e7ca05fa8600 | 219 | #define OB_WRP_Pages320to351 ((uint32_t)0x00000400U) /* Write protection of Sector10 */ |
AnnaBridge | 157:e7ca05fa8600 | 220 | #define OB_WRP_Pages352to383 ((uint32_t)0x00000800U) /* Write protection of Sector11 */ |
AnnaBridge | 157:e7ca05fa8600 | 221 | #define OB_WRP_Pages384to415 ((uint32_t)0x00001000U) /* Write protection of Sector12 */ |
AnnaBridge | 157:e7ca05fa8600 | 222 | #define OB_WRP_Pages416to447 ((uint32_t)0x00002000U) /* Write protection of Sector13 */ |
AnnaBridge | 157:e7ca05fa8600 | 223 | #define OB_WRP_Pages448to479 ((uint32_t)0x00004000U) /* Write protection of Sector14 */ |
AnnaBridge | 157:e7ca05fa8600 | 224 | #define OB_WRP_Pages480to511 ((uint32_t)0x00008000U) /* Write protection of Sector15 */ |
AnnaBridge | 157:e7ca05fa8600 | 225 | #define OB_WRP_Pages512to543 ((uint32_t)0x00010000U) /* Write protection of Sector16 */ |
AnnaBridge | 157:e7ca05fa8600 | 226 | #define OB_WRP_Pages544to575 ((uint32_t)0x00020000U) /* Write protection of Sector17 */ |
AnnaBridge | 157:e7ca05fa8600 | 227 | #define OB_WRP_Pages576to607 ((uint32_t)0x00040000U) /* Write protection of Sector18 */ |
AnnaBridge | 157:e7ca05fa8600 | 228 | #define OB_WRP_Pages608to639 ((uint32_t)0x00080000U) /* Write protection of Sector19 */ |
AnnaBridge | 157:e7ca05fa8600 | 229 | #define OB_WRP_Pages640to671 ((uint32_t)0x00100000U) /* Write protection of Sector20 */ |
AnnaBridge | 157:e7ca05fa8600 | 230 | #define OB_WRP_Pages672to703 ((uint32_t)0x00200000U) /* Write protection of Sector21 */ |
AnnaBridge | 157:e7ca05fa8600 | 231 | #define OB_WRP_Pages704to735 ((uint32_t)0x00400000U) /* Write protection of Sector22 */ |
AnnaBridge | 157:e7ca05fa8600 | 232 | #define OB_WRP_Pages736to767 ((uint32_t)0x00800000U) /* Write protection of Sector23 */ |
AnnaBridge | 157:e7ca05fa8600 | 233 | #define OB_WRP_Pages768to799 ((uint32_t)0x01000000U) /* Write protection of Sector24 */ |
AnnaBridge | 157:e7ca05fa8600 | 234 | #define OB_WRP_Pages800to831 ((uint32_t)0x02000000U) /* Write protection of Sector25 */ |
AnnaBridge | 157:e7ca05fa8600 | 235 | #define OB_WRP_Pages832to863 ((uint32_t)0x04000000U) /* Write protection of Sector26 */ |
AnnaBridge | 157:e7ca05fa8600 | 236 | #define OB_WRP_Pages864to895 ((uint32_t)0x08000000U) /* Write protection of Sector27 */ |
AnnaBridge | 157:e7ca05fa8600 | 237 | #define OB_WRP_Pages896to927 ((uint32_t)0x10000000U) /* Write protection of Sector28 */ |
AnnaBridge | 157:e7ca05fa8600 | 238 | #define OB_WRP_Pages928to959 ((uint32_t)0x20000000U) /* Write protection of Sector29 */ |
AnnaBridge | 157:e7ca05fa8600 | 239 | #define OB_WRP_Pages960to991 ((uint32_t)0x40000000U) /* Write protection of Sector30 */ |
AnnaBridge | 157:e7ca05fa8600 | 240 | #define OB_WRP_Pages992to1023 ((uint32_t)0x80000000U) /* Write protection of Sector31 */ |
AnnaBridge | 157:e7ca05fa8600 | 241 | #define OB_WRP_AllPages ((uint32_t)0xFFFFFFFFU) /*!<Write protection of all Sectors */ |
AnnaBridge | 157:e7ca05fa8600 | 242 | /** |
AnnaBridge | 157:e7ca05fa8600 | 243 | * @} |
AnnaBridge | 157:e7ca05fa8600 | 244 | */ |
AnnaBridge | 157:e7ca05fa8600 | 245 | |
AnnaBridge | 157:e7ca05fa8600 | 246 | /** @defgroup FLASHEx_Option_Bytes_Write_Protection2 FLASH Option Bytes Write Protection |
AnnaBridge | 157:e7ca05fa8600 | 247 | * @{ |
AnnaBridge | 157:e7ca05fa8600 | 248 | */ |
AnnaBridge | 157:e7ca05fa8600 | 249 | #define OB_WRP2_Pages1024to1055 ((uint32_t)0x00000001U) /* Write protection of Sector32 */ |
AnnaBridge | 157:e7ca05fa8600 | 250 | #define OB_WRP2_Pages1056to1087 ((uint32_t)0x00000002U) /* Write protection of Sector33 */ |
AnnaBridge | 157:e7ca05fa8600 | 251 | #define OB_WRP2_Pages1088to1119 ((uint32_t)0x00000004U) /* Write protection of Sector34 */ |
AnnaBridge | 157:e7ca05fa8600 | 252 | #define OB_WRP2_Pages1120to1151 ((uint32_t)0x00000008U) /* Write protection of Sector35 */ |
AnnaBridge | 157:e7ca05fa8600 | 253 | #define OB_WRP2_Pages1152to1183 ((uint32_t)0x00000010U) /* Write protection of Sector36 */ |
AnnaBridge | 157:e7ca05fa8600 | 254 | #define OB_WRP2_Pages1184to1215 ((uint32_t)0x00000020U) /* Write protection of Sector37 */ |
AnnaBridge | 157:e7ca05fa8600 | 255 | #define OB_WRP2_Pages1216to1247 ((uint32_t)0x00000040U) /* Write protection of Sector38 */ |
AnnaBridge | 157:e7ca05fa8600 | 256 | #define OB_WRP2_Pages1248to1279 ((uint32_t)0x00000080U) /* Write protection of Sector39 */ |
AnnaBridge | 157:e7ca05fa8600 | 257 | #define OB_WRP2_Pages1280to1311 ((uint32_t)0x00000100U) /* Write protection of Sector40 */ |
AnnaBridge | 157:e7ca05fa8600 | 258 | #define OB_WRP2_Pages1312to1343 ((uint32_t)0x00000200U) /* Write protection of Sector41 */ |
AnnaBridge | 157:e7ca05fa8600 | 259 | #define OB_WRP2_Pages1344to1375 ((uint32_t)0x00000400U) /* Write protection of Sector42 */ |
AnnaBridge | 157:e7ca05fa8600 | 260 | #define OB_WRP2_Pages1376to1407 ((uint32_t)0x00000800U) /* Write protection of Sector43 */ |
AnnaBridge | 157:e7ca05fa8600 | 261 | #define OB_WRP2_Pages1408to1439 ((uint32_t)0x00001000U) /* Write protection of Sector44 */ |
AnnaBridge | 157:e7ca05fa8600 | 262 | #define OB_WRP2_Pages1440to1471 ((uint32_t)0x00002000U) /* Write protection of Sector45 */ |
AnnaBridge | 157:e7ca05fa8600 | 263 | #define OB_WRP2_Pages1472to1503 ((uint32_t)0x00004000U) /* Write protection of Sector46 */ |
AnnaBridge | 157:e7ca05fa8600 | 264 | #define OB_WRP2_Pages1504to1535 ((uint32_t)0x00008000U) /* Write protection of Sector47 */ |
AnnaBridge | 157:e7ca05fa8600 | 265 | #define OB_WRP2_AllPages ((uint32_t)0x0000FFFFU) /*!< Write protection of all Sectors WRP2 */ |
AnnaBridge | 157:e7ca05fa8600 | 266 | /** |
AnnaBridge | 157:e7ca05fa8600 | 267 | * @} |
AnnaBridge | 157:e7ca05fa8600 | 268 | */ |
AnnaBridge | 157:e7ca05fa8600 | 269 | #endif /* STM32L071xx || STM32L072xx || (STM32L073xx) || (STM32L081xx) || (STM32L082xx) || (STM32L083xx) */ |
AnnaBridge | 157:e7ca05fa8600 | 270 | |
AnnaBridge | 157:e7ca05fa8600 | 271 | /** @defgroup FLASHEx_Option_Bytes_Read_Protection FLASH Option Bytes Read Protection |
AnnaBridge | 157:e7ca05fa8600 | 272 | * @{ |
AnnaBridge | 157:e7ca05fa8600 | 273 | */ |
AnnaBridge | 157:e7ca05fa8600 | 274 | #define OB_RDP_LEVEL_0 ((uint8_t)0xAAU) |
AnnaBridge | 157:e7ca05fa8600 | 275 | #define OB_RDP_LEVEL_1 ((uint8_t)0xBBU) |
AnnaBridge | 157:e7ca05fa8600 | 276 | #define OB_RDP_LEVEL_2 ((uint8_t)0xCCU) /* Warning: When enabling read protection level 2 |
AnnaBridge | 157:e7ca05fa8600 | 277 | it is no more possible to go back to level 1 or 0 */ |
AnnaBridge | 157:e7ca05fa8600 | 278 | /** |
AnnaBridge | 157:e7ca05fa8600 | 279 | * @} |
AnnaBridge | 157:e7ca05fa8600 | 280 | */ |
AnnaBridge | 157:e7ca05fa8600 | 281 | |
AnnaBridge | 157:e7ca05fa8600 | 282 | /** @defgroup FLASHEx_Option_Bytes_BOR_Level FLASH Option Bytes BOR Level |
AnnaBridge | 157:e7ca05fa8600 | 283 | * @{ |
AnnaBridge | 157:e7ca05fa8600 | 284 | */ |
AnnaBridge | 157:e7ca05fa8600 | 285 | #define OB_BOR_OFF ((uint8_t)0x00U) /*!< BOR is disabled at power down, the reset is asserted when the VDD |
AnnaBridge | 157:e7ca05fa8600 | 286 | power supply reaches the PDR(Power Down Reset) threshold (1.5V) */ |
AnnaBridge | 157:e7ca05fa8600 | 287 | #define OB_BOR_LEVEL1 ((uint8_t)0x08U) /*!< BOR Reset threshold levels for 1.7V - 1.8V VDD power supply */ |
AnnaBridge | 157:e7ca05fa8600 | 288 | #define OB_BOR_LEVEL2 ((uint8_t)0x09U) /*!< BOR Reset threshold levels for 1.9V - 2.0V VDD power supply */ |
AnnaBridge | 157:e7ca05fa8600 | 289 | #define OB_BOR_LEVEL3 ((uint8_t)0x0AU) /*!< BOR Reset threshold levels for 2.3V - 2.4V VDD power supply */ |
AnnaBridge | 157:e7ca05fa8600 | 290 | #define OB_BOR_LEVEL4 ((uint8_t)0x0BU) /*!< BOR Reset threshold levels for 2.55V - 2.65V VDD power supply */ |
AnnaBridge | 157:e7ca05fa8600 | 291 | #define OB_BOR_LEVEL5 ((uint8_t)0x0CU) /*!< BOR Reset threshold levels for 2.8V - 2.9V VDD power supply */ |
AnnaBridge | 157:e7ca05fa8600 | 292 | /** |
AnnaBridge | 157:e7ca05fa8600 | 293 | * @} |
AnnaBridge | 157:e7ca05fa8600 | 294 | */ |
AnnaBridge | 157:e7ca05fa8600 | 295 | |
AnnaBridge | 157:e7ca05fa8600 | 296 | /** @defgroup FLASHEx_Option_Bytes_IWatchdog FLASH Option Bytes IWatchdog |
AnnaBridge | 157:e7ca05fa8600 | 297 | * @{ |
AnnaBridge | 157:e7ca05fa8600 | 298 | */ |
AnnaBridge | 157:e7ca05fa8600 | 299 | #define OB_IWDG_SW ((uint8_t)0x10U) /*!< Software WDG selected */ |
AnnaBridge | 157:e7ca05fa8600 | 300 | #define OB_IWDG_HW ((uint8_t)0x00U) /*!< Hardware WDG selected */ |
AnnaBridge | 157:e7ca05fa8600 | 301 | /** |
AnnaBridge | 157:e7ca05fa8600 | 302 | * @} |
AnnaBridge | 157:e7ca05fa8600 | 303 | */ |
AnnaBridge | 157:e7ca05fa8600 | 304 | |
AnnaBridge | 157:e7ca05fa8600 | 305 | /** @defgroup FLASHEx_Option_Bytes_nRST_STOP FLASHEx Option Bytes nRST_STOP |
AnnaBridge | 157:e7ca05fa8600 | 306 | * @{ |
AnnaBridge | 157:e7ca05fa8600 | 307 | */ |
AnnaBridge | 157:e7ca05fa8600 | 308 | #define OB_STOP_NORST ((uint8_t)0x20U) /*!< No reset generated when entering in STOP */ |
AnnaBridge | 157:e7ca05fa8600 | 309 | #define OB_STOP_RST ((uint8_t)0x00U) /*!< Reset generated when entering in STOP */ |
AnnaBridge | 157:e7ca05fa8600 | 310 | /** |
AnnaBridge | 157:e7ca05fa8600 | 311 | * @} |
AnnaBridge | 157:e7ca05fa8600 | 312 | */ |
AnnaBridge | 157:e7ca05fa8600 | 313 | |
AnnaBridge | 157:e7ca05fa8600 | 314 | /** @defgroup FLASHEx_Option_Bytes_nRST_STDBY FLASH Option Bytes nRST_STDBY |
AnnaBridge | 157:e7ca05fa8600 | 315 | * @{ |
AnnaBridge | 157:e7ca05fa8600 | 316 | */ |
AnnaBridge | 157:e7ca05fa8600 | 317 | #define OB_STDBY_NORST ((uint8_t)0x40U) /*!< No reset generated when entering in STANDBY */ |
AnnaBridge | 157:e7ca05fa8600 | 318 | #define OB_STDBY_RST ((uint8_t)0x00U) /*!< Reset generated when entering in STANDBY */ |
AnnaBridge | 157:e7ca05fa8600 | 319 | /** |
AnnaBridge | 157:e7ca05fa8600 | 320 | * @} |
AnnaBridge | 157:e7ca05fa8600 | 321 | */ |
AnnaBridge | 157:e7ca05fa8600 | 322 | |
AnnaBridge | 157:e7ca05fa8600 | 323 | |
AnnaBridge | 157:e7ca05fa8600 | 324 | /** @defgroup FLASHEx_PCROP_State FLASH PCROP State |
AnnaBridge | 157:e7ca05fa8600 | 325 | * @{ |
AnnaBridge | 157:e7ca05fa8600 | 326 | */ |
AnnaBridge | 157:e7ca05fa8600 | 327 | #define OB_PCROP_STATE_DISABLE ((uint8_t)0x00U) /*!< Disable PCROP */ |
AnnaBridge | 157:e7ca05fa8600 | 328 | #define OB_PCROP_STATE_ENABLE ((uint8_t)0x01U) /*!< Enable PCROP */ |
AnnaBridge | 157:e7ca05fa8600 | 329 | /** |
AnnaBridge | 157:e7ca05fa8600 | 330 | * @} |
AnnaBridge | 157:e7ca05fa8600 | 331 | */ |
AnnaBridge | 157:e7ca05fa8600 | 332 | |
AnnaBridge | 157:e7ca05fa8600 | 333 | |
AnnaBridge | 157:e7ca05fa8600 | 334 | /** @defgroup FLASHEx_OptionAdv_Type FLASH Option Byte |
AnnaBridge | 157:e7ca05fa8600 | 335 | * @{ |
AnnaBridge | 157:e7ca05fa8600 | 336 | */ |
AnnaBridge | 157:e7ca05fa8600 | 337 | #if defined (STM32L071xx) || defined (STM32L072xx) || defined (STM32L073xx) || defined (STM32L081xx) || defined (STM32L082xx) || defined (STM32L083xx) |
AnnaBridge | 157:e7ca05fa8600 | 338 | #define OPTIONBYTE_PCROP ((uint32_t)0x01U) /*!< PCROP option byte configuration*/ |
AnnaBridge | 157:e7ca05fa8600 | 339 | #define OPTIONBYTE_BOOTCONFIG ((uint32_t)0x02U) /*!< BOOTConfig option byte configuration, boot from bank 2*/ |
AnnaBridge | 157:e7ca05fa8600 | 340 | #else /* if STM32L071xx || STM32L072xx || STM32L073xx || STM32L081xx || STM32L082xx || STM32L083xx */ |
AnnaBridge | 157:e7ca05fa8600 | 341 | #define OPTIONBYTE_PCROP ((uint32_t)0x01U) /*!< PCROP option byte configuration*/ |
AnnaBridge | 157:e7ca05fa8600 | 342 | #endif /* if STM32L071xx || STM32L072xx || STM32L073xx || STM32L081xx || STM32L082xx || STM32L083xx */ |
AnnaBridge | 157:e7ca05fa8600 | 343 | /** |
AnnaBridge | 157:e7ca05fa8600 | 344 | * @} |
AnnaBridge | 157:e7ca05fa8600 | 345 | */ |
AnnaBridge | 157:e7ca05fa8600 | 346 | |
AnnaBridge | 157:e7ca05fa8600 | 347 | #if defined (STM32L011xx) || defined (STM32L021xx) || defined (STM32L031xx) || defined (STM32L041xx) |
AnnaBridge | 157:e7ca05fa8600 | 348 | /** @defgroup FLASHEx_Option_Bytes_PC_ReadWrite_Protection FLASHEx Option Bytes PC Read/Write Protection |
AnnaBridge | 157:e7ca05fa8600 | 349 | * @{ |
AnnaBridge | 157:e7ca05fa8600 | 350 | */ |
AnnaBridge | 157:e7ca05fa8600 | 351 | #define OB_PCROP_Pages0to31 ((uint32_t)0x00000001U) /* PC Read/Write protection of Sector0 */ |
AnnaBridge | 157:e7ca05fa8600 | 352 | #define OB_PCROP_Pages32to63 ((uint32_t)0x00000002U) /* PC Read/Write protection of Sector1 */ |
AnnaBridge | 157:e7ca05fa8600 | 353 | #define OB_PCROP_Pages64to95 ((uint32_t)0x00000004U) /* PC Read/Write protection of Sector2 */ |
AnnaBridge | 157:e7ca05fa8600 | 354 | #define OB_PCROP_Pages96to127 ((uint32_t)0x00000008U) /* PC Read/Write protection of Sector3 */ |
AnnaBridge | 157:e7ca05fa8600 | 355 | #define OB_PCROP_Pages128to159 ((uint32_t)0x00000010U) /* PC Read/Write protection of Sector4 */ |
AnnaBridge | 157:e7ca05fa8600 | 356 | #define OB_PCROP_Pages160to191 ((uint32_t)0x00000020U) /* PC Read/Write protection of Sector5 */ |
AnnaBridge | 157:e7ca05fa8600 | 357 | #define OB_PCROP_Pages192to223 ((uint32_t)0x00000040U) /* PC Read/Write protection of Sector6 */ |
AnnaBridge | 157:e7ca05fa8600 | 358 | #define OB_PCROP_Pages224to255 ((uint32_t)0x00000080U) /* PC Read/Write protection of Sector7 */ |
AnnaBridge | 157:e7ca05fa8600 | 359 | #define OB_PCROP_AllPages ((uint32_t)0x000000FFU) /*!< PC Read/Write protection of all Sectors */ |
AnnaBridge | 157:e7ca05fa8600 | 360 | /** |
AnnaBridge | 157:e7ca05fa8600 | 361 | * @} |
AnnaBridge | 157:e7ca05fa8600 | 362 | */ |
AnnaBridge | 157:e7ca05fa8600 | 363 | #elif defined (STM32L051xx) || defined (STM32L052xx) || defined (STM32L053xx) || defined (STM32L061xx) || defined (STM32L062xx) || defined (STM32L063xx) |
AnnaBridge | 157:e7ca05fa8600 | 364 | /** @defgroup FLASHEx_Option_Bytes_PC_ReadWrite_Protection FLASHEx Option Bytes PC Read/Write Protection |
AnnaBridge | 157:e7ca05fa8600 | 365 | * @{ |
AnnaBridge | 157:e7ca05fa8600 | 366 | */ |
AnnaBridge | 157:e7ca05fa8600 | 367 | #define OB_PCROP_Pages0to31 ((uint32_t)0x00000001U) /* PC Read/Write protection of Sector0 */ |
AnnaBridge | 157:e7ca05fa8600 | 368 | #define OB_PCROP_Pages32to63 ((uint32_t)0x00000002U) /* PC Read/Write protection of Sector1 */ |
AnnaBridge | 157:e7ca05fa8600 | 369 | #define OB_PCROP_Pages64to95 ((uint32_t)0x00000004U) /* PC Read/Write protection of Sector2 */ |
AnnaBridge | 157:e7ca05fa8600 | 370 | #define OB_PCROP_Pages96to127 ((uint32_t)0x00000008U) /* PC Read/Write protection of Sector3 */ |
AnnaBridge | 157:e7ca05fa8600 | 371 | #define OB_PCROP_Pages128to159 ((uint32_t)0x00000010U) /* PC Read/Write protection of Sector4 */ |
AnnaBridge | 157:e7ca05fa8600 | 372 | #define OB_PCROP_Pages160to191 ((uint32_t)0x00000020U) /* PC Read/Write protection of Sector5 */ |
AnnaBridge | 157:e7ca05fa8600 | 373 | #define OB_PCROP_Pages192to223 ((uint32_t)0x00000040U) /* PC Read/Write protection of Sector6 */ |
AnnaBridge | 157:e7ca05fa8600 | 374 | #define OB_PCROP_Pages224to255 ((uint32_t)0x00000080U) /* PC Read/Write protection of Sector7 */ |
AnnaBridge | 157:e7ca05fa8600 | 375 | #define OB_PCROP_Pages256to287 ((uint32_t)0x00000100U) /* PC Read/Write protection of Sector8 */ |
AnnaBridge | 157:e7ca05fa8600 | 376 | #define OB_PCROP_Pages288to319 ((uint32_t)0x00000200U) /* PC Read/Write protection of Sector9 */ |
AnnaBridge | 157:e7ca05fa8600 | 377 | #define OB_PCROP_Pages320to351 ((uint32_t)0x00000400U) /* PC Read/Write protection of Sector10 */ |
AnnaBridge | 157:e7ca05fa8600 | 378 | #define OB_PCROP_Pages352to383 ((uint32_t)0x00000800U) /* PC Read/Write protection of Sector11 */ |
AnnaBridge | 157:e7ca05fa8600 | 379 | #define OB_PCROP_Pages384to415 ((uint32_t)0x00001000U) /* PC Read/Write protection of Sector12 */ |
AnnaBridge | 157:e7ca05fa8600 | 380 | #define OB_PCROP_Pages416to447 ((uint32_t)0x00002000U) /* PC Read/Write protection of Sector13 */ |
AnnaBridge | 157:e7ca05fa8600 | 381 | #define OB_PCROP_Pages448to479 ((uint32_t)0x00004000U) /* PC Read/Write protection of Sector14 */ |
AnnaBridge | 157:e7ca05fa8600 | 382 | #define OB_PCROP_Pages480to511 ((uint32_t)0x00008000U) /* PC Read/Write protection of Sector15 */ |
AnnaBridge | 157:e7ca05fa8600 | 383 | #define OB_PCROP_AllPages ((uint32_t)0x0000FFFFU) /*!< PC Read/Write protection of all Sectors */ |
AnnaBridge | 157:e7ca05fa8600 | 384 | /** |
AnnaBridge | 157:e7ca05fa8600 | 385 | * @} |
AnnaBridge | 157:e7ca05fa8600 | 386 | */ |
AnnaBridge | 157:e7ca05fa8600 | 387 | #endif |
AnnaBridge | 157:e7ca05fa8600 | 388 | |
AnnaBridge | 157:e7ca05fa8600 | 389 | #if defined (STM32L071xx) || defined (STM32L072xx) || defined (STM32L073xx) || defined (STM32L081xx) || defined (STM32L082xx) || defined (STM32L083xx) |
AnnaBridge | 157:e7ca05fa8600 | 390 | /** @defgroup FLASHEx_Option_Bytes_PC_ReadWrite_Protection FLASH Option Bytes PC Read/Write Protection |
AnnaBridge | 157:e7ca05fa8600 | 391 | * @{ |
AnnaBridge | 157:e7ca05fa8600 | 392 | */ |
AnnaBridge | 157:e7ca05fa8600 | 393 | #define OB_PCROP_Pages0to31 ((uint32_t)0x00000001U) /* PC Read/Write protection of Sector0 */ |
AnnaBridge | 157:e7ca05fa8600 | 394 | #define OB_PCROP_Pages32to63 ((uint32_t)0x00000002U) /* PC Read/Write protection of Sector1 */ |
AnnaBridge | 157:e7ca05fa8600 | 395 | #define OB_PCROP_Pages64to95 ((uint32_t)0x00000004U) /* PC Read/Write protection of Sector2 */ |
AnnaBridge | 157:e7ca05fa8600 | 396 | #define OB_PCROP_Pages96to127 ((uint32_t)0x00000008U) /* PC Read/Write protection of Sector3 */ |
AnnaBridge | 157:e7ca05fa8600 | 397 | #define OB_PCROP_Pages128to159 ((uint32_t)0x00000010U) /* PC Read/Write protection of Sector4 */ |
AnnaBridge | 157:e7ca05fa8600 | 398 | #define OB_PCROP_Pages160to191 ((uint32_t)0x00000020U) /* PC Read/Write protection of Sector5 */ |
AnnaBridge | 157:e7ca05fa8600 | 399 | #define OB_PCROP_Pages192to223 ((uint32_t)0x00000040U) /* PC Read/Write protection of Sector6 */ |
AnnaBridge | 157:e7ca05fa8600 | 400 | #define OB_PCROP_Pages224to255 ((uint32_t)0x00000080U) /* PC Read/Write protection of Sector7 */ |
AnnaBridge | 157:e7ca05fa8600 | 401 | #define OB_PCROP_Pages256to287 ((uint32_t)0x00000100U) /* PC Read/Write protection of Sector8 */ |
AnnaBridge | 157:e7ca05fa8600 | 402 | #define OB_PCROP_Pages288to319 ((uint32_t)0x00000200U) /* PC Read/Write protection of Sector9 */ |
AnnaBridge | 157:e7ca05fa8600 | 403 | #define OB_PCROP_Pages320to351 ((uint32_t)0x00000400U) /* PC Read/Write protection of Sector10 */ |
AnnaBridge | 157:e7ca05fa8600 | 404 | #define OB_PCROP_Pages352to383 ((uint32_t)0x00000800U) /* PC Read/Write protection of Sector11 */ |
AnnaBridge | 157:e7ca05fa8600 | 405 | #define OB_PCROP_Pages384to415 ((uint32_t)0x00001000U) /* PC Read/Write protection of Sector12 */ |
AnnaBridge | 157:e7ca05fa8600 | 406 | #define OB_PCROP_Pages416to447 ((uint32_t)0x00002000U) /* PC Read/Write protection of Sector13 */ |
AnnaBridge | 157:e7ca05fa8600 | 407 | #define OB_PCROP_Pages448to479 ((uint32_t)0x00004000U) /* PC Read/Write protection of Sector14 */ |
AnnaBridge | 157:e7ca05fa8600 | 408 | #define OB_PCROP_Pages480to511 ((uint32_t)0x00008000U) /* PC Read/Write protection of Sector15 */ |
AnnaBridge | 157:e7ca05fa8600 | 409 | #define OB_PCROP_Pages512to543 ((uint32_t)0x00010000U) /* PC Read/Write protection of Sector16 */ |
AnnaBridge | 157:e7ca05fa8600 | 410 | #define OB_PCROP_Pages544to575 ((uint32_t)0x00020000U) /* PC Read/Write protection of Sector17 */ |
AnnaBridge | 157:e7ca05fa8600 | 411 | #define OB_PCROP_Pages576to607 ((uint32_t)0x00040000U) /* PC Read/Write protection of Sector18 */ |
AnnaBridge | 157:e7ca05fa8600 | 412 | #define OB_PCROP_Pages608to639 ((uint32_t)0x00080000U) /* PC Read/Write protection of Sector19 */ |
AnnaBridge | 157:e7ca05fa8600 | 413 | #define OB_PCROP_Pages640to671 ((uint32_t)0x00100000U) /* PC Read/Write protection of Sector20 */ |
AnnaBridge | 157:e7ca05fa8600 | 414 | #define OB_PCROP_Pages672to703 ((uint32_t)0x00200000U) /* PC Read/Write protection of Sector21 */ |
AnnaBridge | 157:e7ca05fa8600 | 415 | #define OB_PCROP_Pages704to735 ((uint32_t)0x00400000U) /* PC Read/Write protection of Sector22 */ |
AnnaBridge | 157:e7ca05fa8600 | 416 | #define OB_PCROP_Pages736to767 ((uint32_t)0x00800000U) /* PC Read/Write protection of Sector23 */ |
AnnaBridge | 157:e7ca05fa8600 | 417 | #define OB_PCROP_Pages768to799 ((uint32_t)0x01000000U) /* PC Read/Write protection of Sector24 */ |
AnnaBridge | 157:e7ca05fa8600 | 418 | #define OB_PCROP_Pages800to831 ((uint32_t)0x02000000U) /* PC Read/Write protection of Sector25 */ |
AnnaBridge | 157:e7ca05fa8600 | 419 | #define OB_PCROP_Pages832to863 ((uint32_t)0x04000000U) /* PC Read/Write protection of Sector26 */ |
AnnaBridge | 157:e7ca05fa8600 | 420 | #define OB_PCROP_Pages864to895 ((uint32_t)0x08000000U) /* PC Read/Write protection of Sector27 */ |
AnnaBridge | 157:e7ca05fa8600 | 421 | #define OB_PCROP_Pages896to927 ((uint32_t)0x10000000U) /* PC Read/Write protection of Sector28 */ |
AnnaBridge | 157:e7ca05fa8600 | 422 | #define OB_PCROP_Pages928to959 ((uint32_t)0x20000000U) /* PC Read/Write protection of Sector29 */ |
AnnaBridge | 157:e7ca05fa8600 | 423 | #define OB_PCROP_Pages960to991 ((uint32_t)0x40000000U) /* PC Read/Write protection of Sector30 */ |
AnnaBridge | 157:e7ca05fa8600 | 424 | #define OB_PCROP_Pages992to1023 ((uint32_t)0x80000000U) /* PC Read/Write protection of Sector31 */ |
AnnaBridge | 157:e7ca05fa8600 | 425 | #define OB_PCROP_AllPages ((uint32_t)0xFFFFFFFFU) /*!<PC Read/Write protection of all Sectors */ |
AnnaBridge | 157:e7ca05fa8600 | 426 | /** |
AnnaBridge | 157:e7ca05fa8600 | 427 | * @} |
AnnaBridge | 157:e7ca05fa8600 | 428 | */ |
AnnaBridge | 157:e7ca05fa8600 | 429 | |
AnnaBridge | 157:e7ca05fa8600 | 430 | /** @defgroup FLASHEx_Option_Bytes_PC_ReadWrite_Protection2 FLASH Option Bytes PC Read/Write Protection (Sector 2) |
AnnaBridge | 157:e7ca05fa8600 | 431 | * @{ |
AnnaBridge | 157:e7ca05fa8600 | 432 | */ |
AnnaBridge | 157:e7ca05fa8600 | 433 | #define OB_PCROP2_Pages1024to1055 ((uint32_t)0x00000001U) /* PC Read/Write protection of Sector32 */ |
AnnaBridge | 157:e7ca05fa8600 | 434 | #define OB_PCROP2_Pages1056to1087 ((uint32_t)0x00000002U) /* PC Read/Write protection of Sector33 */ |
AnnaBridge | 157:e7ca05fa8600 | 435 | #define OB_PCROP2_Pages1088to1119 ((uint32_t)0x00000004U) /* PC Read/Write protection of Sector34 */ |
AnnaBridge | 157:e7ca05fa8600 | 436 | #define OB_PCROP2_Pages1120to1151 ((uint32_t)0x00000008U) /* PC Read/Write protection of Sector35 */ |
AnnaBridge | 157:e7ca05fa8600 | 437 | #define OB_PCROP2_Pages1152to1183 ((uint32_t)0x00000010U) /* PC Read/Write protection of Sector36 */ |
AnnaBridge | 157:e7ca05fa8600 | 438 | #define OB_PCROP2_Pages1184to1215 ((uint32_t)0x00000020U) /* PC Read/Write protection of Sector37 */ |
AnnaBridge | 157:e7ca05fa8600 | 439 | #define OB_PCROP2_Pages1216to1247 ((uint32_t)0x00000040U) /* PC Read/Write protection of Sector38 */ |
AnnaBridge | 157:e7ca05fa8600 | 440 | #define OB_PCROP2_Pages1248to1279 ((uint32_t)0x00000080U) /* PC Read/Write protection of Sector39 */ |
AnnaBridge | 157:e7ca05fa8600 | 441 | #define OB_PCROP2_Pages1280to1311 ((uint32_t)0x00000100U) /* PC Read/Write protection of Sector40 */ |
AnnaBridge | 157:e7ca05fa8600 | 442 | #define OB_PCROP2_Pages1312to1343 ((uint32_t)0x00000200U) /* PC Read/Write protection of Sector41 */ |
AnnaBridge | 157:e7ca05fa8600 | 443 | #define OB_PCROP2_Pages1344to1375 ((uint32_t)0x00000400U) /* PC Read/Write protection of Sector42 */ |
AnnaBridge | 157:e7ca05fa8600 | 444 | #define OB_PCROP2_Pages1376to1407 ((uint32_t)0x00000800U) /* PC Read/Write protection of Sector43 */ |
AnnaBridge | 157:e7ca05fa8600 | 445 | #define OB_PCROP2_Pages1408to1439 ((uint32_t)0x00001000U) /* PC Read/Write protection of Sector44 */ |
AnnaBridge | 157:e7ca05fa8600 | 446 | #define OB_PCROP2_Pages1440to1471 ((uint32_t)0x00002000U) /* PC Read/Write protection of Sector45 */ |
AnnaBridge | 157:e7ca05fa8600 | 447 | #define OB_PCROP2_Pages1472to1503 ((uint32_t)0x00004000U) /* PC Read/Write protection of Sector46 */ |
AnnaBridge | 157:e7ca05fa8600 | 448 | #define OB_PCROP2_Pages1504to1535 ((uint32_t)0x00008000U) /* PC Read/Write protection of Sector47 */ |
AnnaBridge | 157:e7ca05fa8600 | 449 | #define OB_PCROP2_AllPages ((uint32_t)0x0000FFFFU) /*!< PC Read/Write protection of all Sectors PCROP2 */ |
AnnaBridge | 157:e7ca05fa8600 | 450 | /** |
AnnaBridge | 157:e7ca05fa8600 | 451 | * @} |
AnnaBridge | 157:e7ca05fa8600 | 452 | */ |
AnnaBridge | 157:e7ca05fa8600 | 453 | #endif /* if STM32L071xx || STM32L072xx || STM32L073xx || STM32L081xx || STM32L082xx || STM32L083xx */ |
AnnaBridge | 157:e7ca05fa8600 | 454 | |
AnnaBridge | 157:e7ca05fa8600 | 455 | /** @defgroup FLASHEx_Option_Bytes_BOOTBit1 FLASH Option Bytes BOOT Bit1 Setup |
AnnaBridge | 157:e7ca05fa8600 | 456 | * @{ |
AnnaBridge | 157:e7ca05fa8600 | 457 | */ |
AnnaBridge | 157:e7ca05fa8600 | 458 | #define OB_BOOT_BIT1_RESET (uint8_t)(0x00U) /*!< BOOT Bit 1 Reset */ |
AnnaBridge | 157:e7ca05fa8600 | 459 | #define OB_BOOT_BIT1_SET (uint8_t)(0x01U) /*!< BOOT Bit 1 Set */ |
AnnaBridge | 157:e7ca05fa8600 | 460 | /** |
AnnaBridge | 157:e7ca05fa8600 | 461 | * @} |
AnnaBridge | 157:e7ca05fa8600 | 462 | */ |
AnnaBridge | 157:e7ca05fa8600 | 463 | |
AnnaBridge | 157:e7ca05fa8600 | 464 | #if defined (STM32L071xx) || defined (STM32L072xx) || defined (STM32L073xx) || defined (STM32L081xx) || defined (STM32L082xx) || defined (STM32L083xx) |
AnnaBridge | 157:e7ca05fa8600 | 465 | /** @defgroup FLASHEx_Option_Bytes_BOOT_BANK FLASH Option Bytes BOOT BANK |
AnnaBridge | 157:e7ca05fa8600 | 466 | * @{ |
AnnaBridge | 157:e7ca05fa8600 | 467 | */ |
AnnaBridge | 157:e7ca05fa8600 | 468 | #define OB_BOOT_BANK1 ((uint8_t)0x00U) /*!< At startup, if boot pin 0 and BOOT1 bit are set in boot from user Flash position |
AnnaBridge | 157:e7ca05fa8600 | 469 | and this parameter is selected the device will boot from Bank 1 (Default)*/ |
AnnaBridge | 157:e7ca05fa8600 | 470 | #define OB_BOOT_BANK2 (uint8_t)(0x01U) /*!< At startup, if boot pin 0 and BOOT1 bit are set in boot from user Flash position |
AnnaBridge | 157:e7ca05fa8600 | 471 | and this parameter is selected the device will boot from Bank 2 */ |
AnnaBridge | 157:e7ca05fa8600 | 472 | /** |
AnnaBridge | 157:e7ca05fa8600 | 473 | * @} |
AnnaBridge | 157:e7ca05fa8600 | 474 | */ |
AnnaBridge | 157:e7ca05fa8600 | 475 | #endif /* if STM32L071xx || STM32L072xx || STM32L073xx || STM32L081xx || STM32L082xx || STM32L083xx */ |
AnnaBridge | 157:e7ca05fa8600 | 476 | |
AnnaBridge | 157:e7ca05fa8600 | 477 | /** @defgroup FLASHEx_Type_Program_Data FLASH Type Program Data |
AnnaBridge | 157:e7ca05fa8600 | 478 | * @{ |
AnnaBridge | 157:e7ca05fa8600 | 479 | */ |
AnnaBridge | 157:e7ca05fa8600 | 480 | #define FLASH_TYPEPROGRAMDATA_BYTE ((uint32_t)0x00U) /*!< Program byte (8-bit) at a specified address.*/ |
AnnaBridge | 157:e7ca05fa8600 | 481 | #define FLASH_TYPEPROGRAMDATA_HALFWORD ((uint32_t)0x01U) /*!< Program a half-word (16-bit) at a specified address.*/ |
AnnaBridge | 157:e7ca05fa8600 | 482 | #define FLASH_TYPEPROGRAMDATA_WORD ((uint32_t)0x02U) /*!< Program a word (32-bit) at a specified address.*/ |
AnnaBridge | 157:e7ca05fa8600 | 483 | |
AnnaBridge | 157:e7ca05fa8600 | 484 | /* Aliases for compatibility with the V1.0.0 package */ |
AnnaBridge | 157:e7ca05fa8600 | 485 | #define FLASH_TYPEPROGRAM_BYTE FLASH_TYPEPROGRAMDATA_BYTE |
AnnaBridge | 157:e7ca05fa8600 | 486 | #define FLASH_TYPEPROGRAM_HALFWORD FLASH_TYPEPROGRAMDATA_HALFWORD |
AnnaBridge | 157:e7ca05fa8600 | 487 | /** |
AnnaBridge | 157:e7ca05fa8600 | 488 | * @} |
AnnaBridge | 157:e7ca05fa8600 | 489 | */ |
AnnaBridge | 157:e7ca05fa8600 | 490 | |
AnnaBridge | 157:e7ca05fa8600 | 491 | /** @defgroup FLASHEx_Address FLASHEx Address |
AnnaBridge | 157:e7ca05fa8600 | 492 | * @{ |
AnnaBridge | 157:e7ca05fa8600 | 493 | */ |
AnnaBridge | 157:e7ca05fa8600 | 494 | #define FLASH_NBPAGES_MAX (FLASH_SIZE / FLASH_PAGE_SIZE) |
AnnaBridge | 157:e7ca05fa8600 | 495 | /** |
AnnaBridge | 157:e7ca05fa8600 | 496 | * @} |
AnnaBridge | 157:e7ca05fa8600 | 497 | */ |
AnnaBridge | 157:e7ca05fa8600 | 498 | |
AnnaBridge | 157:e7ca05fa8600 | 499 | /** |
AnnaBridge | 157:e7ca05fa8600 | 500 | * @} |
AnnaBridge | 157:e7ca05fa8600 | 501 | */ |
AnnaBridge | 157:e7ca05fa8600 | 502 | |
AnnaBridge | 157:e7ca05fa8600 | 503 | /** @defgroup FLASHEx_Exported_Macros FLASHEx Exported Macros |
AnnaBridge | 157:e7ca05fa8600 | 504 | * @brief |
AnnaBridge | 157:e7ca05fa8600 | 505 | * @{ |
AnnaBridge | 157:e7ca05fa8600 | 506 | */ |
AnnaBridge | 157:e7ca05fa8600 | 507 | |
AnnaBridge | 157:e7ca05fa8600 | 508 | /** |
AnnaBridge | 157:e7ca05fa8600 | 509 | * @brief Set the FLASH Latency. |
AnnaBridge | 157:e7ca05fa8600 | 510 | * @param __LATENCY__: FLASH Latency |
AnnaBridge | 157:e7ca05fa8600 | 511 | * This parameter can be one of the following values: |
AnnaBridge | 157:e7ca05fa8600 | 512 | * @arg FLASH_LATENCY_0: FLASH Zero Latency cycle |
AnnaBridge | 157:e7ca05fa8600 | 513 | * @arg FLASH_LATENCY_1: FLASH One Latency cycle |
AnnaBridge | 157:e7ca05fa8600 | 514 | * @retval none |
AnnaBridge | 157:e7ca05fa8600 | 515 | */ |
AnnaBridge | 157:e7ca05fa8600 | 516 | #define __HAL_FLASH_SET_LATENCY(__LATENCY__) \ |
AnnaBridge | 157:e7ca05fa8600 | 517 | MODIFY_REG(FLASH->ACR, FLASH_ACR_LATENCY, (uint32_t)(__LATENCY__)) |
AnnaBridge | 157:e7ca05fa8600 | 518 | |
AnnaBridge | 157:e7ca05fa8600 | 519 | /** |
AnnaBridge | 157:e7ca05fa8600 | 520 | * @brief Get the FLASH Latency. |
AnnaBridge | 157:e7ca05fa8600 | 521 | * @retval FLASH Latency |
AnnaBridge | 157:e7ca05fa8600 | 522 | * This parameter can be one of the following values: |
AnnaBridge | 157:e7ca05fa8600 | 523 | * @arg FLASH_LATENCY_0: FLASH Zero Latency cycle |
AnnaBridge | 157:e7ca05fa8600 | 524 | * @arg FLASH_LATENCY_1: FLASH One Latency cycle |
AnnaBridge | 157:e7ca05fa8600 | 525 | */ |
AnnaBridge | 157:e7ca05fa8600 | 526 | #define __HAL_FLASH_GET_LATENCY() (READ_BIT((FLASH->ACR), FLASH_ACR_LATENCY)) |
AnnaBridge | 157:e7ca05fa8600 | 527 | |
AnnaBridge | 157:e7ca05fa8600 | 528 | /** |
AnnaBridge | 157:e7ca05fa8600 | 529 | * @brief Enable/Disable the FLASH prefetch buffer. |
AnnaBridge | 157:e7ca05fa8600 | 530 | * @retval none |
AnnaBridge | 157:e7ca05fa8600 | 531 | */ |
AnnaBridge | 157:e7ca05fa8600 | 532 | #define __HAL_FLASH_PREFETCH_BUFFER_ENABLE() SET_BIT((FLASH->ACR), FLASH_ACR_PRFTEN) |
AnnaBridge | 157:e7ca05fa8600 | 533 | #define __HAL_FLASH_PREFETCH_BUFFER_DISABLE() CLEAR_BIT((FLASH->ACR), FLASH_ACR_PRFTEN) |
AnnaBridge | 157:e7ca05fa8600 | 534 | |
AnnaBridge | 157:e7ca05fa8600 | 535 | /** |
AnnaBridge | 157:e7ca05fa8600 | 536 | * @brief Enable/Disable the FLASH Buffer cache. |
AnnaBridge | 157:e7ca05fa8600 | 537 | * @retval none |
AnnaBridge | 157:e7ca05fa8600 | 538 | */ |
AnnaBridge | 157:e7ca05fa8600 | 539 | #define __HAL_FLASH_BUFFER_CACHE_ENABLE() SET_BIT((FLASH->ACR), FLASH_ACR_DISAB_BUF) |
AnnaBridge | 157:e7ca05fa8600 | 540 | #define __HAL_FLASH_BUFFER_CACHE_DISABLE() CLEAR_BIT((FLASH->ACR), FLASH_ACR_DISAB_BUF) |
AnnaBridge | 157:e7ca05fa8600 | 541 | |
AnnaBridge | 157:e7ca05fa8600 | 542 | /** |
AnnaBridge | 157:e7ca05fa8600 | 543 | * @brief Enable/Disable the FLASH preread buffer. |
AnnaBridge | 157:e7ca05fa8600 | 544 | * @retval none |
AnnaBridge | 157:e7ca05fa8600 | 545 | */ |
AnnaBridge | 157:e7ca05fa8600 | 546 | #define __HAL_FLASH_PREREAD_BUFFER_ENABLE() SET_BIT((FLASH->ACR), FLASH_ACR_PRE_READ) |
AnnaBridge | 157:e7ca05fa8600 | 547 | #define __HAL_FLASH_PREREAD_BUFFER_DISABLE() CLEAR_BIT((FLASH->ACR), FLASH_ACR_PRE_READ) |
AnnaBridge | 157:e7ca05fa8600 | 548 | |
AnnaBridge | 157:e7ca05fa8600 | 549 | /** |
AnnaBridge | 157:e7ca05fa8600 | 550 | * @brief Enable/Disable the FLASH power down during Sleep mode. |
AnnaBridge | 157:e7ca05fa8600 | 551 | * @retval none |
AnnaBridge | 157:e7ca05fa8600 | 552 | */ |
AnnaBridge | 157:e7ca05fa8600 | 553 | #define __HAL_FLASH_SLEEP_POWERDOWN_ENABLE() SET_BIT(FLASH->ACR, FLASH_ACR_SLEEP_PD) |
AnnaBridge | 157:e7ca05fa8600 | 554 | #define __HAL_FLASH_SLEEP_POWERDOWN_DISABLE() CLEAR_BIT(FLASH->ACR, FLASH_ACR_SLEEP_PD) |
AnnaBridge | 157:e7ca05fa8600 | 555 | |
AnnaBridge | 157:e7ca05fa8600 | 556 | /** |
AnnaBridge | 157:e7ca05fa8600 | 557 | * @brief Enable the Flash Run power down mode. |
AnnaBridge | 157:e7ca05fa8600 | 558 | * @note Writing this bit to 0 this bit, automatically the keys are |
AnnaBridge | 157:e7ca05fa8600 | 559 | * loss and a new unlock sequence is necessary to re-write it to 1. |
AnnaBridge | 157:e7ca05fa8600 | 560 | */ |
AnnaBridge | 157:e7ca05fa8600 | 561 | #define __HAL_FLASH_POWER_DOWN_ENABLE() do { FLASH->PDKEYR = FLASH_PDKEY1; \ |
AnnaBridge | 157:e7ca05fa8600 | 562 | FLASH->PDKEYR = FLASH_PDKEY2; \ |
AnnaBridge | 157:e7ca05fa8600 | 563 | SET_BIT((FLASH->ACR), FLASH_ACR_RUN_PD); \ |
AnnaBridge | 157:e7ca05fa8600 | 564 | } while (0) |
AnnaBridge | 157:e7ca05fa8600 | 565 | |
AnnaBridge | 157:e7ca05fa8600 | 566 | /** |
AnnaBridge | 157:e7ca05fa8600 | 567 | * @brief Disable the Flash Run power down mode. |
AnnaBridge | 157:e7ca05fa8600 | 568 | * @note Writing this bit to 0 this bit, automatically the keys are |
AnnaBridge | 157:e7ca05fa8600 | 569 | * loss and a new unlock sequence is necessary to re-write it to 1. |
AnnaBridge | 157:e7ca05fa8600 | 570 | */ |
AnnaBridge | 157:e7ca05fa8600 | 571 | #define __HAL_FLASH_POWER_DOWN_DISABLE() do { FLASH->PDKEYR = FLASH_PDKEY1; \ |
AnnaBridge | 157:e7ca05fa8600 | 572 | FLASH->PDKEYR = FLASH_PDKEY2; \ |
AnnaBridge | 157:e7ca05fa8600 | 573 | CLEAR_BIT((FLASH->ACR), FLASH_ACR_RUN_PD); \ |
AnnaBridge | 157:e7ca05fa8600 | 574 | } while (0) |
AnnaBridge | 157:e7ca05fa8600 | 575 | |
AnnaBridge | 157:e7ca05fa8600 | 576 | /** |
AnnaBridge | 157:e7ca05fa8600 | 577 | * @} |
AnnaBridge | 157:e7ca05fa8600 | 578 | */ |
AnnaBridge | 157:e7ca05fa8600 | 579 | |
AnnaBridge | 157:e7ca05fa8600 | 580 | /** @defgroup FLASHEx_Exported_Functions FLASHEx Exported Functions |
AnnaBridge | 157:e7ca05fa8600 | 581 | * @{ |
AnnaBridge | 157:e7ca05fa8600 | 582 | */ |
AnnaBridge | 157:e7ca05fa8600 | 583 | |
AnnaBridge | 157:e7ca05fa8600 | 584 | /** @defgroup FLASHEx_Exported_Functions_Group1 FLASH Memory Erasing functions |
AnnaBridge | 157:e7ca05fa8600 | 585 | * @{ |
AnnaBridge | 157:e7ca05fa8600 | 586 | */ |
AnnaBridge | 157:e7ca05fa8600 | 587 | HAL_StatusTypeDef HAL_FLASHEx_Erase(FLASH_EraseInitTypeDef *pEraseInit, uint32_t *PageError); |
AnnaBridge | 157:e7ca05fa8600 | 588 | HAL_StatusTypeDef HAL_FLASHEx_Erase_IT(FLASH_EraseInitTypeDef *pEraseInit); |
AnnaBridge | 157:e7ca05fa8600 | 589 | /** |
AnnaBridge | 157:e7ca05fa8600 | 590 | * @} |
AnnaBridge | 157:e7ca05fa8600 | 591 | */ |
AnnaBridge | 157:e7ca05fa8600 | 592 | |
AnnaBridge | 157:e7ca05fa8600 | 593 | /** @defgroup FLASHEx_Exported_Functions_Group2 Option Bytes Programming functions |
AnnaBridge | 157:e7ca05fa8600 | 594 | * @{ |
AnnaBridge | 157:e7ca05fa8600 | 595 | */ |
AnnaBridge | 157:e7ca05fa8600 | 596 | HAL_StatusTypeDef HAL_FLASHEx_OBProgram(FLASH_OBProgramInitTypeDef *pOBInit); |
AnnaBridge | 157:e7ca05fa8600 | 597 | void HAL_FLASHEx_OBGetConfig(FLASH_OBProgramInitTypeDef *pOBInit); |
AnnaBridge | 157:e7ca05fa8600 | 598 | HAL_StatusTypeDef HAL_FLASHEx_AdvOBProgram (FLASH_AdvOBProgramInitTypeDef *pAdvOBInit); |
AnnaBridge | 157:e7ca05fa8600 | 599 | void HAL_FLASHEx_AdvOBGetConfig(FLASH_AdvOBProgramInitTypeDef *pAdvOBInit); |
AnnaBridge | 157:e7ca05fa8600 | 600 | HAL_StatusTypeDef HAL_FLASHEx_OB_SelectPCROP(void); |
AnnaBridge | 157:e7ca05fa8600 | 601 | HAL_StatusTypeDef HAL_FLASHEx_OB_DeSelectPCROP(void); |
AnnaBridge | 157:e7ca05fa8600 | 602 | /** |
AnnaBridge | 157:e7ca05fa8600 | 603 | * @} |
AnnaBridge | 157:e7ca05fa8600 | 604 | */ |
AnnaBridge | 157:e7ca05fa8600 | 605 | |
AnnaBridge | 157:e7ca05fa8600 | 606 | /** @defgroup FLASHEx_Exported_Functions_Group3 DATA EEPROM Programming functions |
AnnaBridge | 157:e7ca05fa8600 | 607 | * @{ |
AnnaBridge | 157:e7ca05fa8600 | 608 | */ |
AnnaBridge | 157:e7ca05fa8600 | 609 | HAL_StatusTypeDef HAL_FLASHEx_DATAEEPROM_Unlock(void); |
AnnaBridge | 157:e7ca05fa8600 | 610 | HAL_StatusTypeDef HAL_FLASHEx_DATAEEPROM_Lock(void); |
AnnaBridge | 157:e7ca05fa8600 | 611 | HAL_StatusTypeDef HAL_FLASHEx_DATAEEPROM_Erase(uint32_t Address); |
AnnaBridge | 157:e7ca05fa8600 | 612 | HAL_StatusTypeDef HAL_FLASHEx_DATAEEPROM_Program(uint32_t TypeProgram, uint32_t Address, uint32_t Data); |
AnnaBridge | 157:e7ca05fa8600 | 613 | void HAL_FLASHEx_DATAEEPROM_EnableFixedTimeProgram(void); |
AnnaBridge | 157:e7ca05fa8600 | 614 | void HAL_FLASHEx_DATAEEPROM_DisableFixedTimeProgram(void); |
AnnaBridge | 157:e7ca05fa8600 | 615 | |
AnnaBridge | 157:e7ca05fa8600 | 616 | /** |
AnnaBridge | 157:e7ca05fa8600 | 617 | * @} |
AnnaBridge | 157:e7ca05fa8600 | 618 | */ |
AnnaBridge | 157:e7ca05fa8600 | 619 | |
AnnaBridge | 157:e7ca05fa8600 | 620 | /** |
AnnaBridge | 157:e7ca05fa8600 | 621 | * @} |
AnnaBridge | 157:e7ca05fa8600 | 622 | */ |
AnnaBridge | 157:e7ca05fa8600 | 623 | |
AnnaBridge | 157:e7ca05fa8600 | 624 | /** @addtogroup FLASHEx_Private |
AnnaBridge | 157:e7ca05fa8600 | 625 | * @{ |
AnnaBridge | 157:e7ca05fa8600 | 626 | */ |
AnnaBridge | 157:e7ca05fa8600 | 627 | #define IS_FLASH_TYPEERASE(__VALUE__) (((__VALUE__) == FLASH_TYPEERASE_PAGES)) |
AnnaBridge | 157:e7ca05fa8600 | 628 | |
AnnaBridge | 157:e7ca05fa8600 | 629 | #define IS_OPTIONBYTE(__VALUE__) (((__VALUE__) <= (OPTIONBYTE_WRP | OPTIONBYTE_RDP | \ |
AnnaBridge | 157:e7ca05fa8600 | 630 | OPTIONBYTE_USER | OPTIONBYTE_BOR | OPTIONBYTE_BOOT_BIT1))) |
AnnaBridge | 157:e7ca05fa8600 | 631 | |
AnnaBridge | 157:e7ca05fa8600 | 632 | #define IS_WRPSTATE(__VALUE__) (((__VALUE__) == OB_WRPSTATE_DISABLE) || \ |
AnnaBridge | 157:e7ca05fa8600 | 633 | ((__VALUE__) == OB_WRPSTATE_ENABLE)) |
AnnaBridge | 157:e7ca05fa8600 | 634 | |
AnnaBridge | 157:e7ca05fa8600 | 635 | #define IS_OB_WRP(PAGE) (((PAGE) != 0x0000000U)) |
AnnaBridge | 157:e7ca05fa8600 | 636 | |
AnnaBridge | 157:e7ca05fa8600 | 637 | #define IS_OB_RDP(__LEVEL__) (((__LEVEL__) == OB_RDP_LEVEL_0)||\ |
AnnaBridge | 157:e7ca05fa8600 | 638 | ((__LEVEL__) == OB_RDP_LEVEL_1)||\ |
AnnaBridge | 157:e7ca05fa8600 | 639 | ((__LEVEL__) == OB_RDP_LEVEL_2)) |
AnnaBridge | 157:e7ca05fa8600 | 640 | |
AnnaBridge | 157:e7ca05fa8600 | 641 | #define IS_OB_BOR_LEVEL(__LEVEL__) ( ((__LEVEL__) == OB_BOR_OFF) || \ |
AnnaBridge | 157:e7ca05fa8600 | 642 | ((__LEVEL__) == OB_BOR_LEVEL1) || \ |
AnnaBridge | 157:e7ca05fa8600 | 643 | ((__LEVEL__) == OB_BOR_LEVEL2) || \ |
AnnaBridge | 157:e7ca05fa8600 | 644 | ((__LEVEL__) == OB_BOR_LEVEL3) || \ |
AnnaBridge | 157:e7ca05fa8600 | 645 | ((__LEVEL__) == OB_BOR_LEVEL4) || \ |
AnnaBridge | 157:e7ca05fa8600 | 646 | ((__LEVEL__) == OB_BOR_LEVEL5)) |
AnnaBridge | 157:e7ca05fa8600 | 647 | |
AnnaBridge | 157:e7ca05fa8600 | 648 | #define IS_OB_IWDG_SOURCE(__SOURCE__) (((__SOURCE__) == OB_IWDG_SW) || ((__SOURCE__) == OB_IWDG_HW)) |
AnnaBridge | 157:e7ca05fa8600 | 649 | |
AnnaBridge | 157:e7ca05fa8600 | 650 | #define IS_OB_STOP_SOURCE(__SOURCE__) (((__SOURCE__) == OB_STOP_NORST) || ((__SOURCE__) == OB_STOP_RST)) |
AnnaBridge | 157:e7ca05fa8600 | 651 | |
AnnaBridge | 157:e7ca05fa8600 | 652 | #define IS_OB_STDBY_SOURCE(__SOURCE__) (((__SOURCE__) == OB_STDBY_NORST) || ((__SOURCE__) == OB_STDBY_RST)) |
AnnaBridge | 157:e7ca05fa8600 | 653 | |
AnnaBridge | 157:e7ca05fa8600 | 654 | #define IS_PCROPSTATE(VALUE)(((VALUE) == OB_PCROP_STATE_DISABLE) || \ |
AnnaBridge | 157:e7ca05fa8600 | 655 | ((VALUE) == OB_PCROP_STATE_ENABLE)) |
AnnaBridge | 157:e7ca05fa8600 | 656 | |
AnnaBridge | 157:e7ca05fa8600 | 657 | #define IS_OB_PCROP(__PAGE__) (((__PAGE__) != 0x0000000U)) |
AnnaBridge | 157:e7ca05fa8600 | 658 | |
AnnaBridge | 157:e7ca05fa8600 | 659 | #define IS_OB_BOOT1(__BOOT_BIT1__) (((__BOOT_BIT1__) == OB_BOOT_BIT1_RESET) || ((__BOOT_BIT1__) == OB_BOOT_BIT1_SET)) |
AnnaBridge | 157:e7ca05fa8600 | 660 | |
AnnaBridge | 157:e7ca05fa8600 | 661 | #define IS_TYPEPROGRAMDATA(__VALUE__) (((__VALUE__) == FLASH_TYPEPROGRAMDATA_BYTE) || \ |
AnnaBridge | 157:e7ca05fa8600 | 662 | ((__VALUE__) == FLASH_TYPEPROGRAMDATA_HALFWORD) || \ |
AnnaBridge | 157:e7ca05fa8600 | 663 | ((__VALUE__) == FLASH_TYPEPROGRAMDATA_WORD)) |
AnnaBridge | 157:e7ca05fa8600 | 664 | |
AnnaBridge | 157:e7ca05fa8600 | 665 | #define IS_NBPAGES(__PAGES__) (((__PAGES__) >= 1) && ((__PAGES__) <= FLASH_NBPAGES_MAX)) |
AnnaBridge | 157:e7ca05fa8600 | 666 | |
AnnaBridge | 157:e7ca05fa8600 | 667 | #if defined (STM32L071xx) || defined (STM32L072xx) || defined (STM32L073xx) || defined (STM32L081xx) || defined (STM32L082xx) || defined (STM32L083xx) |
AnnaBridge | 157:e7ca05fa8600 | 668 | #define IS_OBEX(__VALUE__)(((__VALUE__) <= (OPTIONBYTE_PCROP | OPTIONBYTE_BOOTCONFIG))) |
AnnaBridge | 157:e7ca05fa8600 | 669 | #define IS_OB_BOOT_BANK(__BANK__) (((__BANK__) == OB_BOOT_BANK2) || ((__BANK__) == OB_BOOT_BANK1)) |
AnnaBridge | 157:e7ca05fa8600 | 670 | #define IS_FLASH_DATA_ADDRESS(__ADDRESS__) (((__ADDRESS__) >= DATA_EEPROM_BASE) && ((__ADDRESS__) <= DATA_EEPROM_BANK2_END)) |
AnnaBridge | 157:e7ca05fa8600 | 671 | #define IS_FLASH_DATA_BANK1_ADDRESS(__ADDRESS__) (((__ADDRESS__) >= DATA_EEPROM_BASE) && ((__ADDRESS__) <= DATA_EEPROM_BANK1_END)) |
AnnaBridge | 157:e7ca05fa8600 | 672 | #define IS_FLASH_DATA_BANK2_ADDRESS(__ADDRESS__) (((__ADDRESS__) >= DATA_EEPROM_BANK2_BASE) && ((__ADDRESS__) <= DATA_EEPROM_BANK2_END)) |
AnnaBridge | 157:e7ca05fa8600 | 673 | #define IS_FLASH_PROGRAM_ADDRESS(__ADDRESS__) (((__ADDRESS__) >= FLASH_BASE) && ((__ADDRESS__) < (FLASH_BASE + FLASH_SIZE))) |
AnnaBridge | 157:e7ca05fa8600 | 674 | #define IS_FLASH_PROGRAM_BANK1_ADDRESS(__ADDRESS__) (((__ADDRESS__) >= FLASH_BASE) && ((__ADDRESS__) < (FLASH_BASE + (FLASH_SIZE >> 1)))) |
AnnaBridge | 157:e7ca05fa8600 | 675 | #define IS_FLASH_PROGRAM_BANK2_ADDRESS(__ADDRESS__) (((__ADDRESS__) >= FLASH_BANK2_BASE) && ((__ADDRESS__) < (FLASH_BASE + FLASH_SIZE))) |
AnnaBridge | 157:e7ca05fa8600 | 676 | #else |
AnnaBridge | 157:e7ca05fa8600 | 677 | #define IS_OBEX(VALUE)((VALUE) == OPTIONBYTE_PCROP) |
AnnaBridge | 157:e7ca05fa8600 | 678 | #define IS_FLASH_DATA_ADDRESS(__ADDRESS__) (((__ADDRESS__) >= DATA_EEPROM_BASE) && ((__ADDRESS__) <= DATA_EEPROM_END)) |
AnnaBridge | 157:e7ca05fa8600 | 679 | #define IS_FLASH_PROGRAM_ADDRESS(__ADDRESS__) (((__ADDRESS__) >= FLASH_BASE) && ((__ADDRESS__) < (FLASH_BASE + FLASH_SIZE))) |
AnnaBridge | 157:e7ca05fa8600 | 680 | #endif |
AnnaBridge | 157:e7ca05fa8600 | 681 | /** |
AnnaBridge | 157:e7ca05fa8600 | 682 | * @} |
AnnaBridge | 157:e7ca05fa8600 | 683 | */ |
AnnaBridge | 157:e7ca05fa8600 | 684 | |
AnnaBridge | 157:e7ca05fa8600 | 685 | /* Define the private group ***********************************/ |
AnnaBridge | 157:e7ca05fa8600 | 686 | /**************************************************************/ |
AnnaBridge | 157:e7ca05fa8600 | 687 | /** @defgroup FLASHEx_Private FLASHEx Private |
AnnaBridge | 157:e7ca05fa8600 | 688 | * @{ |
AnnaBridge | 157:e7ca05fa8600 | 689 | */ |
AnnaBridge | 157:e7ca05fa8600 | 690 | /** |
AnnaBridge | 157:e7ca05fa8600 | 691 | * @} |
AnnaBridge | 157:e7ca05fa8600 | 692 | */ |
AnnaBridge | 157:e7ca05fa8600 | 693 | /**************************************************************/ |
AnnaBridge | 157:e7ca05fa8600 | 694 | |
AnnaBridge | 157:e7ca05fa8600 | 695 | /** |
AnnaBridge | 157:e7ca05fa8600 | 696 | * @} |
AnnaBridge | 157:e7ca05fa8600 | 697 | */ |
AnnaBridge | 157:e7ca05fa8600 | 698 | |
AnnaBridge | 157:e7ca05fa8600 | 699 | /** |
AnnaBridge | 157:e7ca05fa8600 | 700 | * @} |
AnnaBridge | 157:e7ca05fa8600 | 701 | */ |
AnnaBridge | 157:e7ca05fa8600 | 702 | |
AnnaBridge | 157:e7ca05fa8600 | 703 | #ifdef __cplusplus |
AnnaBridge | 157:e7ca05fa8600 | 704 | } |
AnnaBridge | 157:e7ca05fa8600 | 705 | #endif |
AnnaBridge | 157:e7ca05fa8600 | 706 | |
AnnaBridge | 157:e7ca05fa8600 | 707 | #endif /* __STM32L0xx_HAL_FLASH_EX_H */ |
AnnaBridge | 157:e7ca05fa8600 | 708 | |
AnnaBridge | 157:e7ca05fa8600 | 709 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
AnnaBridge | 157:e7ca05fa8600 | 710 |