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TARGET_VBLUNO51/TOOLCHAIN_IAR/nrf_pwm.h@172:65be27845400, 2019-02-20 (annotated)

Committer:
AnnaBridge
Date:
Wed Feb 20 20:53:29 2019 +0000
Revision:
172:65be27845400
Parent:
171:3a7713b1edbc 
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 143:86740a56073b 1 /* Copyright (c) 2015 Nordic Semiconductor. All Rights Reserved.
AnnaBridge 143:86740a56073b 2 *
AnnaBridge 143:86740a56073b 3 * The information contained herein is property of Nordic Semiconductor ASA.
AnnaBridge 143:86740a56073b 4 * Terms and conditions of usage are described in detail in NORDIC
AnnaBridge 143:86740a56073b 5 * SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT.
AnnaBridge 143:86740a56073b 6 *
AnnaBridge 143:86740a56073b 7 * Licensees are granted free, non-transferable use of the information. NO
AnnaBridge 143:86740a56073b 8 * WARRANTY of ANY KIND is provided. This heading must NOT be removed from
AnnaBridge 143:86740a56073b 9 * the file.
AnnaBridge 143:86740a56073b 10 *
AnnaBridge 143:86740a56073b 11 */
AnnaBridge 143:86740a56073b 12
AnnaBridge 143:86740a56073b 13 /**
AnnaBridge 143:86740a56073b 14 * @defgroup nrf_pwm_hal PWM HAL
AnnaBridge 143:86740a56073b 15 * @{
AnnaBridge 143:86740a56073b 16 * @ingroup nrf_pwm
AnnaBridge 143:86740a56073b 17 *
AnnaBridge 143:86740a56073b 18 * @brief @tagAPI52 Hardware access layer for managing the Pulse Width Modulation (PWM)
AnnaBridge 143:86740a56073b 19 * peripheral.
AnnaBridge 143:86740a56073b 20 */
AnnaBridge 143:86740a56073b 21
AnnaBridge 143:86740a56073b 22 #ifndef NRF_PWM_H__
AnnaBridge 143:86740a56073b 23 #define NRF_PWM_H__
AnnaBridge 143:86740a56073b 24
AnnaBridge 143:86740a56073b 25 #ifdef NRF52
AnnaBridge 143:86740a56073b 26
AnnaBridge 143:86740a56073b 27 #include <stddef.h>
AnnaBridge 143:86740a56073b 28 #include <stdbool.h>
AnnaBridge 143:86740a56073b 29 #include <stdint.h>
AnnaBridge 143:86740a56073b 30
AnnaBridge 143:86740a56073b 31 #include "nrf.h"
AnnaBridge 143:86740a56073b 32 #include "nrf_assert.h"
AnnaBridge 143:86740a56073b 33
AnnaBridge 143:86740a56073b 34
AnnaBridge 143:86740a56073b 35 /**
AnnaBridge 143:86740a56073b 36 * @brief This value can be provided as a parameter for the @ref nrf_pwm_pins_set
AnnaBridge 143:86740a56073b 37 * function call to specify that a given output channel shall not be
AnnaBridge 143:86740a56073b 38 * connected to a physical pin.
AnnaBridge 143:86740a56073b 39 */
AnnaBridge 143:86740a56073b 40 #define NRF_PWM_PIN_NOT_CONNECTED 0xFFFFFFFF
AnnaBridge 143:86740a56073b 41
AnnaBridge 143:86740a56073b 42 /**
AnnaBridge 143:86740a56073b 43 * @brief Number of channels in each PWM instance.
AnnaBridge 143:86740a56073b 44 */
AnnaBridge 143:86740a56073b 45 #define NRF_PWM_CHANNEL_COUNT 4
AnnaBridge 143:86740a56073b 46
AnnaBridge 143:86740a56073b 47
AnnaBridge 143:86740a56073b 48 /**
AnnaBridge 143:86740a56073b 49 * @brief PWM tasks.
AnnaBridge 143:86740a56073b 50 */
AnnaBridge 143:86740a56073b 51 typedef enum
AnnaBridge 143:86740a56073b 52 {
AnnaBridge 143:86740a56073b 53 /*lint -save -e30*/
AnnaBridge 143:86740a56073b 54 NRF_PWM_TASK_STOP = offsetof(NRF_PWM_Type, TASKS_STOP), ///< Stops PWM pulse generation on all channels at the end of the current PWM period, and stops the sequence playback.
AnnaBridge 143:86740a56073b 55 NRF_PWM_TASK_SEQSTART0 = offsetof(NRF_PWM_Type, TASKS_SEQSTART[0]), ///< Starts playback of sequence 0.
AnnaBridge 143:86740a56073b 56 NRF_PWM_TASK_SEQSTART1 = offsetof(NRF_PWM_Type, TASKS_SEQSTART[1]), ///< Starts playback of sequence 1.
AnnaBridge 143:86740a56073b 57 NRF_PWM_TASK_NEXTSTEP = offsetof(NRF_PWM_Type, TASKS_NEXTSTEP) ///< Steps by one value in the current sequence if the decoder is set to @ref NRF_PWM_STEP_TRIGGERED mode.
AnnaBridge 143:86740a56073b 58 /*lint -restore*/
AnnaBridge 143:86740a56073b 59 } nrf_pwm_task_t;
AnnaBridge 143:86740a56073b 60
AnnaBridge 143:86740a56073b 61 /**
AnnaBridge 143:86740a56073b 62 * @brief PWM events.
AnnaBridge 143:86740a56073b 63 */
AnnaBridge 143:86740a56073b 64 typedef enum
AnnaBridge 143:86740a56073b 65 {
AnnaBridge 143:86740a56073b 66 /*lint -save -e30*/
AnnaBridge 143:86740a56073b 67 NRF_PWM_EVENT_STOPPED = offsetof(NRF_PWM_Type, EVENTS_STOPPED), ///< Response to STOP task, emitted when PWM pulses are no longer generated.
AnnaBridge 143:86740a56073b 68 NRF_PWM_EVENT_SEQSTARTED0 = offsetof(NRF_PWM_Type, EVENTS_SEQSTARTED[0]), ///< First PWM period started on sequence 0.
AnnaBridge 143:86740a56073b 69 NRF_PWM_EVENT_SEQSTARTED1 = offsetof(NRF_PWM_Type, EVENTS_SEQSTARTED[1]), ///< First PWM period started on sequence 1.
AnnaBridge 143:86740a56073b 70 NRF_PWM_EVENT_SEQEND0 = offsetof(NRF_PWM_Type, EVENTS_SEQEND[0]), ///< Emitted at the end of every sequence 0 when its last value has been read from RAM.
AnnaBridge 143:86740a56073b 71 NRF_PWM_EVENT_SEQEND1 = offsetof(NRF_PWM_Type, EVENTS_SEQEND[1]), ///< Emitted at the end of every sequence 1 when its last value has been read from RAM.
AnnaBridge 143:86740a56073b 72 NRF_PWM_EVENT_PWMPERIODEND = offsetof(NRF_PWM_Type, EVENTS_PWMPERIODEND), ///< Emitted at the end of each PWM period.
AnnaBridge 143:86740a56073b 73 NRF_PWM_EVENT_LOOPSDONE = offsetof(NRF_PWM_Type, EVENTS_LOOPSDONE) ///< Concatenated sequences have been played the requested number of times.
AnnaBridge 143:86740a56073b 74 /*lint -restore*/
AnnaBridge 143:86740a56073b 75 } nrf_pwm_event_t;
AnnaBridge 143:86740a56073b 76
AnnaBridge 143:86740a56073b 77 /**
AnnaBridge 143:86740a56073b 78 * @brief PWM interrupts.
AnnaBridge 143:86740a56073b 79 */
AnnaBridge 143:86740a56073b 80 typedef enum
AnnaBridge 143:86740a56073b 81 {
AnnaBridge 143:86740a56073b 82 NRF_PWM_INT_STOPPED_MASK = PWM_INTENSET_STOPPED_Msk, ///< Interrupt on STOPPED event.
AnnaBridge 143:86740a56073b 83 NRF_PWM_INT_SEQSTARTED0_MASK = PWM_INTENSET_SEQSTARTED0_Msk, ///< Interrupt on SEQSTARTED[0] event.
AnnaBridge 143:86740a56073b 84 NRF_PWM_INT_SEQSTARTED1_MASK = PWM_INTENSET_SEQSTARTED1_Msk, ///< Interrupt on SEQSTARTED[1] event.
AnnaBridge 143:86740a56073b 85 NRF_PWM_INT_SEQEND0_MASK = PWM_INTENSET_SEQEND0_Msk, ///< Interrupt on SEQEND[0] event.
AnnaBridge 143:86740a56073b 86 NRF_PWM_INT_SEQEND1_MASK = PWM_INTENSET_SEQEND1_Msk, ///< Interrupt on SEQEND[1] event.
AnnaBridge 143:86740a56073b 87 NRF_PWM_INT_PWMPERIODEND_MASK = PWM_INTENSET_PWMPERIODEND_Msk, ///< Interrupt on PWMPERIODEND event.
AnnaBridge 143:86740a56073b 88 NRF_PWM_INT_LOOPSDONE_MASK = PWM_INTENSET_LOOPSDONE_Msk ///< Interrupt on LOOPSDONE event.
AnnaBridge 143:86740a56073b 89 } nrf_pwm_int_mask_t;
AnnaBridge 143:86740a56073b 90
AnnaBridge 143:86740a56073b 91 /**
AnnaBridge 143:86740a56073b 92 * @brief PWM shortcuts.
AnnaBridge 143:86740a56073b 93 */
AnnaBridge 143:86740a56073b 94 typedef enum
AnnaBridge 143:86740a56073b 95 {
AnnaBridge 143:86740a56073b 96 NRF_PWM_SHORT_SEQEND0_STOP_MASK = PWM_SHORTS_SEQEND0_STOP_Msk, ///< Shortcut between SEQEND[0] event and STOP task.
AnnaBridge 143:86740a56073b 97 NRF_PWM_SHORT_SEQEND1_STOP_MASK = PWM_SHORTS_SEQEND1_STOP_Msk, ///< Shortcut between SEQEND[1] event and STOP task.
AnnaBridge 143:86740a56073b 98 NRF_PWM_SHORT_LOOPSDONE_SEQSTART0_MASK = PWM_SHORTS_LOOPSDONE_SEQSTART0_Msk, ///< Shortcut between LOOPSDONE event and SEQSTART[0] task.
AnnaBridge 143:86740a56073b 99 NRF_PWM_SHORT_LOOPSDONE_SEQSTART1_MASK = PWM_SHORTS_LOOPSDONE_SEQSTART1_Msk, ///< Shortcut between LOOPSDONE event and SEQSTART[1] task.
AnnaBridge 143:86740a56073b 100 NRF_PWM_SHORT_LOOPSDONE_STOP_MASK = PWM_SHORTS_LOOPSDONE_STOP_Msk ///< Shortcut between LOOPSDONE event and STOP task.
AnnaBridge 143:86740a56073b 101 } nrf_pwm_short_mask_t;
AnnaBridge 143:86740a56073b 102
AnnaBridge 143:86740a56073b 103 /**
AnnaBridge 143:86740a56073b 104 * @brief PWM modes of operation.
AnnaBridge 143:86740a56073b 105 */
AnnaBridge 143:86740a56073b 106 typedef enum
AnnaBridge 143:86740a56073b 107 {
AnnaBridge 143:86740a56073b 108 NRF_PWM_MODE_UP = PWM_MODE_UPDOWN_Up, ///< Up counter (edge-aligned PWM duty cycle).
AnnaBridge 143:86740a56073b 109 NRF_PWM_MODE_UP_AND_DOWN = PWM_MODE_UPDOWN_UpAndDown, ///< Up and down counter (center-aligned PWM duty cycle).
AnnaBridge 143:86740a56073b 110 } nrf_pwm_mode_t;
AnnaBridge 143:86740a56073b 111
AnnaBridge 143:86740a56073b 112 /**
AnnaBridge 143:86740a56073b 113 * @brief PWM base clock frequencies.
AnnaBridge 143:86740a56073b 114 */
AnnaBridge 143:86740a56073b 115 typedef enum
AnnaBridge 143:86740a56073b 116 {
AnnaBridge 143:86740a56073b 117 NRF_PWM_CLK_16MHz = PWM_PRESCALER_PRESCALER_DIV_1, ///< 16 MHz / 1 = 16 MHz.
AnnaBridge 143:86740a56073b 118 NRF_PWM_CLK_8MHz = PWM_PRESCALER_PRESCALER_DIV_2, ///< 16 MHz / 2 = 8 MHz.
AnnaBridge 143:86740a56073b 119 NRF_PWM_CLK_4MHz = PWM_PRESCALER_PRESCALER_DIV_4, ///< 16 MHz / 4 = 4 MHz.
AnnaBridge 143:86740a56073b 120 NRF_PWM_CLK_2MHz = PWM_PRESCALER_PRESCALER_DIV_8, ///< 16 MHz / 8 = 2 MHz.
AnnaBridge 143:86740a56073b 121 NRF_PWM_CLK_1MHz = PWM_PRESCALER_PRESCALER_DIV_16, ///< 16 MHz / 16 = 1 MHz.
AnnaBridge 143:86740a56073b 122 NRF_PWM_CLK_500kHz = PWM_PRESCALER_PRESCALER_DIV_32, ///< 16 MHz / 32 = 500 kHz.
AnnaBridge 143:86740a56073b 123 NRF_PWM_CLK_250kHz = PWM_PRESCALER_PRESCALER_DIV_64, ///< 16 MHz / 64 = 250 kHz.
AnnaBridge 143:86740a56073b 124 NRF_PWM_CLK_125kHz = PWM_PRESCALER_PRESCALER_DIV_128 ///< 16 MHz / 128 = 125 kHz.
AnnaBridge 143:86740a56073b 125 } nrf_pwm_clk_t;
AnnaBridge 143:86740a56073b 126
AnnaBridge 143:86740a56073b 127 /**
AnnaBridge 143:86740a56073b 128 * @brief PWM decoder load modes.
AnnaBridge 143:86740a56073b 129 *
AnnaBridge 143:86740a56073b 130 * The selected mode determines how the sequence data is read from RAM and
AnnaBridge 143:86740a56073b 131 * spread to the compare registers.
AnnaBridge 143:86740a56073b 132 */
AnnaBridge 143:86740a56073b 133 typedef enum
AnnaBridge 143:86740a56073b 134 {
AnnaBridge 143:86740a56073b 135 NRF_PWM_LOAD_COMMON = PWM_DECODER_LOAD_Common, ///< 1st half word (16-bit) used in all PWM channels (0-3).
AnnaBridge 143:86740a56073b 136 NRF_PWM_LOAD_GROUPED = PWM_DECODER_LOAD_Grouped, ///< 1st half word (16-bit) used in channels 0 and 1; 2nd word in channels 2 and 3.
AnnaBridge 143:86740a56073b 137 NRF_PWM_LOAD_INDIVIDUAL = PWM_DECODER_LOAD_Individual, ///< 1st half word (16-bit) used in channel 0; 2nd in channel 1; 3rd in channel 2; 4th in channel 3.
AnnaBridge 143:86740a56073b 138 NRF_PWM_LOAD_WAVE_FORM = PWM_DECODER_LOAD_WaveForm ///< 1st half word (16-bit) used in channel 0; 2nd in channel 1; ... ; 4th as the top value for the pulse generator counter.
AnnaBridge 143:86740a56073b 139 } nrf_pwm_dec_load_t;
AnnaBridge 143:86740a56073b 140
AnnaBridge 143:86740a56073b 141 /**
AnnaBridge 143:86740a56073b 142 * @brief PWM decoder next step modes.
AnnaBridge 143:86740a56073b 143 *
AnnaBridge 143:86740a56073b 144 * The selected mode determines when the next value from the active sequence
AnnaBridge 143:86740a56073b 145 * is loaded.
AnnaBridge 143:86740a56073b 146 */
AnnaBridge 143:86740a56073b 147 typedef enum
AnnaBridge 143:86740a56073b 148 {
AnnaBridge 143:86740a56073b 149 NRF_PWM_STEP_AUTO = PWM_DECODER_MODE_RefreshCount, ///< Automatically after the current value is played and repeated the requested number of times.
AnnaBridge 143:86740a56073b 150 NRF_PWM_STEP_TRIGGERED = PWM_DECODER_MODE_NextStep ///< When the @ref NRF_PWM_TASK_NEXTSTEP task is triggered.
AnnaBridge 143:86740a56073b 151 } nrf_pwm_dec_step_t;
AnnaBridge 143:86740a56073b 152
AnnaBridge 143:86740a56073b 153
AnnaBridge 143:86740a56073b 154 /**
AnnaBridge 143:86740a56073b 155 * @brief Type used for defining duty cycle values for a sequence
AnnaBridge 143:86740a56073b 156 * loaded in @ref NRF_PWM_LOAD_COMMON mode.
AnnaBridge 143:86740a56073b 157 */
AnnaBridge 143:86740a56073b 158 typedef uint16_t nrf_pwm_values_common_t;
AnnaBridge 143:86740a56073b 159
AnnaBridge 143:86740a56073b 160 /**
AnnaBridge 143:86740a56073b 161 * @brief Structure for defining duty cycle values for a sequence
AnnaBridge 143:86740a56073b 162 * loaded in @ref NRF_PWM_LOAD_GROUPED mode.
AnnaBridge 143:86740a56073b 163 */
AnnaBridge 143:86740a56073b 164 typedef struct {
AnnaBridge 143:86740a56073b 165 uint16_t group_0; ///< Duty cycle value for group 0 (channels 0 and 1).
AnnaBridge 143:86740a56073b 166 uint16_t group_1; ///< Duty cycle value for group 1 (channels 2 and 3).
AnnaBridge 143:86740a56073b 167 } nrf_pwm_values_grouped_t;
AnnaBridge 143:86740a56073b 168
AnnaBridge 143:86740a56073b 169 /**
AnnaBridge 143:86740a56073b 170 * @brief Structure for defining duty cycle values for a sequence
AnnaBridge 143:86740a56073b 171 * loaded in @ref NRF_PWM_LOAD_INDIVIDUAL mode.
AnnaBridge 143:86740a56073b 172 */
AnnaBridge 143:86740a56073b 173 typedef struct
AnnaBridge 143:86740a56073b 174 {
AnnaBridge 143:86740a56073b 175 uint16_t channel_0; ///< Duty cycle value for channel 0.
AnnaBridge 143:86740a56073b 176 uint16_t channel_1; ///< Duty cycle value for channel 1.
AnnaBridge 143:86740a56073b 177 uint16_t channel_2; ///< Duty cycle value for channel 2.
AnnaBridge 143:86740a56073b 178 uint16_t channel_3; ///< Duty cycle value for channel 3.
AnnaBridge 143:86740a56073b 179 } nrf_pwm_values_individual_t;
AnnaBridge 143:86740a56073b 180
AnnaBridge 143:86740a56073b 181 /**
AnnaBridge 143:86740a56073b 182 * @brief Structure for defining duty cycle values for a sequence
AnnaBridge 143:86740a56073b 183 * loaded in @ref NRF_PWM_LOAD_WAVE_FORM mode.
AnnaBridge 143:86740a56073b 184 */
AnnaBridge 143:86740a56073b 185 typedef struct {
AnnaBridge 143:86740a56073b 186 uint16_t channel_0; ///< Duty cycle value for channel 0.
AnnaBridge 143:86740a56073b 187 uint16_t channel_1; ///< Duty cycle value for channel 1.
AnnaBridge 143:86740a56073b 188 uint16_t channel_2; ///< Duty cycle value for channel 2.
AnnaBridge 143:86740a56073b 189 uint16_t counter_top; ///< Top value for the pulse generator counter.
AnnaBridge 143:86740a56073b 190 } nrf_pwm_values_wave_form_t;
AnnaBridge 143:86740a56073b 191
AnnaBridge 143:86740a56073b 192 /**
AnnaBridge 143:86740a56073b 193 * @brief Union grouping pointers to arrays of duty cycle values applicable to
AnnaBridge 143:86740a56073b 194 * various loading modes.
AnnaBridge 143:86740a56073b 195 */
AnnaBridge 143:86740a56073b 196 typedef union {
AnnaBridge 143:86740a56073b 197 nrf_pwm_values_common_t const * p_common; ///< Pointer to be used in @ref NRF_PWM_LOAD_COMMON mode.
AnnaBridge 143:86740a56073b 198 nrf_pwm_values_grouped_t const * p_grouped; ///< Pointer to be used in @ref NRF_PWM_LOAD_GROUPED mode.
AnnaBridge 143:86740a56073b 199 nrf_pwm_values_individual_t const * p_individual; ///< Pointer to be used in @ref NRF_PWM_LOAD_INDIVIDUAL mode.
AnnaBridge 143:86740a56073b 200 nrf_pwm_values_wave_form_t const * p_wave_form; ///< Pointer to be used in @ref NRF_PWM_LOAD_WAVE_FORM mode.
AnnaBridge 143:86740a56073b 201 uint16_t const * p_raw; ///< Pointer providing raw access to the values.
AnnaBridge 143:86740a56073b 202 } nrf_pwm_values_t;
AnnaBridge 143:86740a56073b 203
AnnaBridge 143:86740a56073b 204 /**
AnnaBridge 143:86740a56073b 205 * @brief Structure for defining a sequence of PWM duty cycles.
AnnaBridge 143:86740a56073b 206 *
AnnaBridge 143:86740a56073b 207 * When the sequence is set (by a call to @ref nrf_pwm_sequence_set), the
AnnaBridge 143:86740a56073b 208 * provided duty cycle values are not copied. The @p values pointer is stored
AnnaBridge 143:86740a56073b 209 * in the peripheral's internal register, and the values are loaded from RAM
AnnaBridge 143:86740a56073b 210 * during the sequence playback. Therefore, you must ensure that the values
AnnaBridge 143:86740a56073b 211 * do not change before and during the sequence playback (for example,
AnnaBridge 143:86740a56073b 212 * the values cannot be placed in a local variable that is allocated on stack).
AnnaBridge 143:86740a56073b 213 * If the sequence is played in a loop and the values should be updated
AnnaBridge 143:86740a56073b 214 * before the next iteration, it is safe to modify them when the corresponding
AnnaBridge 143:86740a56073b 215 * event signaling the end of sequence occurs (@ref NRF_PWM_EVENT_SEQEND0
AnnaBridge 143:86740a56073b 216 * or @ref NRF_PWM_EVENT_SEQEND1, respectively).
AnnaBridge 143:86740a56073b 217 *
AnnaBridge 143:86740a56073b 218 * @note The @p repeats and @p end_delay values (which are written to the
AnnaBridge 143:86740a56073b 219 * SEQ[n].REFRESH and SEQ[n].ENDDELAY registers in the peripheral,
AnnaBridge 143:86740a56073b 220 * respectively) are ignored at the end of a complex sequence
AnnaBridge 143:86740a56073b 221 * playback, indicated by the LOOPSDONE event.
AnnaBridge 143:86740a56073b 222 * See the @linkProductSpecification52 for more information.
AnnaBridge 143:86740a56073b 223 */
AnnaBridge 143:86740a56073b 224 typedef struct
AnnaBridge 143:86740a56073b 225 {
AnnaBridge 143:86740a56073b 226 nrf_pwm_values_t values; ///< Pointer to an array with duty cycle values. This array must be in Data RAM.
AnnaBridge 143:86740a56073b 227 /**< This field is defined as an union of pointers
AnnaBridge 143:86740a56073b 228 * to provide a convenient way to define duty
AnnaBridge 143:86740a56073b 229 * cycle values in various loading modes
AnnaBridge 143:86740a56073b 230 * (see @ref nrf_pwm_dec_load_t).
AnnaBridge 143:86740a56073b 231 * In each value, the most significant bit (15)
AnnaBridge 143:86740a56073b 232 * determines the polarity of the output and the
AnnaBridge 143:86740a56073b 233 * others (14-0) compose the 15-bit value to be
AnnaBridge 143:86740a56073b 234 * compared with the pulse generator counter. */
AnnaBridge 143:86740a56073b 235 uint16_t length; ///< Number of 16-bit values in the array pointed by @p values.
AnnaBridge 143:86740a56073b 236 uint32_t repeats; ///< Number of times that each duty cycle should be repeated (after being played once). Ignored in @ref NRF_PWM_STEP_TRIGGERED mode.
AnnaBridge 143:86740a56073b 237 uint32_t end_delay; ///< Additional time (in PWM periods) that the last duty cycle is to be kept after the sequence is played. Ignored in @ref NRF_PWM_STEP_TRIGGERED mode.
AnnaBridge 143:86740a56073b 238 } nrf_pwm_sequence_t;
AnnaBridge 143:86740a56073b 239
AnnaBridge 143:86740a56073b 240 /**
AnnaBridge 143:86740a56073b 241 * @brief Helper macro for calculating the number of 16-bit values in specified
AnnaBridge 143:86740a56073b 242 * array of duty cycle values.
AnnaBridge 143:86740a56073b 243 */
AnnaBridge 143:86740a56073b 244 #define NRF_PWM_VALUES_LENGTH(array) (sizeof(array)/sizeof(uint16_t))
AnnaBridge 143:86740a56073b 245
AnnaBridge 143:86740a56073b 246
AnnaBridge 143:86740a56073b 247 /**
AnnaBridge 143:86740a56073b 248 * @brief Function for activating a specific PWM task.
AnnaBridge 143:86740a56073b 249 *
AnnaBridge 143:86740a56073b 250 * @param[in] p_pwm PWM instance.
AnnaBridge 143:86740a56073b 251 * @param[in] task Task to activate.
AnnaBridge 143:86740a56073b 252 */
AnnaBridge 143:86740a56073b 253 __STATIC_INLINE void nrf_pwm_task_trigger(NRF_PWM_Type * p_pwm,
AnnaBridge 143:86740a56073b 254 nrf_pwm_task_t task);
AnnaBridge 143:86740a56073b 255
AnnaBridge 143:86740a56073b 256 /**
AnnaBridge 143:86740a56073b 257 * @brief Function for getting the address of a specific PWM task register.
AnnaBridge 143:86740a56073b 258 *
AnnaBridge 143:86740a56073b 259 * @param[in] p_pwm PWM instance.
AnnaBridge 143:86740a56073b 260 * @param[in] task Requested task.
AnnaBridge 143:86740a56073b 261 *
AnnaBridge 143:86740a56073b 262 * @return Address of the specified task register.
AnnaBridge 143:86740a56073b 263 */
AnnaBridge 143:86740a56073b 264 __STATIC_INLINE uint32_t nrf_pwm_task_address_get(NRF_PWM_Type const * p_pwm,
AnnaBridge 143:86740a56073b 265 nrf_pwm_task_t task);
AnnaBridge 143:86740a56073b 266
AnnaBridge 143:86740a56073b 267 /**
AnnaBridge 143:86740a56073b 268 * @brief Function for clearing a specific PWM event.
AnnaBridge 143:86740a56073b 269 *
AnnaBridge 143:86740a56073b 270 * @param[in] p_pwm PWM instance.
AnnaBridge 143:86740a56073b 271 * @param[in] event Event to clear.
AnnaBridge 143:86740a56073b 272 */
AnnaBridge 143:86740a56073b 273 __STATIC_INLINE void nrf_pwm_event_clear(NRF_PWM_Type * p_pwm,
AnnaBridge 143:86740a56073b 274 nrf_pwm_event_t event);
AnnaBridge 143:86740a56073b 275
AnnaBridge 143:86740a56073b 276 /**
AnnaBridge 143:86740a56073b 277 * @brief Function for checking the state of a specific PWM event.
AnnaBridge 143:86740a56073b 278 *
AnnaBridge 143:86740a56073b 279 * @param[in] p_pwm PWM instance.
AnnaBridge 143:86740a56073b 280 * @param[in] event Event to check.
AnnaBridge 143:86740a56073b 281 *
AnnaBridge 143:86740a56073b 282 * @retval true If the event is set.
AnnaBridge 143:86740a56073b 283 * @retval false If the event is not set.
AnnaBridge 143:86740a56073b 284 */
AnnaBridge 143:86740a56073b 285 __STATIC_INLINE bool nrf_pwm_event_check(NRF_PWM_Type const * p_pwm,
AnnaBridge 143:86740a56073b 286 nrf_pwm_event_t event);
AnnaBridge 143:86740a56073b 287
AnnaBridge 143:86740a56073b 288 /**
AnnaBridge 143:86740a56073b 289 * @brief Function for getting the address of a specific PWM event register.
AnnaBridge 143:86740a56073b 290 *
AnnaBridge 143:86740a56073b 291 * @param[in] p_pwm PWM instance.
AnnaBridge 143:86740a56073b 292 * @param[in] event Requested event.
AnnaBridge 143:86740a56073b 293 *
AnnaBridge 143:86740a56073b 294 * @return Address of the specified event register.
AnnaBridge 143:86740a56073b 295 */
AnnaBridge 143:86740a56073b 296 __STATIC_INLINE uint32_t nrf_pwm_event_address_get(NRF_PWM_Type const * p_pwm,
AnnaBridge 143:86740a56073b 297 nrf_pwm_event_t event);
AnnaBridge 143:86740a56073b 298
AnnaBridge 143:86740a56073b 299 /**
AnnaBridge 143:86740a56073b 300 * @brief Function for enabling specified shortcuts.
AnnaBridge 143:86740a56073b 301 *
AnnaBridge 143:86740a56073b 302 * @param[in] p_pwm PWM instance.
AnnaBridge 143:86740a56073b 303 * @param[in] pwm_shorts_mask Shortcuts to enable.
AnnaBridge 143:86740a56073b 304 */
AnnaBridge 143:86740a56073b 305 __STATIC_INLINE void nrf_pwm_shorts_enable(NRF_PWM_Type * p_pwm,
AnnaBridge 143:86740a56073b 306 uint32_t pwm_shorts_mask);
AnnaBridge 143:86740a56073b 307
AnnaBridge 143:86740a56073b 308 /**
AnnaBridge 143:86740a56073b 309 * @brief Function for disabling specified shortcuts.
AnnaBridge 143:86740a56073b 310 *
AnnaBridge 143:86740a56073b 311 * @param[in] p_pwm PWM instance.
AnnaBridge 143:86740a56073b 312 * @param[in] pwm_shorts_mask Shortcuts to disable.
AnnaBridge 143:86740a56073b 313 */
AnnaBridge 143:86740a56073b 314 __STATIC_INLINE void nrf_pwm_shorts_disable(NRF_PWM_Type * p_pwm,
AnnaBridge 143:86740a56073b 315 uint32_t pwm_shorts_mask);
AnnaBridge 143:86740a56073b 316
AnnaBridge 143:86740a56073b 317 /**
AnnaBridge 143:86740a56073b 318 * @brief Function for setting the configuration of PWM shortcuts.
AnnaBridge 143:86740a56073b 319 *
AnnaBridge 143:86740a56073b 320 * @param[in] p_pwm PWM instance.
AnnaBridge 143:86740a56073b 321 * @param[in] pwm_shorts_mask Shortcuts configuration to set.
AnnaBridge 143:86740a56073b 322 */
AnnaBridge 143:86740a56073b 323 __STATIC_INLINE void nrf_pwm_shorts_set(NRF_PWM_Type * p_pwm,
AnnaBridge 143:86740a56073b 324 uint32_t pwm_shorts_mask);
AnnaBridge 143:86740a56073b 325
AnnaBridge 143:86740a56073b 326 /**
AnnaBridge 143:86740a56073b 327 * @brief Function for enabling specified interrupts.
AnnaBridge 143:86740a56073b 328 *
AnnaBridge 143:86740a56073b 329 * @param[in] p_pwm PWM instance.
AnnaBridge 143:86740a56073b 330 * @param[in] pwm_int_mask Interrupts to enable.
AnnaBridge 143:86740a56073b 331 */
AnnaBridge 143:86740a56073b 332 __STATIC_INLINE void nrf_pwm_int_enable(NRF_PWM_Type * p_pwm,
AnnaBridge 143:86740a56073b 333 uint32_t pwm_int_mask);
AnnaBridge 143:86740a56073b 334
AnnaBridge 143:86740a56073b 335 /**
AnnaBridge 143:86740a56073b 336 * @brief Function for disabling specified interrupts.
AnnaBridge 143:86740a56073b 337 *
AnnaBridge 143:86740a56073b 338 * @param[in] p_pwm PWM instance.
AnnaBridge 143:86740a56073b 339 * @param[in] pwm_int_mask Interrupts to disable.
AnnaBridge 143:86740a56073b 340 */
AnnaBridge 143:86740a56073b 341 __STATIC_INLINE void nrf_pwm_int_disable(NRF_PWM_Type * p_pwm,
AnnaBridge 143:86740a56073b 342 uint32_t pwm_int_mask);
AnnaBridge 143:86740a56073b 343
AnnaBridge 143:86740a56073b 344 /**
AnnaBridge 143:86740a56073b 345 * @brief Function for setting the configuration of PWM interrupts.
AnnaBridge 143:86740a56073b 346 *
AnnaBridge 143:86740a56073b 347 * @param[in] p_pwm PWM instance.
AnnaBridge 143:86740a56073b 348 * @param[in] pwm_int_mask Interrupts configuration to set.
AnnaBridge 143:86740a56073b 349 */
AnnaBridge 143:86740a56073b 350 __STATIC_INLINE void nrf_pwm_int_set(NRF_PWM_Type * p_pwm,
AnnaBridge 143:86740a56073b 351 uint32_t pwm_int_mask);
AnnaBridge 143:86740a56073b 352
AnnaBridge 143:86740a56073b 353 /**
AnnaBridge 143:86740a56073b 354 * @brief Function for retrieving the state of a given interrupt.
AnnaBridge 143:86740a56073b 355 *
AnnaBridge 143:86740a56073b 356 * @param[in] p_pwm PWM instance.
AnnaBridge 143:86740a56073b 357 * @param[in] pwm_int Interrupt to check.
AnnaBridge 143:86740a56073b 358 *
AnnaBridge 143:86740a56073b 359 * @retval true If the interrupt is enabled.
AnnaBridge 143:86740a56073b 360 * @retval false If the interrupt is not enabled.
AnnaBridge 143:86740a56073b 361 */
AnnaBridge 143:86740a56073b 362 __STATIC_INLINE bool nrf_pwm_int_enable_check(NRF_PWM_Type const * p_pwm,
AnnaBridge 143:86740a56073b 363 nrf_pwm_int_mask_t pwm_int);
AnnaBridge 143:86740a56073b 364
AnnaBridge 143:86740a56073b 365 /**
AnnaBridge 143:86740a56073b 366 * @brief Function for enabling the PWM peripheral.
AnnaBridge 143:86740a56073b 367 *
AnnaBridge 143:86740a56073b 368 * @param[in] p_pwm PWM instance.
AnnaBridge 143:86740a56073b 369 */
AnnaBridge 143:86740a56073b 370 __STATIC_INLINE void nrf_pwm_enable(NRF_PWM_Type * p_pwm);
AnnaBridge 143:86740a56073b 371
AnnaBridge 143:86740a56073b 372 /**
AnnaBridge 143:86740a56073b 373 * @brief Function for disabling the PWM peripheral.
AnnaBridge 143:86740a56073b 374 *
AnnaBridge 143:86740a56073b 375 * @param[in] p_pwm PWM instance.
AnnaBridge 143:86740a56073b 376 */
AnnaBridge 143:86740a56073b 377 __STATIC_INLINE void nrf_pwm_disable(NRF_PWM_Type * p_pwm);
AnnaBridge 143:86740a56073b 378
AnnaBridge 143:86740a56073b 379 /**
AnnaBridge 143:86740a56073b 380 * @brief Function for assigning pins to PWM output channels.
AnnaBridge 143:86740a56073b 381 *
AnnaBridge 143:86740a56073b 382 * Usage of all PWM output channels is optional. If a given channel is not
AnnaBridge 143:86740a56073b 383 * needed, pass the @ref NRF_PWM_PIN_NOT_CONNECTED value instead of its pin
AnnaBridge 143:86740a56073b 384 * number.
AnnaBridge 143:86740a56073b 385 *
AnnaBridge 143:86740a56073b 386 * @param[in] p_pwm PWM instance.
AnnaBridge 143:86740a56073b 387 * @param[in] out_pins Array with pin numbers for individual PWM output channels.
AnnaBridge 143:86740a56073b 388 */
AnnaBridge 143:86740a56073b 389 __STATIC_INLINE void nrf_pwm_pins_set(NRF_PWM_Type * p_pwm,
AnnaBridge 143:86740a56073b 390 uint32_t out_pins[NRF_PWM_CHANNEL_COUNT]);
AnnaBridge 143:86740a56073b 391
AnnaBridge 143:86740a56073b 392 /**
AnnaBridge 143:86740a56073b 393 * @brief Function for configuring the PWM peripheral.
AnnaBridge 143:86740a56073b 394 *
AnnaBridge 143:86740a56073b 395 * @param[in] p_pwm PWM instance.
AnnaBridge 143:86740a56073b 396 * @param[in] base_clock Base clock frequency.
AnnaBridge 143:86740a56073b 397 * @param[in] mode Operating mode of the pulse generator counter.
AnnaBridge 143:86740a56073b 398 * @param[in] top_value Value up to which the pulse generator counter counts.
AnnaBridge 143:86740a56073b 399 */
AnnaBridge 143:86740a56073b 400 __STATIC_INLINE void nrf_pwm_configure(NRF_PWM_Type * p_pwm,
AnnaBridge 143:86740a56073b 401 nrf_pwm_clk_t base_clock,
AnnaBridge 143:86740a56073b 402 nrf_pwm_mode_t mode,
AnnaBridge 143:86740a56073b 403 uint16_t top_value);
AnnaBridge 143:86740a56073b 404
AnnaBridge 143:86740a56073b 405 /**
AnnaBridge 143:86740a56073b 406 * @brief Function for defining a sequence of PWM duty cycles.
AnnaBridge 143:86740a56073b 407 *
AnnaBridge 143:86740a56073b 408 * @param[in] p_pwm PWM instance.
AnnaBridge 143:86740a56073b 409 * @param[in] seq_id Identifier of the sequence (0 or 1).
AnnaBridge 143:86740a56073b 410 * @param[in] p_seq Pointer to the sequence definition.
AnnaBridge 143:86740a56073b 411 */
AnnaBridge 143:86740a56073b 412 __STATIC_INLINE void nrf_pwm_sequence_set(NRF_PWM_Type * p_pwm,
AnnaBridge 143:86740a56073b 413 uint8_t seq_id,
AnnaBridge 143:86740a56073b 414 nrf_pwm_sequence_t const * p_seq);
AnnaBridge 143:86740a56073b 415
AnnaBridge 143:86740a56073b 416 /**
AnnaBridge 143:86740a56073b 417 * @brief Function for modifying the pointer to the duty cycle values
AnnaBridge 143:86740a56073b 418 * in the specified sequence.
AnnaBridge 143:86740a56073b 419 *
AnnaBridge 143:86740a56073b 420 * @param[in] p_pwm PWM instance.
AnnaBridge 143:86740a56073b 421 * @param[in] seq_id Identifier of the sequence (0 or 1).
AnnaBridge 143:86740a56073b 422 * @param[in] p_values Pointer to an array with duty cycle values.
AnnaBridge 143:86740a56073b 423 */
AnnaBridge 143:86740a56073b 424 __STATIC_INLINE void nrf_pwm_seq_ptr_set(NRF_PWM_Type * p_pwm,
AnnaBridge 143:86740a56073b 425 uint8_t seq_id,
AnnaBridge 143:86740a56073b 426 uint16_t const * p_values);
AnnaBridge 143:86740a56073b 427
AnnaBridge 143:86740a56073b 428 /**
AnnaBridge 143:86740a56073b 429 * @brief Function for modifying the total number of duty cycle values
AnnaBridge 143:86740a56073b 430 * in the specified sequence.
AnnaBridge 143:86740a56073b 431 *
AnnaBridge 143:86740a56073b 432 * @param[in] p_pwm PWM instance.
AnnaBridge 143:86740a56073b 433 * @param[in] seq_id Identifier of the sequence (0 or 1).
AnnaBridge 143:86740a56073b 434 * @param[in] length Number of duty cycle values.
AnnaBridge 143:86740a56073b 435 */
AnnaBridge 143:86740a56073b 436 __STATIC_INLINE void nrf_pwm_seq_cnt_set(NRF_PWM_Type * p_pwm,
AnnaBridge 143:86740a56073b 437 uint8_t seq_id,
AnnaBridge 143:86740a56073b 438 uint16_t length);
AnnaBridge 143:86740a56073b 439
AnnaBridge 143:86740a56073b 440 /**
AnnaBridge 143:86740a56073b 441 * @brief Function for modifying the additional number of PWM periods spent
AnnaBridge 143:86740a56073b 442 * on each duty cycle value in the specified sequence.
AnnaBridge 143:86740a56073b 443 *
AnnaBridge 143:86740a56073b 444 * @param[in] p_pwm PWM instance.
AnnaBridge 143:86740a56073b 445 * @param[in] seq_id Identifier of the sequence (0 or 1).
AnnaBridge 143:86740a56073b 446 * @param[in] refresh Number of additional PWM periods for each duty cycle value.
AnnaBridge 143:86740a56073b 447 */
AnnaBridge 143:86740a56073b 448 __STATIC_INLINE void nrf_pwm_seq_refresh_set(NRF_PWM_Type * p_pwm,
AnnaBridge 143:86740a56073b 449 uint8_t seq_id,
AnnaBridge 143:86740a56073b 450 uint32_t refresh);
AnnaBridge 143:86740a56073b 451
AnnaBridge 143:86740a56073b 452 /**
AnnaBridge 143:86740a56073b 453 * @brief Function for modifying the additional time added after the sequence
AnnaBridge 143:86740a56073b 454 * is played.
AnnaBridge 143:86740a56073b 455 *
AnnaBridge 143:86740a56073b 456 * @param[in] p_pwm PWM instance.
AnnaBridge 143:86740a56073b 457 * @param[in] seq_id Identifier of the sequence (0 or 1).
AnnaBridge 143:86740a56073b 458 * @param[in] end_delay Number of PWM periods added at the end of the sequence.
AnnaBridge 143:86740a56073b 459 */
AnnaBridge 143:86740a56073b 460 __STATIC_INLINE void nrf_pwm_seq_end_delay_set(NRF_PWM_Type * p_pwm,
AnnaBridge 143:86740a56073b 461 uint8_t seq_id,
AnnaBridge 143:86740a56073b 462 uint32_t end_delay);
AnnaBridge 143:86740a56073b 463
AnnaBridge 143:86740a56073b 464 /**
AnnaBridge 143:86740a56073b 465 * @brief Function for setting the mode of loading sequence data from RAM
AnnaBridge 143:86740a56073b 466 * and advancing the sequence.
AnnaBridge 143:86740a56073b 467 *
AnnaBridge 143:86740a56073b 468 * @param[in] p_pwm PWM instance.
AnnaBridge 143:86740a56073b 469 * @param[in] dec_load Mode of loading sequence data from RAM.
AnnaBridge 143:86740a56073b 470 * @param[in] dec_step Mode of advancing the active sequence.
AnnaBridge 143:86740a56073b 471 */
AnnaBridge 143:86740a56073b 472 __STATIC_INLINE void nrf_pwm_decoder_set(NRF_PWM_Type * p_pwm,
AnnaBridge 143:86740a56073b 473 nrf_pwm_dec_load_t dec_load,
AnnaBridge 143:86740a56073b 474 nrf_pwm_dec_step_t dec_step);
AnnaBridge 143:86740a56073b 475
AnnaBridge 143:86740a56073b 476 /**
AnnaBridge 143:86740a56073b 477 * @brief Function for setting the number of times the sequence playback
AnnaBridge 143:86740a56073b 478 * should be performed.
AnnaBridge 143:86740a56073b 479 *
AnnaBridge 143:86740a56073b 480 * This function applies to two-sequence playback (concatenated sequence 0 and 1).
AnnaBridge 143:86740a56073b 481 * A single sequence can be played back only once.
AnnaBridge 143:86740a56073b 482 *
AnnaBridge 143:86740a56073b 483 * @param[in] p_pwm PWM instance.
AnnaBridge 143:86740a56073b 484 * @param[in] loop_count Number of times to perform the sequence playback.
AnnaBridge 143:86740a56073b 485 */
AnnaBridge 143:86740a56073b 486 __STATIC_INLINE void nrf_pwm_loop_set(NRF_PWM_Type * p_pwm,
AnnaBridge 143:86740a56073b 487 uint16_t loop_count);
AnnaBridge 143:86740a56073b 488
AnnaBridge 143:86740a56073b 489
AnnaBridge 143:86740a56073b 490 #ifndef SUPPRESS_INLINE_IMPLEMENTATION
AnnaBridge 143:86740a56073b 491
AnnaBridge 143:86740a56073b 492 __STATIC_INLINE void nrf_pwm_task_trigger(NRF_PWM_Type * p_pwm,
AnnaBridge 143:86740a56073b 493 nrf_pwm_task_t task)
AnnaBridge 143:86740a56073b 494 {
AnnaBridge 143:86740a56073b 495 *((volatile uint32_t *)((uint8_t *)p_pwm + (uint32_t)task)) = 0x1UL;
AnnaBridge 143:86740a56073b 496 }
AnnaBridge 143:86740a56073b 497
AnnaBridge 143:86740a56073b 498 __STATIC_INLINE uint32_t nrf_pwm_task_address_get(NRF_PWM_Type const * p_pwm,
AnnaBridge 143:86740a56073b 499 nrf_pwm_task_t task)
AnnaBridge 143:86740a56073b 500 {
AnnaBridge 143:86740a56073b 501 return ((uint32_t)p_pwm + (uint32_t)task);
AnnaBridge 143:86740a56073b 502 }
AnnaBridge 143:86740a56073b 503
AnnaBridge 143:86740a56073b 504 __STATIC_INLINE void nrf_pwm_event_clear(NRF_PWM_Type * p_pwm,
AnnaBridge 143:86740a56073b 505 nrf_pwm_event_t event)
AnnaBridge 143:86740a56073b 506 {
AnnaBridge 143:86740a56073b 507 *((volatile uint32_t *)((uint8_t *)p_pwm + (uint32_t)event)) = 0x0UL;
AnnaBridge 143:86740a56073b 508 }
AnnaBridge 143:86740a56073b 509
AnnaBridge 143:86740a56073b 510 __STATIC_INLINE bool nrf_pwm_event_check(NRF_PWM_Type const * p_pwm,
AnnaBridge 143:86740a56073b 511 nrf_pwm_event_t event)
AnnaBridge 143:86740a56073b 512 {
AnnaBridge 143:86740a56073b 513 return (bool)*(volatile uint32_t *)((uint8_t *)p_pwm + (uint32_t)event);
AnnaBridge 143:86740a56073b 514 }
AnnaBridge 143:86740a56073b 515
AnnaBridge 143:86740a56073b 516 __STATIC_INLINE uint32_t nrf_pwm_event_address_get(NRF_PWM_Type const * p_pwm,
AnnaBridge 143:86740a56073b 517 nrf_pwm_event_t event)
AnnaBridge 143:86740a56073b 518 {
AnnaBridge 143:86740a56073b 519 return ((uint32_t)p_pwm + (uint32_t)event);
AnnaBridge 143:86740a56073b 520 }
AnnaBridge 143:86740a56073b 521
AnnaBridge 143:86740a56073b 522 __STATIC_INLINE void nrf_pwm_shorts_enable(NRF_PWM_Type * p_pwm,
AnnaBridge 143:86740a56073b 523 uint32_t pwm_shorts_mask)
AnnaBridge 143:86740a56073b 524 {
AnnaBridge 143:86740a56073b 525 p_pwm->SHORTS |= pwm_shorts_mask;
AnnaBridge 143:86740a56073b 526 }
AnnaBridge 143:86740a56073b 527
AnnaBridge 143:86740a56073b 528 __STATIC_INLINE void nrf_pwm_shorts_disable(NRF_PWM_Type * p_pwm,
AnnaBridge 143:86740a56073b 529 uint32_t pwm_shorts_mask)
AnnaBridge 143:86740a56073b 530 {
AnnaBridge 143:86740a56073b 531 p_pwm->SHORTS &= ~(pwm_shorts_mask);
AnnaBridge 143:86740a56073b 532 }
AnnaBridge 143:86740a56073b 533
AnnaBridge 143:86740a56073b 534 __STATIC_INLINE void nrf_pwm_shorts_set(NRF_PWM_Type * p_pwm,
AnnaBridge 143:86740a56073b 535 uint32_t pwm_shorts_mask)
AnnaBridge 143:86740a56073b 536 {
AnnaBridge 143:86740a56073b 537 p_pwm->SHORTS = pwm_shorts_mask;
AnnaBridge 143:86740a56073b 538 }
AnnaBridge 143:86740a56073b 539
AnnaBridge 143:86740a56073b 540 __STATIC_INLINE void nrf_pwm_int_enable(NRF_PWM_Type * p_pwm,
AnnaBridge 143:86740a56073b 541 uint32_t pwm_int_mask)
AnnaBridge 143:86740a56073b 542 {
AnnaBridge 143:86740a56073b 543 p_pwm->INTENSET = pwm_int_mask;
AnnaBridge 143:86740a56073b 544 }
AnnaBridge 143:86740a56073b 545
AnnaBridge 143:86740a56073b 546 __STATIC_INLINE void nrf_pwm_int_disable(NRF_PWM_Type * p_pwm,
AnnaBridge 143:86740a56073b 547 uint32_t pwm_int_mask)
AnnaBridge 143:86740a56073b 548 {
AnnaBridge 143:86740a56073b 549 p_pwm->INTENCLR = pwm_int_mask;
AnnaBridge 143:86740a56073b 550 }
AnnaBridge 143:86740a56073b 551
AnnaBridge 143:86740a56073b 552 __STATIC_INLINE void nrf_pwm_int_set(NRF_PWM_Type * p_pwm,
AnnaBridge 143:86740a56073b 553 uint32_t pwm_int_mask)
AnnaBridge 143:86740a56073b 554 {
AnnaBridge 143:86740a56073b 555 p_pwm->INTEN = pwm_int_mask;
AnnaBridge 143:86740a56073b 556 }
AnnaBridge 143:86740a56073b 557
AnnaBridge 143:86740a56073b 558 __STATIC_INLINE bool nrf_pwm_int_enable_check(NRF_PWM_Type const * p_pwm,
AnnaBridge 143:86740a56073b 559 nrf_pwm_int_mask_t pwm_int)
AnnaBridge 143:86740a56073b 560 {
AnnaBridge 143:86740a56073b 561 return (bool)(p_pwm->INTENSET & pwm_int);
AnnaBridge 143:86740a56073b 562 }
AnnaBridge 143:86740a56073b 563
AnnaBridge 143:86740a56073b 564 __STATIC_INLINE void nrf_pwm_enable(NRF_PWM_Type * p_pwm)
AnnaBridge 143:86740a56073b 565 {
AnnaBridge 143:86740a56073b 566 p_pwm->ENABLE = (PWM_ENABLE_ENABLE_Enabled << PWM_ENABLE_ENABLE_Pos);
AnnaBridge 143:86740a56073b 567 }
AnnaBridge 143:86740a56073b 568
AnnaBridge 143:86740a56073b 569 __STATIC_INLINE void nrf_pwm_disable(NRF_PWM_Type * p_pwm)
AnnaBridge 143:86740a56073b 570 {
AnnaBridge 143:86740a56073b 571 p_pwm->ENABLE = (PWM_ENABLE_ENABLE_Disabled << PWM_ENABLE_ENABLE_Pos);
AnnaBridge 143:86740a56073b 572 }
AnnaBridge 143:86740a56073b 573
AnnaBridge 143:86740a56073b 574 __STATIC_INLINE void nrf_pwm_pins_set(NRF_PWM_Type * p_pwm,
AnnaBridge 143:86740a56073b 575 uint32_t out_pins[NRF_PWM_CHANNEL_COUNT])
AnnaBridge 143:86740a56073b 576 {
AnnaBridge 143:86740a56073b 577 uint8_t i;
AnnaBridge 143:86740a56073b 578 for (i = 0; i < NRF_PWM_CHANNEL_COUNT; ++i)
AnnaBridge 143:86740a56073b 579 {
AnnaBridge 143:86740a56073b 580 p_pwm->PSEL.OUT[i] = out_pins[i];
AnnaBridge 143:86740a56073b 581 }
AnnaBridge 143:86740a56073b 582 }
AnnaBridge 143:86740a56073b 583
AnnaBridge 143:86740a56073b 584 __STATIC_INLINE void nrf_pwm_configure(NRF_PWM_Type * p_pwm,
AnnaBridge 143:86740a56073b 585 nrf_pwm_clk_t base_clock,
AnnaBridge 143:86740a56073b 586 nrf_pwm_mode_t mode,
AnnaBridge 143:86740a56073b 587 uint16_t top_value)
AnnaBridge 143:86740a56073b 588 {
AnnaBridge 143:86740a56073b 589 ASSERT(top_value <= PWM_COUNTERTOP_COUNTERTOP_Msk);
AnnaBridge 143:86740a56073b 590
AnnaBridge 143:86740a56073b 591 p_pwm->PRESCALER = base_clock;
AnnaBridge 143:86740a56073b 592 p_pwm->MODE = mode;
AnnaBridge 143:86740a56073b 593 p_pwm->COUNTERTOP = top_value;
AnnaBridge 143:86740a56073b 594 }
AnnaBridge 143:86740a56073b 595
AnnaBridge 143:86740a56073b 596 __STATIC_INLINE void nrf_pwm_sequence_set(NRF_PWM_Type * p_pwm,
AnnaBridge 143:86740a56073b 597 uint8_t seq_id,
AnnaBridge 143:86740a56073b 598 nrf_pwm_sequence_t const * p_seq)
AnnaBridge 143:86740a56073b 599 {
AnnaBridge 143:86740a56073b 600 ASSERT(p_seq != NULL);
AnnaBridge 143:86740a56073b 601
AnnaBridge 143:86740a56073b 602 nrf_pwm_seq_ptr_set( p_pwm, seq_id, p_seq->values.p_raw);
AnnaBridge 143:86740a56073b 603 nrf_pwm_seq_cnt_set( p_pwm, seq_id, p_seq->length);
AnnaBridge 143:86740a56073b 604 nrf_pwm_seq_refresh_set( p_pwm, seq_id, p_seq->repeats);
AnnaBridge 143:86740a56073b 605 nrf_pwm_seq_end_delay_set(p_pwm, seq_id, p_seq->end_delay);
AnnaBridge 143:86740a56073b 606 }
AnnaBridge 143:86740a56073b 607
AnnaBridge 143:86740a56073b 608 __STATIC_INLINE void nrf_pwm_seq_ptr_set(NRF_PWM_Type * p_pwm,
AnnaBridge 143:86740a56073b 609 uint8_t seq_id,
AnnaBridge 143:86740a56073b 610 uint16_t const * p_values)
AnnaBridge 143:86740a56073b 611 {
AnnaBridge 143:86740a56073b 612 ASSERT(seq_id <= 1);
AnnaBridge 143:86740a56073b 613 ASSERT(p_values != NULL);
AnnaBridge 143:86740a56073b 614 p_pwm->SEQ[seq_id].PTR = (uint32_t)p_values;
AnnaBridge 143:86740a56073b 615 }
AnnaBridge 143:86740a56073b 616
AnnaBridge 143:86740a56073b 617 __STATIC_INLINE void nrf_pwm_seq_cnt_set(NRF_PWM_Type * p_pwm,
AnnaBridge 143:86740a56073b 618 uint8_t seq_id,
AnnaBridge 143:86740a56073b 619 uint16_t length)
AnnaBridge 143:86740a56073b 620 {
AnnaBridge 143:86740a56073b 621 ASSERT(seq_id <= 1);
AnnaBridge 143:86740a56073b 622 ASSERT(length != 0);
AnnaBridge 143:86740a56073b 623 ASSERT(length <= PWM_SEQ_CNT_CNT_Msk);
AnnaBridge 143:86740a56073b 624 p_pwm->SEQ[seq_id].CNT = length;
AnnaBridge 143:86740a56073b 625 }
AnnaBridge 143:86740a56073b 626
AnnaBridge 143:86740a56073b 627 __STATIC_INLINE void nrf_pwm_seq_refresh_set(NRF_PWM_Type * p_pwm,
AnnaBridge 143:86740a56073b 628 uint8_t seq_id,
AnnaBridge 143:86740a56073b 629 uint32_t refresh)
AnnaBridge 143:86740a56073b 630 {
AnnaBridge 143:86740a56073b 631 ASSERT(seq_id <= 1);
AnnaBridge 143:86740a56073b 632 ASSERT(refresh <= PWM_SEQ_REFRESH_CNT_Msk);
AnnaBridge 143:86740a56073b 633 p_pwm->SEQ[seq_id].REFRESH = refresh;
AnnaBridge 143:86740a56073b 634 }
AnnaBridge 143:86740a56073b 635
AnnaBridge 143:86740a56073b 636 __STATIC_INLINE void nrf_pwm_seq_end_delay_set(NRF_PWM_Type * p_pwm,
AnnaBridge 143:86740a56073b 637 uint8_t seq_id,
AnnaBridge 143:86740a56073b 638 uint32_t end_delay)
AnnaBridge 143:86740a56073b 639 {
AnnaBridge 143:86740a56073b 640 ASSERT(seq_id <= 1);
AnnaBridge 143:86740a56073b 641 ASSERT(end_delay <= PWM_SEQ_ENDDELAY_CNT_Msk);
AnnaBridge 143:86740a56073b 642 p_pwm->SEQ[seq_id].ENDDELAY = end_delay;
AnnaBridge 143:86740a56073b 643 }
AnnaBridge 143:86740a56073b 644
AnnaBridge 143:86740a56073b 645 __STATIC_INLINE void nrf_pwm_decoder_set(NRF_PWM_Type * p_pwm,
AnnaBridge 143:86740a56073b 646 nrf_pwm_dec_load_t dec_load,
AnnaBridge 143:86740a56073b 647 nrf_pwm_dec_step_t dec_step)
AnnaBridge 143:86740a56073b 648 {
AnnaBridge 143:86740a56073b 649 p_pwm->DECODER = ((uint32_t)dec_load << PWM_DECODER_LOAD_Pos) |
AnnaBridge 143:86740a56073b 650 ((uint32_t)dec_step << PWM_DECODER_MODE_Pos);
AnnaBridge 143:86740a56073b 651 }
AnnaBridge 143:86740a56073b 652
AnnaBridge 143:86740a56073b 653 __STATIC_INLINE void nrf_pwm_loop_set(NRF_PWM_Type * p_pwm,
AnnaBridge 143:86740a56073b 654 uint16_t loop_count)
AnnaBridge 143:86740a56073b 655 {
AnnaBridge 143:86740a56073b 656 p_pwm->LOOP = loop_count;
AnnaBridge 143:86740a56073b 657 }
AnnaBridge 143:86740a56073b 658
AnnaBridge 143:86740a56073b 659 #endif // SUPPRESS_INLINE_IMPLEMENTATION
AnnaBridge 143:86740a56073b 660
AnnaBridge 143:86740a56073b 661 #endif // NRF52
AnnaBridge 143:86740a56073b 662
AnnaBridge 143:86740a56073b 663 #endif // NRF_PWM_H__
AnnaBridge 143:86740a56073b 664
AnnaBridge 143:86740a56073b 665 /** @} */