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TARGET_SDT32620B/TOOLCHAIN_IAR/pt_regs.h@172:65be27845400, 2019-02-20 (annotated)

Committer:
AnnaBridge
Date:
Wed Feb 20 20:53:29 2019 +0000
Revision:
172:65be27845400
Parent:
171:3a7713b1edbc 
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 167:84c0a372a020 1 /*******************************************************************************
AnnaBridge 167:84c0a372a020 2 * Copyright (C) 2016 Maxim Integrated Products, Inc., All Rights Reserved.
AnnaBridge 167:84c0a372a020 3 *
AnnaBridge 167:84c0a372a020 4 * Permission is hereby granted, free of charge, to any person obtaining a
AnnaBridge 167:84c0a372a020 5 * copy of this software and associated documentation files (the "Software"),
AnnaBridge 167:84c0a372a020 6 * to deal in the Software without restriction, including without limitation
AnnaBridge 167:84c0a372a020 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
AnnaBridge 167:84c0a372a020 8 * and/or sell copies of the Software, and to permit persons to whom the
AnnaBridge 167:84c0a372a020 9 * Software is furnished to do so, subject to the following conditions:
AnnaBridge 167:84c0a372a020 10 *
AnnaBridge 167:84c0a372a020 11 * The above copyright notice and this permission notice shall be included
AnnaBridge 167:84c0a372a020 12 * in all copies or substantial portions of the Software.
AnnaBridge 167:84c0a372a020 13 *
AnnaBridge 167:84c0a372a020 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
AnnaBridge 167:84c0a372a020 15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
AnnaBridge 167:84c0a372a020 16 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
AnnaBridge 167:84c0a372a020 17 * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
AnnaBridge 167:84c0a372a020 18 * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
AnnaBridge 167:84c0a372a020 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
AnnaBridge 167:84c0a372a020 20 * OTHER DEALINGS IN THE SOFTWARE.
AnnaBridge 167:84c0a372a020 21 *
AnnaBridge 167:84c0a372a020 22 * Except as contained in this notice, the name of Maxim Integrated
AnnaBridge 167:84c0a372a020 23 * Products, Inc. shall not be used except as stated in the Maxim Integrated
AnnaBridge 167:84c0a372a020 24 * Products, Inc. Branding Policy.
AnnaBridge 167:84c0a372a020 25 *
AnnaBridge 167:84c0a372a020 26 * The mere transfer of this software does not imply any licenses
AnnaBridge 167:84c0a372a020 27 * of trade secrets, proprietary technology, copyrights, patents,
AnnaBridge 167:84c0a372a020 28 * trademarks, maskwork rights, or any other form of intellectual
AnnaBridge 167:84c0a372a020 29 * property whatsoever. Maxim Integrated Products, Inc. retains all
AnnaBridge 167:84c0a372a020 30 * ownership rights.
AnnaBridge 167:84c0a372a020 31 *
AnnaBridge 167:84c0a372a020 32 * $Date: 2016-03-11 11:46:37 -0600 (Fri, 11 Mar 2016) $
AnnaBridge 167:84c0a372a020 33 * $Revision: 21839 $
AnnaBridge 167:84c0a372a020 34 *
AnnaBridge 167:84c0a372a020 35 ******************************************************************************/
AnnaBridge 167:84c0a372a020 36
AnnaBridge 167:84c0a372a020 37 #ifndef _MXC_PT_REGS_H_
AnnaBridge 167:84c0a372a020 38 #define _MXC_PT_REGS_H_
AnnaBridge 167:84c0a372a020 39
AnnaBridge 167:84c0a372a020 40 #ifdef __cplusplus
AnnaBridge 167:84c0a372a020 41 extern "C" {
AnnaBridge 167:84c0a372a020 42 #endif
AnnaBridge 167:84c0a372a020 43
AnnaBridge 167:84c0a372a020 44 #include <stdint.h>
AnnaBridge 167:84c0a372a020 45
AnnaBridge 167:84c0a372a020 46 /*
AnnaBridge 167:84c0a372a020 47 If types are not defined elsewhere (CMSIS) define them here
AnnaBridge 167:84c0a372a020 48 */
AnnaBridge 167:84c0a372a020 49 #ifndef __IO
AnnaBridge 167:84c0a372a020 50 #define __IO volatile
AnnaBridge 167:84c0a372a020 51 #endif
AnnaBridge 167:84c0a372a020 52 #ifndef __I
AnnaBridge 167:84c0a372a020 53 #define __I volatile const
AnnaBridge 167:84c0a372a020 54 #endif
AnnaBridge 167:84c0a372a020 55 #ifndef __O
AnnaBridge 167:84c0a372a020 56 #define __O volatile
AnnaBridge 167:84c0a372a020 57 #endif
AnnaBridge 167:84c0a372a020 58 #ifndef __RO
AnnaBridge 167:84c0a372a020 59 #define __RO volatile const
AnnaBridge 167:84c0a372a020 60 #endif
AnnaBridge 167:84c0a372a020 61
AnnaBridge 167:84c0a372a020 62
AnnaBridge 167:84c0a372a020 63 /*
AnnaBridge 167:84c0a372a020 64 Typedefed structure(s) for module registers (per instance or section) with direct 32-bit
AnnaBridge 167:84c0a372a020 65 access to each register in module.
AnnaBridge 167:84c0a372a020 66 */
AnnaBridge 167:84c0a372a020 67
AnnaBridge 167:84c0a372a020 68 /* Offset Register Description
AnnaBridge 167:84c0a372a020 69 ============= ============================================================================ */
AnnaBridge 167:84c0a372a020 70 typedef struct {
AnnaBridge 167:84c0a372a020 71 __IO uint32_t enable; /* 0x0000 Global Enable/Disable Controls for All Pulse Trains */
AnnaBridge 167:84c0a372a020 72 __IO uint32_t resync; /* 0x0004 Global Resync (All Pulse Trains) Control */
AnnaBridge 167:84c0a372a020 73 __IO uint32_t intfl; /* 0x0008 Pulse Train Interrupt Flags */
AnnaBridge 167:84c0a372a020 74 __IO uint32_t inten; /* 0x000C Pulse Train Interrupt Enable/Disable */
AnnaBridge 167:84c0a372a020 75 } mxc_ptg_regs_t;
AnnaBridge 167:84c0a372a020 76
AnnaBridge 167:84c0a372a020 77
AnnaBridge 167:84c0a372a020 78 /* Offset Register Description
AnnaBridge 167:84c0a372a020 79 ============= ============================================================================ */
AnnaBridge 167:84c0a372a020 80 typedef struct {
AnnaBridge 167:84c0a372a020 81 __IO uint32_t rate_length; /* 0x0000 Pulse Train Configuration */
AnnaBridge 167:84c0a372a020 82 __IO uint32_t train; /* 0x0004 Pulse Train Output Pattern */
AnnaBridge 167:84c0a372a020 83 __IO uint32_t loop; /* 0x0008 Pulse Train Loop Configuration */
AnnaBridge 167:84c0a372a020 84 __IO uint32_t restart; /* 0x000C Pulse Train Auto-Restart Configuration */
AnnaBridge 167:84c0a372a020 85 } mxc_pt_regs_t;
AnnaBridge 167:84c0a372a020 86
AnnaBridge 167:84c0a372a020 87
AnnaBridge 167:84c0a372a020 88 /*
AnnaBridge 167:84c0a372a020 89 Register offsets for module PT.
AnnaBridge 167:84c0a372a020 90 */
AnnaBridge 167:84c0a372a020 91
AnnaBridge 167:84c0a372a020 92 #define MXC_R_PTG_OFFS_ENABLE ((uint32_t)0x00000000UL)
AnnaBridge 167:84c0a372a020 93 #define MXC_R_PTG_OFFS_RESYNC ((uint32_t)0x00000004UL)
AnnaBridge 167:84c0a372a020 94 #define MXC_R_PTG_OFFS_INTFL ((uint32_t)0x00000008UL)
AnnaBridge 167:84c0a372a020 95 #define MXC_R_PTG_OFFS_INTEN ((uint32_t)0x0000000CUL)
AnnaBridge 167:84c0a372a020 96 #define MXC_R_PT_OFFS_RATE_LENGTH ((uint32_t)0x00000000UL)
AnnaBridge 167:84c0a372a020 97 #define MXC_R_PT_OFFS_TRAIN ((uint32_t)0x00000004UL)
AnnaBridge 167:84c0a372a020 98 #define MXC_R_PT_OFFS_LOOP ((uint32_t)0x00000008UL)
AnnaBridge 167:84c0a372a020 99 #define MXC_R_PT_OFFS_RESTART ((uint32_t)0x0000000CUL)
AnnaBridge 167:84c0a372a020 100
AnnaBridge 167:84c0a372a020 101
AnnaBridge 167:84c0a372a020 102 /*
AnnaBridge 167:84c0a372a020 103 Field positions and masks for module PT.
AnnaBridge 167:84c0a372a020 104 */
AnnaBridge 167:84c0a372a020 105
AnnaBridge 167:84c0a372a020 106 #define MXC_F_PT_ENABLE_PT0_POS 0
AnnaBridge 167:84c0a372a020 107 #define MXC_F_PT_ENABLE_PT0 ((uint32_t)(0x00000001UL << MXC_F_PT_ENABLE_PT0_POS))
AnnaBridge 167:84c0a372a020 108 #define MXC_F_PT_ENABLE_PT1_POS 1
AnnaBridge 167:84c0a372a020 109 #define MXC_F_PT_ENABLE_PT1 ((uint32_t)(0x00000001UL << MXC_F_PT_ENABLE_PT1_POS))
AnnaBridge 167:84c0a372a020 110 #define MXC_F_PT_ENABLE_PT2_POS 2
AnnaBridge 167:84c0a372a020 111 #define MXC_F_PT_ENABLE_PT2 ((uint32_t)(0x00000001UL << MXC_F_PT_ENABLE_PT2_POS))
AnnaBridge 167:84c0a372a020 112 #define MXC_F_PT_ENABLE_PT3_POS 3
AnnaBridge 167:84c0a372a020 113 #define MXC_F_PT_ENABLE_PT3 ((uint32_t)(0x00000001UL << MXC_F_PT_ENABLE_PT3_POS))
AnnaBridge 167:84c0a372a020 114 #define MXC_F_PT_ENABLE_PT4_POS 4
AnnaBridge 167:84c0a372a020 115 #define MXC_F_PT_ENABLE_PT4 ((uint32_t)(0x00000001UL << MXC_F_PT_ENABLE_PT4_POS))
AnnaBridge 167:84c0a372a020 116 #define MXC_F_PT_ENABLE_PT5_POS 5
AnnaBridge 167:84c0a372a020 117 #define MXC_F_PT_ENABLE_PT5 ((uint32_t)(0x00000001UL << MXC_F_PT_ENABLE_PT5_POS))
AnnaBridge 167:84c0a372a020 118 #define MXC_F_PT_ENABLE_PT6_POS 6
AnnaBridge 167:84c0a372a020 119 #define MXC_F_PT_ENABLE_PT6 ((uint32_t)(0x00000001UL << MXC_F_PT_ENABLE_PT6_POS))
AnnaBridge 167:84c0a372a020 120 #define MXC_F_PT_ENABLE_PT7_POS 7
AnnaBridge 167:84c0a372a020 121 #define MXC_F_PT_ENABLE_PT7 ((uint32_t)(0x00000001UL << MXC_F_PT_ENABLE_PT7_POS))
AnnaBridge 167:84c0a372a020 122 #define MXC_F_PT_ENABLE_PT8_POS 8
AnnaBridge 167:84c0a372a020 123 #define MXC_F_PT_ENABLE_PT8 ((uint32_t)(0x00000001UL << MXC_F_PT_ENABLE_PT8_POS))
AnnaBridge 167:84c0a372a020 124 #define MXC_F_PT_ENABLE_PT9_POS 9
AnnaBridge 167:84c0a372a020 125 #define MXC_F_PT_ENABLE_PT9 ((uint32_t)(0x00000001UL << MXC_F_PT_ENABLE_PT9_POS))
AnnaBridge 167:84c0a372a020 126 #define MXC_F_PT_ENABLE_PT10_POS 10
AnnaBridge 167:84c0a372a020 127 #define MXC_F_PT_ENABLE_PT10 ((uint32_t)(0x00000001UL << MXC_F_PT_ENABLE_PT10_POS))
AnnaBridge 167:84c0a372a020 128 #define MXC_F_PT_ENABLE_PT11_POS 11
AnnaBridge 167:84c0a372a020 129 #define MXC_F_PT_ENABLE_PT11 ((uint32_t)(0x00000001UL << MXC_F_PT_ENABLE_PT11_POS))
AnnaBridge 167:84c0a372a020 130 #define MXC_F_PT_ENABLE_PT12_POS 12
AnnaBridge 167:84c0a372a020 131 #define MXC_F_PT_ENABLE_PT12 ((uint32_t)(0x00000001UL << MXC_F_PT_ENABLE_PT12_POS))
AnnaBridge 167:84c0a372a020 132 #define MXC_F_PT_ENABLE_PT13_POS 13
AnnaBridge 167:84c0a372a020 133 #define MXC_F_PT_ENABLE_PT13 ((uint32_t)(0x00000001UL << MXC_F_PT_ENABLE_PT13_POS))
AnnaBridge 167:84c0a372a020 134 #define MXC_F_PT_ENABLE_PT14_POS 14
AnnaBridge 167:84c0a372a020 135 #define MXC_F_PT_ENABLE_PT14 ((uint32_t)(0x00000001UL << MXC_F_PT_ENABLE_PT14_POS))
AnnaBridge 167:84c0a372a020 136 #define MXC_F_PT_ENABLE_PT15_POS 15
AnnaBridge 167:84c0a372a020 137 #define MXC_F_PT_ENABLE_PT15 ((uint32_t)(0x00000001UL << MXC_F_PT_ENABLE_PT15_POS))
AnnaBridge 167:84c0a372a020 138
AnnaBridge 167:84c0a372a020 139 #define MXC_F_PT_RESYNC_PT0_POS 0
AnnaBridge 167:84c0a372a020 140 #define MXC_F_PT_RESYNC_PT0 ((uint32_t)(0x00000001UL << MXC_F_PT_RESYNC_PT0_POS))
AnnaBridge 167:84c0a372a020 141 #define MXC_F_PT_RESYNC_PT1_POS 1
AnnaBridge 167:84c0a372a020 142 #define MXC_F_PT_RESYNC_PT1 ((uint32_t)(0x00000001UL << MXC_F_PT_RESYNC_PT1_POS))
AnnaBridge 167:84c0a372a020 143 #define MXC_F_PT_RESYNC_PT2_POS 2
AnnaBridge 167:84c0a372a020 144 #define MXC_F_PT_RESYNC_PT2 ((uint32_t)(0x00000001UL << MXC_F_PT_RESYNC_PT2_POS))
AnnaBridge 167:84c0a372a020 145 #define MXC_F_PT_RESYNC_PT3_POS 3
AnnaBridge 167:84c0a372a020 146 #define MXC_F_PT_RESYNC_PT3 ((uint32_t)(0x00000001UL << MXC_F_PT_RESYNC_PT3_POS))
AnnaBridge 167:84c0a372a020 147 #define MXC_F_PT_RESYNC_PT4_POS 4
AnnaBridge 167:84c0a372a020 148 #define MXC_F_PT_RESYNC_PT4 ((uint32_t)(0x00000001UL << MXC_F_PT_RESYNC_PT4_POS))
AnnaBridge 167:84c0a372a020 149 #define MXC_F_PT_RESYNC_PT5_POS 5
AnnaBridge 167:84c0a372a020 150 #define MXC_F_PT_RESYNC_PT5 ((uint32_t)(0x00000001UL << MXC_F_PT_RESYNC_PT5_POS))
AnnaBridge 167:84c0a372a020 151 #define MXC_F_PT_RESYNC_PT6_POS 6
AnnaBridge 167:84c0a372a020 152 #define MXC_F_PT_RESYNC_PT6 ((uint32_t)(0x00000001UL << MXC_F_PT_RESYNC_PT6_POS))
AnnaBridge 167:84c0a372a020 153 #define MXC_F_PT_RESYNC_PT7_POS 7
AnnaBridge 167:84c0a372a020 154 #define MXC_F_PT_RESYNC_PT7 ((uint32_t)(0x00000001UL << MXC_F_PT_RESYNC_PT7_POS))
AnnaBridge 167:84c0a372a020 155 #define MXC_F_PT_RESYNC_PT8_POS 8
AnnaBridge 167:84c0a372a020 156 #define MXC_F_PT_RESYNC_PT8 ((uint32_t)(0x00000001UL << MXC_F_PT_RESYNC_PT8_POS))
AnnaBridge 167:84c0a372a020 157 #define MXC_F_PT_RESYNC_PT9_POS 9
AnnaBridge 167:84c0a372a020 158 #define MXC_F_PT_RESYNC_PT9 ((uint32_t)(0x00000001UL << MXC_F_PT_RESYNC_PT9_POS))
AnnaBridge 167:84c0a372a020 159 #define MXC_F_PT_RESYNC_PT10_POS 10
AnnaBridge 167:84c0a372a020 160 #define MXC_F_PT_RESYNC_PT10 ((uint32_t)(0x00000001UL << MXC_F_PT_RESYNC_PT10_POS))
AnnaBridge 167:84c0a372a020 161 #define MXC_F_PT_RESYNC_PT11_POS 11
AnnaBridge 167:84c0a372a020 162 #define MXC_F_PT_RESYNC_PT11 ((uint32_t)(0x00000001UL << MXC_F_PT_RESYNC_PT11_POS))
AnnaBridge 167:84c0a372a020 163 #define MXC_F_PT_RESYNC_PT12_POS 12
AnnaBridge 167:84c0a372a020 164 #define MXC_F_PT_RESYNC_PT12 ((uint32_t)(0x00000001UL << MXC_F_PT_RESYNC_PT12_POS))
AnnaBridge 167:84c0a372a020 165 #define MXC_F_PT_RESYNC_PT13_POS 13
AnnaBridge 167:84c0a372a020 166 #define MXC_F_PT_RESYNC_PT13 ((uint32_t)(0x00000001UL << MXC_F_PT_RESYNC_PT13_POS))
AnnaBridge 167:84c0a372a020 167 #define MXC_F_PT_RESYNC_PT14_POS 14
AnnaBridge 167:84c0a372a020 168 #define MXC_F_PT_RESYNC_PT14 ((uint32_t)(0x00000001UL << MXC_F_PT_RESYNC_PT14_POS))
AnnaBridge 167:84c0a372a020 169 #define MXC_F_PT_RESYNC_PT15_POS 15
AnnaBridge 167:84c0a372a020 170 #define MXC_F_PT_RESYNC_PT15 ((uint32_t)(0x00000001UL << MXC_F_PT_RESYNC_PT15_POS))
AnnaBridge 167:84c0a372a020 171
AnnaBridge 167:84c0a372a020 172 #define MXC_F_PT_INTFL_PT0_POS 0
AnnaBridge 167:84c0a372a020 173 #define MXC_F_PT_INTFL_PT0 ((uint32_t)(0x00000001UL << MXC_F_PT_INTFL_PT0_POS))
AnnaBridge 167:84c0a372a020 174 #define MXC_F_PT_INTFL_PT1_POS 1
AnnaBridge 167:84c0a372a020 175 #define MXC_F_PT_INTFL_PT1 ((uint32_t)(0x00000001UL << MXC_F_PT_INTFL_PT1_POS))
AnnaBridge 167:84c0a372a020 176 #define MXC_F_PT_INTFL_PT2_POS 2
AnnaBridge 167:84c0a372a020 177 #define MXC_F_PT_INTFL_PT2 ((uint32_t)(0x00000001UL << MXC_F_PT_INTFL_PT2_POS))
AnnaBridge 167:84c0a372a020 178 #define MXC_F_PT_INTFL_PT3_POS 3
AnnaBridge 167:84c0a372a020 179 #define MXC_F_PT_INTFL_PT3 ((uint32_t)(0x00000001UL << MXC_F_PT_INTFL_PT3_POS))
AnnaBridge 167:84c0a372a020 180 #define MXC_F_PT_INTFL_PT4_POS 4
AnnaBridge 167:84c0a372a020 181 #define MXC_F_PT_INTFL_PT4 ((uint32_t)(0x00000001UL << MXC_F_PT_INTFL_PT4_POS))
AnnaBridge 167:84c0a372a020 182 #define MXC_F_PT_INTFL_PT5_POS 5
AnnaBridge 167:84c0a372a020 183 #define MXC_F_PT_INTFL_PT5 ((uint32_t)(0x00000001UL << MXC_F_PT_INTFL_PT5_POS))
AnnaBridge 167:84c0a372a020 184 #define MXC_F_PT_INTFL_PT6_POS 6
AnnaBridge 167:84c0a372a020 185 #define MXC_F_PT_INTFL_PT6 ((uint32_t)(0x00000001UL << MXC_F_PT_INTFL_PT6_POS))
AnnaBridge 167:84c0a372a020 186 #define MXC_F_PT_INTFL_PT7_POS 7
AnnaBridge 167:84c0a372a020 187 #define MXC_F_PT_INTFL_PT7 ((uint32_t)(0x00000001UL << MXC_F_PT_INTFL_PT7_POS))
AnnaBridge 167:84c0a372a020 188 #define MXC_F_PT_INTFL_PT8_POS 8
AnnaBridge 167:84c0a372a020 189 #define MXC_F_PT_INTFL_PT8 ((uint32_t)(0x00000001UL << MXC_F_PT_INTFL_PT8_POS))
AnnaBridge 167:84c0a372a020 190 #define MXC_F_PT_INTFL_PT9_POS 9
AnnaBridge 167:84c0a372a020 191 #define MXC_F_PT_INTFL_PT9 ((uint32_t)(0x00000001UL << MXC_F_PT_INTFL_PT9_POS))
AnnaBridge 167:84c0a372a020 192 #define MXC_F_PT_INTFL_PT10_POS 10
AnnaBridge 167:84c0a372a020 193 #define MXC_F_PT_INTFL_PT10 ((uint32_t)(0x00000001UL << MXC_F_PT_INTFL_PT10_POS))
AnnaBridge 167:84c0a372a020 194 #define MXC_F_PT_INTFL_PT11_POS 11
AnnaBridge 167:84c0a372a020 195 #define MXC_F_PT_INTFL_PT11 ((uint32_t)(0x00000001UL << MXC_F_PT_INTFL_PT11_POS))
AnnaBridge 167:84c0a372a020 196 #define MXC_F_PT_INTFL_PT12_POS 12
AnnaBridge 167:84c0a372a020 197 #define MXC_F_PT_INTFL_PT12 ((uint32_t)(0x00000001UL << MXC_F_PT_INTFL_PT12_POS))
AnnaBridge 167:84c0a372a020 198 #define MXC_F_PT_INTFL_PT13_POS 13
AnnaBridge 167:84c0a372a020 199 #define MXC_F_PT_INTFL_PT13 ((uint32_t)(0x00000001UL << MXC_F_PT_INTFL_PT13_POS))
AnnaBridge 167:84c0a372a020 200 #define MXC_F_PT_INTFL_PT14_POS 14
AnnaBridge 167:84c0a372a020 201 #define MXC_F_PT_INTFL_PT14 ((uint32_t)(0x00000001UL << MXC_F_PT_INTFL_PT14_POS))
AnnaBridge 167:84c0a372a020 202 #define MXC_F_PT_INTFL_PT15_POS 15
AnnaBridge 167:84c0a372a020 203 #define MXC_F_PT_INTFL_PT15 ((uint32_t)(0x00000001UL << MXC_F_PT_INTFL_PT15_POS))
AnnaBridge 167:84c0a372a020 204
AnnaBridge 167:84c0a372a020 205 #define MXC_F_PT_INTEN_PT0_POS 0
AnnaBridge 167:84c0a372a020 206 #define MXC_F_PT_INTEN_PT0 ((uint32_t)(0x00000001UL << MXC_F_PT_INTEN_PT0_POS))
AnnaBridge 167:84c0a372a020 207 #define MXC_F_PT_INTEN_PT1_POS 1
AnnaBridge 167:84c0a372a020 208 #define MXC_F_PT_INTEN_PT1 ((uint32_t)(0x00000001UL << MXC_F_PT_INTEN_PT1_POS))
AnnaBridge 167:84c0a372a020 209 #define MXC_F_PT_INTEN_PT2_POS 2
AnnaBridge 167:84c0a372a020 210 #define MXC_F_PT_INTEN_PT2 ((uint32_t)(0x00000001UL << MXC_F_PT_INTEN_PT2_POS))
AnnaBridge 167:84c0a372a020 211 #define MXC_F_PT_INTEN_PT3_POS 3
AnnaBridge 167:84c0a372a020 212 #define MXC_F_PT_INTEN_PT3 ((uint32_t)(0x00000001UL << MXC_F_PT_INTEN_PT3_POS))
AnnaBridge 167:84c0a372a020 213 #define MXC_F_PT_INTEN_PT4_POS 4
AnnaBridge 167:84c0a372a020 214 #define MXC_F_PT_INTEN_PT4 ((uint32_t)(0x00000001UL << MXC_F_PT_INTEN_PT4_POS))
AnnaBridge 167:84c0a372a020 215 #define MXC_F_PT_INTEN_PT5_POS 5
AnnaBridge 167:84c0a372a020 216 #define MXC_F_PT_INTEN_PT5 ((uint32_t)(0x00000001UL << MXC_F_PT_INTEN_PT5_POS))
AnnaBridge 167:84c0a372a020 217 #define MXC_F_PT_INTEN_PT6_POS 6
AnnaBridge 167:84c0a372a020 218 #define MXC_F_PT_INTEN_PT6 ((uint32_t)(0x00000001UL << MXC_F_PT_INTEN_PT6_POS))
AnnaBridge 167:84c0a372a020 219 #define MXC_F_PT_INTEN_PT7_POS 7
AnnaBridge 167:84c0a372a020 220 #define MXC_F_PT_INTEN_PT7 ((uint32_t)(0x00000001UL << MXC_F_PT_INTEN_PT7_POS))
AnnaBridge 167:84c0a372a020 221 #define MXC_F_PT_INTEN_PT8_POS 8
AnnaBridge 167:84c0a372a020 222 #define MXC_F_PT_INTEN_PT8 ((uint32_t)(0x00000001UL << MXC_F_PT_INTEN_PT8_POS))
AnnaBridge 167:84c0a372a020 223 #define MXC_F_PT_INTEN_PT9_POS 9
AnnaBridge 167:84c0a372a020 224 #define MXC_F_PT_INTEN_PT9 ((uint32_t)(0x00000001UL << MXC_F_PT_INTEN_PT9_POS))
AnnaBridge 167:84c0a372a020 225 #define MXC_F_PT_INTEN_PT10_POS 10
AnnaBridge 167:84c0a372a020 226 #define MXC_F_PT_INTEN_PT10 ((uint32_t)(0x00000001UL << MXC_F_PT_INTEN_PT10_POS))
AnnaBridge 167:84c0a372a020 227 #define MXC_F_PT_INTEN_PT11_POS 11
AnnaBridge 167:84c0a372a020 228 #define MXC_F_PT_INTEN_PT11 ((uint32_t)(0x00000001UL << MXC_F_PT_INTEN_PT11_POS))
AnnaBridge 167:84c0a372a020 229 #define MXC_F_PT_INTEN_PT12_POS 12
AnnaBridge 167:84c0a372a020 230 #define MXC_F_PT_INTEN_PT12 ((uint32_t)(0x00000001UL << MXC_F_PT_INTEN_PT12_POS))
AnnaBridge 167:84c0a372a020 231 #define MXC_F_PT_INTEN_PT13_POS 13
AnnaBridge 167:84c0a372a020 232 #define MXC_F_PT_INTEN_PT13 ((uint32_t)(0x00000001UL << MXC_F_PT_INTEN_PT13_POS))
AnnaBridge 167:84c0a372a020 233 #define MXC_F_PT_INTEN_PT14_POS 14
AnnaBridge 167:84c0a372a020 234 #define MXC_F_PT_INTEN_PT14 ((uint32_t)(0x00000001UL << MXC_F_PT_INTEN_PT14_POS))
AnnaBridge 167:84c0a372a020 235 #define MXC_F_PT_INTEN_PT15_POS 15
AnnaBridge 167:84c0a372a020 236 #define MXC_F_PT_INTEN_PT15 ((uint32_t)(0x00000001UL << MXC_F_PT_INTEN_PT15_POS))
AnnaBridge 167:84c0a372a020 237
AnnaBridge 167:84c0a372a020 238 #define MXC_F_PT_RATE_LENGTH_RATE_CONTROL_POS 0
AnnaBridge 167:84c0a372a020 239 #define MXC_F_PT_RATE_LENGTH_RATE_CONTROL ((uint32_t)(0x07FFFFFFUL << MXC_F_PT_RATE_LENGTH_RATE_CONTROL_POS))
AnnaBridge 167:84c0a372a020 240 #define MXC_F_PT_RATE_LENGTH_MODE_POS 27
AnnaBridge 167:84c0a372a020 241 #define MXC_F_PT_RATE_LENGTH_MODE ((uint32_t)(0x0000001FUL << MXC_F_PT_RATE_LENGTH_MODE_POS))
AnnaBridge 167:84c0a372a020 242
AnnaBridge 167:84c0a372a020 243 #define MXC_F_PT_LOOP_COUNT_POS 0
AnnaBridge 167:84c0a372a020 244 #define MXC_F_PT_LOOP_COUNT ((uint32_t)(0x0000FFFFUL << MXC_F_PT_LOOP_COUNT_POS))
AnnaBridge 167:84c0a372a020 245 #define MXC_F_PT_LOOP_DELAY_POS 16
AnnaBridge 167:84c0a372a020 246 #define MXC_F_PT_LOOP_DELAY ((uint32_t)(0x00000FFFUL << MXC_F_PT_LOOP_DELAY_POS))
AnnaBridge 167:84c0a372a020 247
AnnaBridge 167:84c0a372a020 248 #define MXC_F_PT_RESTART_PT_X_SELECT_POS 0
AnnaBridge 167:84c0a372a020 249 #define MXC_F_PT_RESTART_PT_X_SELECT ((uint32_t)(0x0000001FUL << MXC_F_PT_RESTART_PT_X_SELECT_POS))
AnnaBridge 167:84c0a372a020 250 #define MXC_F_PT_RESTART_ON_PT_X_LOOP_EXIT_POS 7
AnnaBridge 167:84c0a372a020 251 #define MXC_F_PT_RESTART_ON_PT_X_LOOP_EXIT ((uint32_t)(0x00000001UL << MXC_F_PT_RESTART_ON_PT_X_LOOP_EXIT_POS))
AnnaBridge 167:84c0a372a020 252 #define MXC_F_PT_RESTART_PT_Y_SELECT_POS 8
AnnaBridge 167:84c0a372a020 253 #define MXC_F_PT_RESTART_PT_Y_SELECT ((uint32_t)(0x0000001FUL << MXC_F_PT_RESTART_PT_Y_SELECT_POS))
AnnaBridge 167:84c0a372a020 254 #define MXC_F_PT_RESTART_ON_PT_Y_LOOP_EXIT_POS 15
AnnaBridge 167:84c0a372a020 255 #define MXC_F_PT_RESTART_ON_PT_Y_LOOP_EXIT ((uint32_t)(0x00000001UL << MXC_F_PT_RESTART_ON_PT_Y_LOOP_EXIT_POS))
AnnaBridge 167:84c0a372a020 256
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AnnaBridge 167:84c0a372a020 259 /*
AnnaBridge 167:84c0a372a020 260 Field values and shifted values for module PT.
AnnaBridge 167:84c0a372a020 261 */
AnnaBridge 167:84c0a372a020 262
AnnaBridge 167:84c0a372a020 263 #define MXC_V_PT_RATE_LENGTH_MODE_32_BIT ((uint32_t)(0x00000000UL))
AnnaBridge 167:84c0a372a020 264 #define MXC_V_PT_RATE_LENGTH_MODE_SQUARE_WAVE ((uint32_t)(0x00000001UL))
AnnaBridge 167:84c0a372a020 265 #define MXC_V_PT_RATE_LENGTH_MODE_2_BIT ((uint32_t)(0x00000002UL))
AnnaBridge 167:84c0a372a020 266 #define MXC_V_PT_RATE_LENGTH_MODE_3_BIT ((uint32_t)(0x00000003UL))
AnnaBridge 167:84c0a372a020 267 #define MXC_V_PT_RATE_LENGTH_MODE_4_BIT ((uint32_t)(0x00000004UL))
AnnaBridge 167:84c0a372a020 268 #define MXC_V_PT_RATE_LENGTH_MODE_5_BIT ((uint32_t)(0x00000005UL))
AnnaBridge 167:84c0a372a020 269 #define MXC_V_PT_RATE_LENGTH_MODE_6_BIT ((uint32_t)(0x00000006UL))
AnnaBridge 167:84c0a372a020 270 #define MXC_V_PT_RATE_LENGTH_MODE_7_BIT ((uint32_t)(0x00000007UL))
AnnaBridge 167:84c0a372a020 271 #define MXC_V_PT_RATE_LENGTH_MODE_8_BIT ((uint32_t)(0x00000008UL))
AnnaBridge 167:84c0a372a020 272 #define MXC_V_PT_RATE_LENGTH_MODE_9_BIT ((uint32_t)(0x00000009UL))
AnnaBridge 167:84c0a372a020 273 #define MXC_V_PT_RATE_LENGTH_MODE_10_BIT ((uint32_t)(0x0000000AUL))
AnnaBridge 167:84c0a372a020 274 #define MXC_V_PT_RATE_LENGTH_MODE_11_BIT ((uint32_t)(0x0000000BUL))
AnnaBridge 167:84c0a372a020 275 #define MXC_V_PT_RATE_LENGTH_MODE_12_BIT ((uint32_t)(0x0000000CUL))
AnnaBridge 167:84c0a372a020 276 #define MXC_V_PT_RATE_LENGTH_MODE_13_BIT ((uint32_t)(0x0000000DUL))
AnnaBridge 167:84c0a372a020 277 #define MXC_V_PT_RATE_LENGTH_MODE_14_BIT ((uint32_t)(0x0000000EUL))
AnnaBridge 167:84c0a372a020 278 #define MXC_V_PT_RATE_LENGTH_MODE_15_BIT ((uint32_t)(0x0000000FUL))
AnnaBridge 167:84c0a372a020 279 #define MXC_V_PT_RATE_LENGTH_MODE_16_BIT ((uint32_t)(0x00000010UL))
AnnaBridge 167:84c0a372a020 280 #define MXC_V_PT_RATE_LENGTH_MODE_17_BIT ((uint32_t)(0x00000011UL))
AnnaBridge 167:84c0a372a020 281 #define MXC_V_PT_RATE_LENGTH_MODE_18_BIT ((uint32_t)(0x00000012UL))
AnnaBridge 167:84c0a372a020 282 #define MXC_V_PT_RATE_LENGTH_MODE_19_BIT ((uint32_t)(0x00000013UL))
AnnaBridge 167:84c0a372a020 283 #define MXC_V_PT_RATE_LENGTH_MODE_20_BIT ((uint32_t)(0x00000014UL))
AnnaBridge 167:84c0a372a020 284 #define MXC_V_PT_RATE_LENGTH_MODE_21_BIT ((uint32_t)(0x00000015UL))
AnnaBridge 167:84c0a372a020 285 #define MXC_V_PT_RATE_LENGTH_MODE_22_BIT ((uint32_t)(0x00000016UL))
AnnaBridge 167:84c0a372a020 286 #define MXC_V_PT_RATE_LENGTH_MODE_23_BIT ((uint32_t)(0x00000017UL))
AnnaBridge 167:84c0a372a020 287 #define MXC_V_PT_RATE_LENGTH_MODE_24_BIT ((uint32_t)(0x00000018UL))
AnnaBridge 167:84c0a372a020 288 #define MXC_V_PT_RATE_LENGTH_MODE_25_BIT ((uint32_t)(0x00000019UL))
AnnaBridge 167:84c0a372a020 289 #define MXC_V_PT_RATE_LENGTH_MODE_26_BIT ((uint32_t)(0x0000001AUL))
AnnaBridge 167:84c0a372a020 290 #define MXC_V_PT_RATE_LENGTH_MODE_27_BIT ((uint32_t)(0x0000001BUL))
AnnaBridge 167:84c0a372a020 291 #define MXC_V_PT_RATE_LENGTH_MODE_28_BIT ((uint32_t)(0x0000001CUL))
AnnaBridge 167:84c0a372a020 292 #define MXC_V_PT_RATE_LENGTH_MODE_29_BIT ((uint32_t)(0x0000001DUL))
AnnaBridge 167:84c0a372a020 293 #define MXC_V_PT_RATE_LENGTH_MODE_30_BIT ((uint32_t)(0x0000001EUL))
AnnaBridge 167:84c0a372a020 294 #define MXC_V_PT_RATE_LENGTH_MODE_31_BIT ((uint32_t)(0x0000001FUL))
AnnaBridge 167:84c0a372a020 295
AnnaBridge 167:84c0a372a020 296 #define MXC_S_PT_RATE_LENGTH_MODE_32_BIT ((uint32_t)(MXC_V_PT_RATE_LENGTH_MODE_32_BIT << MXC_F_PT_RATE_LENGTH_MODE_POS))
AnnaBridge 167:84c0a372a020 297 #define MXC_S_PT_RATE_LENGTH_MODE_SQUARE_WAVE ((uint32_t)(MXC_V_PT_RATE_LENGTH_MODE_SQUARE_WAVE << MXC_F_PT_RATE_LENGTH_MODE_POS))
AnnaBridge 167:84c0a372a020 298 #define MXC_S_PT_RATE_LENGTH_MODE_2_BIT ((uint32_t)(MXC_V_PT_RATE_LENGTH_MODE_2_BIT << MXC_F_PT_RATE_LENGTH_MODE_POS))
AnnaBridge 167:84c0a372a020 299 #define MXC_S_PT_RATE_LENGTH_MODE_3_BIT ((uint32_t)(MXC_V_PT_RATE_LENGTH_MODE_3_BIT << MXC_F_PT_RATE_LENGTH_MODE_POS))
AnnaBridge 167:84c0a372a020 300 #define MXC_S_PT_RATE_LENGTH_MODE_4_BIT ((uint32_t)(MXC_V_PT_RATE_LENGTH_MODE_4_BIT << MXC_F_PT_RATE_LENGTH_MODE_POS))
AnnaBridge 167:84c0a372a020 301 #define MXC_S_PT_RATE_LENGTH_MODE_5_BIT ((uint32_t)(MXC_V_PT_RATE_LENGTH_MODE_5_BIT << MXC_F_PT_RATE_LENGTH_MODE_POS))
AnnaBridge 167:84c0a372a020 302 #define MXC_S_PT_RATE_LENGTH_MODE_6_BIT ((uint32_t)(MXC_V_PT_RATE_LENGTH_MODE_6_BIT << MXC_F_PT_RATE_LENGTH_MODE_POS))
AnnaBridge 167:84c0a372a020 303 #define MXC_S_PT_RATE_LENGTH_MODE_7_BIT ((uint32_t)(MXC_V_PT_RATE_LENGTH_MODE_7_BIT << MXC_F_PT_RATE_LENGTH_MODE_POS))
AnnaBridge 167:84c0a372a020 304 #define MXC_S_PT_RATE_LENGTH_MODE_8_BIT ((uint32_t)(MXC_V_PT_RATE_LENGTH_MODE_8_BIT << MXC_F_PT_RATE_LENGTH_MODE_POS))
AnnaBridge 167:84c0a372a020 305 #define MXC_S_PT_RATE_LENGTH_MODE_9_BIT ((uint32_t)(MXC_V_PT_RATE_LENGTH_MODE_9_BIT << MXC_F_PT_RATE_LENGTH_MODE_POS))
AnnaBridge 167:84c0a372a020 306 #define MXC_S_PT_RATE_LENGTH_MODE_10_BIT ((uint32_t)(MXC_V_PT_RATE_LENGTH_MODE_10_BIT << MXC_F_PT_RATE_LENGTH_MODE_POS))
AnnaBridge 167:84c0a372a020 307 #define MXC_S_PT_RATE_LENGTH_MODE_11_BIT ((uint32_t)(MXC_V_PT_RATE_LENGTH_MODE_11_BIT << MXC_F_PT_RATE_LENGTH_MODE_POS))
AnnaBridge 167:84c0a372a020 308 #define MXC_S_PT_RATE_LENGTH_MODE_12_BIT ((uint32_t)(MXC_V_PT_RATE_LENGTH_MODE_12_BIT << MXC_F_PT_RATE_LENGTH_MODE_POS))
AnnaBridge 167:84c0a372a020 309 #define MXC_S_PT_RATE_LENGTH_MODE_13_BIT ((uint32_t)(MXC_V_PT_RATE_LENGTH_MODE_13_BIT << MXC_F_PT_RATE_LENGTH_MODE_POS))
AnnaBridge 167:84c0a372a020 310 #define MXC_S_PT_RATE_LENGTH_MODE_14_BIT ((uint32_t)(MXC_V_PT_RATE_LENGTH_MODE_14_BIT << MXC_F_PT_RATE_LENGTH_MODE_POS))
AnnaBridge 167:84c0a372a020 311 #define MXC_S_PT_RATE_LENGTH_MODE_15_BIT ((uint32_t)(MXC_V_PT_RATE_LENGTH_MODE_15_BIT << MXC_F_PT_RATE_LENGTH_MODE_POS))
AnnaBridge 167:84c0a372a020 312 #define MXC_S_PT_RATE_LENGTH_MODE_16_BIT ((uint32_t)(MXC_V_PT_RATE_LENGTH_MODE_16_BIT << MXC_F_PT_RATE_LENGTH_MODE_POS))
AnnaBridge 167:84c0a372a020 313 #define MXC_S_PT_RATE_LENGTH_MODE_17_BIT ((uint32_t)(MXC_V_PT_RATE_LENGTH_MODE_17_BIT << MXC_F_PT_RATE_LENGTH_MODE_POS))
AnnaBridge 167:84c0a372a020 314 #define MXC_S_PT_RATE_LENGTH_MODE_18_BIT ((uint32_t)(MXC_V_PT_RATE_LENGTH_MODE_18_BIT << MXC_F_PT_RATE_LENGTH_MODE_POS))
AnnaBridge 167:84c0a372a020 315 #define MXC_S_PT_RATE_LENGTH_MODE_19_BIT ((uint32_t)(MXC_V_PT_RATE_LENGTH_MODE_19_BIT << MXC_F_PT_RATE_LENGTH_MODE_POS))
AnnaBridge 167:84c0a372a020 316 #define MXC_S_PT_RATE_LENGTH_MODE_20_BIT ((uint32_t)(MXC_V_PT_RATE_LENGTH_MODE_20_BIT << MXC_F_PT_RATE_LENGTH_MODE_POS))
AnnaBridge 167:84c0a372a020 317 #define MXC_S_PT_RATE_LENGTH_MODE_21_BIT ((uint32_t)(MXC_V_PT_RATE_LENGTH_MODE_21_BIT << MXC_F_PT_RATE_LENGTH_MODE_POS))
AnnaBridge 167:84c0a372a020 318 #define MXC_S_PT_RATE_LENGTH_MODE_22_BIT ((uint32_t)(MXC_V_PT_RATE_LENGTH_MODE_22_BIT << MXC_F_PT_RATE_LENGTH_MODE_POS))
AnnaBridge 167:84c0a372a020 319 #define MXC_S_PT_RATE_LENGTH_MODE_23_BIT ((uint32_t)(MXC_V_PT_RATE_LENGTH_MODE_23_BIT << MXC_F_PT_RATE_LENGTH_MODE_POS))
AnnaBridge 167:84c0a372a020 320 #define MXC_S_PT_RATE_LENGTH_MODE_24_BIT ((uint32_t)(MXC_V_PT_RATE_LENGTH_MODE_24_BIT << MXC_F_PT_RATE_LENGTH_MODE_POS))
AnnaBridge 167:84c0a372a020 321 #define MXC_S_PT_RATE_LENGTH_MODE_25_BIT ((uint32_t)(MXC_V_PT_RATE_LENGTH_MODE_25_BIT << MXC_F_PT_RATE_LENGTH_MODE_POS))
AnnaBridge 167:84c0a372a020 322 #define MXC_S_PT_RATE_LENGTH_MODE_26_BIT ((uint32_t)(MXC_V_PT_RATE_LENGTH_MODE_26_BIT << MXC_F_PT_RATE_LENGTH_MODE_POS))
AnnaBridge 167:84c0a372a020 323 #define MXC_S_PT_RATE_LENGTH_MODE_27_BIT ((uint32_t)(MXC_V_PT_RATE_LENGTH_MODE_27_BIT << MXC_F_PT_RATE_LENGTH_MODE_POS))
AnnaBridge 167:84c0a372a020 324 #define MXC_S_PT_RATE_LENGTH_MODE_28_BIT ((uint32_t)(MXC_V_PT_RATE_LENGTH_MODE_28_BIT << MXC_F_PT_RATE_LENGTH_MODE_POS))
AnnaBridge 167:84c0a372a020 325 #define MXC_S_PT_RATE_LENGTH_MODE_29_BIT ((uint32_t)(MXC_V_PT_RATE_LENGTH_MODE_29_BIT << MXC_F_PT_RATE_LENGTH_MODE_POS))
AnnaBridge 167:84c0a372a020 326 #define MXC_S_PT_RATE_LENGTH_MODE_30_BIT ((uint32_t)(MXC_V_PT_RATE_LENGTH_MODE_30_BIT << MXC_F_PT_RATE_LENGTH_MODE_POS))
AnnaBridge 167:84c0a372a020 327 #define MXC_S_PT_RATE_LENGTH_MODE_31_BIT ((uint32_t)(MXC_V_PT_RATE_LENGTH_MODE_31_BIT << MXC_F_PT_RATE_LENGTH_MODE_POS))
AnnaBridge 167:84c0a372a020 328
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AnnaBridge 167:84c0a372a020 330
AnnaBridge 167:84c0a372a020 331 #ifdef __cplusplus
AnnaBridge 167:84c0a372a020 332 }
AnnaBridge 167:84c0a372a020 333 #endif
AnnaBridge 167:84c0a372a020 334
AnnaBridge 167:84c0a372a020 335 #endif /* _MXC_PT_REGS_H_ */
AnnaBridge 167:84c0a372a020 336