mbed official / mbed

The official Mbed 2 C/C++ SDK provides the software platform and libraries to build your applications.

Dependents:   hello SerialTestv11 SerialTestv12 Sierpinski ... more

mbed 2

This is the mbed 2 library. If you'd like to learn about Mbed OS please see the mbed-os docs.

TARGET_SDT32620B/TOOLCHAIN_IAR/gpio.h@172:65be27845400, 2019-02-20 (annotated)

Committer:
AnnaBridge
Date:
Wed Feb 20 20:53:29 2019 +0000
Revision:
172:65be27845400
Parent:
171:3a7713b1edbc 
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 167:84c0a372a020 1 /**
AnnaBridge 167:84c0a372a020 2 * @file
AnnaBridge 167:84c0a372a020 3 * @brief General-Purpose Input/Output (GPIO) function prototypes and data types.
AnnaBridge 167:84c0a372a020 4 */
AnnaBridge 167:84c0a372a020 5
AnnaBridge 167:84c0a372a020 6 /* ****************************************************************************
AnnaBridge 167:84c0a372a020 7 * Copyright (C) 2016 Maxim Integrated Products, Inc., All Rights Reserved.
AnnaBridge 167:84c0a372a020 8 *
AnnaBridge 167:84c0a372a020 9 * Permission is hereby granted, free of charge, to any person obtaining a
AnnaBridge 167:84c0a372a020 10 * copy of this software and associated documentation files (the "Software"),
AnnaBridge 167:84c0a372a020 11 * to deal in the Software without restriction, including without limitation
AnnaBridge 167:84c0a372a020 12 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
AnnaBridge 167:84c0a372a020 13 * and/or sell copies of the Software, and to permit persons to whom the
AnnaBridge 167:84c0a372a020 14 * Software is furnished to do so, subject to the following conditions:
AnnaBridge 167:84c0a372a020 15 *
AnnaBridge 167:84c0a372a020 16 * The above copyright notice and this permission notice shall be included
AnnaBridge 167:84c0a372a020 17 * in all copies or substantial portions of the Software.
AnnaBridge 167:84c0a372a020 18 *
AnnaBridge 167:84c0a372a020 19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
AnnaBridge 167:84c0a372a020 20 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
AnnaBridge 167:84c0a372a020 21 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
AnnaBridge 167:84c0a372a020 22 * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
AnnaBridge 167:84c0a372a020 23 * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
AnnaBridge 167:84c0a372a020 24 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
AnnaBridge 167:84c0a372a020 25 * OTHER DEALINGS IN THE SOFTWARE.
AnnaBridge 167:84c0a372a020 26 *
AnnaBridge 167:84c0a372a020 27 * Except as contained in this notice, the name of Maxim Integrated
AnnaBridge 167:84c0a372a020 28 * Products, Inc. shall not be used except as stated in the Maxim Integrated
AnnaBridge 167:84c0a372a020 29 * Products, Inc. Branding Policy.
AnnaBridge 167:84c0a372a020 30 *
AnnaBridge 167:84c0a372a020 31 * The mere transfer of this software does not imply any licenses
AnnaBridge 167:84c0a372a020 32 * of trade secrets, proprietary technology, copyrights, patents,
AnnaBridge 167:84c0a372a020 33 * trademarks, maskwork rights, or any other form of intellectual
AnnaBridge 167:84c0a372a020 34 * property whatsoever. Maxim Integrated Products, Inc. retains all
AnnaBridge 167:84c0a372a020 35 * ownership rights.
AnnaBridge 167:84c0a372a020 36 *
AnnaBridge 167:84c0a372a020 37 * $Date: 2016-10-10 18:56:06 -0500 (Mon, 10 Oct 2016) $
AnnaBridge 167:84c0a372a020 38 * $Revision: 24659 $
AnnaBridge 167:84c0a372a020 39 *
AnnaBridge 167:84c0a372a020 40 *************************************************************************** */
AnnaBridge 167:84c0a372a020 41
AnnaBridge 167:84c0a372a020 42 /* Define to prevent redundant inclusion */
AnnaBridge 167:84c0a372a020 43 #ifndef _GPIO_H_
AnnaBridge 167:84c0a372a020 44 #define _GPIO_H_
AnnaBridge 167:84c0a372a020 45
AnnaBridge 167:84c0a372a020 46 /* **** Includes **** */
AnnaBridge 167:84c0a372a020 47 #include "mxc_config.h"
AnnaBridge 167:84c0a372a020 48 #include "gpio_regs.h"
AnnaBridge 167:84c0a372a020 49
AnnaBridge 167:84c0a372a020 50 #ifdef __cplusplus
AnnaBridge 167:84c0a372a020 51 extern "C" {
AnnaBridge 167:84c0a372a020 52 #endif
AnnaBridge 167:84c0a372a020 53
AnnaBridge 167:84c0a372a020 54 // Doxy group definition for this peripheral module
AnnaBridge 167:84c0a372a020 55 /**
AnnaBridge 167:84c0a372a020 56 * @ingroup periphlibs
AnnaBridge 167:84c0a372a020 57 * @defgroup gpio General-Purpose Input/Output (GPIO)
AnnaBridge 167:84c0a372a020 58 * @{
AnnaBridge 167:84c0a372a020 59 */
AnnaBridge 167:84c0a372a020 60
AnnaBridge 167:84c0a372a020 61 /* **** Definitions **** */
AnnaBridge 167:84c0a372a020 62 /**
AnnaBridge 167:84c0a372a020 63 * @defgroup gpio_port_pin Port and Pin Definitions
AnnaBridge 167:84c0a372a020 64 * @ingroup gpio
AnnaBridge 167:84c0a372a020 65 * @{
AnnaBridge 167:84c0a372a020 66 * @defgroup gpio_port Port Definitions
AnnaBridge 167:84c0a372a020 67 * @ingroup gpio_port_pin
AnnaBridge 167:84c0a372a020 68 * @{
AnnaBridge 167:84c0a372a020 69 */
AnnaBridge 167:84c0a372a020 70 #define PORT_0 (0) /**< Port 0 Define*/
AnnaBridge 167:84c0a372a020 71 #define PORT_1 (1) /**< Port 1 Define*/
AnnaBridge 167:84c0a372a020 72 #define PORT_2 (2) /**< Port 2 Define*/
AnnaBridge 167:84c0a372a020 73 #define PORT_3 (3) /**< Port 3 Define*/
AnnaBridge 167:84c0a372a020 74 #define PORT_4 (4) /**< Port 4 Define*/
AnnaBridge 167:84c0a372a020 75 #define PORT_5 (5) /**< Port 5 Define*/
AnnaBridge 167:84c0a372a020 76 #define PORT_6 (6) /**< Port 6 Define*/
AnnaBridge 167:84c0a372a020 77 #define PORT_7 (7) /**< Port 7 Define*/
AnnaBridge 167:84c0a372a020 78 #define PORT_8 (8) /**< Port 8 Define*/
AnnaBridge 167:84c0a372a020 79 #define PORT_9 (9) /**< Port 9 Define*/
AnnaBridge 167:84c0a372a020 80 #define PORT_10 (10) /**< Port 10 Define*/
AnnaBridge 167:84c0a372a020 81 #define PORT_11 (11) /**< Port 11 Define*/
AnnaBridge 167:84c0a372a020 82 #define PORT_12 (12) /**< Port 12 Define*/
AnnaBridge 167:84c0a372a020 83 #define PORT_13 (13) /**< Port 13 Define*/
AnnaBridge 167:84c0a372a020 84 #define PORT_14 (14) /**< Port 14 Define*/
AnnaBridge 167:84c0a372a020 85 #define PORT_15 (15) /**< Port 15 Define*/
AnnaBridge 167:84c0a372a020 86 /**@} end of gpio_port group*/
AnnaBridge 167:84c0a372a020 87 /**
AnnaBridge 167:84c0a372a020 88 * @defgroup gpio_pin Pin Definitions
AnnaBridge 167:84c0a372a020 89 * @ingroup gpio_port_pin
AnnaBridge 167:84c0a372a020 90 * @{
AnnaBridge 167:84c0a372a020 91 */
AnnaBridge 167:84c0a372a020 92 #define PIN_0 (1 << 0) /**< Pin 0 Define */
AnnaBridge 167:84c0a372a020 93 #define PIN_1 (1 << 1) /**< Pin 1 Define */
AnnaBridge 167:84c0a372a020 94 #define PIN_2 (1 << 2) /**< Pin 2 Define */
AnnaBridge 167:84c0a372a020 95 #define PIN_3 (1 << 3) /**< Pin 3 Define */
AnnaBridge 167:84c0a372a020 96 #define PIN_4 (1 << 4) /**< Pin 4 Define */
AnnaBridge 167:84c0a372a020 97 #define PIN_5 (1 << 5) /**< Pin 5 Define */
AnnaBridge 167:84c0a372a020 98 #define PIN_6 (1 << 6) /**< Pin 6 Define */
AnnaBridge 167:84c0a372a020 99 #define PIN_7 (1 << 7) /**< Pin 7 Define */
AnnaBridge 167:84c0a372a020 100 /**@} end of gpio_pin group */
AnnaBridge 167:84c0a372a020 101 /**@} end of gpio_port_pin group */
AnnaBridge 167:84c0a372a020 102
AnnaBridge 167:84c0a372a020 103 /**
AnnaBridge 167:84c0a372a020 104 * Enumeration type for the GPIO Function Type
AnnaBridge 167:84c0a372a020 105 */
AnnaBridge 167:84c0a372a020 106 typedef enum {
AnnaBridge 167:84c0a372a020 107 GPIO_FUNC_GPIO = MXC_V_GPIO_FUNC_SEL_MODE_GPIO, /**< GPIO Function Selection */
AnnaBridge 167:84c0a372a020 108 GPIO_FUNC_PT = MXC_V_GPIO_FUNC_SEL_MODE_PT, /**< Pulse Train Function Selection */
AnnaBridge 167:84c0a372a020 109 GPIO_FUNC_TMR = MXC_V_GPIO_FUNC_SEL_MODE_TMR /**< Timer Function Selection */
AnnaBridge 167:84c0a372a020 110 }
AnnaBridge 167:84c0a372a020 111 gpio_func_t;
AnnaBridge 167:84c0a372a020 112
AnnaBridge 167:84c0a372a020 113 /**
AnnaBridge 167:84c0a372a020 114 * Enumeration type for the type of GPIO pad on a given pin.
AnnaBridge 167:84c0a372a020 115 */
AnnaBridge 167:84c0a372a020 116 typedef enum {
AnnaBridge 167:84c0a372a020 117 GPIO_PAD_INPUT_PULLUP = MXC_V_GPIO_OUT_MODE_HIGH_Z_WEAK_PULLUP, /**< Set pad to high impedance, weak pull-up */
AnnaBridge 167:84c0a372a020 118 GPIO_PAD_OPEN_DRAIN = MXC_V_GPIO_OUT_MODE_OPEN_DRAIN, /**< Set pad to open-drain with high impedance with input buffer */
AnnaBridge 167:84c0a372a020 119 GPIO_PAD_OPEN_DRAIN_PULLUP = MXC_V_GPIO_OUT_MODE_OPEN_DRAIN_WEAK_PULLUP, /**< Set pad to open-drain with weak pull-up */
AnnaBridge 167:84c0a372a020 120 GPIO_PAD_INPUT = MXC_V_GPIO_OUT_MODE_NORMAL_HIGH_Z, /**< Set pad to high impednace, input buffer enabled */
AnnaBridge 167:84c0a372a020 121 GPIO_PAD_NORMAL = MXC_V_GPIO_OUT_MODE_NORMAL, /**< Set pad to normal drive mode for high an low output */
AnnaBridge 167:84c0a372a020 122 GPIO_PAD_SLOW = MXC_V_GPIO_OUT_MODE_SLOW_DRIVE, /**< Set pad to slow drive mode, which is normal mode with negative feedback to slow edge transitions */
AnnaBridge 167:84c0a372a020 123 GPIO_PAD_FAST = MXC_V_GPIO_OUT_MODE_FAST_DRIVE, /**< Set pad to fash drive mode, which is normal mode with a transistor drive to drive fast high and low */
AnnaBridge 167:84c0a372a020 124 GPIO_PAD_INPUT_PULLDOWN = MXC_V_GPIO_OUT_MODE_HIGH_Z_WEAK_PULLDOWN, /**< Set pad to weak pulldown mode */
AnnaBridge 167:84c0a372a020 125 GPIO_PAD_OPEN_SOURCE = MXC_V_GPIO_OUT_MODE_OPEN_SOURCE, /**< Set pad to open source mode, transistor drive to high */
AnnaBridge 167:84c0a372a020 126 GPIO_PAD_OPEN_SOURCE_PULLDOWN = MXC_V_GPIO_OUT_MODE_OPEN_SOURCE_WEAK_PULLDOWN /**< Set pad to open source with weak pulldown mode, transistor drive to high, weak pulldown to GND for low */
AnnaBridge 167:84c0a372a020 127 } gpio_pad_t;
AnnaBridge 167:84c0a372a020 128
AnnaBridge 167:84c0a372a020 129 /**
AnnaBridge 167:84c0a372a020 130 * Structure type for configuring a GPIO port.
AnnaBridge 167:84c0a372a020 131 */
AnnaBridge 167:84c0a372a020 132 typedef struct {
AnnaBridge 167:84c0a372a020 133 uint32_t port; /// Index of GPIO port
AnnaBridge 167:84c0a372a020 134 uint32_t mask; /// Pin mask. Multiple bits can be set.
AnnaBridge 167:84c0a372a020 135 gpio_func_t func; /// Function type
AnnaBridge 167:84c0a372a020 136 gpio_pad_t pad; /// Pad type
AnnaBridge 167:84c0a372a020 137 } gpio_cfg_t;
AnnaBridge 167:84c0a372a020 138
AnnaBridge 167:84c0a372a020 139 /**
AnnaBridge 167:84c0a372a020 140 * Enumeration type for the interrupt type on a GPIO port.
AnnaBridge 167:84c0a372a020 141 */
AnnaBridge 167:84c0a372a020 142 typedef enum {
AnnaBridge 167:84c0a372a020 143 GPIO_INT_DISABLE = MXC_V_GPIO_INT_MODE_DISABLE, /**< Disable interrupts */
AnnaBridge 167:84c0a372a020 144 GPIO_INT_FALLING_EDGE = MXC_V_GPIO_INT_MODE_FALLING_EDGE, /**< Interrupt on Falling Edge */
AnnaBridge 167:84c0a372a020 145 GPIO_INT_RISING_EDGE = MXC_V_GPIO_INT_MODE_RISING_EDGE, /**< Interrupt on Rising Edge */
AnnaBridge 167:84c0a372a020 146 GPIO_INT_ANY_EDGE = MXC_V_GPIO_INT_MODE_ANY_EDGE, /**< Interrupt on Falling or Rising Edge */
AnnaBridge 167:84c0a372a020 147 GPIO_INT_LOW_LEVEL = MXC_V_GPIO_INT_MODE_LOW_LVL, /**< Interrupt on a low level input detection */
AnnaBridge 167:84c0a372a020 148 GPIO_INT_HIGH_LEVEL = MXC_V_GPIO_INT_MODE_HIGH_LVL /**< Interrupt on a high level input detection */
AnnaBridge 167:84c0a372a020 149 } gpio_int_mode_t;
AnnaBridge 167:84c0a372a020 150
AnnaBridge 167:84c0a372a020 151 /* **** Function Prototypes **** */
AnnaBridge 167:84c0a372a020 152
AnnaBridge 167:84c0a372a020 153 /**
AnnaBridge 167:84c0a372a020 154 * @brief Configure GPIO pin(s).
AnnaBridge 167:84c0a372a020 155 * @param cfg Pointer to configuration structure describing the pin.
AnnaBridge 167:84c0a372a020 156 *
AnnaBridge 167:84c0a372a020 157 * @return #E_NO_ERROR if everything is successful.
AnnaBridge 167:84c0a372a020 158 *
AnnaBridge 167:84c0a372a020 159 */
AnnaBridge 167:84c0a372a020 160 int GPIO_Config(const gpio_cfg_t *cfg);
AnnaBridge 167:84c0a372a020 161
AnnaBridge 167:84c0a372a020 162 /**
AnnaBridge 167:84c0a372a020 163 * @brief Gets the pin(s) input state.
AnnaBridge 167:84c0a372a020 164 * @param cfg Pointer to configuration structure describing the pin.
AnnaBridge 167:84c0a372a020 165 *
AnnaBridge 167:84c0a372a020 166 * @return The requested pin state.
AnnaBridge 167:84c0a372a020 167 *
AnnaBridge 167:84c0a372a020 168 */
AnnaBridge 167:84c0a372a020 169 __STATIC_INLINE uint32_t GPIO_InGet(const gpio_cfg_t *cfg)
AnnaBridge 167:84c0a372a020 170 {
AnnaBridge 167:84c0a372a020 171 return (MXC_GPIO->in_val[cfg->port] & cfg->mask);
AnnaBridge 167:84c0a372a020 172 }
AnnaBridge 167:84c0a372a020 173
AnnaBridge 167:84c0a372a020 174 /**
AnnaBridge 167:84c0a372a020 175 * @brief Sets the pin(s) to a high level output.
AnnaBridge 167:84c0a372a020 176 * @param cfg Pointer to configuration structure describing the pin.
AnnaBridge 167:84c0a372a020 177 *
AnnaBridge 167:84c0a372a020 178 */
AnnaBridge 167:84c0a372a020 179 __STATIC_INLINE void GPIO_OutSet(const gpio_cfg_t *cfg)
AnnaBridge 167:84c0a372a020 180 {
AnnaBridge 167:84c0a372a020 181 MXC_GPIO->out_val[cfg->port] |= cfg->mask;
AnnaBridge 167:84c0a372a020 182 }
AnnaBridge 167:84c0a372a020 183
AnnaBridge 167:84c0a372a020 184 /**
AnnaBridge 167:84c0a372a020 185 * @brief Clears the pin(s) to a low level output.
AnnaBridge 167:84c0a372a020 186 * @param cfg Pointer to configuration structure describing the pin.
AnnaBridge 167:84c0a372a020 187 *
AnnaBridge 167:84c0a372a020 188 */
AnnaBridge 167:84c0a372a020 189 __STATIC_INLINE void GPIO_OutClr(const gpio_cfg_t *cfg)
AnnaBridge 167:84c0a372a020 190 {
AnnaBridge 167:84c0a372a020 191 MXC_GPIO->out_val[cfg->port] &= ~(cfg->mask);
AnnaBridge 167:84c0a372a020 192 }
AnnaBridge 167:84c0a372a020 193
AnnaBridge 167:84c0a372a020 194 /**
AnnaBridge 167:84c0a372a020 195 * @brief Gets the pin(s) output state.
AnnaBridge 167:84c0a372a020 196 * @param cfg Pointer to configuration structure describing the pin.
AnnaBridge 167:84c0a372a020 197 *
AnnaBridge 167:84c0a372a020 198 * @return The state of the requested pin.
AnnaBridge 167:84c0a372a020 199 *
AnnaBridge 167:84c0a372a020 200 */
AnnaBridge 167:84c0a372a020 201 __STATIC_INLINE uint32_t GPIO_OutGet(const gpio_cfg_t *cfg)
AnnaBridge 167:84c0a372a020 202 {
AnnaBridge 167:84c0a372a020 203 return (MXC_GPIO->out_val[cfg->port] & cfg->mask);
AnnaBridge 167:84c0a372a020 204 }
AnnaBridge 167:84c0a372a020 205
AnnaBridge 167:84c0a372a020 206 /**
AnnaBridge 167:84c0a372a020 207 * @brief Write the pin(s) to a desired output level.
AnnaBridge 167:84c0a372a020 208 * @param cfg Pointer to configuration structure describing the pin.
AnnaBridge 167:84c0a372a020 209 * @param val Desired output level of the pin(s). This will be masked
AnnaBridge 167:84c0a372a020 210 * with the configuration mask.
AnnaBridge 167:84c0a372a020 211 *
AnnaBridge 167:84c0a372a020 212 */
AnnaBridge 167:84c0a372a020 213 __STATIC_INLINE void GPIO_OutPut(const gpio_cfg_t *cfg, uint32_t val)
AnnaBridge 167:84c0a372a020 214 {
AnnaBridge 167:84c0a372a020 215 MXC_GPIO->out_val[cfg->port] = (MXC_GPIO->out_val[cfg->port] & ~cfg->mask) | (val & cfg->mask);
AnnaBridge 167:84c0a372a020 216 }
AnnaBridge 167:84c0a372a020 217
AnnaBridge 167:84c0a372a020 218 /**
AnnaBridge 167:84c0a372a020 219 * @brief Toggles the the pin(s) output level.
AnnaBridge 167:84c0a372a020 220 * @param cfg Pointer to configuration structure describing the pin.
AnnaBridge 167:84c0a372a020 221 *
AnnaBridge 167:84c0a372a020 222 */
AnnaBridge 167:84c0a372a020 223 __STATIC_INLINE void GPIO_OutToggle(const gpio_cfg_t *cfg)
AnnaBridge 167:84c0a372a020 224 {
AnnaBridge 167:84c0a372a020 225 MXC_GPIO->out_val[cfg->port] ^= cfg->mask;
AnnaBridge 167:84c0a372a020 226 }
AnnaBridge 167:84c0a372a020 227
AnnaBridge 167:84c0a372a020 228 /**
AnnaBridge 167:84c0a372a020 229 * @brief Configure GPIO interrupt(s)
AnnaBridge 167:84c0a372a020 230 * @param cfg Pointer to configuration structure describing the pin.
AnnaBridge 167:84c0a372a020 231 * @param mode Requested interrupt mode.
AnnaBridge 167:84c0a372a020 232 *
AnnaBridge 167:84c0a372a020 233 */
AnnaBridge 167:84c0a372a020 234 void GPIO_IntConfig(const gpio_cfg_t *cfg, gpio_int_mode_t mode);
AnnaBridge 167:84c0a372a020 235
AnnaBridge 167:84c0a372a020 236 /**
AnnaBridge 167:84c0a372a020 237 * @brief Enables the specified GPIO interrupt
AnnaBridge 167:84c0a372a020 238 * @param cfg Pointer to configuration structure describing the pin.
AnnaBridge 167:84c0a372a020 239 *
AnnaBridge 167:84c0a372a020 240 */
AnnaBridge 167:84c0a372a020 241 __STATIC_INLINE void GPIO_IntEnable(const gpio_cfg_t *cfg)
AnnaBridge 167:84c0a372a020 242 {
AnnaBridge 167:84c0a372a020 243 MXC_GPIO->inten[cfg->port] |= cfg->mask;
AnnaBridge 167:84c0a372a020 244 }
AnnaBridge 167:84c0a372a020 245
AnnaBridge 167:84c0a372a020 246 /**
AnnaBridge 167:84c0a372a020 247 * @brief Disables the specified GPIO interrupt.
AnnaBridge 167:84c0a372a020 248 * @param cfg Pointer to configuration structure describing the pin.
AnnaBridge 167:84c0a372a020 249 *
AnnaBridge 167:84c0a372a020 250 */
AnnaBridge 167:84c0a372a020 251 __STATIC_INLINE void GPIO_IntDisable(const gpio_cfg_t *cfg)
AnnaBridge 167:84c0a372a020 252 {
AnnaBridge 167:84c0a372a020 253 MXC_GPIO->inten[cfg->port] &= ~cfg->mask;
AnnaBridge 167:84c0a372a020 254 }
AnnaBridge 167:84c0a372a020 255
AnnaBridge 167:84c0a372a020 256 /**
AnnaBridge 167:84c0a372a020 257 * @brief Gets the interrupt(s) status on a GPIO pin.
AnnaBridge 167:84c0a372a020 258 * @param cfg Pointer to configuration structure describing the pin
AnnaBridge 167:84c0a372a020 259 * for which the status is being requested.
AnnaBridge 167:84c0a372a020 260 *
AnnaBridge 167:84c0a372a020 261 * @return The requested interrupt status.
AnnaBridge 167:84c0a372a020 262 *
AnnaBridge 167:84c0a372a020 263 */
AnnaBridge 167:84c0a372a020 264 __STATIC_INLINE uint32_t GPIO_IntStatus(const gpio_cfg_t *cfg)
AnnaBridge 167:84c0a372a020 265 {
AnnaBridge 167:84c0a372a020 266 return (MXC_GPIO->intfl[cfg->port] & cfg->mask);
AnnaBridge 167:84c0a372a020 267 }
AnnaBridge 167:84c0a372a020 268
AnnaBridge 167:84c0a372a020 269 /**
AnnaBridge 167:84c0a372a020 270 * @brief Clears the interrupt(s) status on a GPIO pin.
AnnaBridge 167:84c0a372a020 271 * @param cfg Pointer to configuration structure describing the pin
AnnaBridge 167:84c0a372a020 272 * to clear the interrupt state of.
AnnaBridge 167:84c0a372a020 273 *
AnnaBridge 167:84c0a372a020 274 */
AnnaBridge 167:84c0a372a020 275 __STATIC_INLINE void GPIO_IntClr(const gpio_cfg_t *cfg)
AnnaBridge 167:84c0a372a020 276 {
AnnaBridge 167:84c0a372a020 277 MXC_GPIO->intfl[cfg->port] = cfg->mask;
AnnaBridge 167:84c0a372a020 278 }
AnnaBridge 167:84c0a372a020 279
AnnaBridge 167:84c0a372a020 280 /**
AnnaBridge 167:84c0a372a020 281 * @brief Type alias for a GPIO callback function with prototype:
AnnaBridge 167:84c0a372a020 282 * @code
AnnaBridge 167:84c0a372a020 283 * void callback_fn(void *cbdata);
AnnaBridge 167:84c0a372a020 284 * @endcode
AnnaBridge 167:84c0a372a020 285 * @param cbdata A void pointer to the data type as registered when
AnnaBridge 167:84c0a372a020 286 * @c GPIO_RegisterCallback() was called.
AnnaBridge 167:84c0a372a020 287 *
AnnaBridge 167:84c0a372a020 288 */
AnnaBridge 167:84c0a372a020 289 typedef void (*gpio_callback_fn)(void *cbdata);
AnnaBridge 167:84c0a372a020 290
AnnaBridge 167:84c0a372a020 291 /**
AnnaBridge 167:84c0a372a020 292 * @brief Registers a callback for the interrupt on a given port and pin.
AnnaBridge 167:84c0a372a020 293 * @param cfg Pointer to configuration structure describing the pin
AnnaBridge 167:84c0a372a020 294 * @param callback A pointer to a function of type #gpio_callback_fn.
AnnaBridge 167:84c0a372a020 295 * @param cbdata The parameter to be passed to the callback function, #gpio_callback_fn, when an interrupt occurs.
AnnaBridge 167:84c0a372a020 296 *
AnnaBridge 167:84c0a372a020 297 */
AnnaBridge 167:84c0a372a020 298 void GPIO_RegisterCallback(const gpio_cfg_t *cfg, gpio_callback_fn callback, void *cbdata);
AnnaBridge 167:84c0a372a020 299
AnnaBridge 167:84c0a372a020 300 /**
AnnaBridge 167:84c0a372a020 301 * @brief GPIO IRQ Handler. @note If a callback is registered for a given
AnnaBridge 167:84c0a372a020 302 * interrupt, the callback function will be called.
AnnaBridge 167:84c0a372a020 303 *
AnnaBridge 167:84c0a372a020 304 * @param port number of the port that generated the interrupt service routine.
AnnaBridge 167:84c0a372a020 305 *
AnnaBridge 167:84c0a372a020 306 */
AnnaBridge 167:84c0a372a020 307 void GPIO_Handler(unsigned int port);
AnnaBridge 167:84c0a372a020 308
AnnaBridge 167:84c0a372a020 309 /**@} end of group gpio */
AnnaBridge 167:84c0a372a020 310
AnnaBridge 167:84c0a372a020 311 #ifdef __cplusplus
AnnaBridge 167:84c0a372a020 312 }
AnnaBridge 167:84c0a372a020 313 #endif
AnnaBridge 167:84c0a372a020 314
AnnaBridge 167:84c0a372a020 315 #endif /* _GPIO_H_ */