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TARGET_MAX32600MBED/TOOLCHAIN_IAR/usb_regs.h@172:65be27845400, 2019-02-20 (annotated)
- Committer:
- AnnaBridge
- Date:
- Wed Feb 20 20:53:29 2019 +0000
- Revision:
- 172:65be27845400
- Parent:
- 171:3a7713b1edbc
mbed library release version 165
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
AnnaBridge | 171:3a7713b1edbc | 1 | /******************************************************************************* |
AnnaBridge | 171:3a7713b1edbc | 2 | * Copyright (C) 2015 Maxim Integrated Products, Inc., All Rights Reserved. |
AnnaBridge | 171:3a7713b1edbc | 3 | * |
AnnaBridge | 171:3a7713b1edbc | 4 | * Permission is hereby granted, free of charge, to any person obtaining a |
AnnaBridge | 171:3a7713b1edbc | 5 | * copy of this software and associated documentation files (the "Software"), |
AnnaBridge | 171:3a7713b1edbc | 6 | * to deal in the Software without restriction, including without limitation |
AnnaBridge | 171:3a7713b1edbc | 7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
AnnaBridge | 171:3a7713b1edbc | 8 | * and/or sell copies of the Software, and to permit persons to whom the |
AnnaBridge | 171:3a7713b1edbc | 9 | * Software is furnished to do so, subject to the following conditions: |
AnnaBridge | 171:3a7713b1edbc | 10 | * |
AnnaBridge | 171:3a7713b1edbc | 11 | * The above copyright notice and this permission notice shall be included |
AnnaBridge | 171:3a7713b1edbc | 12 | * in all copies or substantial portions of the Software. |
AnnaBridge | 171:3a7713b1edbc | 13 | * |
AnnaBridge | 171:3a7713b1edbc | 14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS |
AnnaBridge | 171:3a7713b1edbc | 15 | * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF |
AnnaBridge | 171:3a7713b1edbc | 16 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. |
AnnaBridge | 171:3a7713b1edbc | 17 | * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES |
AnnaBridge | 171:3a7713b1edbc | 18 | * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, |
AnnaBridge | 171:3a7713b1edbc | 19 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR |
AnnaBridge | 171:3a7713b1edbc | 20 | * OTHER DEALINGS IN THE SOFTWARE. |
AnnaBridge | 171:3a7713b1edbc | 21 | * |
AnnaBridge | 171:3a7713b1edbc | 22 | * Except as contained in this notice, the name of Maxim Integrated |
AnnaBridge | 171:3a7713b1edbc | 23 | * Products, Inc. shall not be used except as stated in the Maxim Integrated |
AnnaBridge | 171:3a7713b1edbc | 24 | * Products, Inc. Branding Policy. |
AnnaBridge | 171:3a7713b1edbc | 25 | * |
AnnaBridge | 171:3a7713b1edbc | 26 | * The mere transfer of this software does not imply any licenses |
AnnaBridge | 171:3a7713b1edbc | 27 | * of trade secrets, proprietary technology, copyrights, patents, |
AnnaBridge | 171:3a7713b1edbc | 28 | * trademarks, maskwork rights, or any other form of intellectual |
AnnaBridge | 171:3a7713b1edbc | 29 | * property whatsoever. Maxim Integrated Products, Inc. retains all |
AnnaBridge | 171:3a7713b1edbc | 30 | * ownership rights. |
AnnaBridge | 171:3a7713b1edbc | 31 | ******************************************************************************* |
AnnaBridge | 171:3a7713b1edbc | 32 | */ |
AnnaBridge | 171:3a7713b1edbc | 33 | |
AnnaBridge | 171:3a7713b1edbc | 34 | #ifndef _MXC_USB_REGS_H_ |
AnnaBridge | 171:3a7713b1edbc | 35 | #define _MXC_USB_REGS_H_ |
AnnaBridge | 171:3a7713b1edbc | 36 | |
AnnaBridge | 171:3a7713b1edbc | 37 | #ifdef __cplusplus |
AnnaBridge | 171:3a7713b1edbc | 38 | extern "C" { |
AnnaBridge | 171:3a7713b1edbc | 39 | #endif |
AnnaBridge | 171:3a7713b1edbc | 40 | |
AnnaBridge | 171:3a7713b1edbc | 41 | #include <stdint.h> |
AnnaBridge | 171:3a7713b1edbc | 42 | |
AnnaBridge | 171:3a7713b1edbc | 43 | /** |
AnnaBridge | 171:3a7713b1edbc | 44 | * @file usb_regs.h |
AnnaBridge | 171:3a7713b1edbc | 45 | * @addtogroup usb USB |
AnnaBridge | 171:3a7713b1edbc | 46 | * @{ |
AnnaBridge | 171:3a7713b1edbc | 47 | */ |
AnnaBridge | 171:3a7713b1edbc | 48 | |
AnnaBridge | 171:3a7713b1edbc | 49 | /* Offset Register Description |
AnnaBridge | 171:3a7713b1edbc | 50 | ====== ================================================ */ |
AnnaBridge | 171:3a7713b1edbc | 51 | typedef struct { |
AnnaBridge | 171:3a7713b1edbc | 52 | __IO uint32_t cn; /* 0x0000 USB Control Register */ |
AnnaBridge | 171:3a7713b1edbc | 53 | __I uint32_t rsv0004[127]; /* 0x0004 */ |
AnnaBridge | 171:3a7713b1edbc | 54 | __IO uint32_t dev_addr; /* 0x0200 USB Device Address Register */ |
AnnaBridge | 171:3a7713b1edbc | 55 | __IO uint32_t dev_cn; /* 0x0204 USB Device Control Register */ |
AnnaBridge | 171:3a7713b1edbc | 56 | __IO uint32_t dev_intfl; /* 0x0208 USB Device Interrupt */ |
AnnaBridge | 171:3a7713b1edbc | 57 | __IO uint32_t dev_inten; /* 0x020C USB Device Interrupt Enable */ |
AnnaBridge | 171:3a7713b1edbc | 58 | __I uint32_t rsv0210[4]; /* 0x0210 */ |
AnnaBridge | 171:3a7713b1edbc | 59 | __IO uint32_t ep_base; /* 0x0220 USB Endpoint Descriptor Table Base Address */ |
AnnaBridge | 171:3a7713b1edbc | 60 | __IO uint32_t cur_buf; /* 0x0224 USB Current Endpoint Buffer Register */ |
AnnaBridge | 171:3a7713b1edbc | 61 | __IO uint32_t in_owner; /* 0x0228 USB IN Endpoint Buffer Owner Register */ |
AnnaBridge | 171:3a7713b1edbc | 62 | __IO uint32_t out_owner; /* 0x022C USB OUT Endpoint Buffer Owner Register */ |
AnnaBridge | 171:3a7713b1edbc | 63 | __IO uint32_t in_int; /* 0x0230 USB IN Endpoint Buffer Available Interrupt */ |
AnnaBridge | 171:3a7713b1edbc | 64 | __IO uint32_t out_int; /* 0x0234 USB OUT Endpoint Data Available Interrupt */ |
AnnaBridge | 171:3a7713b1edbc | 65 | __IO uint32_t nak_int; /* 0x0238 USB IN Endpoint NAK Interrupt */ |
AnnaBridge | 171:3a7713b1edbc | 66 | __IO uint32_t dma_err_int; /* 0x023C USB DMA Error Interrupt */ |
AnnaBridge | 171:3a7713b1edbc | 67 | __IO uint32_t buf_ovr_int; /* 0x0240 USB Buffer Overflow Interrupt */ |
AnnaBridge | 171:3a7713b1edbc | 68 | __I uint32_t rsv0244[7]; /* 0x0244 */ |
AnnaBridge | 171:3a7713b1edbc | 69 | __IO uint32_t setup0; /* 0x0260 USB SETUP Packet Bytes 0 to 3 */ |
AnnaBridge | 171:3a7713b1edbc | 70 | __IO uint32_t setup1; /* 0x0264 USB SETUP Packet Bytes 4 to 7 */ |
AnnaBridge | 171:3a7713b1edbc | 71 | __I uint32_t rsv0268[6]; /* 0x0268 */ |
AnnaBridge | 171:3a7713b1edbc | 72 | __IO uint32_t ep[MXC_USB_NUM_EP]; /* 0x0280 USB Endpoint Control Registers */ |
AnnaBridge | 171:3a7713b1edbc | 73 | } mxc_usb_regs_t; |
AnnaBridge | 171:3a7713b1edbc | 74 | |
AnnaBridge | 171:3a7713b1edbc | 75 | |
AnnaBridge | 171:3a7713b1edbc | 76 | /* |
AnnaBridge | 171:3a7713b1edbc | 77 | Register offsets for module USB. |
AnnaBridge | 171:3a7713b1edbc | 78 | */ |
AnnaBridge | 171:3a7713b1edbc | 79 | #define MXC_R_USB_OFFS_CN ((uint32_t)0x00000000UL) |
AnnaBridge | 171:3a7713b1edbc | 80 | #define MXC_R_USB_OFFS_DEV_ADDR ((uint32_t)0x00000200UL) |
AnnaBridge | 171:3a7713b1edbc | 81 | #define MXC_R_USB_OFFS_DEV_CN ((uint32_t)0x00000204UL) |
AnnaBridge | 171:3a7713b1edbc | 82 | #define MXC_R_USB_OFFS_DEV_INTFL ((uint32_t)0x00000208UL) |
AnnaBridge | 171:3a7713b1edbc | 83 | #define MXC_R_USB_OFFS_DEV_INTEN ((uint32_t)0x0000020CUL) |
AnnaBridge | 171:3a7713b1edbc | 84 | #define MXC_R_USB_OFFS_EP_BASE ((uint32_t)0x00000220UL) |
AnnaBridge | 171:3a7713b1edbc | 85 | #define MXC_R_USB_OFFS_CUR_BUF ((uint32_t)0x00000224UL) |
AnnaBridge | 171:3a7713b1edbc | 86 | #define MXC_R_USB_OFFS_IN_OWNER ((uint32_t)0x00000228UL) |
AnnaBridge | 171:3a7713b1edbc | 87 | #define MXC_R_USB_OFFS_OUT_OWNER ((uint32_t)0x0000022CUL) |
AnnaBridge | 171:3a7713b1edbc | 88 | #define MXC_R_USB_OFFS_IN_INT ((uint32_t)0x00000230UL) |
AnnaBridge | 171:3a7713b1edbc | 89 | #define MXC_R_USB_OFFS_OUT_INT ((uint32_t)0x00000234UL) |
AnnaBridge | 171:3a7713b1edbc | 90 | #define MXC_R_USB_OFFS_NAK_INT ((uint32_t)0x00000238UL) |
AnnaBridge | 171:3a7713b1edbc | 91 | #define MXC_R_USB_OFFS_DMA_ERR_INT ((uint32_t)0x0000023CUL) |
AnnaBridge | 171:3a7713b1edbc | 92 | #define MXC_R_USB_OFFS_BUF_OVR_INT ((uint32_t)0x00000240UL) |
AnnaBridge | 171:3a7713b1edbc | 93 | #define MXC_R_USB_OFFS_SETUP0 ((uint32_t)0x00000260UL) |
AnnaBridge | 171:3a7713b1edbc | 94 | #define MXC_R_USB_OFFS_SETUP1 ((uint32_t)0x00000264UL) |
AnnaBridge | 171:3a7713b1edbc | 95 | #define MXC_R_USB_OFFS_EP0 ((uint32_t)0x00000280UL) |
AnnaBridge | 171:3a7713b1edbc | 96 | #define MXC_R_USB_OFFS_EP1 ((uint32_t)0x00000284UL) |
AnnaBridge | 171:3a7713b1edbc | 97 | #define MXC_R_USB_OFFS_EP2 ((uint32_t)0x00000288UL) |
AnnaBridge | 171:3a7713b1edbc | 98 | #define MXC_R_USB_OFFS_EP3 ((uint32_t)0x0000028CUL) |
AnnaBridge | 171:3a7713b1edbc | 99 | #define MXC_R_USB_OFFS_EP4 ((uint32_t)0x00000290UL) |
AnnaBridge | 171:3a7713b1edbc | 100 | #define MXC_R_USB_OFFS_EP5 ((uint32_t)0x00000294UL) |
AnnaBridge | 171:3a7713b1edbc | 101 | #define MXC_R_USB_OFFS_EP6 ((uint32_t)0x00000298UL) |
AnnaBridge | 171:3a7713b1edbc | 102 | #define MXC_R_USB_OFFS_EP7 ((uint32_t)0x0000029CUL) |
AnnaBridge | 171:3a7713b1edbc | 103 | |
AnnaBridge | 171:3a7713b1edbc | 104 | |
AnnaBridge | 171:3a7713b1edbc | 105 | /* |
AnnaBridge | 171:3a7713b1edbc | 106 | Field positions and masks for module USB. |
AnnaBridge | 171:3a7713b1edbc | 107 | */ |
AnnaBridge | 171:3a7713b1edbc | 108 | #define MXC_F_USB_CN_USB_EN_POS 0 |
AnnaBridge | 171:3a7713b1edbc | 109 | #define MXC_F_USB_CN_USB_EN ((uint32_t)(0x00000001UL << MXC_F_USB_CN_USB_EN_POS)) |
AnnaBridge | 171:3a7713b1edbc | 110 | |
AnnaBridge | 171:3a7713b1edbc | 111 | #define MXC_F_USB_DEV_ADDR_DEV_ADDR_POS 0 |
AnnaBridge | 171:3a7713b1edbc | 112 | #define MXC_F_USB_DEV_ADDR_DEV_ADDR ((uint32_t)(0x0000007FUL << MXC_F_USB_DEV_ADDR_DEV_ADDR_POS)) |
AnnaBridge | 171:3a7713b1edbc | 113 | |
AnnaBridge | 171:3a7713b1edbc | 114 | #define MXC_F_USB_DEV_CN_SIGRWU_POS 2 |
AnnaBridge | 171:3a7713b1edbc | 115 | #define MXC_F_USB_DEV_CN_SIGRWU ((uint32_t)(0x00000001UL << MXC_F_USB_DEV_CN_SIGRWU_POS)) |
AnnaBridge | 171:3a7713b1edbc | 116 | #define MXC_F_USB_DEV_CN_CONNECT_POS 3 |
AnnaBridge | 171:3a7713b1edbc | 117 | #define MXC_F_USB_DEV_CN_CONNECT ((uint32_t)(0x00000001UL << MXC_F_USB_DEV_CN_CONNECT_POS)) |
AnnaBridge | 171:3a7713b1edbc | 118 | #define MXC_F_USB_DEV_CN_ULPM_POS 4 |
AnnaBridge | 171:3a7713b1edbc | 119 | #define MXC_F_USB_DEV_CN_ULPM ((uint32_t)(0x00000001UL << MXC_F_USB_DEV_CN_ULPM_POS)) |
AnnaBridge | 171:3a7713b1edbc | 120 | #define MXC_F_USB_DEV_CN_URST_POS 5 |
AnnaBridge | 171:3a7713b1edbc | 121 | #define MXC_F_USB_DEV_CN_URST ((uint32_t)(0x00000001UL << MXC_F_USB_DEV_CN_URST_POS)) |
AnnaBridge | 171:3a7713b1edbc | 122 | #define MXC_F_USB_DEV_CN_VBGATE_POS 6 |
AnnaBridge | 171:3a7713b1edbc | 123 | #define MXC_F_USB_DEV_CN_VBGATE ((uint32_t)(0x00000001UL << MXC_F_USB_DEV_CN_VBGATE_POS)) |
AnnaBridge | 171:3a7713b1edbc | 124 | #define MXC_F_USB_DEV_CN_FIFO_MODE_POS 9 |
AnnaBridge | 171:3a7713b1edbc | 125 | #define MXC_F_USB_DEV_CN_FIFO_MODE ((uint32_t)(0x00000001UL << MXC_F_USB_DEV_CN_FIFO_MODE_POS)) |
AnnaBridge | 171:3a7713b1edbc | 126 | |
AnnaBridge | 171:3a7713b1edbc | 127 | #define MXC_F_USB_DEV_INTFL_DPACT_POS 0 |
AnnaBridge | 171:3a7713b1edbc | 128 | #define MXC_F_USB_DEV_INTFL_DPACT ((uint32_t)(0x00000001UL << MXC_F_USB_DEV_INTFL_DPACT_POS)) |
AnnaBridge | 171:3a7713b1edbc | 129 | #define MXC_F_USB_DEV_INTFL_RWU_DN_POS 1 |
AnnaBridge | 171:3a7713b1edbc | 130 | #define MXC_F_USB_DEV_INTFL_RWU_DN ((uint32_t)(0x00000001UL << MXC_F_USB_DEV_INTFL_RWU_DN_POS)) |
AnnaBridge | 171:3a7713b1edbc | 131 | #define MXC_F_USB_DEV_INTFL_BACT_POS 2 |
AnnaBridge | 171:3a7713b1edbc | 132 | #define MXC_F_USB_DEV_INTFL_BACT ((uint32_t)(0x00000001UL << MXC_F_USB_DEV_INTFL_BACT_POS)) |
AnnaBridge | 171:3a7713b1edbc | 133 | #define MXC_F_USB_DEV_INTFL_BRST_POS 3 |
AnnaBridge | 171:3a7713b1edbc | 134 | #define MXC_F_USB_DEV_INTFL_BRST ((uint32_t)(0x00000001UL << MXC_F_USB_DEV_INTFL_BRST_POS)) |
AnnaBridge | 171:3a7713b1edbc | 135 | #define MXC_F_USB_DEV_INTFL_SUSP_POS 4 |
AnnaBridge | 171:3a7713b1edbc | 136 | #define MXC_F_USB_DEV_INTFL_SUSP ((uint32_t)(0x00000001UL << MXC_F_USB_DEV_INTFL_SUSP_POS)) |
AnnaBridge | 171:3a7713b1edbc | 137 | #define MXC_F_USB_DEV_INTFL_NO_VBUS_POS 5 |
AnnaBridge | 171:3a7713b1edbc | 138 | #define MXC_F_USB_DEV_INTFL_NO_VBUS ((uint32_t)(0x00000001UL << MXC_F_USB_DEV_INTFL_NO_VBUS_POS)) |
AnnaBridge | 171:3a7713b1edbc | 139 | #define MXC_F_USB_DEV_INTFL_VBUS_POS 6 |
AnnaBridge | 171:3a7713b1edbc | 140 | #define MXC_F_USB_DEV_INTFL_VBUS ((uint32_t)(0x00000001UL << MXC_F_USB_DEV_INTFL_VBUS_POS)) |
AnnaBridge | 171:3a7713b1edbc | 141 | #define MXC_F_USB_DEV_INTFL_BRST_DN_POS 7 |
AnnaBridge | 171:3a7713b1edbc | 142 | #define MXC_F_USB_DEV_INTFL_BRST_DN ((uint32_t)(0x00000001UL << MXC_F_USB_DEV_INTFL_BRST_DN_POS)) |
AnnaBridge | 171:3a7713b1edbc | 143 | #define MXC_F_USB_DEV_INTFL_SETUP_POS 8 |
AnnaBridge | 171:3a7713b1edbc | 144 | #define MXC_F_USB_DEV_INTFL_SETUP ((uint32_t)(0x00000001UL << MXC_F_USB_DEV_INTFL_SETUP_POS)) |
AnnaBridge | 171:3a7713b1edbc | 145 | #define MXC_F_USB_DEV_INTFL_EP_IN_POS 9 |
AnnaBridge | 171:3a7713b1edbc | 146 | #define MXC_F_USB_DEV_INTFL_EP_IN ((uint32_t)(0x00000001UL << MXC_F_USB_DEV_INTFL_EP_IN_POS)) |
AnnaBridge | 171:3a7713b1edbc | 147 | #define MXC_F_USB_DEV_INTFL_EP_OUT_POS 10 |
AnnaBridge | 171:3a7713b1edbc | 148 | #define MXC_F_USB_DEV_INTFL_EP_OUT ((uint32_t)(0x00000001UL << MXC_F_USB_DEV_INTFL_EP_OUT_POS)) |
AnnaBridge | 171:3a7713b1edbc | 149 | #define MXC_F_USB_DEV_INTFL_EP_NAK_POS 11 |
AnnaBridge | 171:3a7713b1edbc | 150 | #define MXC_F_USB_DEV_INTFL_EP_NAK ((uint32_t)(0x00000001UL << MXC_F_USB_DEV_INTFL_EP_NAK_POS)) |
AnnaBridge | 171:3a7713b1edbc | 151 | #define MXC_F_USB_DEV_INTFL_DMA_ERR_POS 12 |
AnnaBridge | 171:3a7713b1edbc | 152 | #define MXC_F_USB_DEV_INTFL_DMA_ERR ((uint32_t)(0x00000001UL << MXC_F_USB_DEV_INTFL_DMA_ERR_POS)) |
AnnaBridge | 171:3a7713b1edbc | 153 | #define MXC_F_USB_DEV_INTFL_BUF_OVR_POS 13 |
AnnaBridge | 171:3a7713b1edbc | 154 | #define MXC_F_USB_DEV_INTFL_BUF_OVR ((uint32_t)(0x00000001UL << MXC_F_USB_DEV_INTFL_BUF_OVR_POS)) |
AnnaBridge | 171:3a7713b1edbc | 155 | #define MXC_F_USB_DEV_INTFL_VBUS_ST_POS 16 |
AnnaBridge | 171:3a7713b1edbc | 156 | #define MXC_F_USB_DEV_INTFL_VBUS_ST ((uint32_t)(0x00000001UL << MXC_F_USB_DEV_INTFL_VBUS_ST_POS)) |
AnnaBridge | 171:3a7713b1edbc | 157 | |
AnnaBridge | 171:3a7713b1edbc | 158 | #define MXC_F_USB_DEV_INTEN_DPACT_POS 0 |
AnnaBridge | 171:3a7713b1edbc | 159 | #define MXC_F_USB_DEV_INTEN_DPACT ((uint32_t)(0x00000001UL << MXC_F_USB_DEV_INTEN_DPACT_POS)) |
AnnaBridge | 171:3a7713b1edbc | 160 | #define MXC_F_USB_DEV_INTEN_RWU_DN_POS 1 |
AnnaBridge | 171:3a7713b1edbc | 161 | #define MXC_F_USB_DEV_INTEN_RWU_DN ((uint32_t)(0x00000001UL << MXC_F_USB_DEV_INTEN_RWU_DN_POS)) |
AnnaBridge | 171:3a7713b1edbc | 162 | #define MXC_F_USB_DEV_INTEN_BACT_POS 2 |
AnnaBridge | 171:3a7713b1edbc | 163 | #define MXC_F_USB_DEV_INTEN_BACT ((uint32_t)(0x00000001UL << MXC_F_USB_DEV_INTEN_BACT_POS)) |
AnnaBridge | 171:3a7713b1edbc | 164 | #define MXC_F_USB_DEV_INTEN_BRST_POS 3 |
AnnaBridge | 171:3a7713b1edbc | 165 | #define MXC_F_USB_DEV_INTEN_BRST ((uint32_t)(0x00000001UL << MXC_F_USB_DEV_INTEN_BRST_POS)) |
AnnaBridge | 171:3a7713b1edbc | 166 | #define MXC_F_USB_DEV_INTEN_SUSP_POS 4 |
AnnaBridge | 171:3a7713b1edbc | 167 | #define MXC_F_USB_DEV_INTEN_SUSP ((uint32_t)(0x00000001UL << MXC_F_USB_DEV_INTEN_SUSP_POS)) |
AnnaBridge | 171:3a7713b1edbc | 168 | #define MXC_F_USB_DEV_INTEN_NO_VBUS_POS 5 |
AnnaBridge | 171:3a7713b1edbc | 169 | #define MXC_F_USB_DEV_INTEN_NO_VBUS ((uint32_t)(0x00000001UL << MXC_F_USB_DEV_INTEN_NO_VBUS_POS)) |
AnnaBridge | 171:3a7713b1edbc | 170 | #define MXC_F_USB_DEV_INTEN_VBUS_POS 6 |
AnnaBridge | 171:3a7713b1edbc | 171 | #define MXC_F_USB_DEV_INTEN_VBUS ((uint32_t)(0x00000001UL << MXC_F_USB_DEV_INTEN_VBUS_POS)) |
AnnaBridge | 171:3a7713b1edbc | 172 | #define MXC_F_USB_DEV_INTEN_BRST_DN_POS 7 |
AnnaBridge | 171:3a7713b1edbc | 173 | #define MXC_F_USB_DEV_INTEN_BRST_DN ((uint32_t)(0x00000001UL << MXC_F_USB_DEV_INTEN_BRST_DN_POS)) |
AnnaBridge | 171:3a7713b1edbc | 174 | #define MXC_F_USB_DEV_INTEN_SETUP_POS 8 |
AnnaBridge | 171:3a7713b1edbc | 175 | #define MXC_F_USB_DEV_INTEN_SETUP ((uint32_t)(0x00000001UL << MXC_F_USB_DEV_INTEN_SETUP_POS)) |
AnnaBridge | 171:3a7713b1edbc | 176 | #define MXC_F_USB_DEV_INTEN_EP_IN_POS 9 |
AnnaBridge | 171:3a7713b1edbc | 177 | #define MXC_F_USB_DEV_INTEN_EP_IN ((uint32_t)(0x00000001UL << MXC_F_USB_DEV_INTEN_EP_IN_POS)) |
AnnaBridge | 171:3a7713b1edbc | 178 | #define MXC_F_USB_DEV_INTEN_EP_OUT_POS 10 |
AnnaBridge | 171:3a7713b1edbc | 179 | #define MXC_F_USB_DEV_INTEN_EP_OUT ((uint32_t)(0x00000001UL << MXC_F_USB_DEV_INTEN_EP_OUT_POS)) |
AnnaBridge | 171:3a7713b1edbc | 180 | #define MXC_F_USB_DEV_INTEN_EP_NAK_POS 11 |
AnnaBridge | 171:3a7713b1edbc | 181 | #define MXC_F_USB_DEV_INTEN_EP_NAK ((uint32_t)(0x00000001UL << MXC_F_USB_DEV_INTEN_EP_NAK_POS)) |
AnnaBridge | 171:3a7713b1edbc | 182 | #define MXC_F_USB_DEV_INTEN_DMA_ERR_POS 12 |
AnnaBridge | 171:3a7713b1edbc | 183 | #define MXC_F_USB_DEV_INTEN_DMA_ERR ((uint32_t)(0x00000001UL << MXC_F_USB_DEV_INTEN_DMA_ERR_POS)) |
AnnaBridge | 171:3a7713b1edbc | 184 | #define MXC_F_USB_DEV_INTEN_BUF_OVR_POS 13 |
AnnaBridge | 171:3a7713b1edbc | 185 | #define MXC_F_USB_DEV_INTEN_BUF_OVR ((uint32_t)(0x00000001UL << MXC_F_USB_DEV_INTEN_BUF_OVR_POS)) |
AnnaBridge | 171:3a7713b1edbc | 186 | |
AnnaBridge | 171:3a7713b1edbc | 187 | #define MXC_F_USB_EP_BASE_EP_BASE_POS 9 |
AnnaBridge | 171:3a7713b1edbc | 188 | #define MXC_F_USB_EP_BASE_EP_BASE ((uint32_t)(0x007FFFFFUL << MXC_F_USB_EP_BASE_EP_BASE_POS)) |
AnnaBridge | 171:3a7713b1edbc | 189 | |
AnnaBridge | 171:3a7713b1edbc | 190 | #define MXC_F_USB_CUR_BUF_OUT_BUF_POS 0 |
AnnaBridge | 171:3a7713b1edbc | 191 | #define MXC_F_USB_CUR_BUF_OUT_BUF ((uint32_t)(0x000000FFUL << MXC_F_USB_CUR_BUF_OUT_BUF_POS)) |
AnnaBridge | 171:3a7713b1edbc | 192 | #define MXC_F_USB_CUR_BUF_IN_BUF_POS 16 |
AnnaBridge | 171:3a7713b1edbc | 193 | #define MXC_F_USB_CUR_BUF_IN_BUF ((uint32_t)(0x000000FFUL << MXC_F_USB_CUR_BUF_IN_BUF_POS)) |
AnnaBridge | 171:3a7713b1edbc | 194 | |
AnnaBridge | 171:3a7713b1edbc | 195 | #define MXC_F_USB_IN_OWNER_BUF0_OWNER_POS 0 |
AnnaBridge | 171:3a7713b1edbc | 196 | #define MXC_F_USB_IN_OWNER_BUF0_OWNER ((uint32_t)(0x000000FFUL << MXC_F_USB_IN_OWNER_BUF0_OWNER_POS)) |
AnnaBridge | 171:3a7713b1edbc | 197 | #define MXC_F_USB_IN_OWNER_BUF1_OWNER_POS 16 |
AnnaBridge | 171:3a7713b1edbc | 198 | #define MXC_F_USB_IN_OWNER_BUF1_OWNER ((uint32_t)(0x000000FFUL << MXC_F_USB_IN_OWNER_BUF1_OWNER_POS)) |
AnnaBridge | 171:3a7713b1edbc | 199 | |
AnnaBridge | 171:3a7713b1edbc | 200 | #define MXC_F_USB_OUT_OWNER_BUF0_OWNER_POS 0 |
AnnaBridge | 171:3a7713b1edbc | 201 | #define MXC_F_USB_OUT_OWNER_BUF0_OWNER ((uint32_t)(0x000000FFUL << MXC_F_USB_OUT_OWNER_BUF0_OWNER_POS)) |
AnnaBridge | 171:3a7713b1edbc | 202 | #define MXC_F_USB_OUT_OWNER_BUF1_OWNER_POS 16 |
AnnaBridge | 171:3a7713b1edbc | 203 | #define MXC_F_USB_OUT_OWNER_BUF1_OWNER ((uint32_t)(0x000000FFUL << MXC_F_USB_OUT_OWNER_BUF1_OWNER_POS)) |
AnnaBridge | 171:3a7713b1edbc | 204 | |
AnnaBridge | 171:3a7713b1edbc | 205 | #define MXC_F_USB_IN_INT_INBAV0_POS 0 |
AnnaBridge | 171:3a7713b1edbc | 206 | #define MXC_F_USB_IN_INT_INBAV0 ((uint32_t)(0x00000001UL << MXC_F_USB_IN_INT_INBAV0_POS)) |
AnnaBridge | 171:3a7713b1edbc | 207 | #define MXC_F_USB_IN_INT_INBAV1_POS 1 |
AnnaBridge | 171:3a7713b1edbc | 208 | #define MXC_F_USB_IN_INT_INBAV1 ((uint32_t)(0x00000001UL << MXC_F_USB_IN_INT_INBAV1_POS)) |
AnnaBridge | 171:3a7713b1edbc | 209 | #define MXC_F_USB_IN_INT_INBAV2_POS 2 |
AnnaBridge | 171:3a7713b1edbc | 210 | #define MXC_F_USB_IN_INT_INBAV2 ((uint32_t)(0x00000001UL << MXC_F_USB_IN_INT_INBAV2_POS)) |
AnnaBridge | 171:3a7713b1edbc | 211 | #define MXC_F_USB_IN_INT_INBAV3_POS 3 |
AnnaBridge | 171:3a7713b1edbc | 212 | #define MXC_F_USB_IN_INT_INBAV3 ((uint32_t)(0x00000001UL << MXC_F_USB_IN_INT_INBAV3_POS)) |
AnnaBridge | 171:3a7713b1edbc | 213 | #define MXC_F_USB_IN_INT_INBAV4_POS 4 |
AnnaBridge | 171:3a7713b1edbc | 214 | #define MXC_F_USB_IN_INT_INBAV4 ((uint32_t)(0x00000001UL << MXC_F_USB_IN_INT_INBAV4_POS)) |
AnnaBridge | 171:3a7713b1edbc | 215 | #define MXC_F_USB_IN_INT_INBAV5_POS 5 |
AnnaBridge | 171:3a7713b1edbc | 216 | #define MXC_F_USB_IN_INT_INBAV5 ((uint32_t)(0x00000001UL << MXC_F_USB_IN_INT_INBAV5_POS)) |
AnnaBridge | 171:3a7713b1edbc | 217 | #define MXC_F_USB_IN_INT_INBAV6_POS 6 |
AnnaBridge | 171:3a7713b1edbc | 218 | #define MXC_F_USB_IN_INT_INBAV6 ((uint32_t)(0x00000001UL << MXC_F_USB_IN_INT_INBAV6_POS)) |
AnnaBridge | 171:3a7713b1edbc | 219 | #define MXC_F_USB_IN_INT_INBAV7_POS 7 |
AnnaBridge | 171:3a7713b1edbc | 220 | #define MXC_F_USB_IN_INT_INBAV7 ((uint32_t)(0x00000001UL << MXC_F_USB_IN_INT_INBAV7_POS)) |
AnnaBridge | 171:3a7713b1edbc | 221 | |
AnnaBridge | 171:3a7713b1edbc | 222 | #define MXC_F_USB_OUT_INT_OUTDAV0_POS 0 |
AnnaBridge | 171:3a7713b1edbc | 223 | #define MXC_F_USB_OUT_INT_OUTDAV0 ((uint32_t)(0x00000001UL << MXC_F_USB_OUT_INT_OUTDAV0_POS)) |
AnnaBridge | 171:3a7713b1edbc | 224 | #define MXC_F_USB_OUT_INT_OUTDAV1_POS 1 |
AnnaBridge | 171:3a7713b1edbc | 225 | #define MXC_F_USB_OUT_INT_OUTDAV1 ((uint32_t)(0x00000001UL << MXC_F_USB_OUT_INT_OUTDAV1_POS)) |
AnnaBridge | 171:3a7713b1edbc | 226 | #define MXC_F_USB_OUT_INT_OUTDAV2_POS 2 |
AnnaBridge | 171:3a7713b1edbc | 227 | #define MXC_F_USB_OUT_INT_OUTDAV2 ((uint32_t)(0x00000001UL << MXC_F_USB_OUT_INT_OUTDAV2_POS)) |
AnnaBridge | 171:3a7713b1edbc | 228 | #define MXC_F_USB_OUT_INT_OUTDAV3_POS 3 |
AnnaBridge | 171:3a7713b1edbc | 229 | #define MXC_F_USB_OUT_INT_OUTDAV3 ((uint32_t)(0x00000001UL << MXC_F_USB_OUT_INT_OUTDAV3_POS)) |
AnnaBridge | 171:3a7713b1edbc | 230 | #define MXC_F_USB_OUT_INT_OUTDAV4_POS 4 |
AnnaBridge | 171:3a7713b1edbc | 231 | #define MXC_F_USB_OUT_INT_OUTDAV4 ((uint32_t)(0x00000001UL << MXC_F_USB_OUT_INT_OUTDAV4_POS)) |
AnnaBridge | 171:3a7713b1edbc | 232 | #define MXC_F_USB_OUT_INT_OUTDAV5_POS 5 |
AnnaBridge | 171:3a7713b1edbc | 233 | #define MXC_F_USB_OUT_INT_OUTDAV5 ((uint32_t)(0x00000001UL << MXC_F_USB_OUT_INT_OUTDAV5_POS)) |
AnnaBridge | 171:3a7713b1edbc | 234 | #define MXC_F_USB_OUT_INT_OUTDAV6_POS 6 |
AnnaBridge | 171:3a7713b1edbc | 235 | #define MXC_F_USB_OUT_INT_OUTDAV6 ((uint32_t)(0x00000001UL << MXC_F_USB_OUT_INT_OUTDAV6_POS)) |
AnnaBridge | 171:3a7713b1edbc | 236 | #define MXC_F_USB_OUT_INT_OUTDAV7_POS 7 |
AnnaBridge | 171:3a7713b1edbc | 237 | #define MXC_F_USB_OUT_INT_OUTDAV7 ((uint32_t)(0x00000001UL << MXC_F_USB_OUT_INT_OUTDAV7_POS)) |
AnnaBridge | 171:3a7713b1edbc | 238 | |
AnnaBridge | 171:3a7713b1edbc | 239 | #define MXC_F_USB_NAK_INT_NAK0_POS 0 |
AnnaBridge | 171:3a7713b1edbc | 240 | #define MXC_F_USB_NAK_INT_NAK0 ((uint32_t)(0x00000001UL << MXC_F_USB_NAK_INT_NAK0_POS)) |
AnnaBridge | 171:3a7713b1edbc | 241 | #define MXC_F_USB_NAK_INT_NAK1_POS 1 |
AnnaBridge | 171:3a7713b1edbc | 242 | #define MXC_F_USB_NAK_INT_NAK1 ((uint32_t)(0x00000001UL << MXC_F_USB_NAK_INT_NAK1_POS)) |
AnnaBridge | 171:3a7713b1edbc | 243 | #define MXC_F_USB_NAK_INT_NAK2_POS 2 |
AnnaBridge | 171:3a7713b1edbc | 244 | #define MXC_F_USB_NAK_INT_NAK2 ((uint32_t)(0x00000001UL << MXC_F_USB_NAK_INT_NAK2_POS)) |
AnnaBridge | 171:3a7713b1edbc | 245 | #define MXC_F_USB_NAK_INT_NAK3_POS 3 |
AnnaBridge | 171:3a7713b1edbc | 246 | #define MXC_F_USB_NAK_INT_NAK3 ((uint32_t)(0x00000001UL << MXC_F_USB_NAK_INT_NAK3_POS)) |
AnnaBridge | 171:3a7713b1edbc | 247 | #define MXC_F_USB_NAK_INT_NAK4_POS 4 |
AnnaBridge | 171:3a7713b1edbc | 248 | #define MXC_F_USB_NAK_INT_NAK4 ((uint32_t)(0x00000001UL << MXC_F_USB_NAK_INT_NAK4_POS)) |
AnnaBridge | 171:3a7713b1edbc | 249 | #define MXC_F_USB_NAK_INT_NAK5_POS 5 |
AnnaBridge | 171:3a7713b1edbc | 250 | #define MXC_F_USB_NAK_INT_NAK5 ((uint32_t)(0x00000001UL << MXC_F_USB_NAK_INT_NAK5_POS)) |
AnnaBridge | 171:3a7713b1edbc | 251 | #define MXC_F_USB_NAK_INT_NAK6_POS 6 |
AnnaBridge | 171:3a7713b1edbc | 252 | #define MXC_F_USB_NAK_INT_NAK6 ((uint32_t)(0x00000001UL << MXC_F_USB_NAK_INT_NAK6_POS)) |
AnnaBridge | 171:3a7713b1edbc | 253 | #define MXC_F_USB_NAK_INT_NAK7_POS 7 |
AnnaBridge | 171:3a7713b1edbc | 254 | #define MXC_F_USB_NAK_INT_NAK7 ((uint32_t)(0x00000001UL << MXC_F_USB_NAK_INT_NAK7_POS)) |
AnnaBridge | 171:3a7713b1edbc | 255 | |
AnnaBridge | 171:3a7713b1edbc | 256 | #define MXC_F_USB_DMA_ERR_INT_DMA_ERR0_POS 0 |
AnnaBridge | 171:3a7713b1edbc | 257 | #define MXC_F_USB_DMA_ERR_INT_DMA_ERR0 ((uint32_t)(0x00000001UL << MXC_F_USB_DMA_ERR_INT_DMA_ERR0_POS)) |
AnnaBridge | 171:3a7713b1edbc | 258 | #define MXC_F_USB_DMA_ERR_INT_DMA_ERR1_POS 1 |
AnnaBridge | 171:3a7713b1edbc | 259 | #define MXC_F_USB_DMA_ERR_INT_DMA_ERR1 ((uint32_t)(0x00000001UL << MXC_F_USB_DMA_ERR_INT_DMA_ERR1_POS)) |
AnnaBridge | 171:3a7713b1edbc | 260 | #define MXC_F_USB_DMA_ERR_INT_DMA_ERR2_POS 2 |
AnnaBridge | 171:3a7713b1edbc | 261 | #define MXC_F_USB_DMA_ERR_INT_DMA_ERR2 ((uint32_t)(0x00000001UL << MXC_F_USB_DMA_ERR_INT_DMA_ERR2_POS)) |
AnnaBridge | 171:3a7713b1edbc | 262 | #define MXC_F_USB_DMA_ERR_INT_DMA_ERR3_POS 3 |
AnnaBridge | 171:3a7713b1edbc | 263 | #define MXC_F_USB_DMA_ERR_INT_DMA_ERR3 ((uint32_t)(0x00000001UL << MXC_F_USB_DMA_ERR_INT_DMA_ERR3_POS)) |
AnnaBridge | 171:3a7713b1edbc | 264 | #define MXC_F_USB_DMA_ERR_INT_DMA_ERR4_POS 4 |
AnnaBridge | 171:3a7713b1edbc | 265 | #define MXC_F_USB_DMA_ERR_INT_DMA_ERR4 ((uint32_t)(0x00000001UL << MXC_F_USB_DMA_ERR_INT_DMA_ERR4_POS)) |
AnnaBridge | 171:3a7713b1edbc | 266 | #define MXC_F_USB_DMA_ERR_INT_DMA_ERR5_POS 5 |
AnnaBridge | 171:3a7713b1edbc | 267 | #define MXC_F_USB_DMA_ERR_INT_DMA_ERR5 ((uint32_t)(0x00000001UL << MXC_F_USB_DMA_ERR_INT_DMA_ERR5_POS)) |
AnnaBridge | 171:3a7713b1edbc | 268 | #define MXC_F_USB_DMA_ERR_INT_DMA_ERR6_POS 6 |
AnnaBridge | 171:3a7713b1edbc | 269 | #define MXC_F_USB_DMA_ERR_INT_DMA_ERR6 ((uint32_t)(0x00000001UL << MXC_F_USB_DMA_ERR_INT_DMA_ERR6_POS)) |
AnnaBridge | 171:3a7713b1edbc | 270 | #define MXC_F_USB_DMA_ERR_INT_DMA_ERR7_POS 7 |
AnnaBridge | 171:3a7713b1edbc | 271 | #define MXC_F_USB_DMA_ERR_INT_DMA_ERR7 ((uint32_t)(0x00000001UL << MXC_F_USB_DMA_ERR_INT_DMA_ERR7_POS)) |
AnnaBridge | 171:3a7713b1edbc | 272 | |
AnnaBridge | 171:3a7713b1edbc | 273 | #define MXC_F_USB_BUF_OVR_INT_BUF_OVR0_POS 0 |
AnnaBridge | 171:3a7713b1edbc | 274 | #define MXC_F_USB_BUF_OVR_INT_BUF_OVR0 ((uint32_t)(0x00000001UL << MXC_F_USB_BUF_OVR_INT_BUF_OVR0_POS)) |
AnnaBridge | 171:3a7713b1edbc | 275 | #define MXC_F_USB_BUF_OVR_INT_BUF_OVR1_POS 1 |
AnnaBridge | 171:3a7713b1edbc | 276 | #define MXC_F_USB_BUF_OVR_INT_BUF_OVR1 ((uint32_t)(0x00000001UL << MXC_F_USB_BUF_OVR_INT_BUF_OVR1_POS)) |
AnnaBridge | 171:3a7713b1edbc | 277 | #define MXC_F_USB_BUF_OVR_INT_BUF_OVR2_POS 2 |
AnnaBridge | 171:3a7713b1edbc | 278 | #define MXC_F_USB_BUF_OVR_INT_BUF_OVR2 ((uint32_t)(0x00000001UL << MXC_F_USB_BUF_OVR_INT_BUF_OVR2_POS)) |
AnnaBridge | 171:3a7713b1edbc | 279 | #define MXC_F_USB_BUF_OVR_INT_BUF_OVR3_POS 3 |
AnnaBridge | 171:3a7713b1edbc | 280 | #define MXC_F_USB_BUF_OVR_INT_BUF_OVR3 ((uint32_t)(0x00000001UL << MXC_F_USB_BUF_OVR_INT_BUF_OVR3_POS)) |
AnnaBridge | 171:3a7713b1edbc | 281 | #define MXC_F_USB_BUF_OVR_INT_BUF_OVR4_POS 4 |
AnnaBridge | 171:3a7713b1edbc | 282 | #define MXC_F_USB_BUF_OVR_INT_BUF_OVR4 ((uint32_t)(0x00000001UL << MXC_F_USB_BUF_OVR_INT_BUF_OVR4_POS)) |
AnnaBridge | 171:3a7713b1edbc | 283 | #define MXC_F_USB_BUF_OVR_INT_BUF_OVR5_POS 5 |
AnnaBridge | 171:3a7713b1edbc | 284 | #define MXC_F_USB_BUF_OVR_INT_BUF_OVR5 ((uint32_t)(0x00000001UL << MXC_F_USB_BUF_OVR_INT_BUF_OVR5_POS)) |
AnnaBridge | 171:3a7713b1edbc | 285 | #define MXC_F_USB_BUF_OVR_INT_BUF_OVR6_POS 6 |
AnnaBridge | 171:3a7713b1edbc | 286 | #define MXC_F_USB_BUF_OVR_INT_BUF_OVR6 ((uint32_t)(0x00000001UL << MXC_F_USB_BUF_OVR_INT_BUF_OVR6_POS)) |
AnnaBridge | 171:3a7713b1edbc | 287 | #define MXC_F_USB_BUF_OVR_INT_BUF_OVR7_POS 7 |
AnnaBridge | 171:3a7713b1edbc | 288 | #define MXC_F_USB_BUF_OVR_INT_BUF_OVR7 ((uint32_t)(0x00000001UL << MXC_F_USB_BUF_OVR_INT_BUF_OVR7_POS)) |
AnnaBridge | 171:3a7713b1edbc | 289 | |
AnnaBridge | 171:3a7713b1edbc | 290 | #define MXC_F_USB_SETUP0_BYTE0_POS 0 |
AnnaBridge | 171:3a7713b1edbc | 291 | #define MXC_F_USB_SETUP0_BYTE0 ((uint32_t)(0x000000FFUL << MXC_F_USB_SETUP0_BYTE0_POS)) |
AnnaBridge | 171:3a7713b1edbc | 292 | #define MXC_F_USB_SETUP0_BYTE1_POS 8 |
AnnaBridge | 171:3a7713b1edbc | 293 | #define MXC_F_USB_SETUP0_BYTE1 ((uint32_t)(0x000000FFUL << MXC_F_USB_SETUP0_BYTE1_POS)) |
AnnaBridge | 171:3a7713b1edbc | 294 | #define MXC_F_USB_SETUP0_BYTE2_POS 16 |
AnnaBridge | 171:3a7713b1edbc | 295 | #define MXC_F_USB_SETUP0_BYTE2 ((uint32_t)(0x000000FFUL << MXC_F_USB_SETUP0_BYTE2_POS)) |
AnnaBridge | 171:3a7713b1edbc | 296 | #define MXC_F_USB_SETUP0_BYTE3_POS 24 |
AnnaBridge | 171:3a7713b1edbc | 297 | #define MXC_F_USB_SETUP0_BYTE3 ((uint32_t)(0x000000FFUL << MXC_F_USB_SETUP0_BYTE3_POS)) |
AnnaBridge | 171:3a7713b1edbc | 298 | |
AnnaBridge | 171:3a7713b1edbc | 299 | #define MXC_F_USB_SETUP1_BYTE4_POS 0 |
AnnaBridge | 171:3a7713b1edbc | 300 | #define MXC_F_USB_SETUP1_BYTE4 ((uint32_t)(0x000000FFUL << MXC_F_USB_SETUP1_BYTE4_POS)) |
AnnaBridge | 171:3a7713b1edbc | 301 | #define MXC_F_USB_SETUP1_BYTE5_POS 8 |
AnnaBridge | 171:3a7713b1edbc | 302 | #define MXC_F_USB_SETUP1_BYTE5 ((uint32_t)(0x000000FFUL << MXC_F_USB_SETUP1_BYTE5_POS)) |
AnnaBridge | 171:3a7713b1edbc | 303 | #define MXC_F_USB_SETUP1_BYTE6_POS 16 |
AnnaBridge | 171:3a7713b1edbc | 304 | #define MXC_F_USB_SETUP1_BYTE6 ((uint32_t)(0x000000FFUL << MXC_F_USB_SETUP1_BYTE6_POS)) |
AnnaBridge | 171:3a7713b1edbc | 305 | #define MXC_F_USB_SETUP1_BYTE7_POS 24 |
AnnaBridge | 171:3a7713b1edbc | 306 | #define MXC_F_USB_SETUP1_BYTE7 ((uint32_t)(0x000000FFUL << MXC_F_USB_SETUP1_BYTE7_POS)) |
AnnaBridge | 171:3a7713b1edbc | 307 | |
AnnaBridge | 171:3a7713b1edbc | 308 | #define MXC_F_USB_EP0_EP_DIR_POS 0 |
AnnaBridge | 171:3a7713b1edbc | 309 | #define MXC_F_USB_EP0_EP_DIR ((uint32_t)(0x00000003UL << MXC_F_USB_EP0_EP_DIR_POS)) |
AnnaBridge | 171:3a7713b1edbc | 310 | #define MXC_F_USB_EP0_EP_BUF2_POS 3 |
AnnaBridge | 171:3a7713b1edbc | 311 | #define MXC_F_USB_EP0_EP_BUF2 ((uint32_t)(0x00000001UL << MXC_F_USB_EP0_EP_BUF2_POS)) |
AnnaBridge | 171:3a7713b1edbc | 312 | #define MXC_F_USB_EP0_EP_INT_EN_POS 4 |
AnnaBridge | 171:3a7713b1edbc | 313 | #define MXC_F_USB_EP0_EP_INT_EN ((uint32_t)(0x00000001UL << MXC_F_USB_EP0_EP_INT_EN_POS)) |
AnnaBridge | 171:3a7713b1edbc | 314 | #define MXC_F_USB_EP0_EP_NAK_EN_POS 5 |
AnnaBridge | 171:3a7713b1edbc | 315 | #define MXC_F_USB_EP0_EP_NAK_EN ((uint32_t)(0x00000001UL << MXC_F_USB_EP0_EP_NAK_EN_POS)) |
AnnaBridge | 171:3a7713b1edbc | 316 | #define MXC_F_USB_EP0_EP_DT_POS 6 |
AnnaBridge | 171:3a7713b1edbc | 317 | #define MXC_F_USB_EP0_EP_DT ((uint32_t)(0x00000001UL << MXC_F_USB_EP0_EP_DT_POS)) |
AnnaBridge | 171:3a7713b1edbc | 318 | #define MXC_F_USB_EP0_EP_STALL_POS 8 |
AnnaBridge | 171:3a7713b1edbc | 319 | #define MXC_F_USB_EP0_EP_STALL ((uint32_t)(0x00000001UL << MXC_F_USB_EP0_EP_STALL_POS)) |
AnnaBridge | 171:3a7713b1edbc | 320 | #define MXC_F_USB_EP0_EP_ST_STALL_POS 9 |
AnnaBridge | 171:3a7713b1edbc | 321 | #define MXC_F_USB_EP0_EP_ST_STALL ((uint32_t)(0x00000001UL << MXC_F_USB_EP0_EP_ST_STALL_POS)) |
AnnaBridge | 171:3a7713b1edbc | 322 | #define MXC_F_USB_EP0_EP_ST_ACK_POS 10 |
AnnaBridge | 171:3a7713b1edbc | 323 | #define MXC_F_USB_EP0_EP_ST_ACK ((uint32_t)(0x00000001UL << MXC_F_USB_EP0_EP_ST_ACK_POS)) |
AnnaBridge | 171:3a7713b1edbc | 324 | |
AnnaBridge | 171:3a7713b1edbc | 325 | #define MXC_F_USB_EP1_EP_DIR_POS 0 |
AnnaBridge | 171:3a7713b1edbc | 326 | #define MXC_F_USB_EP1_EP_DIR ((uint32_t)(0x00000003UL << MXC_F_USB_EP1_EP_DIR_POS)) |
AnnaBridge | 171:3a7713b1edbc | 327 | #define MXC_F_USB_EP1_EP_BUF2_POS 3 |
AnnaBridge | 171:3a7713b1edbc | 328 | #define MXC_F_USB_EP1_EP_BUF2 ((uint32_t)(0x00000001UL << MXC_F_USB_EP1_EP_BUF2_POS)) |
AnnaBridge | 171:3a7713b1edbc | 329 | #define MXC_F_USB_EP1_EP_INT_EN_POS 4 |
AnnaBridge | 171:3a7713b1edbc | 330 | #define MXC_F_USB_EP1_EP_INT_EN ((uint32_t)(0x00000001UL << MXC_F_USB_EP1_EP_INT_EN_POS)) |
AnnaBridge | 171:3a7713b1edbc | 331 | #define MXC_F_USB_EP1_EP_NAK_EN_POS 5 |
AnnaBridge | 171:3a7713b1edbc | 332 | #define MXC_F_USB_EP1_EP_NAK_EN ((uint32_t)(0x00000001UL << MXC_F_USB_EP1_EP_NAK_EN_POS)) |
AnnaBridge | 171:3a7713b1edbc | 333 | #define MXC_F_USB_EP1_EP_DT_POS 6 |
AnnaBridge | 171:3a7713b1edbc | 334 | #define MXC_F_USB_EP1_EP_DT ((uint32_t)(0x00000001UL << MXC_F_USB_EP1_EP_DT_POS)) |
AnnaBridge | 171:3a7713b1edbc | 335 | #define MXC_F_USB_EP1_EP_STALL_POS 8 |
AnnaBridge | 171:3a7713b1edbc | 336 | #define MXC_F_USB_EP1_EP_STALL ((uint32_t)(0x00000001UL << MXC_F_USB_EP1_EP_STALL_POS)) |
AnnaBridge | 171:3a7713b1edbc | 337 | #define MXC_F_USB_EP1_EP_ST_STALL_POS 9 |
AnnaBridge | 171:3a7713b1edbc | 338 | #define MXC_F_USB_EP1_EP_ST_STALL ((uint32_t)(0x00000001UL << MXC_F_USB_EP1_EP_ST_STALL_POS)) |
AnnaBridge | 171:3a7713b1edbc | 339 | #define MXC_F_USB_EP1_EP_ST_ACK_POS 10 |
AnnaBridge | 171:3a7713b1edbc | 340 | #define MXC_F_USB_EP1_EP_ST_ACK ((uint32_t)(0x00000001UL << MXC_F_USB_EP1_EP_ST_ACK_POS)) |
AnnaBridge | 171:3a7713b1edbc | 341 | |
AnnaBridge | 171:3a7713b1edbc | 342 | #define MXC_F_USB_EP2_EP_DIR_POS 0 |
AnnaBridge | 171:3a7713b1edbc | 343 | #define MXC_F_USB_EP2_EP_DIR ((uint32_t)(0x00000003UL << MXC_F_USB_EP2_EP_DIR_POS)) |
AnnaBridge | 171:3a7713b1edbc | 344 | #define MXC_F_USB_EP2_EP_BUF2_POS 3 |
AnnaBridge | 171:3a7713b1edbc | 345 | #define MXC_F_USB_EP2_EP_BUF2 ((uint32_t)(0x00000001UL << MXC_F_USB_EP2_EP_BUF2_POS)) |
AnnaBridge | 171:3a7713b1edbc | 346 | #define MXC_F_USB_EP2_EP_INT_EN_POS 4 |
AnnaBridge | 171:3a7713b1edbc | 347 | #define MXC_F_USB_EP2_EP_INT_EN ((uint32_t)(0x00000001UL << MXC_F_USB_EP2_EP_INT_EN_POS)) |
AnnaBridge | 171:3a7713b1edbc | 348 | #define MXC_F_USB_EP2_EP_NAK_EN_POS 5 |
AnnaBridge | 171:3a7713b1edbc | 349 | #define MXC_F_USB_EP2_EP_NAK_EN ((uint32_t)(0x00000001UL << MXC_F_USB_EP2_EP_NAK_EN_POS)) |
AnnaBridge | 171:3a7713b1edbc | 350 | #define MXC_F_USB_EP2_EP_DT_POS 6 |
AnnaBridge | 171:3a7713b1edbc | 351 | #define MXC_F_USB_EP2_EP_DT ((uint32_t)(0x00000001UL << MXC_F_USB_EP2_EP_DT_POS)) |
AnnaBridge | 171:3a7713b1edbc | 352 | #define MXC_F_USB_EP2_EP_STALL_POS 8 |
AnnaBridge | 171:3a7713b1edbc | 353 | #define MXC_F_USB_EP2_EP_STALL ((uint32_t)(0x00000001UL << MXC_F_USB_EP2_EP_STALL_POS)) |
AnnaBridge | 171:3a7713b1edbc | 354 | #define MXC_F_USB_EP2_EP_ST_STALL_POS 9 |
AnnaBridge | 171:3a7713b1edbc | 355 | #define MXC_F_USB_EP2_EP_ST_STALL ((uint32_t)(0x00000001UL << MXC_F_USB_EP2_EP_ST_STALL_POS)) |
AnnaBridge | 171:3a7713b1edbc | 356 | #define MXC_F_USB_EP2_EP_ST_ACK_POS 10 |
AnnaBridge | 171:3a7713b1edbc | 357 | #define MXC_F_USB_EP2_EP_ST_ACK ((uint32_t)(0x00000001UL << MXC_F_USB_EP2_EP_ST_ACK_POS)) |
AnnaBridge | 171:3a7713b1edbc | 358 | |
AnnaBridge | 171:3a7713b1edbc | 359 | #define MXC_F_USB_EP3_EP_DIR_POS 0 |
AnnaBridge | 171:3a7713b1edbc | 360 | #define MXC_F_USB_EP3_EP_DIR ((uint32_t)(0x00000003UL << MXC_F_USB_EP3_EP_DIR_POS)) |
AnnaBridge | 171:3a7713b1edbc | 361 | #define MXC_F_USB_EP3_EP_BUF2_POS 3 |
AnnaBridge | 171:3a7713b1edbc | 362 | #define MXC_F_USB_EP3_EP_BUF2 ((uint32_t)(0x00000001UL << MXC_F_USB_EP3_EP_BUF2_POS)) |
AnnaBridge | 171:3a7713b1edbc | 363 | #define MXC_F_USB_EP3_EP_INT_EN_POS 4 |
AnnaBridge | 171:3a7713b1edbc | 364 | #define MXC_F_USB_EP3_EP_INT_EN ((uint32_t)(0x00000001UL << MXC_F_USB_EP3_EP_INT_EN_POS)) |
AnnaBridge | 171:3a7713b1edbc | 365 | #define MXC_F_USB_EP3_EP_NAK_EN_POS 5 |
AnnaBridge | 171:3a7713b1edbc | 366 | #define MXC_F_USB_EP3_EP_NAK_EN ((uint32_t)(0x00000001UL << MXC_F_USB_EP3_EP_NAK_EN_POS)) |
AnnaBridge | 171:3a7713b1edbc | 367 | #define MXC_F_USB_EP3_EP_DT_POS 6 |
AnnaBridge | 171:3a7713b1edbc | 368 | #define MXC_F_USB_EP3_EP_DT ((uint32_t)(0x00000001UL << MXC_F_USB_EP3_EP_DT_POS)) |
AnnaBridge | 171:3a7713b1edbc | 369 | #define MXC_F_USB_EP3_EP_STALL_POS 8 |
AnnaBridge | 171:3a7713b1edbc | 370 | #define MXC_F_USB_EP3_EP_STALL ((uint32_t)(0x00000001UL << MXC_F_USB_EP3_EP_STALL_POS)) |
AnnaBridge | 171:3a7713b1edbc | 371 | #define MXC_F_USB_EP3_EP_ST_STALL_POS 9 |
AnnaBridge | 171:3a7713b1edbc | 372 | #define MXC_F_USB_EP3_EP_ST_STALL ((uint32_t)(0x00000001UL << MXC_F_USB_EP3_EP_ST_STALL_POS)) |
AnnaBridge | 171:3a7713b1edbc | 373 | #define MXC_F_USB_EP3_EP_ST_ACK_POS 10 |
AnnaBridge | 171:3a7713b1edbc | 374 | #define MXC_F_USB_EP3_EP_ST_ACK ((uint32_t)(0x00000001UL << MXC_F_USB_EP3_EP_ST_ACK_POS)) |
AnnaBridge | 171:3a7713b1edbc | 375 | |
AnnaBridge | 171:3a7713b1edbc | 376 | #define MXC_F_USB_EP4_EP_DIR_POS 0 |
AnnaBridge | 171:3a7713b1edbc | 377 | #define MXC_F_USB_EP4_EP_DIR ((uint32_t)(0x00000003UL << MXC_F_USB_EP4_EP_DIR_POS)) |
AnnaBridge | 171:3a7713b1edbc | 378 | #define MXC_F_USB_EP4_EP_BUF2_POS 3 |
AnnaBridge | 171:3a7713b1edbc | 379 | #define MXC_F_USB_EP4_EP_BUF2 ((uint32_t)(0x00000001UL << MXC_F_USB_EP4_EP_BUF2_POS)) |
AnnaBridge | 171:3a7713b1edbc | 380 | #define MXC_F_USB_EP4_EP_INT_EN_POS 4 |
AnnaBridge | 171:3a7713b1edbc | 381 | #define MXC_F_USB_EP4_EP_INT_EN ((uint32_t)(0x00000001UL << MXC_F_USB_EP4_EP_INT_EN_POS)) |
AnnaBridge | 171:3a7713b1edbc | 382 | #define MXC_F_USB_EP4_EP_NAK_EN_POS 5 |
AnnaBridge | 171:3a7713b1edbc | 383 | #define MXC_F_USB_EP4_EP_NAK_EN ((uint32_t)(0x00000001UL << MXC_F_USB_EP4_EP_NAK_EN_POS)) |
AnnaBridge | 171:3a7713b1edbc | 384 | #define MXC_F_USB_EP4_EP_DT_POS 6 |
AnnaBridge | 171:3a7713b1edbc | 385 | #define MXC_F_USB_EP4_EP_DT ((uint32_t)(0x00000001UL << MXC_F_USB_EP4_EP_DT_POS)) |
AnnaBridge | 171:3a7713b1edbc | 386 | #define MXC_F_USB_EP4_EP_STALL_POS 8 |
AnnaBridge | 171:3a7713b1edbc | 387 | #define MXC_F_USB_EP4_EP_STALL ((uint32_t)(0x00000001UL << MXC_F_USB_EP4_EP_STALL_POS)) |
AnnaBridge | 171:3a7713b1edbc | 388 | #define MXC_F_USB_EP4_EP_ST_STALL_POS 9 |
AnnaBridge | 171:3a7713b1edbc | 389 | #define MXC_F_USB_EP4_EP_ST_STALL ((uint32_t)(0x00000001UL << MXC_F_USB_EP4_EP_ST_STALL_POS)) |
AnnaBridge | 171:3a7713b1edbc | 390 | #define MXC_F_USB_EP4_EP_ST_ACK_POS 10 |
AnnaBridge | 171:3a7713b1edbc | 391 | #define MXC_F_USB_EP4_EP_ST_ACK ((uint32_t)(0x00000001UL << MXC_F_USB_EP4_EP_ST_ACK_POS)) |
AnnaBridge | 171:3a7713b1edbc | 392 | |
AnnaBridge | 171:3a7713b1edbc | 393 | #define MXC_F_USB_EP5_EP_DIR_POS 0 |
AnnaBridge | 171:3a7713b1edbc | 394 | #define MXC_F_USB_EP5_EP_DIR ((uint32_t)(0x00000003UL << MXC_F_USB_EP5_EP_DIR_POS)) |
AnnaBridge | 171:3a7713b1edbc | 395 | #define MXC_F_USB_EP5_EP_BUF2_POS 3 |
AnnaBridge | 171:3a7713b1edbc | 396 | #define MXC_F_USB_EP5_EP_BUF2 ((uint32_t)(0x00000001UL << MXC_F_USB_EP5_EP_BUF2_POS)) |
AnnaBridge | 171:3a7713b1edbc | 397 | #define MXC_F_USB_EP5_EP_INT_EN_POS 4 |
AnnaBridge | 171:3a7713b1edbc | 398 | #define MXC_F_USB_EP5_EP_INT_EN ((uint32_t)(0x00000001UL << MXC_F_USB_EP5_EP_INT_EN_POS)) |
AnnaBridge | 171:3a7713b1edbc | 399 | #define MXC_F_USB_EP5_EP_NAK_EN_POS 5 |
AnnaBridge | 171:3a7713b1edbc | 400 | #define MXC_F_USB_EP5_EP_NAK_EN ((uint32_t)(0x00000001UL << MXC_F_USB_EP5_EP_NAK_EN_POS)) |
AnnaBridge | 171:3a7713b1edbc | 401 | #define MXC_F_USB_EP5_EP_DT_POS 6 |
AnnaBridge | 171:3a7713b1edbc | 402 | #define MXC_F_USB_EP5_EP_DT ((uint32_t)(0x00000001UL << MXC_F_USB_EP5_EP_DT_POS)) |
AnnaBridge | 171:3a7713b1edbc | 403 | #define MXC_F_USB_EP5_EP_STALL_POS 8 |
AnnaBridge | 171:3a7713b1edbc | 404 | #define MXC_F_USB_EP5_EP_STALL ((uint32_t)(0x00000001UL << MXC_F_USB_EP5_EP_STALL_POS)) |
AnnaBridge | 171:3a7713b1edbc | 405 | #define MXC_F_USB_EP5_EP_ST_STALL_POS 9 |
AnnaBridge | 171:3a7713b1edbc | 406 | #define MXC_F_USB_EP5_EP_ST_STALL ((uint32_t)(0x00000001UL << MXC_F_USB_EP5_EP_ST_STALL_POS)) |
AnnaBridge | 171:3a7713b1edbc | 407 | #define MXC_F_USB_EP5_EP_ST_ACK_POS 10 |
AnnaBridge | 171:3a7713b1edbc | 408 | #define MXC_F_USB_EP5_EP_ST_ACK ((uint32_t)(0x00000001UL << MXC_F_USB_EP5_EP_ST_ACK_POS)) |
AnnaBridge | 171:3a7713b1edbc | 409 | |
AnnaBridge | 171:3a7713b1edbc | 410 | #define MXC_F_USB_EP6_EP_DIR_POS 0 |
AnnaBridge | 171:3a7713b1edbc | 411 | #define MXC_F_USB_EP6_EP_DIR ((uint32_t)(0x00000003UL << MXC_F_USB_EP6_EP_DIR_POS)) |
AnnaBridge | 171:3a7713b1edbc | 412 | #define MXC_F_USB_EP6_EP_BUF2_POS 3 |
AnnaBridge | 171:3a7713b1edbc | 413 | #define MXC_F_USB_EP6_EP_BUF2 ((uint32_t)(0x00000001UL << MXC_F_USB_EP6_EP_BUF2_POS)) |
AnnaBridge | 171:3a7713b1edbc | 414 | #define MXC_F_USB_EP6_EP_INT_EN_POS 4 |
AnnaBridge | 171:3a7713b1edbc | 415 | #define MXC_F_USB_EP6_EP_INT_EN ((uint32_t)(0x00000001UL << MXC_F_USB_EP6_EP_INT_EN_POS)) |
AnnaBridge | 171:3a7713b1edbc | 416 | #define MXC_F_USB_EP6_EP_NAK_EN_POS 5 |
AnnaBridge | 171:3a7713b1edbc | 417 | #define MXC_F_USB_EP6_EP_NAK_EN ((uint32_t)(0x00000001UL << MXC_F_USB_EP6_EP_NAK_EN_POS)) |
AnnaBridge | 171:3a7713b1edbc | 418 | #define MXC_F_USB_EP6_EP_DT_POS 6 |
AnnaBridge | 171:3a7713b1edbc | 419 | #define MXC_F_USB_EP6_EP_DT ((uint32_t)(0x00000001UL << MXC_F_USB_EP6_EP_DT_POS)) |
AnnaBridge | 171:3a7713b1edbc | 420 | #define MXC_F_USB_EP6_EP_STALL_POS 8 |
AnnaBridge | 171:3a7713b1edbc | 421 | #define MXC_F_USB_EP6_EP_STALL ((uint32_t)(0x00000001UL << MXC_F_USB_EP6_EP_STALL_POS)) |
AnnaBridge | 171:3a7713b1edbc | 422 | #define MXC_F_USB_EP6_EP_ST_STALL_POS 9 |
AnnaBridge | 171:3a7713b1edbc | 423 | #define MXC_F_USB_EP6_EP_ST_STALL ((uint32_t)(0x00000001UL << MXC_F_USB_EP6_EP_ST_STALL_POS)) |
AnnaBridge | 171:3a7713b1edbc | 424 | #define MXC_F_USB_EP6_EP_ST_ACK_POS 10 |
AnnaBridge | 171:3a7713b1edbc | 425 | #define MXC_F_USB_EP6_EP_ST_ACK ((uint32_t)(0x00000001UL << MXC_F_USB_EP6_EP_ST_ACK_POS)) |
AnnaBridge | 171:3a7713b1edbc | 426 | |
AnnaBridge | 171:3a7713b1edbc | 427 | #define MXC_F_USB_EP7_EP_DIR_POS 0 |
AnnaBridge | 171:3a7713b1edbc | 428 | #define MXC_F_USB_EP7_EP_DIR ((uint32_t)(0x00000003UL << MXC_F_USB_EP7_EP_DIR_POS)) |
AnnaBridge | 171:3a7713b1edbc | 429 | #define MXC_F_USB_EP7_EP_BUF2_POS 3 |
AnnaBridge | 171:3a7713b1edbc | 430 | #define MXC_F_USB_EP7_EP_BUF2 ((uint32_t)(0x00000001UL << MXC_F_USB_EP7_EP_BUF2_POS)) |
AnnaBridge | 171:3a7713b1edbc | 431 | #define MXC_F_USB_EP7_EP_INT_EN_POS 4 |
AnnaBridge | 171:3a7713b1edbc | 432 | #define MXC_F_USB_EP7_EP_INT_EN ((uint32_t)(0x00000001UL << MXC_F_USB_EP7_EP_INT_EN_POS)) |
AnnaBridge | 171:3a7713b1edbc | 433 | #define MXC_F_USB_EP7_EP_NAK_EN_POS 5 |
AnnaBridge | 171:3a7713b1edbc | 434 | #define MXC_F_USB_EP7_EP_NAK_EN ((uint32_t)(0x00000001UL << MXC_F_USB_EP7_EP_NAK_EN_POS)) |
AnnaBridge | 171:3a7713b1edbc | 435 | #define MXC_F_USB_EP7_EP_DT_POS 6 |
AnnaBridge | 171:3a7713b1edbc | 436 | #define MXC_F_USB_EP7_EP_DT ((uint32_t)(0x00000001UL << MXC_F_USB_EP7_EP_DT_POS)) |
AnnaBridge | 171:3a7713b1edbc | 437 | #define MXC_F_USB_EP7_EP_STALL_POS 8 |
AnnaBridge | 171:3a7713b1edbc | 438 | #define MXC_F_USB_EP7_EP_STALL ((uint32_t)(0x00000001UL << MXC_F_USB_EP7_EP_STALL_POS)) |
AnnaBridge | 171:3a7713b1edbc | 439 | #define MXC_F_USB_EP7_EP_ST_STALL_POS 9 |
AnnaBridge | 171:3a7713b1edbc | 440 | #define MXC_F_USB_EP7_EP_ST_STALL ((uint32_t)(0x00000001UL << MXC_F_USB_EP7_EP_ST_STALL_POS)) |
AnnaBridge | 171:3a7713b1edbc | 441 | #define MXC_F_USB_EP7_EP_ST_ACK_POS 10 |
AnnaBridge | 171:3a7713b1edbc | 442 | #define MXC_F_USB_EP7_EP_ST_ACK ((uint32_t)(0x00000001UL << MXC_F_USB_EP7_EP_ST_ACK_POS)) |
AnnaBridge | 171:3a7713b1edbc | 443 | |
AnnaBridge | 171:3a7713b1edbc | 444 | #define MXC_F_USB_EP_DIR_POS (0) |
AnnaBridge | 171:3a7713b1edbc | 445 | #define MXC_F_USB_EP_DIR ((uint32_t)(0x00000003UL << MXC_F_USB_EP_DIR_POS)) |
AnnaBridge | 171:3a7713b1edbc | 446 | |
AnnaBridge | 171:3a7713b1edbc | 447 | #define MXC_V_USB_EP_DIR_DISABLE ((uint32_t)0x00000000UL) |
AnnaBridge | 171:3a7713b1edbc | 448 | #define MXC_V_USB_EP_DIR_OUT ((uint32_t)0x00000001UL) |
AnnaBridge | 171:3a7713b1edbc | 449 | #define MXC_V_USB_EP_DIR_IN ((uint32_t)0x00000002UL) |
AnnaBridge | 171:3a7713b1edbc | 450 | #define MXC_V_USB_EP_DIR_CONTROL ((uint32_t)0x00000003UL) |
AnnaBridge | 171:3a7713b1edbc | 451 | |
AnnaBridge | 171:3a7713b1edbc | 452 | #define MXC_S_USB_EP_DIR_DISABLE (MXC_V_USB_EP_DIR_DISABLE << MXC_F_USB_EP_DIR_POS) |
AnnaBridge | 171:3a7713b1edbc | 453 | #define MXC_S_USB_EP_DIR_OUT (MXC_V_USB_EP_DIR_OUT << MXC_F_USB_EP_DIR_POS) |
AnnaBridge | 171:3a7713b1edbc | 454 | #define MXC_S_USB_EP_DIR_IN (MXC_V_USB_EP_DIR_IN << MXC_F_USB_EP_DIR_POS) |
AnnaBridge | 171:3a7713b1edbc | 455 | #define MXC_S_USB_EP_DIR_CONTROL (MXC_V_USB_EP_DIR_CONTROL << MXC_F_USB_EP_DIR_POS) |
AnnaBridge | 171:3a7713b1edbc | 456 | |
AnnaBridge | 171:3a7713b1edbc | 457 | #define MXC_F_USB_EP_BUF2_POS (3) |
AnnaBridge | 171:3a7713b1edbc | 458 | #define MXC_F_USB_EP_BUF2 ((uint32_t)(0x00000001UL << MXC_F_USB_EP_BUF2_POS)) |
AnnaBridge | 171:3a7713b1edbc | 459 | #define MXC_F_USB_EP_INTEN_POS (4) |
AnnaBridge | 171:3a7713b1edbc | 460 | #define MXC_F_USB_EP_INT_EN ((uint32_t)(0x00000001UL << MXC_F_USB_EP_INTEN_POS)) |
AnnaBridge | 171:3a7713b1edbc | 461 | #define MXC_F_USB_EP_NAK_EN_POS (5) |
AnnaBridge | 171:3a7713b1edbc | 462 | #define MXC_F_USB_EP_NAK_EN ((uint32_t)(0x00000001UL << MXC_F_USB_EP_NAK_EN_POS)) |
AnnaBridge | 171:3a7713b1edbc | 463 | #define MXC_F_USB_EP_DT_POS (6) |
AnnaBridge | 171:3a7713b1edbc | 464 | #define MXC_F_USB_EP_DT ((uint32_t)(0x00000001UL << MXC_F_USB_EP_DT_POS)) |
AnnaBridge | 171:3a7713b1edbc | 465 | #define MXC_F_USB_EP_STALL_POS (8) |
AnnaBridge | 171:3a7713b1edbc | 466 | #define MXC_F_USB_EP_STALL ((uint32_t)(0x00000001UL << MXC_F_USB_EP_STALL_POS)) |
AnnaBridge | 171:3a7713b1edbc | 467 | #define MXC_F_USB_EP_ST_STALL_POS (9) |
AnnaBridge | 171:3a7713b1edbc | 468 | #define MXC_F_USB_EP_ST_STALL ((uint32_t)(0x00000001UL << MXC_F_USB_EP_ST_STALL_POS)) |
AnnaBridge | 171:3a7713b1edbc | 469 | #define MXC_F_USB_EP_ST_ACK_POS (10) |
AnnaBridge | 171:3a7713b1edbc | 470 | #define MXC_F_USB_EP_ST_ACK ((uint32_t)(0x00000001UL << MXC_F_USB_EP_ST_ACK_POS)) |
AnnaBridge | 171:3a7713b1edbc | 471 | |
AnnaBridge | 171:3a7713b1edbc | 472 | #ifdef __cplusplus |
AnnaBridge | 171:3a7713b1edbc | 473 | } |
AnnaBridge | 171:3a7713b1edbc | 474 | #endif |
AnnaBridge | 171:3a7713b1edbc | 475 | |
AnnaBridge | 171:3a7713b1edbc | 476 | /** |
AnnaBridge | 171:3a7713b1edbc | 477 | * @} |
AnnaBridge | 171:3a7713b1edbc | 478 | */ |
AnnaBridge | 171:3a7713b1edbc | 479 | |
AnnaBridge | 171:3a7713b1edbc | 480 | #endif /* _MXC_USB_REGS_H_ */ |